Service data transmission method and device, equipment and storage medium
By introducing data link layer protocol and verification mechanism between the CPU module and the CPLD module, the problem of unreliable data transmission in the prior art is solved, and the accuracy and reliability of data transmission are achieved.
Patent Information
- Application Number
- CN202411765871.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-04
- Publication Date
- 2025-02-18
AI Technical Summary
In the prior art, data transmission between the CPU module and the CPLD module is only carried out based on the physical layer through the SPI interface, which cannot guarantee high data reliability. Especially in the process of discrete data transmission, it is easy to cause errors and affect critical tasks or equipment. normal working.
The data link layer protocol is introduced between the CPU module and the CPLD module. The verification data of the data and the lowest bit byte of the register address are used to determine whether the write or read operation is performed, and the correct data is verified through the CRC5 algorithm. to ensure the accuracy of data transmission.
By introducing data link layer protocol and verification mechanism, the data transmission accuracy between the CPU module and the CPLD module is ensured, the bit error rate is reduced, the reliability of data transmission is improved, and the serious consequences caused by incorrect transmission are avoided.
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Figure CN119473983A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the technical field of business data transmission, and in particular to a business data transmission method, device, equipment and storage medium. Background Art
[0002] In existing embedded devices, data is transmitted between the CPU module and the CPLD (Complex Programmable Logic Device) module via the SPI interface. The main advantages of the SPI interface include support for full-duplex operation, simple operation, and high data transmission rate.
[0003] However, the SPI interface does not have a data link layer protocol, and the data transmission between the CPU module and the CPLD module is based on the physical layer. During the data transmission process, the high reliability of data transmission cannot be guaranteed, especially for the transmission of discrete data. If errors occur, it will have a serious impact on the normal operation of key tasks or important equipment.
[0004] Therefore, data transmission between the CPU module and the CPLD module is only based on the physical layer, resulting in the inability to guarantee the accuracy of the transmitted data during the data transmission process, which is a problem that needs to be solved urgently. Summary of the invention
[0005] In view of this, the purpose of this application is to provide a business data transmission method, device, equipment and storage medium to solve the above-mentioned problems, and the data link layer protocol between the CPU module and the CPLD module ensures the accuracy of the transmitted data.
[0006] In a first aspect, an embodiment of the present application provides a method for transmitting service data, the method comprising: The complex programmable logic device (CPLD) module acquires the first service data sent by the CPU module; wherein the first service data includes: a first register address and a first verification data; The CPU module acquires the second service data sent by the CPLD module; wherein the second service data includes: a second register address and a second verification data; The CPLD module operates on the first service data to obtain a first operation result; The CPU module operates the second service data to obtain a second operation result; If the first operation result is the same as the first verification data and the least significant byte of the first register address is 1, the CPLD module writes the first service data into a position corresponding to the first register address; If the second operation result is the same as the second verification data and the least significant byte of the second register address is 0, the CPU module reads the second service data from a position corresponding to the second register address.
[0007] Preferably, the method further comprises: If the first operation result is different from the first verification data, the CPLD module discards the first service data.
[0008] Preferably, the method further comprises: If the second operation result is different from the second verification data, the CPU module discards the second service data.
[0009] Preferably, the first service data further includes: a first frame header, a first service data length and a first frame tail; the method further includes: If the CPLD module recognizes the first frame header, the CPLD module compares the first service data length with a first service data length threshold to obtain a first comparison result; If the first comparison result indicates that the first service data length is less than or equal to the first service data length threshold, the CPLD module receives the first frame tail.
[0010] Preferably, the method further comprises: If the first comparison result indicates that the first service data length is greater than the first service data length threshold, the CPLD module stops receiving the first frame tail.
[0011] Preferably, the second service data further includes: a second frame header, a second service data length, and a second frame tail; and the method further includes: If the CPU module recognizes the second frame header, the CPU module compares the second service data length with a second service data length threshold to obtain a second comparison result; If the second comparison result indicates that the second service data length is less than or equal to the second service data length threshold, the CPU module receives the second frame tail.
[0012] Preferably, the method further comprises: If the second comparison result indicates that the second service data length is greater than the second service data length threshold, the CPU module stops receiving the second frame tail.
[0013] The business data transmission provided by this application brings the following beneficial effects: The present application provides a business data transmission method, in which the CPLD module determines whether the first business data is correct by determining whether the first operation result is the same as the first verification data, and determines whether the second business data is correct by determining whether the second operation result is the same as the second verification data. The CPU module determines whether to perform a read process or a write process by the lowest byte of the first register, wherein the first verification data and the second verification data are both in accordance with the provisions of the data link layer protocol established between the CPU module and the CPLD module. The method verifies the first business data and the second business data based on the data link layer protocol, ensuring the accuracy of the transmission of the first business data and the second business data transmitted between the CPU module and the CPLD module.
[0014] In a second aspect, the present application further provides a service data transmission device, the device comprising: The CPLD module is used to obtain the first service data sent by the CPU module; wherein the first service data includes: a first register address and a first verification data; The CPU module is used to obtain the second business data sent by the CPLD module; wherein the second business data includes: a second register address and a second verification data; The CPLD module is further used to perform operation on the first service data to obtain a first operation result; The CPU module is further used to perform operation on the second service data to obtain a second operation result; The CPLD module is further configured to write the first service data into a position corresponding to the first register address if the first operation result is the same as the first verification data and the least significant byte of the first register address is 1; The CPU module is further configured to read the second business data from a position corresponding to the second register address if the second operation result is the same as the second verification data and the least significant byte of the second register address is 0.
[0015] The business data transmission device provided in the embodiment of the present application has the same technical features as the business data transmission method provided in the above embodiment, so it can also solve the same technical problems and achieve the same technical effects.
[0016] In a third aspect, the present application provides a computing device, including a memory and a processor; One or more computer programs are stored in the memory, and the one or more computer programs include instructions; when the instructions are executed by the processor, the computing device executes the method as described in any one of the first aspects.
[0017] In a fourth aspect, the present application provides a computer-readable storage medium, wherein the computer-readable storage medium is used to store a computer program, and the computer program is used to execute the method as described in any one of the first aspects.
[0018] In a fifth aspect, the present application provides a computer program product, wherein the computer program product comprises one or more computer instructions, and when the computer instructions are executed by a computer, the computer executes the method as described in any one of the first aspects.
[0019] Other features and advantages of the present application will be described in the following description, and partly become apparent from the description, or understood by practicing the present application. The purpose and other advantages of the present application are realized and obtained by the structures particularly pointed out in the description and the drawings.
[0020] In order to make the above-mentioned objects, features and advantages of the present application more obvious and easy to understand, preferred embodiments are specifically cited below and described in detail with reference to the attached drawings. BRIEF DESCRIPTION OF THE DRAWINGS
[0021] In order to more clearly illustrate the specific implementation methods of the present application or the technical solutions in the prior art, the drawings required for use in the specific implementation methods or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are some implementation methods of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.
[0022] Figure 1 A flowchart of a method for transmitting business data provided by an embodiment of the present application; Figure 2 A schematic diagram of a frame structure of first service data provided in an embodiment of the present application; Figure 3 A schematic diagram of a frame structure of second service data provided in an embodiment of the present application; Figure 4 A schematic diagram of the structure of a business data transmission device provided in an embodiment of the present application; Figure 5 A schematic diagram of a computing device provided in an embodiment of the present application. DETAILED DESCRIPTION
[0023] In order to make the purpose, technical solution and advantages of the embodiments of the present application clearer, the technical solution of the present application will be clearly and completely described below in conjunction with the accompanying drawings. Obviously, the described embodiments are part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present application.
[0024] To facilitate understanding of this embodiment, the embodiments of the present application are described in detail below.
[0025] The present application embodiment provides a method for transmitting business data, such as Figure 1 As shown, Figure 1 A flow chart of a method for data transmission of a service provided in an embodiment of the present application. The method comprises the following steps: S101: The CPLD module obtains first service data sent by the CPU module.
[0026] Among them, Figure 2 As shown, Figure 2 A schematic diagram of a frame structure of first service data provided in an embodiment of the present application. The first service data includes: a first register address 201 and first verification data 202.
[0027] Specifically, the CPLD module is an editable digital integrated circuit module with logic functions. The user edits the CPLD module according to actual needs. The CPLD module and the CPU module transmit data through SPI (Serial Peripheral Interface). SPI is a high-speed, full-duplex, synchronous communication bus. The above-mentioned CPU module can be the minimum system of MCU (Microcontroller Unit) or the minimum system of CPU with embedded operating system. The above-mentioned first business data conforms to the frame format specified by the communication protocol of the data link layer created between the CPLD and CPU modules. In addition, the above-mentioned first business data also includes the first business data content 206, which is located between the first register address 201 and the first verification data 202.
[0028] Such an arrangement facilitates the subsequent CPLD module to detect the first service data frame by frame, thereby improving the orderliness of data detection.
[0029] S102: The CPU module obtains second service data sent by the CPLD module.
[0030] Among them, Figure 3 As shown, Figure 3 The second service data includes: a second register address 301 and second verification data 302.
[0031] Specifically, the second service data also includes second service data content 306, located between the second register address 301 and the second verification data 302. The second service data conforms to the frame format specified by the communication protocol of the data link layer established between the CPLD and the CPU module.
[0032] Such an arrangement facilitates the subsequent CPU module to detect the second service data frame by frame, thereby improving the orderliness of data detection.
[0033] S103: The CPLD module operates on the first service data to obtain a first operation result.
[0034] Specifically, the CPLD module operates the first service data using the CRC5 algorithm, and obtains a first operation result which is a first service data cyclic redundancy check code having a byte number of 5. The first operation result (first service data cyclic redundancy check code) is used to verify whether the first service data is correct.
[0035] S104: The CPU module operates on the second business data to obtain a second operation result.
[0036] Specifically, the location where the second service data is stored is the second register address 301 of the CPLD module. The CPLD module operates the second service data through the CRC5 algorithm, and the second operation result obtained is a cyclic redundancy check code of the second service data with a byte number of 5. The second operation result (the cyclic redundancy check code of the second service data) is used to verify whether the second service data is correct.
[0037] S105, the CPLD module determines whether the first operation result is the same as the first verification data and the least significant byte of the first register address is 1, if so, execute step S106, if not, execute S107.
[0038] Specifically, the first verification data 202 is a cyclic redundancy check code specified by the communication protocol of the data link layer created between the CPLD and the CPU module and pre-set by the CPU module before the first service data is transmitted. By judging whether the cyclic redundancy check code pre-set by the CPU module is the same as the cyclic redundancy check code calculated by the CPLD module, it can be determined whether the first service data sent by the CPU module obtained by the CPLD module is correct, that is, whether an error (bit error) occurs during the transmission process. The least significant byte of the first register address 201 is also pre-set by the CPU module before the first service data is transmitted.
[0039] With such configuration, the CPLD module verifies the correctness of the acquired first service data through the CRC5 algorithm, thereby ensuring the accuracy of the acquired first service data and reducing the bit error rate of the acquired first service data.
[0040] S106: The CPLD module writes the first service data into a position corresponding to the first register address.
[0041] Specifically, if the cyclic redundancy check code (first operation result) obtained by the CPLD operation is the same as the cyclic redundancy check code (first check data 202) pre-set by the CPU module, it means that the first service data is consistent when it arrives at the CPLD module and when it is sent from the CPU module, and no bit error occurs during the transmission process. Since the lowest bit of the first register address 201 pre-set by the CPU module and the CPLD module is 1, it means that the process is the process of the CPLD module writing the first service data into the CPLD module, so at this time, the CPLD will write the first service data into the position corresponding to the first register address 201.
[0042] S107: The CPLD module discards the first service data.
[0043] Specifically, if the cyclic redundancy check code (first operation result) obtained by the CPLD operation is different from the cyclic redundancy check code (first verification data 202) preset by the CPU module, it means that the first service data is different when it arrives at the CPLD module and when it is sent from the CPU module, that is, a bit error occurs during the transmission process. At this time, the first service data is wrong or invalid, the CPLD module will discard the first service data, and the state machine in the CPLD module will prepare to verify the next first service data again.
[0044] Such a configuration can ensure the accuracy of the first service data written in the CPLD module and exclude invalid service data, thereby avoiding excessive occupation of storage resources.
[0045] S108, the CPU module determines whether the second operation result is the same as the second verification data and the least significant byte of the second register address is 0, if so, execute step S109, if not, execute S110.
[0046] Specifically, the second service data is stored in the position corresponding to the second register address 301 of the CPLD module, and the second verification data 302 is a cyclic redundancy check code pre-set by the CPLD module before the first service data is transmitted, that is, the communication protocol of the data link layer created between the CPLD and the CPU module. By judging whether the cyclic redundancy check code (second operation result) obtained by the CPU module is the same as the cyclic redundancy check code pre-set by the CPLD module, it can be determined whether the second service data sent by the CPLD module read by the CPU module has an error (bit error) during the transmission process. The lowest bit of the second register address 301 is pre-set by the CPLD module before the second service data is transmitted, that is, the communication protocol of the data link layer created between the CPLD and the CPU module.
[0047] With such configuration, the CPU module verifies the correctness of the read second service data through the CRC5 algorithm, thereby ensuring the accuracy of the read second service data and reducing the bit error rate of the read second service data.
[0048] S109: The CPU module reads the second service data from a position corresponding to the second register address.
[0049] If the cyclic redundancy check code (second operation result) obtained by the CPU operation is the same as the cyclic redundancy check code (second check data 302) pre-set by the CPLD module, it means that the second service data is consistent when it arrives at the CPU module and when it is sent from the CPLD module, and no bit error occurs during the transmission process. Since the lowest bit of the second register address 301 pre-set by the CPLD module is 0, it means that the process is the process of the CPU module reading the second service data from the CPLD module, so at this time, the CPU module reads the second service data from the position corresponding to the second register address 301.
[0050] S110: The CPU module discards the second service data.
[0051] Specifically, if the cyclic redundancy check code (second operation result) obtained by the CPU operation is different from the cyclic redundancy check code (second verification data 302) preset by the CPLD module, it means that the second service data is different when it arrives at the CPU module and when it is sent from the CPLD module, that is, a bit error occurs during the transmission process. At this time, the second service data is wrong or invalid, the CPU module will discard the second service data, and the state machine in the CPU module will prepare to verify the next first service data again.
[0052] Such a configuration can ensure the accuracy of the second service data read by the CPU module and exclude invalid service data, thereby avoiding excessive occupation of storage resources.
[0053] The embodiment of the present application provides a business data transmission method, in which the CPLD module determines whether the first business data is correct by determining whether the first operation result is the same as the first verification data 202, and determines whether the second business data is correct by determining whether the second operation result is the same as the second verification data 302. The CPU module determines whether to perform a read process or a write process by the lowest byte of the first register, wherein the first verification data 202 and the second verification data 302 are both in accordance with the provisions of the data link layer protocol established between the CPU module and the CPLD module. Compared with the prior art, in which data is transmitted between the CPU module and the CPLD module only through SPI based on the physical layer, this method verifies the first business data and the second business data based on the data link layer protocol, ensuring the accuracy of the transmission of the first business data and the second business data transmitted between the CPU module and the CPLD module. It can be seen that the method can realize the accurate transmission of discrete data (output and input of digital signals) between the CPU module and the CPLD module, can ensure the reliability of SPI for data transmission, and effectively prevent the serious consequences caused by erroneous transmission.
[0054] In one embodiment, if Figure 2 As shown, Figure 2 A schematic diagram of the frame structure of the first business data provided in the embodiment of the present application. The first business data also includes: a first frame header 203, a first business data length 204 and a first frame tail 205; if the CPLD module recognizes the first frame header 203, the CPLD module compares the first business data length 204 with the first business data length 204 threshold to obtain a first comparison result; if the first comparison result indicates that the first business data length 204 is less than or equal to the first business data length 204 threshold, the CPLD module receives the first frame tail 205; if the first comparison result indicates that the first business data length 204 is greater than the first business data length 204 threshold, the CPLD module stops receiving the first frame tail 205.
[0055] Specifically, the first frame header 203 is the first byte of the first service data. The CPLD module confirms that the acquired data is the first service data sent by the CPU module based on the first frame header 203, and then starts the detection. The length of the first service data is regulated by the data link layer protocol established between the CPU module and the CPLD module, and is set by the CPU module during the process of packet assembly (forming the first service data). If the first service data length 204 is less than or equal to the first service data length 204 threshold, it means that the first service data is consistent with the first service data length 204 set when the packet is assembled, and it complies with the provisions of the data link layer protocol established between the CPU module and the CPLD module. At this time, the CPLD module continues to receive the first frame tail 205 to obtain the complete first service data. If the first service data length 204 is greater than the first service data length 204 threshold, it means that the first service data is inconsistent with the first service data length 204 set when the packet is assembled, and it does not comply with the provisions of the data link layer protocol established between the CPU module and the CPLD module. At this time, the CPLD module stops receiving the first frame tail 205.
[0056] In this manner, the CPLD module can accurately identify the first frame header 203 and the first frame tail 205, ensuring the integrity and accuracy of the acquired first service data. By comparing the first service data length 204 with the first service data length 204 threshold, it is possible to avoid receiving incomplete or erroneous first service data, thereby improving the accuracy of data processing by the CPLD module.
[0057] In one embodiment, if Figure 3 As shown, Figure 3 A schematic diagram of the frame structure of the second business data provided in the embodiment of the present application. The second business data also includes: a second frame header 303, a second business data length 304, and a second frame tail 305; if the CPU module recognizes the second frame header 303, the CPU module compares the second business data length 304 with the second business data length 304 threshold to obtain a second comparison result; if the second comparison result indicates that the second business data length 304 is less than or equal to the second business data length 304 threshold, the CPU module receives the second frame tail 305; if the second comparison result indicates that the second business data length 304 is greater than the second business data length 304 threshold, the CPU module stops receiving the second frame tail 305.
[0058] Specifically, the second frame header 303 is the first byte of the second service data. The CPLD module confirms that the acquired data is the second service data sent by the CPLD module based on the second frame header 303, and then starts the detection. The length of the second service data is regulated by the data link layer protocol established between the CPU module and the CPLD module, and is set by the CPLD module during the packet assembly (forming the second service data). If the second service data length 304 is less than or equal to the second service data length 304 threshold, it means that the second service data is consistent with the second service data length 304 set during the packet assembly, and complies with the provisions of the data link layer protocol established between the CPU module and the CPLD module. At this time, the CPU module continues to receive the second frame tail 305 to obtain the complete second service data. If the second service data length 304 is greater than the second service data length 304 threshold, it means that the second service data is inconsistent with the second service data length 304 set during the packet assembly, and does not comply with the provisions of the data link layer protocol established between the CPU module and the CPLD module. At this time, the CPU module stops receiving the second frame tail 305.
[0059] In this manner, the CPU module can accurately identify the second frame header 303 and the second frame tail 305, ensuring the integrity and accuracy of the acquired second service data. By comparing the second service data length 304 with the second service data length 304 threshold, it is possible to avoid receiving incomplete or erroneous second service data, thereby improving the accuracy of data processing by the CPU module.
[0060] In addition, whether the CPU module performs an operation of writing the first service data or reading the second service data, it is necessary to detect the function of the CPU module when power is turned on. The specific detection process is as follows: (1) Initialize the SPI controller of the CPU module after power-on.
[0061] (2) The CPU module writes the original detection data 0xaa55 to the third register address 0x01 of the CPLD module, performs CRC5 calculation on the original detection data 0xaa55, and inserts the third calculation result and the third frame tail into the original detection data 0xaa55 to obtain the third detection data.
[0062] (3) The CPU module sends the third detection data to the CPLD module via SPI.
[0063] (4) The CPLD module parses the third detection data byte by byte to obtain a third parsing result. If the third parsing result indicates that the third detection data is valid, the third detection data is stored in a position corresponding to the third register address 0x01.
[0064] (5) The CPU module resends the read command data frame to the third register address 0x01 of the CPLD module.
[0065] (6) The CPLD module inverts the data 0xaa55 at the third register address 0x01, and inserts it into the read command data frame together with the terminator to obtain the fourth detection data, and sends the fourth detection data to the CPU module.
[0066] (7) The CPU module receives the fourth detection data and verifies the fourth detection data. If the fourth verification data is 0x55aa, the CPU module is normal and the SPI communication function is normal.
[0067] Based on the above method embodiment, the present application embodiment also provides a service data transmission device, such as Figure 4 As shown, Figure 4 A schematic diagram of a business data transmission device provided in an embodiment of the present application. The device includes: a CPLD module 41 and a CPU module 42. The functions of each module are as follows: The CPLD module 41 is used to obtain the first service data sent by the CPU module; wherein the first service data includes: a first register address and a first verification data; The CPU module 42 is used to obtain the second service data sent by the CPLD module; wherein the second service data includes: a second register address and a second verification data; The CPLD module 41 is further used to operate the first service data to obtain a first operation result; The CPU module 42 is further used to operate the second business data to obtain a second operation result; The CPLD module 41 is further configured to write the first service data into a position corresponding to the first register address if the first operation result is the same as the first verification data and the least significant byte of the first register address is 1; The CPU module 42 is further configured to read the second service data from a position corresponding to the second register address if the second operation result is the same as the second verification data and the least significant byte of the second register address is 0.
[0068] Preferably, the CPLD module 41 is further configured to discard the first service data if the first operation result is different from the first verification data.
[0069] Preferably, the CPU module 42 is further configured to discard the second business data if the second operation result is different from the second verification data.
[0070] Preferably, the first service data further includes: a first frame header, a first service data length and a first frame tail; The CPLD module 41 is also used to compare the first service data length with the first service data length threshold to obtain a first comparison result if the CPLD module identifies the first frame header; if the first comparison result indicates that the first service data length is less than or equal to the first service data length threshold, receive the first frame tail.
[0071] Preferably, the CPLD module 41 is further configured to stop receiving the first frame tail if the first comparison result indicates that the first service data length is greater than the first service data length threshold.
[0072] Preferably, the second service data further includes: a second frame header, a second service data length, and a second frame tail; The CPU module 42 is also used to, if the CPU module identifies the second frame header, the CPU module compares the second business data length with the second business data length threshold to obtain a second comparison result; if the second comparison result indicates that the second business data length is less than or equal to the second business data length threshold, then receive the second frame tail.
[0073] Preferably, the CPU module 42 is further configured to stop receiving the second frame tail if the second comparison result indicates that the second service data length is greater than the second service data length threshold.
[0074] The business data transmission device provided in the embodiment of the present application has the same technical features as the business data transmission method provided in the above embodiment, so it can also solve the same technical problems and achieve the same technical effects.
[0075] The present application also provides a computing device. Figure 5 As shown, this figure is a schematic diagram of a computing device provided in an embodiment of the present application, and the computing device 400 includes a bus 401, a processor 402, a communication interface 403 and a memory 404. The processor 402, the memory 404 and the communication interface 403 communicate with each other through the bus 401.
[0076] The bus 401 may be a peripheral component interconnect (PCI) bus or an extended industry standard architecture (EISA) bus. The bus may be divided into an address bus, a data bus, a control bus, etc. For ease of representation, Figure 5 Only one thick line is used in the diagram, but this does not mean that there is only one bus or only one type of bus.
[0077] The processor 402 may be any one or more of a central processing unit (CPU), a graphics processing unit (GPU), a microprocessor (MP), or a digital signal processor (DSP).
[0078] The communication interface 403 is used for communicating with the outside. The memory 404 may include a volatile memory, such as a random access memory (RAM). The memory 404 may also include a non-volatile memory, such as a read-only memory (ROM), a flash memory, a hard disk drive (HDD) or a solid state drive (SSD).
[0079] The memory 404 stores executable codes, and the processor 402 executes the executable codes to perform the aforementioned method.
[0080] The embodiment of the present application also provides a computer-readable storage medium. The computer-readable storage medium can be any available medium that can be stored by a computing device or a data storage device such as a data center containing one or more available media. The available medium can be a magnetic medium (such as a floppy disk, a hard disk, a tape), an optical medium (such as a DVD), or a semiconductor medium (such as a solid-state hard disk). The computer-readable storage medium includes instructions that instruct the computing device to execute the above method.
[0081] The embodiment of the present application further provides a computer program product, which includes one or more computer instructions. When the computer instructions are loaded and executed on a computing device, the process or function described in the embodiment of the present application is generated in whole or in part.
[0082] The computer instructions may be stored in a computer-readable storage medium, or transmitted from one computer-readable storage medium to another computer-readable storage medium. For example, the computer instructions may be transmitted from one website, computer or data center to another website, computer or data center via wired (e.g., coaxial cable, optical fiber) or wireless (e.g., infrared, wireless, microwave, etc.) means.
[0083] When the computer program product is executed by a computer, the computer executes any of the aforementioned methods. The computer program product may be a software installation package, and when any of the aforementioned methods is needed, the computer program product may be downloaded and executed on a computer.
[0084] The descriptions of the processes or structures corresponding to the above-mentioned figures have different emphases. For parts that are not described in detail in a certain process or structure, please refer to the relevant descriptions of other processes or structures.
[0085] The above description is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any changes or substitutions within the technical scope disclosed in the present application should be included in the protection scope of the present application.
Claims
1. A method for transmitting business data, characterized in that: The method comprises: The complex programmable logic device (CPLD) module acquires the first service data sent by the CPU module; wherein the first service data includes: a first register address and a first verification data; The CPU module acquires the second service data sent by the CPLD module; wherein the second service data includes: a second register address and a second verification data; The CPLD module operates on the first service data to obtain a first operation result; The CPU module operates the second service data to obtain a second operation result; If the first operation result is the same as the first verification data and the least significant byte of the first register address is 1, the CPLD module writes the first service data into a position corresponding to the first register address; If the second operation result is the same as the second verification data and the least significant byte of the second register address is 0, the CPU module reads the second service data from a position corresponding to the second register address.
2. The service data transmission method according to claim 1, characterized in that: The method further comprises: If the first operation result is different from the first verification data, the CPLD module discards the first service data.
3. The service data transmission method according to claim 1, characterized in that: The method further comprises: If the second operation result is different from the second verification data, the CPU module discards the second service data.
4. The service data transmission method according to claim 1, characterized in that: The first service data further includes: a first frame header, a first service data length, and a first frame tail; the method further includes: If the CPLD module recognizes the first frame header, the CPLD module compares the first service data length with a first service data length threshold to obtain a first comparison result; If the first comparison result indicates that the first service data length is less than or equal to the first service data length threshold, the CPLD module receives the first frame tail.
5. The service data transmission method according to claim 4, characterized in that: The method further comprises: If the first comparison result indicates that the first service data length is greater than the first service data length threshold, the CPLD module stops receiving the first frame tail.
6. The service data transmission method according to claim 1, characterized in that: The second service data further includes: a second frame header, a second service data length, and a second frame tail; the method further includes: If the CPU module recognizes the second frame header, the CPU module compares the second service data length with a second service data length threshold to obtain a second comparison result; If the second comparison result indicates that the second service data length is less than or equal to the second service data length threshold, the CPU module receives the second frame tail.
7. The service data transmission method according to claim 6, characterized in that: The method further comprises: If the second comparison result indicates that the second service data length is greater than the second service data length threshold, the CPU module stops receiving the second frame tail.
8. A service data transmission device, characterized in that: The device comprises: The CPLD module is used to obtain the first service data sent by the CPU module; wherein the first service data includes: a first register address and a first verification data; The CPU module is used to obtain the second business data sent by the CPLD module; wherein the second business data includes: a second register address and a second verification data; The CPLD module is further used to perform operation on the first service data to obtain a first operation result; The CPU module is further used to perform operation on the second service data to obtain a second operation result; The CPLD module is further configured to write the first service data into a position corresponding to the first register address if the first operation result is the same as the first verification data and the least significant byte of the first register address is 1; The CPU module is further configured to read the second business data from a position corresponding to the second register address if the second operation result is the same as the second verification data and the least significant byte of the second register address is 0.
9. A computing device, characterized in that including memory and processor; One or more computer programs are stored in the memory, and the one or more computer programs include instructions; when the instructions are executed by the processor, the computing device executes the method as claimed in any one of claims 1 to 7.
10. A computer-readable storage medium, characterized in that: The computer-readable storage medium is used to store a computer program, and the computer program is used to execute the method according to any one of claims 1 to 7.
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