Rectifier circuit detection method based on attention mechanism CNN (Convolutional Neural Network)

Abstract

The invention provides a CNN three-phase rectification circuit fault detection method based on a CBAM attention mechanism. The method comprises the steps of receiving time domain feature vector samples corresponding to a rated number of simulation sample data; converting the collected sample into a two-dimensional grayscale image, and substituting the two-dimensional grayscale image into a network for learning; a CNN network combining a multi-scale convolutional layer and a CBAM attention mechanism is designed, and an improved depth separable convolutional layer is used to replace a traditional convolutional layer. The method and the system are suitable for rectification power supply fault detection tasks and have universality. On the basis, circuit fault detection is achieved, and the technical problem that in the prior art, a rectifying circuit fault detection method is lacked is solved.

Description

Technical Field

[0001] The present invention relates to the field of circuit detection, and in particular to an analog circuit fault detection method, system, device, and storage medium. Background Art

[0002] High-power DC power supplies are widely used in various fields. In the fields of electrochemistry, arc furnace heating, strong magnetic field power supplies, high-voltage DC transmission, etc., thyristor rectifier power supplies still dominate. In order to reduce the harmonic content of AC input current and DC output voltage and improve the total input power factor, large-capacity thyristor rectifiers often use multiple rectification technology. However, due to the increase in the types and frequency of use of different electronic devices, the power system is facing serious harmonic pollution problems. The fault problem of the rectifier circuit has attracted more and more attention. Therefore, studying the fault diagnosis problem of the rectifier circuit is of great significance to improving the stability of the entire power system.

[0003] Diode failure accounts for the largest percentage of rectifier circuit failure problems, so we will focus on this issue. Open circuit failure and short circuit failure are the most common rectifier failures. Since the short circuit failure of the rectifier diode is destructive and easily causes current overload, the short circuit failure of the rectifier is completed by standard protection circuits. However, when the rectifier transistor in the circuit has an open circuit failure, it will cause the rectifier circuit system to be unstable and cause damage to the load circuit.

[0004] Therefore, there is an urgent need for a rectifier circuit fault detection method, system, device, and storage medium, which can help solve the technical problem of the lack of a rectifier circuit fault detection method in the prior art. Summary of the invention

[0005] The present invention provides a rectifier circuit fault detection method, which determines whether a sample is an abnormal sample based on CNN through time domain feature vector samples, thereby realizing diode fault detection, which helps to solve the technical problem of lack of a rectifier circuit fault detection method in the prior art.

[0006] The method includes:

[0007] Collect the circuit output time domain feature vector samples corresponding to the rated number of sample simulation sample data: Use discrete Fourier transform to convert the time series signal into a sample that can reflect the frequency domain characteristics and periodic characteristics. By converting one-dimensional data into two-dimensional data, the collected sequence signal is converted into a two-dimensional grayscale image data sample.

[0008] The CBAM self-attention mechanism and depth-wise separable convolution are used in the network model to deepen the feature extraction depth while reducing the amount of computation.

[0009] By dividing the samples into training and test sets and bringing them into the network, the parameter model is obtained through network self-learning.

[0010] A simulated circuit fault is detected according to the fault detection model.

[0011] In one embodiment, the time domain feature vector samples corresponding to the received rated number of simulation sample data include:

[0012] receiving a rated amount of simulation sample data;

[0013] The corresponding time domain feature vector samples are constructed through DFT according to the simulation sample data.

[0014] In one embodiment, before the step of receiving the time domain feature vector samples corresponding to the rated number of simulation sample data, the method includes:

[0015] Draw a simulation circuit diagram on the simulation software according to a predetermined drawing method;

[0016] According to the drawn simulation circuit diagram, test stimulus and test points are selected to perform simulation to obtain simulation sample data.

[0017] In one embodiment, the simulation software is PSPICE, and the simulation sample data is obtained through Monte-Carlo analysis simulation.

[0018] In one embodiment, detecting an analog circuit fault according to the fault detection threshold comprises:

[0019] Receiving circuit detection data to be detected;

[0020] According to the circuit detection data, the circuit health status information is obtained through the fault detection threshold identification to detect the rectifier circuit fault.

[0021] In one embodiment, the present invention provides a rectifier circuit fault detection system, which includes a background system; the background system is used to receive time domain feature vector samples corresponding to a rated number of simulation sample data; two-dimensional processing is performed based on the time domain feature vector samples, and a parameter model that meets the conditions is built in the built CNN network to detect rectifier circuit faults.

[0022] In one embodiment, the rectifier circuit fault detection system further includes a rectifier circuit simulation system;

[0023] The analog circuit simulation system is used to draw an analog circuit diagram on the simulation software according to a predetermined drawing method;

[0024] According to the drawn simulation circuit diagram, test stimulus and test points are selected to perform simulation to obtain simulation sample data.

[0025] In one embodiment, the present invention provides a rectifier circuit fault detection device, the device comprising:

[0026] A receiving module, used for receiving time domain feature vector samples corresponding to a rated number of simulation sample data;

[0027] The computing module is used to convert the collected time domain feature vectors into two-dimensional images and bring them into the CNN network to train parameters.

[0028] The detection module is used to detect analog circuit faults based on the trained CNN network.

[0029] A rectifier circuit fault detection device, the device comprising: a processor and a memory;

[0030] The memory stores an application program executable by the processor, which is used to enable the processor to execute the steps of the analog circuit fault detection method.

[0031] In one embodiment, the present invention further provides a computer-readable storage medium having a computer program stored thereon, which implements the steps of the rectifier circuit fault detection method when executed by a processor. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] Figure 1 100 is a schematic diagram of a process of a rectifier circuit fault detection method according to an embodiment of the present invention;

[0033] Figure 2 200 is a schematic diagram of a process of a rectifier circuit fault detection method according to another embodiment of the present invention;

[0034] Figure 3 A schematic diagram of a process 300 of a rectifier circuit fault detection method according to another embodiment of the present invention;

[0035] Figure 4 A schematic diagram of a process 400 of a rectifier circuit fault detection method according to another embodiment of the present invention;

[0036] Figure 5 is a schematic diagram of the principle of a rectifier circuit in another embodiment of the present invention;

[0037] Figure 6 A schematic diagram of a process 500 of a rectifier circuit fault detection method according to another embodiment of the present invention;

[0038] Figure 7 Schematic diagram of a rectifier circuit fault detection device in another embodiment of the present invention. DETAILED DESCRIPTION

[0039] In order to enable those skilled in the art to better understand the technical solution of the present invention, the present invention is described in detail below in conjunction with the accompanying drawings and specific implementation methods.

[0040] Various schemes and features of the present application are described herein with reference to the accompanying drawings. These and other features of the present application will become apparent from the following description of preferred forms of embodiments given as non-limiting examples with reference to the accompanying drawings. It should also be understood that although the present application has been described with reference to some specific examples, a person skilled in the art will be able to realize many other equivalent forms of the present application with certainty, which have the characteristics described in the claims and are therefore within the scope of protection defined thereby. The above and other aspects, features and advantages of the present application will become more apparent in view of the following detailed description when combined with the accompanying drawings.

[0041] Specific embodiments of the present application are described hereinafter with reference to the accompanying drawings; however, it should be understood that the embodiments applied for are merely examples of the present application, which may be implemented in a variety of ways. Familiar and / or repeated functions and structures are not described in detail to determine the true intent based on the user's historical operations and to avoid unnecessary or redundant details that make the present application unclear. Therefore, the specific structural and functional details applied for herein are not intended to be limiting, but are merely used as the basis and representative basis for the claims to teach those skilled in the art to use the present application in a variety of ways with substantially any appropriate detailed structure.

[0042] This specification may use the phrases "in one embodiment", "in another embodiment", "in yet another embodiment" or "in other embodiments", which may refer to one or more of the same or different embodiments according to the present application.

[0043] Discrete Fourier Transform (DFT) is a signal processing method with unique frequency localization characteristics. DFT is used to parse the time domain response information into a combination of many corresponding sine and cosine signals, so that the frequency domain characteristics and periodic characteristics contained in the signal can be reflected only through the time domain response output.

[0044] Compared with traditional machine learning algorithms, which usually use a limited number of features to predict or classify data, CNN networks can learn the representation of data by building multi-layer neural networks. CNN networks automatically learn features and model parameters through large-scale data training, and have advantages in processing complex and high-dimensional data.

[0045] Based on the above concepts, Figure 1 FIG. 1 is a schematic diagram of a process 100 of a rectifier circuit fault detection method according to an embodiment of the present invention. Figure 1As shown, in one embodiment, the present invention provides a rectifier circuit fault detection method, the method comprising:

[0046] S101, receiving a rated number of simulation sample feature image data samples. The rated number of image samples can be used as a training set for subsequent steps. In this step, a specific step of receiving a rated number of two-dimensional grayscale image data samples is provided.

[0047] S102, based on the built lightweight attention mechanism CNN network, the image data is classified into a training set and a test set to continuously optimize the weight parameters in the network. In this step, a specific step of fault diagnosis based on the CNN network is provided.

[0048] S103, detecting a rectifier circuit fault according to the fault detection threshold. In this step, a specific step of detecting a rectifier circuit fault according to the fault is provided. Specifically, it is determined whether the fault detection threshold is exceeded, thereby obtaining a rectifier circuit fault detection. In this embodiment, a specific implementation method of a rectifier circuit fault detection method is provided.

[0049] First, the feature image samples are received and brought into the constructed CNN network to update the network model parameters. Finally, the rectifier circuit fault is detected based on the updated parameter network model.

[0050] Figure 2 FIG. 2 is a schematic diagram of a process 200 of a rectifier circuit fault detection method according to another embodiment of the present invention. Figure 2 As shown,

[0051] S201 receives the specific steps of the rated number of simulation sample data and domain feature vector samples. Perform DFT on the pulse sequence signal of each fault category to obtain the time-frequency domain characteristics of the signal, and parse the time-domain response information into a combination of many corresponding sine and cosine signals, so that the frequency domain characteristics and periodic characteristics contained in the signal can be reflected only through the time-domain response output. After the data is spliced ​​according to the periodicity, it is processed by gray value to construct a sample set of rectifier circuit signal feature images and the sample set is evenly and randomly divided into a training set and a test set.

[0052] S202 constructs a corresponding time domain feature vector sample according to the simulation data through DFT. In this embodiment, a specific implementation method of receiving feature image samples corresponding to a rated number of simulation sample data is provided. First, a rated number of simulation sample data is received. Finally, according to the simulation sample data, a corresponding time domain feature vector sample is constructed through DFT.

[0053] Figure 3 FIG. 3 is a schematic diagram of a process 300 of a rectifier circuit fault detection method according to another embodiment of the present invention. Figure 3As shown, in one embodiment, before the step of receiving the simulated characteristic image sample, the method includes:

[0054] S301, draw a simulation circuit diagram in a predetermined drawing mode on the simulation software. In this step, a specific step of drawing a rectifier circuit diagram in a predetermined drawing mode on the simulation software is provided.

[0055] S302, selecting test excitation and test points according to the drawn rectifier circuit diagram to simulate and obtain simulation sample data. In this step, selecting test excitation and test points according to the drawn rectifier circuit diagram to simulate and obtain simulation sample data. In this embodiment, a specific implementation method for obtaining simulation sample data is provided, that is, in this step,

[0056] A specific step of drawing a simulation circuit diagram on a simulation software according to a predetermined drawing method. According to the drawn rectifier circuit diagram, a test stimulus and a test point are selected for simulation to obtain simulation sample data. In one embodiment, the simulation software is PSPICE, and the simulation sample data is obtained by Monte-Carlo analysis simulation. In this embodiment, a specific implementation method of the simulation software and the analysis method is provided. The experimental circuit is simulated using PSPICE software, and the circuit output end is selected as a test point to obtain a circuit pulse response signal. Through Monte-Carlo analysis, multiple groups of sample signals are generated for each fault category.

[0057] Figure 4 FIG. 4 is a schematic diagram of a process 400 of a rectifier circuit fault detection method according to another embodiment of the present invention. Figure 4 As shown, in one embodiment, detecting a rectifier circuit fault according to the fault includes:

[0058] S401, receiving circuit detection data to be detected. In this step, a specific step of receiving circuit detection data to be detected is provided.

[0059] S402: Rectifying circuit faults through CNN network identification according to the circuit detection data. In this step, a specific step of detecting rectifier circuit faults by obtaining circuit health status information through the fault detection threshold according to the circuit detection data is provided.

[0060] In this embodiment, a specific implementation method of detecting a rectifier circuit fault based on a CNN network is provided. First, circuit detection image data to be detected is received. Finally, rectifier circuit fault detection is implemented through a trained CNN network based on the circuit detection image data.

[0061] In one embodiment, the analog circuit fault detection system also includes an analog circuit simulation system; the rectifier circuit simulation system is used to draw a rectifier circuit diagram on the simulation software according to a predetermined drawing method; and select test excitation and test points according to the drawn rectifier circuit diagram to perform simulation to obtain simulation sample data.

[0062] In one embodiment, the analog circuit fault detection system also includes an analog circuit simulation system; the rectifier circuit simulation system is used to draw a rectifier circuit diagram on the simulation software according to a predetermined drawing method; and select test excitation and test points according to the drawn rectifier circuit diagram to perform simulation to obtain simulation sample data.

[0063] Figure 5 FIG. 1 is a schematic diagram of a rectifier circuit in another embodiment of the present invention. Figure 6 FIG. 5 is a schematic diagram of a process 500 of a rectifier circuit fault detection method according to another embodiment of the present invention. Figure 5 and Figure 6 As shown, the present invention selects the three-phase rectifier circuit in the multi-pulse rectifier as the research object. This circuit is widely used in industry because of its smooth ripple output and high rectification efficiency. It is a typical rectifier.

[0064] For the diagnosis example of a three-phase rectifier circuit, the specific steps of the present invention are as follows.

[0065] The first part is the collection of circuit fault information.

[0066] The three-phase rectifier circuit was simulated using PSPICE software, and an AC signal with an amplitude of 22V and a phase difference interval of π / 3 was selected as the input, and the circuit output end was selected as the test point;

[0067] The experimental circuit schematic diagram is as follows Figure 1 As shown in the figure, the circuit includes voltage regulator diodes, capacitors, resistors and other components, and is aimed at the diode open circuit fault analysis. Diodes D1 to D6 are selected as the components to be tested. If any diode among D1 to D6 is in an open circuit state, the circuit is considered to be in a fault state, otherwise it is in a normal state. The experimental circuit fault categories are shown in the figure below.

[0068] Fault Codes Fault type Fault Codes Fault type F0 NF F21 D5D6 failure F1 D1 Fault F22 D1D2D3 failure F2 D2 Failure F23 D1D2D4 failure F3 D3 failure F24 D1D2D5 failure F4 D4 Failure F25 D1D2D6 failure F5 D5 Failure F26 D1D3D4 failure F6 D6 Failure F27 D1D3D5 failure F7 D1D2 Failure F28 D1D3D6 failure F8 D1D3 Failure F29 D1D4D5 failure F9 D1D4 Failure F30 D1D4D6 failure F10 D1D5 failure F31 D1D5D6 failure F11 D1D6 failure F32 D2D3D4 Failure F12 D2D3 Failure F33 D2D3D5 Failure F13 D2D4 Failure F34 D2D3D6 failure F14 D2D5 Failure F35 D2D4D5 failure F15 D2D6 failure F36 D2D4D6 failure F16 D3D4 Glitch F37 D2D5D6 failure F17 D3D5 Glitch F38 D3D4D5 Failure F18 D3D6 Failure F39 D3D4D6 Failure F19 D4D5 Failure F40 D4D5D6 failure F20 D4D6 Failure

[0069] Through Monte-Carlo analysis, 300 groups of impulse response signal samples are generated for each fault category, and a total of 12,000 groups of signal samples are obtained to form a sample set;

[0070] Perform DFT transformation on all impulse response signals of each fault category

[0071] Using the sequence signal with frequency domain characteristics and periodic characteristics separated by DFT:

[0072] V OUT = {V OUT1 ,V OUT2 ,V OUT3 ,...,V OUTm}

[0073] Arrange into a two-dimensional image array periodically:

[0074]

[0075] The two-dimensional grayscale image data sample data generated after two-dimensional processing of the image data is randomly divided into a training set and a test set in a ratio of 8:2;

[0076] Part 2: Detection of CNN network structure construction and training

[0077] As shown in the figure, a CNN network is used to perform two-dimensional convolution operations on the data to extract the features of the signal in the time domain and frequency domain. The attention mechanism is introduced, the network training parameters are updated and set, and the loss function is constructed and trained.

[0078] The test set is input into the trained network model for recursive prediction to obtain the detection results and detection errors.

[0079] like Figure 7 As shown in the figure, the detection model structure is data input layer, CNN network layer, attention mechanism module, first fully connected layer, first Dropout layer, attention module, second fully connected layer, second Dropout layer, output layer. The CNN network is used to perform deep data extraction, and the attention module is used to perform local feature extraction on the current fault feature information.

[0080] The CNN network structure used in the embodiment of the present invention specifically includes: an input layer, the input data format is (6, 1000, 1); two convolutional layers, the present invention uses a depth-separable convolutional module instead of a traditional convolutional module to build a convolutional network, the number of filters in the first convolutional layer is set to 32, the convolution kernel size is set to 3, and the activation function uses the ReLU function; the number of filters in the second convolutional layer is set to 64, the convolution kernel size is set to 3, and the activation function uses the ReLU function; an output layer.

[0081] The network uses the cross entropy loss function, whose formula is L = -∑ p(x )logq(x), batch_size is 64, and the training round epoch is set to 300. The model uses the SGD optimizer to optimize the network and sets the learning rate to 0.01.

[0082] Part III: Circuit Fault Detection

[0083] The test set is input into the trained network, the fault information in the test set is diagnosed, the location of the faulty diode in the circuit is inferred, and the results are output and saved.

[0084] In actual application scenarios, using this solution to diagnose three-phase rectifier circuits requires processing the obtained circuit output voltage sequence signal according to the data preprocessing and feature extraction parts described in this article, and dividing it in a sliding window manner without distinguishing between training sets and test sets. Subsequently, the detection model obtained in this solution is loaded, and the processed data is input into the detection model. After processing by the prediction model, the detection results can be obtained.

[0085] In one embodiment, the present invention further provides an analog circuit fault detection device, the device comprising: a processor and a memory;

[0086] The memory stores an application program executable by the processor, which is used to enable the processor to execute the steps of the analog circuit fault detection method.

[0087] In one embodiment, a computer-readable storage medium stores a computer program, wherein the program implements the steps of the analog circuit fault detection method when executed by a processor.

[0088] The above embodiments are only exemplary embodiments of the present invention and are not intended to limit the present invention. The protection scope of the present invention is defined by the claims. Those skilled in the art may make various modifications or equivalent substitutions to the present invention within the essence and protection scope of the present invention, and such modifications or equivalent substitutions shall also be deemed to fall within the protection scope of the present invention.

Claims

1. A rectifier circuit fault detection method, the method comprising: Collect the circuit output time domain feature vector samples corresponding to the rated number of sample simulation sample data: Use discrete Fourier transform to convert the time series signal into a sample that can reflect the frequency domain characteristics and periodic characteristics. By converting one-dimensional data into two-dimensional data, the collected sequence signal is converted into a two-dimensional grayscale image data sample. In the network model, the CBAM self-attention mechanism and deep separable convolution are used to deepen the feature extraction depth while reducing the amount of calculation. By dividing the samples into training and test sets and bringing them into the network, the parameter model is obtained through network self-learning.

2. According to the rectifier circuit fault detection method of claim 1, the time domain feature vector samples corresponding to the received rated number of simulation sample data include: A rated number of simulation sample data is received; and corresponding time domain feature vector samples are constructed through DFT according to the simulation sample data. In one embodiment, before the step of receiving the time domain feature vector samples corresponding to the rated number of simulation sample data, the method includes: Draw a rectifier circuit diagram on the simulation software according to a predetermined drawing method; select test excitation and test points according to the drawn rectifier circuit diagram to perform simulation to obtain simulation sample data.

3. According to the rectifier circuit fault detection method described in claim 1, the simulation software is PSPICE, and the simulation sample data is obtained by Monte-Carlo analysis simulation.

4. The rectifier circuit fault detection method according to claim 1, wherein detecting the analog circuit fault according to the fault detection threshold comprises: Receive circuit detection data to be detected; and detect rectifier circuit faults by obtaining circuit health status information based on the circuit detection data through the fault detection threshold.

5. A rectifier circuit fault detection system, comprising a background system; the background system is used to receive time domain feature vector samples corresponding to a rated number of simulation sample data; two-dimensional processing is performed on the time domain feature vector samples, and a parameter model that meets the conditions is built in a completed CNN network to detect rectifier circuit faults.

6. According to claim 6, the rectifier circuit fault detection system further comprises a rectifier circuit simulation system; The analog circuit simulation system is used to draw an analog circuit diagram on the simulation software according to a predetermined drawing method; and to select test stimuli and test points according to the drawn analog circuit diagram to perform simulation and obtain simulation sample data.

7. A rectifier circuit fault detection device, the device comprising: A receiving module, used for receiving time domain feature vector samples corresponding to a rated number of simulation sample data; The computing module is used to convert the collected time domain feature vectors into two-dimensional images and bring them into the CNN network to train parameters. The detection module is used to detect analog circuit faults based on the trained CNN network.

8. A rectifier circuit fault detection device, the device comprising: a processor and a memory; the memory stores an application program executable by the processor, which is used to enable the processor to implement the steps of the analog circuit fault detection method described in any one of claims 1 to 5 when executed. In one embodiment, the present invention further provides a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the steps of the analog circuit fault detection method described in any one of claims 1 to 5.

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