Grid-based layout dead space area calculation method and system, electronic equipment and storage medium

Abstract

The invention discloses a grid-based layout dead space area calculation method and system, electronic equipment and a storage medium, and the electronic equipment and the storage medium are applied to the technical field of integrated circuit layout planning. The method comprises the following steps: acquiring a layout area, and dividing a blank area of the layout area into a macro external area and a macro internal area; filling the blank area with a grid; the grids are traversed, and macroscopic internal grids are determined; and obtaining a dead space area according to the macro internal grid. According to the method, the blank area filled with the grids is divided into the macro external area and the macro internal area, the dead space area which is difficult to directly measure is estimated by utilizing the difference, which is easy to calculate, between the macro internal grid area and the macro module overlapping area, and the complexity of solving the dead space area problem is effectively reduced.

Description

Technical Field

[0001] The present application relates to the technical field of integrated circuit layout planning, and in particular to a grid-based layout dead space area calculation method, system, electronic device and storage medium. Background Art

[0002] In the prior art, engineers usually manually place macro cells in the layout planning stage of chip design, and place them compactly at the edge of the chip, so as to leave as much blank area as possible in the center area for the layout of standard cells. The more blank areas available for layout, the more conducive it is to the optimization of timing and congestion of standard cell layout. During the macro cell placement process, some blank areas will be generated inside, and these blank areas cannot be effectively utilized in the subsequent layout, resulting in a waste of layout area. These blank areas are also called dead space. However, when there are a large number of macro modules and the shapes are significantly different, the modules with too large size differences will cause the modules to be unable to be seamlessly spliced ​​together, which will generate more dead space, thereby reducing the effective space of the standard cell layout and affecting the overall performance of the chip. Therefore, in order to realize the automation of chip layout planning, it is very necessary to accurately identify and calculate the area of ​​the dead space.

[0003] Since current layout planning is mainly based on manual layout, there are few automated methods and a lack of methods for calculating dead space area. Summary of the invention

[0004] The present invention provides a grid-based layout dead space calculation method, system, electronic device and storage medium, which measures the wasted area around the macro unit layout by filling the blank area with a grid of constant area, so as to improve the automation level of integrated circuit design, improve design efficiency and chip performance.

[0005] The first object of the present invention is to provide a grid-based layout dead space area calculation method, which specifically includes the following steps:

[0006] Acquire a layout area, and divide a blank area of ​​the layout area into a macro external area and a macro internal area;

[0007] Filling the blank area with a grid;

[0008] Traversing the grid to determine a macro internal grid;

[0009] The dead space area is obtained according to the macro internal grid.

[0010] Further, the determining of the macro internal grid specifically includes:

[0011] Determine the corner area position to which the layout area belongs;

[0012] The division rule of the macro internal grid is determined according to the position of the corner area; the macro internal grid is a grid located in the macro internal area.

[0013] Furthermore, the division rules specifically include:

[0014] Determine whether the grid is surrounded by macro modules;

[0015] If yes, the grid is located in the macro internal area and the grid is a macro internal grid;

[0016] If not, determining whether the grid has only one side in the same direction as the corner area that is not a macromodule;

[0017] If yes, the grid is located in the macro internal area and the grid is a macro internal grid;

[0018] If not, the grid area is located in the macro external area and the grid is a macro external grid.

[0019] Further, obtaining the dead space area according to the macro internal grid specifically includes the following steps:

[0020] Extract the macro internal grid and obtain the internal grid area;

[0021] Calculate the sum of the overlapping areas of each macro internal grid and the macro module to obtain the overlapping area;

[0022] The difference between the inner grid area and the overlapping area is calculated to obtain the dead space area.

[0023] A second object of the present invention is to provide a grid-based layout dead space area calculation system, comprising a grid filling unit, a grid judgment unit and a dead space area calculation unit;

[0024] The grid filling unit is used to fill the grid into the blank area of ​​the layout area, specifically including:

[0025] Acquire a layout area, and divide a blank area of ​​the layout area into a macro external area and a macro internal area;

[0026] Filling the blank area with a grid;

[0027] The grid judgment unit is used to divide the grid into different areas, specifically including:

[0028] Traversing the grid to determine a macro internal grid;

[0029] The dead space area calculation unit is used to obtain the dead space area, specifically including:

[0030] The dead space area is obtained according to the macro internal grid.

[0031] Furthermore, the grid determination unit further includes:

[0032] Determine the corner area position to which the layout area belongs;

[0033] The division rule of the macro internal grid is determined according to the position of the corner area; the macro internal grid is a grid located in the macro internal area.

[0034] Determine whether the grid is surrounded by macro modules;

[0035] If yes, the grid is located in the macro internal area and the grid is a macro internal grid;

[0036] If not, determining whether the grid has only one side in the same direction as the corner area that is not a macromodule;

[0037] If yes, the grid is located in the macro internal area and the grid is a macro internal grid;

[0038] If not, the grid area is located in the macro external area and the grid is a macro external grid.

[0039] Furthermore, the dead space area calculation unit further includes:

[0040] Extract the macro internal grid and obtain the internal grid area;

[0041] Calculate the sum of the overlapping areas of each macro internal grid and the macro module to obtain the overlapping area;

[0042] The difference between the inner grid area and the overlapping area is calculated to obtain the dead space area.

[0043] The third object of the present invention is to provide an electronic device, comprising: a memory on which a program code is stored; a processor, which is connected to the memory and when the program code is executed by the processor, implements the grid-based layout dead space area calculation method described in any embodiment of the present invention.

[0044] A fourth object of the present invention is to provide a computer-readable storage medium having program instructions stored thereon, wherein the program instructions, when executed, implement the grid-based layout dead space area calculation method described in any embodiment.

[0045] Compared with the prior art, the beneficial effects that can be achieved by at least one of the above technical solutions adopted in the embodiments of this specification include at least:

[0046] (1) For a given layout area, using a grid to fill the blank area of ​​the layout area can accurately identify the dead space and improve the efficiency and accuracy of dead space area calculation.

[0047] (2) The blank area filled with grids is divided into macro external area and macro internal area. The difference between the macro internal grid area which is easy to calculate and the macro module overlap area is used to estimate the dead space area which is difficult to measure directly, effectively reducing the complexity of solving the dead space area problem.

[0048] (3) This method helps engineers better understand the efficiency of the current layout by quantitatively analyzing the dead space area, and based on this, they can make more reasonable macro unit placement, reduce layout area waste, form a compact and regular space layout, and improve the automation level of integrated circuit design. BRIEF DESCRIPTION OF THE DRAWINGS

[0049] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0050] Figure 1 is a flow chart of a grid-based layout dead space area calculation method provided in Embodiment 1 of the present invention;

[0051] Figure 2 It is a flow chart of determining a macro internal grid in the grid-based layout dead space area calculation method provided in the first embodiment of the present invention;

[0052] Figure 3 It is a grid determination flow chart in the grid-based layout dead space area calculation method provided in the first embodiment of the present invention;

[0053] Figure 4 is a dead space area calculation flow chart in a grid-based layout dead space area calculation method provided in Embodiment 1 of the present invention;

[0054] Figure 5 It is a schematic diagram of the layout area in the grid-based layout dead space area calculation method provided in the first embodiment of the present invention;

[0055] Figure 6 It is a schematic diagram of a layout area filled with a grid in the grid-based layout dead space area calculation method provided in the first embodiment of the present invention;

[0056] Figure 7 It is a schematic diagram of a macro internal grid in the grid-based layout dead space area calculation method provided in the first embodiment of the present invention;

[0057] Figure 8 is a structural diagram of a grid-based layout dead space area calculation system provided in Embodiment 2 of the present invention;

[0058] Fig. 9 is a schematic diagram of an electronic device provided in Embodiment 3 of the present invention;

[0059] Fig.10 It is a schematic diagram of a storage medium provided in Embodiment 4 of the present invention. DETAILED DESCRIPTION

[0060] The embodiments of the present application are described in detail below with reference to the accompanying drawings.

[0061] The following describes the implementation methods of the present application through specific examples, and those skilled in the art can easily understand other advantages and effects of the present application from the contents disclosed in this specification. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. The present application can also be implemented or applied through other different specific implementation methods, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present application. It should be noted that, in the absence of conflict, the following embodiments and the features in the embodiments can be combined with each other. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in the field without making creative work belong to the scope of protection of the present application.

[0062] It should be noted that various aspects of the embodiments within the scope of the appended claims are described below. It should be apparent that the aspects described herein can be embodied in a wide variety of forms, and any specific structure and / or function described herein is merely illustrative. Based on the present application, it should be understood by those skilled in the art that an aspect described herein can be implemented independently of any other aspect, and two or more of these aspects can be combined in various ways. For example, any number and aspect described herein can be used to implement the device and / or practice the method. In addition, other structures and / or functionalities other than one or more of the aspects described herein can be used to implement this device and / or practice this method.

[0063] It should also be noted that the illustrations provided in the following embodiments are only schematic illustrations of the basic concept of the present application. The drawings only show components related to the present application rather than being drawn according to the number, shape and size of components in actual implementation. In actual implementation, the type, quantity and proportion of each component may be changed arbitrarily, and the component layout may also be more complicated.

[0064] Embodiment 1

[0065] like Figure 1 As shown, a grid-based layout dead space area calculation method specifically includes the following steps:

[0066] S101: Acquire a layout area, and divide a blank area of ​​the layout area into a macro external area and a macro internal area.

[0067] It should be noted that the layout area includes macro modules and blank areas, and the blank areas include available space and dead space; the available space is the macro external area, and the dead space is the macro internal area.

[0068] In this embodiment, if Figure 5 , the layout area 1 includes macro modules 2 and blank areas 3, and the initial sizes and placement positions of each module in this area have been determined.

[0069] S102: Fill the blank area with a grid.

[0070] It should be noted that the area of ​​each grid is constant. Figure 6 It is the layout area 1 after the grid 4 fills the blank area 3.

[0071] The present invention measures the dead space of non-fixed area by using a grid of fixed area to obtain the dead space area, thereby effectively reducing the complexity of solving the dead space area and improving the layout efficiency.

[0072] S103: Traverse the grids to determine the macro internal grids.

[0073] Specifically, Figure 2 , determine that the macro internal grid specifically includes:

[0074] S1031: Determine the corner area position to which the layout area belongs;

[0075] In this embodiment, the dead space area calculated is the dead space area of ​​a corner layout area on a certain integrated circuit. The corner position can be the upper left corner, the lower left corner, the upper right corner or the lower right corner. The given layout area can be the upper left corner, the lower left corner, the upper right corner or the lower right corner of the integrated circuit layout area.

[0076] For example, Figure 5 , this layout area 1 is located at the upper right corner of the integrated circuit layout area, then the corner area position is the upper right corner, and what is calculated is the dead space area of ​​the upper right corner of the integrated circuit layout area.

[0077] S1032: Determine a macro internal grid according to the corner area position; the macro internal grid is a grid located in the macro internal area.

[0078] It should be noted that if Figure 3 , according to the corner area position, the macro internal grid is determined to include:

[0079] S10321: Determine whether all four sides of the grid are macro modules;

[0080] If yes, execute S10322; if no, execute S10323.

[0081] S10322: The grid is located in the internal area of ​​the macro, and the grid is the internal grid of the macro;

[0082] S10323: Determine whether the grid has only one side in the same direction as the corner area that is not a macromodule;

[0083] In this embodiment, Figure 5 , if the corner area position is the upper right corner, then the direction that is the same as the corner area position direction is the right side or the top side, then determine whether only the right side or the top side of the grid is not a macro module.

[0084] If yes, execute S10322; if no, execute S10324.

[0085] S10324: The grid is located in the macro external area, and the grid is a macro external grid.

[0086] S104: Obtain the dead space area according to the macro internal grid.

[0087] Specifically, obtaining the dead space area according to the macro internal grid specifically includes the following steps:

[0088] S1041: extracting the macro internal grid and obtaining the internal grid area;

[0089] Specifically, the internal grid area S inter for:

[0090] S inter =n*S grid

[0091] Among them, S inter is the area of ​​a single grid used to fill the layout area, and n is the number of grids contained in the macro internal area.

[0092] For example, Figure 7 , the number of macro internal grids 5 is 8.

[0093] S1042: Calculate the sum of the overlapping areas of each macro internal grid and the macro module to obtain the overlapping area;

[0094] Specifically, the overlapping area S overlap for:

[0095]

[0096] Among them, macro represents the macro module. is the i-th grid.

[0097] S1043: Calculate the difference between the internal grid area and the overlapping area to obtain the dead space area.

[0098] Specifically, the dead space area S dead_space for:

[0099] S dead_space =S inter -S overlap

[0100] The present invention uses a grid with a constant area to fill the blank area of ​​the layout space, and then distinguishes between the macro external grid and the macro internal grid based on specified rules, and subtracts the overlapping area of ​​the macro internal grid from the macro module to obtain the area of ​​the dead space, so as to accurately evaluate the wasted area generated by the current macro unit layout, and make necessary adjustments accordingly to improve the quality and performance of chip design.

[0101] Embodiment 2

[0102] like Figure 8 , a grid-based layout dead space area calculation system 200, comprising a grid filling unit 201, a grid judgment unit 202 and a dead space area calculation unit 203;

[0103] The grid filling unit 201 is used to fill the grid into the blank area of ​​the layout area, specifically including:

[0104] Get the layout area, and divide the blank area of ​​the layout area into a macro external area and a macro internal area;

[0105] The empty area is filled with a grid.

[0106] The grid determination unit 202 is used to divide the grid into different areas, specifically including:

[0107] Traverse the grid and determine the macro internal grid.

[0108] It should be noted that the grid determination unit 202 also includes:

[0109] Determine the corner area position to which the layout area belongs;

[0110] The division rule of the macro internal grid is determined according to the position of the corner area; the macro internal grid is the grid located in the macro internal area.

[0111] Determine whether the grid is surrounded by macro modules;

[0112] If so, the grid is located in the macro internal area and the grid is a macro internal grid;

[0113] If not, determine whether the grid has only one edge in the same direction as the corner area position that is not a macromodule;

[0114] If so, the grid is located in the macro internal area and the grid is a macro internal grid;

[0115] If not, the grid area is located in the macro external area and the grid is a macro external grid.

[0116] The dead space area calculation unit 203 is used to obtain the dead space area, specifically including:

[0117] The dead space area is obtained based on the macro internal grid.

[0118] It should be noted that the dead space area calculation unit 203 also includes:

[0119] Extract the macro internal grid and obtain the internal grid area;

[0120] Calculate the sum of the overlapping areas of each macro internal grid and the macro module to obtain the overlapping area;

[0121] The difference between the inner grid area and the overlapping area is calculated to obtain the dead space area.

[0122] Embodiment 3

[0123] An electronic device, such as Fig. 9 As shown, it includes: a memory on which program code is stored; a processor connected to the memory, and when the program code is executed by the processor, a grid-based layout dead space area calculation method is implemented. For a detailed description of the method, reference can be made to the corresponding description in the above method embodiment, which will not be repeated here.

[0124] Embodiment 4

[0125] A computer readable storage medium such as Fig.10 As shown, program instructions are stored thereon, and when the program instructions are executed, a grid-based layout dead space area calculation method is implemented. For a detailed description of the method, reference may be made to the corresponding description in the above method embodiment, and no further description is given here.

[0126] The number of devices and processing scales described here are used to simplify the description of the present invention. Applications, modifications and variations of the present invention will be obvious to those skilled in the art.

[0127] Although the embodiments of the present invention have been disclosed as above, they are not limited to the applications listed in the specification and implementation modes. They can be fully applied to various fields suitable for the present invention. For those familiar with the art, additional modifications can be easily implemented. Therefore, without departing from the general concept defined by the claims and the scope of equivalents, the present invention is not limited to the specific details and the illustrations shown and described herein.

[0128] The apparatus, electronic device, non-volatile computer storage medium and method provided in the embodiments of this specification correspond to each other, and therefore, the apparatus, electronic device and non-volatile computer storage medium also have similar beneficial technical effects as the corresponding method. Since the beneficial technical effects of the method have been described in detail above, the beneficial technical effects of the corresponding apparatus, electronic device and non-volatile computer storage medium will not be repeated here.

[0129] Those skilled in the art also know that, in addition to implementing the controller in a purely computer-readable program code, the controller can be made to implement the same function in the form of logic gates, switches, application-specific integrated circuits, programmable logic controllers, and embedded microcontrollers by logically programming the method steps. Therefore, such a controller can be considered as a hardware component, and the devices for implementing various functions included therein can also be considered as structures within the hardware component. Or even, the devices for implementing various functions can be considered as both software units for implementing the method and structures within the hardware component.

[0130] The systems, devices or units described in the above embodiments can be implemented by computer chips or entities, or by products with certain functions. For the convenience of description, the above devices are described separately by functions in various units. Of course, when implementing one or more embodiments of this specification, the functions of each unit can be implemented in the same or more software and / or hardware.

[0131] Those skilled in the art will appreciate that the embodiments of this specification may be provided as methods, systems, or computer program products. Therefore, the embodiments of this specification may be in the form of complete hardware embodiments, complete software embodiments, or embodiments in combination with software and hardware. Moreover, the embodiments of this specification may be in the form of a computer program product implemented in one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) that contain computer-usable program code.

[0132] This specification is described with reference to the flowcharts and / or block diagrams of the methods, devices (systems), and computer program products according to the embodiments of this specification. It should be understood that each process and / or box in the flowchart and / or block diagram, as well as the combination of the processes and / or boxes in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to produce a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0133] These computer program instructions may also be stored in a computer-readable memory capable of directing a computer or other programmable data processing device to operate in a specific manner, so that the instructions stored in the computer-readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1 A process or multiple processes and / or boxes Figure 1 A function specified in one or more boxes.

[0134] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operating steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing instructions for implementing the process. Figure 1 A process or multiple processes and / or boxes Figure 1 The steps for the functions specified in one or more boxes.

[0135] It should also be noted that the terms "include", "comprises" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, commodity or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, commodity or device. In the absence of more restrictions, the elements defined by the sentence "comprises a ..." do not exclude the existence of other identical elements in the process, method, commodity or device including the elements.

[0136] The specification may be described in the general context of computer-executable instructions executed by a computer, such as program units. Generally, program units include routines, programs, objects, components, data structures, etc. that perform specific tasks or implement specific abstract data types. The specification may also be practiced in distributed computing environments where tasks are performed by remote processing devices connected via a communications network. In a distributed computing environment, program units may be located in local and remote computer storage media, including storage devices.

[0137] Each embodiment in this specification is described in a progressive manner, and the same or similar parts between the embodiments can be referred to each other, and each embodiment focuses on the differences from other embodiments. In particular, for the system embodiment, since it is basically similar to the method embodiment, the description is relatively simple, and the relevant parts can be referred to the partial description of the method embodiment.

[0138] The above description is only an embodiment of this specification and is not intended to limit one or more embodiments of this specification. For those skilled in the art, one or more embodiments of this specification may have various changes and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of one or more embodiments of this specification shall be included in the scope of the claims of one or more embodiments of this specification.

Claims

1. A grid-based layout dead space area calculation method, characterized in that: The specific steps include: Acquire a layout area, and divide a blank area of ​​the layout area into a macro external area and a macro internal area; Filling the blank area with a grid; Traversing the grid to determine a macro internal grid; The dead space area is obtained according to the macro internal grid.

2. The grid-based layout dead space area calculation method according to claim 1, characterized in that: Determining the macro internal grid specifically includes: Determine the corner area position to which the layout area belongs; The division rule of the macro internal grid is determined according to the position of the corner area; the macro internal grid is a grid located in the macro internal area.

3. The grid-based layout dead space area calculation method according to claim 2, characterized in that: The division rules specifically include: Determine whether the grid is surrounded by macro modules; If yes, the grid is located in the macro internal area and the grid is a macro internal grid; If not, determining whether the grid has only one side in the same direction as the corner area that is not a macromodule; If yes, the grid is located in the macro internal area and the grid is a macro internal grid; If not, the grid area is located in the macro external area and the grid is a macro external grid.

4. The grid-based layout dead space area calculation method according to claim 1, characterized in that: Obtaining the dead space area according to the macro internal grid specifically comprises the following steps: Extract the macro internal grid and obtain the internal grid area; Calculate the sum of the overlapping areas of each macro internal grid and the macro module to obtain the overlapping area; The difference between the inner grid area and the overlapping area is calculated to obtain the dead space area.

5. A grid-based layout dead space area calculation system, characterized in that: It includes a grid filling unit, a grid judging unit and a dead space area calculating unit; The grid filling unit is used to fill the grid into the blank area of ​​the layout area, specifically including: Acquire a layout area, and divide a blank area of ​​the layout area into a macro external area and a macro internal area; Filling the blank area with a grid; The grid judgment unit is used to divide the grid into different areas, specifically including: Traversing the grid to determine a macro internal grid; The dead space area calculation unit is used to obtain the dead space area, specifically including: The dead space area is obtained according to the macro internal grid.

6. The grid-based layout dead space area calculation system according to claim 5, characterized in that: The grid judgment unit also includes: Determine the corner area position to which the layout area belongs; The division rule of the macro internal grid is determined according to the position of the corner area; the macro internal grid is a grid located in the macro internal area. Determine whether the grid is surrounded by macro modules; If yes, the grid is located in the macro internal area and the grid is a macro internal grid; If not, determining whether the grid has only one side in the same direction as the corner area that is not a macromodule; If yes, the grid is located in the macro internal area and the grid is a macro internal grid; If not, the grid area is located in the macro external area and the grid is a macro external grid.

7. The grid-based layout dead space area calculation system according to claim 6, characterized in that: The dead space area calculation unit also includes: Extract the macro internal grid and obtain the internal grid area; Calculate the sum of the overlapping areas of each macro internal grid and the macro module to obtain the overlapping area; The difference between the inner grid area and the overlapping area is calculated to obtain the dead space area.

8. An electronic device, characterized in that: include: A memory having program code stored therein; A processor is connected to the memory, and when the program code is executed by the processor, the method according to any one of claims 1 to 7 is implemented.

9. A computer-readable storage medium, characterized in that: Program instructions are stored thereon, and when the program instructions are executed, the method according to any one of claims 1 to 7 is implemented.

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