Chip packaging method, chip and integrated circuit

Abstract

The invention discloses a chip packaging method, a chip and an integrated circuit. The method comprises the following steps: carrying out pressure welding and ball mounting on a solder resist window of a packaging substrate to obtain metal balls; carrying out discharge processing on the capacitor through metal ball mounting to obtain a first packaging chip; carrying out chip pressure welding processing on the first packaging chip to obtain a second packaging chip; and packaging and forming the second packaging chip to obtain at least one third packaging chip. The electric energy of the capacitor on the packaging substrate is released by performing pressure welding and ball mounting on the solder resist window, so that the discharge of the capacitor is integrated into the pressure welding process, the electric energy of the capacitor is released without influencing the performance of the chip on the premise of not increasing the process flow and the production cost, and the method can be widely applied to the technical field of chip packaging.

Description

Technical Field

[0001] The present invention relates to the technical field of chip packaging, and in particular to a chip packaging method, a chip and an integrated circuit. Background Art

[0002] SIP packaging (System In a Package) integrates functional wafers such as processors, memories, and passive devices such as capacitors and resistors into a package to achieve a packaging solution or module product with basic complete functions.

[0003] Before packaging, the capacitor may contain electrical energy for various reasons. During the pressure welding operation, the chip and the substrate form a pathway through the welding wire, and the electrical energy in the capacitor is released instantly. The resulting instantaneous large current will cause an EOS (Electrical Overstress) short circuit inside the chip, thus causing the chip to fail.

[0004] In the existing scheme, before the chip mounting operation, the capacitor is placed in the loop device to release the charge in the capacitor, but this scheme adds an extra process flow and has high production costs. Another scheme is to reduce the energy of capacitor discharge by replacing the capacitor with a capacitor of smaller capacitance or removing the unnecessary mounted capacitor, but this scheme reduces the filtering ability of the capacitor, which can easily lead to unstable chip operation and reduced chip performance. Summary of the invention

[0005] In view of this, an object of the embodiments of the present invention is to provide a chip packaging method, a chip and an integrated circuit, which can release the electrical energy of the capacitor while ensuring the chip performance and without increasing the process flow and production cost.

[0006] In a first aspect, an embodiment of the present invention provides a chip packaging method, comprising:

[0007] Press-welding a ball implant on a solder resist window of a packaging substrate to obtain a metal ball implant, wherein the solder resist window is electrically connected to a capacitor mounted on the packaging substrate;

[0008] The capacitor is discharged by the metal ball to obtain a first packaged chip, and the metal ball is grounded;

[0009] Performing chip pressure welding on the first packaged chip to obtain a second packaged chip, wherein the chip pressure welding process represents pressure welding the chip to be packaged onto the package substrate;

[0010] After performing a packaging and molding process on the second packaged chip, at least one third packaged chip is obtained.

[0011] In some optional embodiments, the step of press-welding a ball on a solder resist window of a package substrate to obtain a metal ball includes:

[0012] Grounding a bonding wire of a pressure welding device to obtain a ground bonding wire;

[0013] Using the pressure welding equipment to form the grounding wire into a welding ball;

[0014] The solder implant ball is pressed down onto the solder resist window by the pressure welding equipment to obtain the metal implant ball.

[0015] In some optional embodiments, the step of discharging the capacitor through the metal ball implantation to obtain the first packaged chip includes:

[0016] The first packaged chip is obtained by releasing the electrical energy on the capacitor through the grounding wire on the metal implant ball, a metal compound is formed at the connection between the metal implant ball and the solder resist window, and the grounding wire is electrically connected to the solder resist window through the metal implant ball.

[0017] In some optional embodiments, the step of press-welding a ball on a solder resist window of a package substrate to obtain a metal ball includes:

[0018] At least one metal ball is obtained by performing multiple pressure welding and ball planting on the same solder resist opening of the packaging substrate.

[0019] In some optional embodiments, after releasing the electric energy on the capacitor through the grounding wire on the metal implant ball to obtain the first packaged chip, the method includes:

[0020] releasing ultrasonic oscillations through the pressure welding device;

[0021] The grounding wire is cut off by the ultrasonic oscillation, so that the grounding wire is disconnected from the metal implant ball.

[0022] In some optional embodiments, the pressure welding device melts the tail of the grounding wire through a spark rod to obtain the metal implant ball, and moves the metal implant ball to the pressure welding area on the solder resist window through a splitter.

[0023] In some optional embodiments, the method further includes:

[0024] Configuring the length of the fire rod to be a first length;

[0025] configuring the length of the line tail to be a second length;

[0026] The wire tail of the second length is beaten into the metal planting ball of a preset size by using the first length of the fire rod.

[0027] In some optional embodiments, the step of performing a packaging molding process on the second packaged chip to obtain at least one third packaged chip includes:

[0028] A first semi-finished product is obtained by forming a plastic package body on the first surface of the second packaged chip through a compression molding process, wherein the solder resist window, the chip to be packaged and the capacitor are all arranged on the first surface of the package substrate, and the plastic package body is used to seal the solder resist window, the chip to be packaged, the capacitor and the first surface of the package substrate;

[0029] Soldering a plurality of solder balls on the second surface of the first semi-finished product to obtain a second semi-finished product, wherein the second surface of the first semi-finished product represents the second surface of the packaging substrate;

[0030] The second semi-finished product is cut into at least one third packaged chip.

[0031] In a second aspect, an embodiment of the present invention provides a chip manufactured by the above chip packaging method.

[0032] In a third aspect, an embodiment of the present invention provides an integrated circuit, comprising the above-mentioned chip.

[0033] The implementation of the embodiment of the present invention includes the following beneficial effects: The embodiment of the present invention provides a chip packaging method, including: pressure welding a ball on a solder mask window of a packaging substrate to obtain a metal ball, the solder mask window is electrically connected to a capacitor mounted on the packaging substrate; the capacitor is discharged by the metal ball to obtain a first packaged chip, the metal ball is grounded; the first packaged chip is subjected to chip pressure welding to obtain a second packaged chip, the chip pressure welding process represents pressure welding the chip to be packaged to the packaging substrate; the second packaged chip is subjected to packaging molding to obtain at least one third packaged chip. By pressure welding the ball on the solder mask window, the electric energy of the capacitor on the packaging substrate is released, so that the discharge of the capacitor is integrated into the pressure welding process, and the electric energy of the capacitor is released without increasing the process flow and production cost, and without affecting the performance of the chip. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] Figure 1 is a flowchart of a chip packaging method provided by an embodiment of the present invention;

[0035] Figure 2 It is a chip structure diagram of the packaging substrate provided by an embodiment of the present invention before pressure welding and ball planting;

[0036] Figure 3 This is a chip structure diagram after the package substrate is pressed and balled according to an embodiment of the present invention;

[0037] Figure 4 is a chip structure diagram after chip bonding processing provided by an embodiment of the present invention;

[0038] Figure 5 is a chip structure diagram after packaging and molding provided by an embodiment of the present invention;

[0039] Figure numerals: first surface 101 of packaging substrate, second surface 102 of packaging substrate, solder resist window 103, metal ball implant 104, lead 105, chip to be packaged 201, capacitor 202, pressure welding equipment 301, grounding wire 302, plastic package body 401, solder ball 402. DETAILED DESCRIPTION

[0040] Embodiments of the present invention are described in detail below, and examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and cannot be understood as limiting the present invention.

[0041] In the description of the present invention, it should be understood that descriptions involving orientation, such as up, down, front, back, left, right, etc., indicating orientations or positional relationships, are based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation on the present invention.

[0042] In the description of the present invention, "several" means one or more, "more" means more than two, "greater than", "less than", "exceed" etc. are understood as not including the number itself, and "above", "below", "within" etc. are understood as including the number itself. If there is a description of "first" or "second", it is only used for the purpose of distinguishing the technical features, and cannot be understood as indicating or implying the relative importance or implicitly indicating the number of the indicated technical features or implicitly indicating the order of the indicated technical features.

[0043] In the description of the present invention, unless otherwise clearly defined, terms such as setting, installing, connecting, etc. should be understood in a broad sense, and technicians in the relevant technical field can reasonably determine the specific meanings of the above terms in the present invention based on the specific content of the technical solution.

[0044] The embodiment of the present invention provides a chip packaging method, a chip and an integrated circuit, wherein the chip packaging method comprises: pressing and welding a ball on a solder resist window 103 of a packaging substrate to obtain a metal ball 104, wherein the solder resist window 103 is electrically connected to a capacitor 202 mounted on the packaging substrate; performing a discharge process on the capacitor 202 through the metal ball 104 to obtain a first packaged chip, wherein the metal ball 104 is grounded; performing a chip pressure welding process on the first packaged chip to obtain a second packaged chip, wherein the chip pressure welding process represents pressure welding the chip 201 to be packaged onto the packaging substrate; performing a packaging molding process on the second packaged chip to obtain at least one third packaged chip. By pressure welding a ball on the solder resist window 103, the electric energy of the capacitor 202 on the packaging substrate is released, and therefore, the discharge of the capacitor 202 is integrated into the pressure welding process, and the electric energy of the capacitor 202 is released without increasing the process flow and the production cost, and without affecting the performance of the chip.

[0045] The chip packaging method according to the embodiment of the present invention is further described below.

[0046] Reference Figure 1-5 , Figure 1 A flowchart of a chip packaging method provided by an embodiment of the present invention includes but is not limited to the following steps:

[0047] S100, pressing and welding a ball on the solder resist window 103 of the package substrate to obtain a metal ball 104, wherein the solder resist window 103 is electrically connected to the capacitor 202 mounted on the package substrate;

[0048] Specifically, the package substrate has two surfaces, the surface on which the chip or passive components (capacitor 202, resistor and other components) are arranged is the first surface, and the other corresponding surface is the second surface, and the second surface is arranged with solder ball terminals. A solder resist window 103 is arranged on the first surface, and there is at least one solder resist window 103. The solder resist window 103 is arranged in an open area of ​​the package substrate, and the surface of the solder resist window 103 is covered with a gold layer. The solder resist window 103 is connected to the copper wires of the package substrate and the chip's solder wires and passive components to form a power supply network.

[0049] S200, discharging the capacitor 202 through the metal implant ball 104 to obtain a first packaged chip, wherein the metal implant ball 104 is grounded;

[0050] Specifically, after the metal ball 104 is electrically connected to the solder resist window 103, the metal ball 104 conducts the capacitor 202 to the ground, so that the capacitor 202 can release the stored electric energy to the ground. Specifically, the metal ball 104 is already connected to the ground before being pressed and welded to the solder resist window 103, so that the electric energy on the capacitor 202 can be released to the ground when the solder resist window 103 is pressed and welded. No additional process steps are required, the production cost will not be increased, and the electric energy release effect of the capacitor 202 is good, and the electric energy stored in the capacitor 202 will not affect the performance of the chip, thereby reducing the chip packaging yield.

[0051] S300, performing chip pressure welding processing on the first packaged chip to obtain a second packaged chip, wherein the chip pressure welding processing represents pressure welding the chip 201 to be packaged onto the package substrate;

[0052] Specifically, the pads of the chip to be packaged 201 are connected to the gold fingers of the packaging substrate through chip pressure welding, so that the chip to be packaged 201 is electrically connected to the packaging substrate. After the solder joints between the pads and the gold fingers are cooled and solidified, the chip to be packaged 201 and the packaging substrate form a stable electrical and mechanical connection. The chip to be packaged 201 is also connected to the packaging substrate through the lead 105.

[0053] S400, performing a packaging and molding process on the second packaged chip to obtain at least one third packaged chip.

[0054] Specifically, the second packaged chip is subjected to subsequent packaging processes, that is, at least one single chip is obtained through processes such as compression molding, ball planting, printing and cutting, which is the third packaged chip.

[0055] In some optional embodiments, the metal implant ball 104 is obtained by pressure welding the implant ball on the solder resist window 103 of the packaging substrate, comprising: grounding the welding wire of the pressure welding equipment 301 to obtain the grounding welding wire 302; beating the grounding welding wire 302 into a implant ball by the pressure welding equipment 301; and pressing the implant ball down onto the solder resist window 103 by the pressure welding equipment 301 to obtain the metal implant ball 104.

[0056] In some optional embodiments, the first packaged chip is obtained by discharging the capacitor 202 through the metal implant ball 104, including: releasing the electric energy on the capacitor 202 through the grounding welding wire 302 on the metal implant ball 104 to obtain the first packaged chip, a metal compound is formed at the connection between the metal implant ball 104 and the solder resist window 103, and the grounding welding wire 302 is electrically connected to the solder resist window 103 through the metal implant ball 104.

[0057] Specifically, refer to Figure 2-3, the chip 201 to be packaged and the passive components are mounted on the first surface of the packaging substrate by means of a core-on method, and the number of the chip 201 to be packaged and the capacitor 202 is at least one. Before the pressure welding process of the chip 201 to be packaged, the bonding wire of the pressure welding device 301 is grounded. The device of the pressure welding device 301 uses high-voltage electric sparks to beat the bonding wire into a gold ball, and then presses the gold ball down to the set solder mask opening 103. Through thermal contact and ultrasonic vibration, when the gold ball contacts the welding, the electric energy stored in the capacitor 202 is directly released to the ground through the pressure welding wire.

[0058] In some optional embodiments, the step of press-welding a ball on the solder resist window 103 of the packaging substrate to obtain the metal ball 104 includes: performing press-welding a ball multiple times on the same solder resist window 103 of the packaging substrate to obtain at least one metal ball 104 .

[0059] Specifically, the window size of the solder resist window 103 is set to 200um*200um, so that the solder resist window 103 can meet the requirements of multiple pressure welding. The electric energy on the passive components is completely released through multiple pressure welding and ball planting, including but not limited to releasing the stored electric energy of passive components such as capacitor 202 and inductor. By reasonably setting the window size, the requirements of multiple pressure welding can be met. Multiple pressure welding and ball planting can be multiple pressure welding of the same metal ball 104, or one metal ball 104 can be pressure welded at a time. The specific setting is based on the operating process and requirements, and is not limited here.

[0060] In some optional embodiments, after the first packaged chip is obtained by releasing the electrical energy on the capacitor 202 through the grounding welding wire 302 on the metal implant ball 104, the process includes: releasing ultrasonic vibrations through the pressure welding equipment 301; and cutting off the grounding welding wire 302 through the ultrasonic vibrations to disconnect the grounding welding wire 302 from the metal implant ball 104.

[0061] Specifically, after the electric energy on the passive components is completely released through multiple pressure welding and ball implantation, the pressure welding device 301 releases ultrasonic oscillations, thereby cutting off the grounding wire 302 by ultrasonic oscillations, leaving a metal implant ball 104 (specifically, a gold implant ball) on the packaging substrate. Since the electric energy of the capacitor 202 has been released in advance, the problem of EOS short circuit caused by the discharge of the capacitor 202 and the impact on the chip 201 to be packaged is avoided during the pressure welding process of the chip 201 to be packaged.

[0062] In some optional embodiments, the pressure welding device 301 melts the tail of the grounding welding wire 302 through a spark rod to obtain the metal implant ball 104, and moves the metal implant ball 104 to the pressure welding area on the solder resist window 103 through a splitter.

[0063] Specifically, the grounding wire 302 of the present invention uses a gold wire. When bonding the gold wire, a splitter is inserted into the tail of the gold wire, and a high-voltage spark rod is used to melt the tail of the gold wire at the same time, and a gold ball (i.e., a gold implant ball) is formed due to the surface tension of the liquid. The formed gold ball is moved to the bonding area by the splitter of the bonding, and the gold ball and the metal in the bonding area form a metal compound at an ultra-high temperature, and the splitter forms ultrasound through high-frequency oscillation, so that the gold ball and the metal in the bonding area are bonded, and at the same time, the wire tail is cut by ultrasonic oscillation, and the gold ball is left on the solder mask opening 103.

[0064] In some optional embodiments, the method further includes: configuring the length of the fire rod to be a first length; configuring the length of the wire tail to be a second length; and using the fire rod of the first length to beat the wire tail of the second length into the metal planting ball 104 of a preset size.

[0065] Specifically, the diameter of the gold ball needs to be controlled at about 2 times the diameter of the gold wire, so as to ensure that it can meet the requirements of multiple pressure welding and ball planting, and the gold ball can well release the electrical energy on the passive component to the ground through the grounded gold wire. Therefore, the size of the gold ball is very important, which mainly depends on the length of the spark rod and the wire tail. By setting the length of the spark rod to the first length and the length of the wire tail of the gold wire to the second length, the first length of the spark rod can be used to beat the wire tail of the second length into a gold ball of a preset size. The preset size is set according to the specific process requirements and the number of pressure welding and ball planting, and is not limited here.

[0066] In some optional embodiments, the packaging molding process is performed on the second packaged chip to obtain at least one third packaged chip, including: forming a plastic package body 401 on the first surface of the second packaged chip through a compression molding process to obtain a first semi-finished product, the solder resist window 103, the chip to be packaged 201 and the capacitor 202 are all arranged on the first surface 101 of the packaging substrate, and the plastic package body 401 is used to seal the solder resist window 103, the chip to be packaged 201, the capacitor 202 and the first surface 101 of the packaging substrate; welding a plurality of solder balls 402 on the second surface of the first semi-finished product to obtain a second semi-finished product, the second surface of the first semi-finished product representing the second surface 102 of the packaging substrate; cutting the second semi-finished product into at least one third packaged chip.

[0067] Specifically, refer to Figure 5, a plastic encapsulation body 401 is formed on the first surface of the second packaged chip by a compression molding process to obtain a first semi-finished product. The plastic encapsulation body 401 can completely cover the leads 105, the chip to be packaged 201, the solder resist window 103 and the passive components on the package substrate, and can be electrically isolated from the external environment, and can also reduce the damage of external factors to the leads 105, the chip to be packaged 201, the solder resist window 103 and the passive components, thereby improving the chip life. After the compression molding is completed, the solder balls 402 can be welded on the second side of the package substrate to obtain a second semi-finished product. The solder balls 402 can be composed of any conductive metal. The solder balls 402 can be made of tin materials or gold materials. The solder balls 402 can realize the electrical connection between the memory chip and the external circuit. Before welding the solder balls 402 on the second side of the package substrate, a printing process can also be performed on the plastic encapsulation body 401. The obtained second semi-finished product is cut to obtain one or more single chips, that is, the third packaged chip is obtained.

[0068] In some optional embodiments, after obtaining the third packaged chip, corresponding tests, such as electrical testing, performance testing, etc., are performed to obtain the chip packaging yield.

[0069] In some optional embodiments, before the metal ball 104 is obtained by pressure welding the ball on the solder mask window 103 of the packaging substrate, the following processes are also included in sequence: wafer thinning, wafer cutting, SMT mounting of components on the packaging substrate, and bare wafer core mounting.

[0070] The implementation of the embodiment of the present invention includes the following beneficial effects: The embodiment of the present invention provides a chip packaging method, including: pressing and welding a ball on a solder resist window 103 of a packaging substrate to obtain a metal ball 104, wherein the solder resist window 103 is electrically connected to a capacitor 202 mounted on the packaging substrate; performing a discharge process on the capacitor 202 through the metal ball 104 to obtain a first packaging chip, wherein the metal ball 104 is grounded; performing a chip pressure welding process on the first packaging chip to obtain a second packaging chip, wherein the chip pressure welding process represents pressure welding the chip 201 to be packaged onto the packaging substrate; performing a packaging molding process on the second packaging chip to obtain at least one third packaging chip. By pressing and welding a ball on the solder resist window 103, the electric energy of the capacitor 202 on the packaging substrate is released, and therefore, the discharge of the capacitor 202 is integrated into the pressure welding process, and the electric energy of the capacitor 202 is released without increasing the process flow and production cost, and without affecting the performance of the chip.

[0071] In a second aspect, an embodiment of the present invention further provides a chip manufactured by the above chip packaging method.

[0072] It can be seen that the contents of the above method embodiments are all applicable to the present chip embodiments, the functions specifically implemented by the present chip embodiments are the same as those of the above method embodiments, and the beneficial effects achieved are also the same as those achieved by the above method embodiments.

[0073] In addition, an embodiment of the present application also discloses an integrated circuit, including the above-mentioned chip.

[0074] Similarly, the contents of the above chip embodiments are all applicable to the present integrated circuit embodiment. The functions specifically implemented by the present integrated circuit embodiment are the same as those of the above chip embodiments, and the beneficial effects achieved are also the same as those achieved by the above chip embodiments.

[0075] In some optional embodiments, the function / operation mentioned in the block diagram may not occur in the order mentioned in the operation diagram. For example, depending on the function / operation involved, the two boxes shown in succession can actually be executed substantially simultaneously or the boxes can sometimes be executed in reverse order. In addition, the embodiment presented and described in the flow chart of the application is provided by way of example, for the purpose of providing a more comprehensive understanding of technology. The disclosed method is not limited to the operation and logic flow presented herein. Optional embodiments are expected, wherein the order of various operations is changed and the sub-operation described as a part of a larger operation is performed independently.

[0076] In addition, although the present application is described in the context of functional modules, it should be understood that, unless otherwise specified, one or more of the functions and / or features can be integrated into a single physical device and / or software module, or one or more functions and / or features can be implemented in a separate physical device or software module. It is also understood that a detailed discussion of the actual implementation of each module is unnecessary for understanding the present application. More specifically, in view of the properties, functions, and internal relationships of the various functional modules in the device disclosed herein, the actual implementation of the module will be understood within the conventional techniques of the engineer. Therefore, those skilled in the art can implement the present application set forth in the claims without excessive experimentation using ordinary techniques. It is also understood that the specific concepts disclosed are merely illustrative and are not intended to limit the scope of the present application, which is determined by the full scope of the attached claims and their equivalents.

[0077] In the above description of this specification, the description with reference to the terms "one embodiment / example", "another embodiment / example" or "certain embodiments / examples" etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner.

[0078] Although the embodiments of the present application have been shown and described, those skilled in the art will appreciate that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the present application, and that the scope of the present application is defined by the claims and their equivalents.

[0079] The above is a specific description of the preferred implementation of the present application, but the present application is not limited to the described embodiments. Technical personnel familiar with the field may make various equivalent modifications or substitutions without violating the spirit of the present application. These equivalent modifications or substitutions are all included in the scope defined by the claims of the present application.

Claims

1. A chip packaging method, characterized in that: include: Press-welding a ball implant on a solder resist window of a packaging substrate to obtain a metal ball implant, wherein the solder resist window is electrically connected to a capacitor mounted on the packaging substrate; The capacitor is discharged by the metal ball to obtain a first packaged chip, and the metal ball is grounded; Performing chip pressure welding on the first packaged chip to obtain a second packaged chip, wherein the chip pressure welding process represents pressure welding the chip to be packaged onto the package substrate; After performing a packaging and molding process on the second packaged chip, at least one third packaged chip is obtained.

2. The method according to claim 1, characterized in that The method of press-welding a ball on a solder resist window of a packaging substrate to obtain a metal ball includes: Grounding a bonding wire of a pressure welding device to obtain a ground bonding wire; Using the pressure welding equipment to form the grounding wire into a welding ball; The solder implant ball is pressed down onto the solder resist window by the pressure welding equipment to obtain the metal implant ball.

3. The method according to claim 2, characterized in that The method of discharging the capacitor by the metal ball implantation to obtain a first packaged chip includes: The first packaged chip is obtained by releasing the electrical energy on the capacitor through the grounding wire on the metal implant ball, a metal compound is formed at the connection between the metal implant ball and the solder resist window, and the grounding wire is electrically connected to the solder resist window through the metal implant ball.

4. The method according to claim 1, characterized in that: The method of press-welding a ball on a solder resist window of a packaging substrate to obtain a metal ball includes: At least one metal ball is obtained by performing multiple pressure welding and ball planting on the same solder resist opening of the packaging substrate.

5. The method according to claim 3, characterized in that: After the electric energy on the capacitor is released through the grounding wire on the metal implant ball to obtain the first packaged chip, the method includes: releasing ultrasonic oscillations through the pressure welding device; The grounding wire is cut off by the ultrasonic oscillation, so that the grounding wire is disconnected from the metal implant ball.

6. The method according to claim 2, characterized in that The pressure welding equipment melts the wire tail of the grounding welding wire through a spark rod to obtain the metal implant ball, and moves the metal implant ball to the pressure welding area on the solder resist opening through a splitter.

7. The method according to claim 6, characterized in that The method further comprises: Configuring the length of the fire rod to be a first length; configuring the length of the line tail to be a second length; The wire tail of the second length is beaten into the metal planting ball of a preset size by using the first length of the fire rod.

8. The method according to claim 1, characterized in that The step of performing packaging and molding on the second packaged chip to obtain at least one third packaged chip comprises: A first semi-finished product is obtained by forming a plastic package body on the first surface of the second packaged chip through a compression molding process, wherein the solder resist window, the chip to be packaged and the capacitor are all arranged on the first surface of the package substrate, and the plastic package body is used to seal the solder resist window, the chip to be packaged, the capacitor and the first surface of the package substrate; Soldering a plurality of solder balls on the second surface of the first semi-finished product to obtain a second semi-finished product, wherein the second surface of the first semi-finished product represents the second surface of the packaging substrate; The second semi-finished product is cut into at least one third packaged chip.

9. A chip, characterized in that: The chip is manufactured by any one of the chip packaging methods described in claims 1-8.

10. An integrated circuit, characterized in that: A chip comprising the above-mentioned claim 9.

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