Package structure

Abstract

The invention provides a packaging structure. The packaging structure comprises a substrate; a chip, wherein the chip is arranged on the substrate; the chip is arranged on the substrate, the heat dissipation assembly covers the chip, the heat dissipation assembly is provided with pins, and the pins are arranged on the substrate. In this way, the heat dissipation assembly is connected with the substrate through the pins, and the rigidity of the heat dissipation assembly can effectively restrain warping of the edge of the substrate.

Description

Technical Field

[0001] Embodiments of the present disclosure relate to the field of semiconductor packaging technology, and in particular to a packaging structure. Background Art

[0002] In most packaging structures, signal I / O (input / output) is usually arranged on the chip surface using bumps. In order to achieve the interconnection between the chip and the substrate, the chip with bumps is usually flipped 180° so that the active area of ​​the chip faces the substrate and the welding process is completed.

[0003] However, it is worth noting that high temperature environment can cause the substrate to warp. When the temperature returns to room temperature, the substrate will try to restore its original shape, but the stress caused by the warping of the substrate and the mismatch of the thermal expansion coefficients of the various materials may cause the substrate to crack. In addition, this warping stress may also act on the bumps and chips, causing problems such as bump cracking, bridge short circuits, cold solder joints, and cracking of the electrical layer in the chip, which will have a negative impact on the overall quality of the circuit. Summary of the invention

[0004] An embodiment of the present disclosure provides a packaging structure.

[0005] In a first aspect, an embodiment of the present disclosure provides a packaging structure, including: substrate; A chip, wherein the chip is disposed on the substrate; A heat dissipation component covers the chip and is provided with pins, wherein the pins are arranged on the substrate.

[0006] In some optional embodiments, the heat dissipation assembly is provided with a metal support block, and one end of the metal support block is connected to the substrate.

[0007] In some optional embodiments, the metal support block is a ring structure or a columnar structure.

[0008] In some optional embodiments, the heat dissipation component is in a hat shape or a U-shaped shape.

[0009] In some optional implementations, the packaging structure further includes: A packaging material is filled between the chip and the substrate.

[0010] In some optional implementations, the packaging structure further includes: A first adhesive is filled between the chip and the heat dissipation component.

[0011] In some optional implementations, the packaging structure further includes: A second adhesive is filled between the pin and the substrate and / or between the metal support block and the substrate.

[0012] In some optional implementations, the packaging structure further includes: A passive component is disposed on the substrate and covered by the heat dissipation component.

[0013] In some optional embodiments, the chip is provided with metal bumps, and the metal bumps are electrically connected to the substrate.

[0014] In some optional implementations, the packaging structure further includes: A metal ball is disposed on a bottom surface of the substrate away from the chip.

[0015] In order to solve the problem of substrate warping, the packaging structure provided in the embodiment of the present disclosure effectively suppresses the warping of the edge of the substrate by setting the pins (Foot) of the heat dissipation component on the substrate and utilizing the rigidity of the heat dissipation component. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Other features, objects and advantages of the present disclosure will become more apparent by reading the detailed description of non-limiting embodiments made with reference to the following drawings. The drawings are only for the purpose of illustrating specific embodiments and are not to be considered as limiting the present disclosure. In the drawings: Figure 1 It is a schematic diagram of the packaging structure of the prior art; Figure 2 is a schematic diagram of a packaging structure 100 according to an embodiment of the present disclosure; Figure 3 is a schematic diagram of a packaging structure 200 according to an embodiment of the present disclosure; Figure 4 is a schematic diagram of a packaging structure 300 according to an embodiment of the present disclosure; Figure 5 is a schematic diagram of a packaging structure 400 according to an embodiment of the present disclosure; Figure 6 is a transverse cross-sectional view of a packaging structure along AA' according to an embodiment of the present disclosure; Figure 7 is another transverse cross-sectional view of the package structure along AA' according to an embodiment of the present disclosure; Figure 8 is a schematic diagram of a packaging structure 500 according to an embodiment of the present disclosure; Fig. 9is a schematic diagram of a packaging structure 600 according to an embodiment of the present disclosure; Fig.10 is a side view of a heat dissipation assembly 103 of a package structure 500 according to an embodiment of the present disclosure; Fig.11 is a side view of the heat dissipation assembly 103 of the package structure 600 according to an embodiment of the present disclosure.

[0017] Description of reference numerals / symbols: 01-substrate; 02-chip; 021-bump; 022-bottom filling glue; 03-passive component; 101-substrate; 102-chip; 1021-metal bump; 103-heat dissipation component; 1031-pin; 1032-metal support block; 104-packaging material; 105-first adhesive; 106-second adhesive; 107-passive component; 108-metal ball. DETAILED DESCRIPTION

[0018] With the booming development of industries such as high-performance computing, the Internet, and big data, the process technology of integrated circuits is also constantly improving, making it possible to introduce more I / O (input / output) signals on a limited chip area, but this also poses higher challenges to the design of chips and packaging substrates.

[0019] In order to meet this challenge, the industry generally adopts an efficient packaging form - Flip Chip-Ball Grid Array (FC-BGA) packaging. Figure 1 , the bumps 021 distribute the signal I / O on the surface of the chip 02. Then, the chip 02 with the bumps 021 is mirror-flipped 180° so that the active area of ​​the chip 02 directly faces the substrate 01, and the chip 02 and the substrate 01 are interconnected by welding. At the same time, the bottom filler 022 is filled in the bump array to protect the chip and the bumps. In some packaging structures, passive components 03, such as capacitors, resistors, and inductors, can also be provided on the substrate 01. This packaging method not only greatly improves the integration of I / O signals, but also effectively reduces the delay and loss of signal transmission, thereby significantly improving the performance of the chip 02. However, with the continuous increase in package size (such as the package size of 70mm×70mm and above that has been achieved in the industry), the problem of warping of the substrate 01 has become increasingly prominent.

[0020] Specifically, the packaging process of the packaging structure requires high / low temperature cycling. Among them, high temperature will cause the substrate 01 to warp, but when the temperature drops to room temperature, the state of the substrate 01 needs to return to its original position, and the stress of the warping will be applied to the bump 021 and the chip 02, thereby causing problems such as cracking of the bump 021, bridge short circuit and cold solder joint, and cracking of the electrical layer in the chip 02. At the same time, during the temperature change process, the stress generated by the warping of the substrate 01 and the mismatch of the thermal expansion coefficients of the various materials will cause the stacking holes in the substrate 01 to break, the substrate 01 to delaminate, the bonding surface of the bottom filler 022 to delaminate, the connection failure between the bump 021 and the substrate 01, and the cracking of the low dielectric constant dielectric layer of the chip 02. Further, it affects the flatness of the bump 021, resulting in problems such as poor patch performance, cold solder joints, short circuits, and even failure of circuit performance.

[0021] In order to solve the above problems, the specific implementation methods of the present disclosure are described below in conjunction with the accompanying drawings and embodiments. Through the contents recorded in this specification, those skilled in the art can easily understand the technical problems solved by the present disclosure and the technical effects produced. It is understood that the specific embodiments described herein are only used to explain the relevant inventions, rather than to limit the inventions. In addition, for the convenience of description, only the parts related to the relevant inventions are shown in the accompanying drawings.

[0022] It should be readily understood that the meanings of “on,” “over,” and “over” in this disclosure should be interpreted in the broadest manner, such that “on” not only means “directly on something,” but also means “on something” including the presence of intermediate components or layers therebetween.

[0023] Additionally, for ease of description, spatially relative terms such as "below," "beneath," "lower," "above," "upper," etc. may be used herein to describe the relationship of one element or component to another element or component illustrated in the drawings. The spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the drawings. The device may be otherwise oriented (rotated 90° or at other orientations) and the spatially relative descriptors used herein may likewise be interpreted accordingly.

[0024] The term "layer" as used herein refers to a material portion including an area with a certain thickness. The layer may extend over the entire lower or upper structure, or may have a degree less than the range of the lower or upper structure. In addition, the layer may be a region of a homogeneous or inhomogeneous continuous structure, the thickness of which is less than the thickness of the continuous structure. For example, the layer may be located between the top surface and the bottom surface of the continuous structure or between any pair of horizontal planes therebetween. The layer may extend horizontally, vertically and / or along a tapered surface. A substrate may be a layer, may include one or more layers therein, and / or may have one or more layers thereon, above and / or below. A layer may include multiple layers. For example, a semiconductor layer may include one or more doped or undoped semiconductor layers, and may have the same or different materials.

[0025] The term "substrate" as used herein refers to a material on which subsequent material layers are added. The substrate itself may be patterned. The material added on top of the substrate may be patterned or may remain unpatterned. In addition, the substrate may include a variety of semiconductor materials, such as silicon, silicon carbide, gallium nitride, germanium, gallium arsenide, indium phosphide, etc. Alternatively, the substrate may be made of a non-conductive material, such as glass, plastic, or sapphire wafer, etc. Further alternatively, the substrate may have a semiconductor device or circuit formed therein.

[0026] It should be noted that the structures, proportions, sizes, etc. illustrated in the drawings of the specification are only used to match the contents recorded in the specification for the understanding and reading of those skilled in the art, and are not used to limit the limiting conditions for the implementation of the present disclosure, so they have no substantial technical significance. Any modification of the structure, change in the proportion relationship, or adjustment of the size, without affecting the effects and purposes that can be achieved by the present disclosure, should still fall within the scope of the technical content disclosed by the present disclosure. At the same time, the terms such as "upper", "first", "second" and "one" quoted in this specification are only for the convenience of description, and are not used to limit the scope of the implementation of the present disclosure. The change or adjustment of their relative relationship should also be regarded as the scope of the implementation of the present disclosure without substantially changing the technical content.

[0027] It should also be noted that the longitudinal cross-section corresponding to the embodiment of the present disclosure may be a cross-section corresponding to the front view direction, the transverse cross-section may be a cross-section corresponding to the right view direction, and the horizontal cross-section may be a cross-section corresponding to the top view direction.

[0028] In addition, the embodiments and features in the embodiments of the present disclosure may be combined with each other without conflict. The present disclosure will be described in detail below with reference to the accompanying drawings and in combination with the embodiments.

[0029] See also Figure 2 , Figure 2 FIG. 1 is a schematic diagram of a packaging structure 100 according to an embodiment of the present disclosure. Figure 2 The package structure 100 shown includes: substrate 101; The chip 102 is disposed on the substrate 101; The heat dissipation component 103 covers the chip 102 , and the heat dissipation component 103 is provided with pins 1031 , and the pins 1031 are provided on the substrate 101 .

[0030] In this way, when the substrate 101 may deform under the influence of temperature, the pins 1031 on the heat dissipation component 103 are closely connected to the substrate 101 to effectively balance the deformation, and the solid characteristics of the heat dissipation component 103 are used to suppress the warping of the substrate 101, thereby ensuring the stability of the electronic components. At the same time, the heat dissipation component 103 is in contact with the chip 102, which can ensure that the heat generated by the chip 102 can be transferred to the heat dissipation component 103 in time and dissipated, thereby avoiding potential problems that may be caused by heat accumulation.

[0031] As a possible implementation, the chip 102 can be disposed on the substrate 101 by flip-flop welding (the active area directly faces the substrate 101), and the packaging material 104 can be filled between the two, so that the connection between the chip 102 and the substrate 101 is more stable. In addition, the active surface of the chip 102 can also be provided with a metal bump 1021 for electrical connection with the substrate 101. At this time, since the metal bump 1021 is small in size and relatively fragile, the filled packaging material 104 can protect the metal bump 1021 disposed on the chip 102. As an example, the packaging material 104 can be various underfills.

[0032] As a possible implementation, the lower surface of the heat dissipation component 103 that does not contact the substrate can be connected to the upper surface of the chip 102 through the first adhesive 105, that is, the first adhesive 105 is filled between the chip 102 and the heat dissipation component 103. In this way, seamless contact between the two is ensured, and the heat conduction efficiency is greatly optimized. As an example, the first adhesive 105 can be a thermally conductive adhesive, specifically a TIM (Thermal Interface Material) adhesive.

[0033] As a possible implementation, the pin 1031 of the heat dissipation component 103 can be connected to the substrate 101 through the second adhesive 106, that is, the second adhesive 106 is filled between the pin 1031 and the substrate 101. In this way, the connection between the pin 1031 and the substrate 101 is more stable, which helps to resist the deformation that may occur in the substrate 101 during temperature changes.

[0034] As a possible implementation, passive components 107, such as capacitors, resistors, and inductors, etc., can also be arranged on the substrate 101 to achieve its electrical functions. Among them, the passive components 107 can be covered by the heat dissipation component 103 but do not come into contact. It should be noted that the number and positions of the passive components 107 can be set as needed and are not limited herein.

[0035] As a possible implementation, metal balls 108 can be arranged on the bottom surface of the substrate 101 away from the chip 101 for electrical connection with other circuits or devices. The metal balls 108 can be conductive spheres, and they can be fixed to the bottom surface of the substrate 101 by soldering or other appropriate connection methods to form reliable electrical connection points. Such a connection method not only facilitates the installation of the circuit board but also ensures the stability of signals and the reliability of transmission.

[0036] As a possible implementation, further refer to Figure 3 , Figure 3 is a schematic diagram of the encapsulation structure 200 according to an embodiment of the present disclosure. The encapsulation structure 200 is similar to the encapsulation structure 100, and the differences are as follows: The heat dissipation component 103 of the encapsulation structure 100 is hat-shaped; while the heat dissipation component 103 of the encapsulation structure 200 is in a shape of a Chinese character 'hui'. Adopting the 'hui' shape design not only optimizes the heat dissipation effect but also improves the overall strength of the encapsulation structure. The four sides of the 'hui' shaped heat dissipation component surround the chip 102, which can effectively direct the heat generated by the chip to the surroundings and dissipate it, reducing the accumulation of heat around the chip, thereby ensuring the normal operation of the chip. At the same time, this design also allows additional circuit elements or connection lines to be arranged in the gaps, making the encapsulation structure more compact and flexible.

[0037] Based on the encapsulation structures 100 and 200, when the size of the substrate 101 is large, the heat dissipation component 103 can effectively suppress the warping of the edge of the substrate 101, but the improvement of the warping in the large area from the inner edge of the pin 1031 to the outer edge of the encapsulation material 104 may not be very ideal. In particular, in the area near the encapsulation material 104, due to the mismatch of the thermal expansion coefficients of the chip 102, the metal bumps 1021, the encapsulation material 104, and the substrate 101, in the scenario of high and low temperature cycling, the stress generation point will be closer to the chip 102, and warping will still occur in this part. Specifically, reference can be made to Figure 4 the shown encapsulation structure 300 and Figure 5 the shown encapsulation structure 400.

[0038] To further solve the problem of warping, as Figure 8 , Fig. 9As shown, a metal support block 1032 can be provided on the heat dissipation component 103, and one end of the metal support block 1032 is connected to the substrate 101. In this way, the rigidity of the metal support block 1032 is utilized to suppress the warping of the substrate near the chip 102 in sections, and further suppress the warping of the substrate within the air cavity (i.e., the cavity between the heat dissipation component and the substrate), thereby reducing the impact of the stress generated by the deformation on the chip 102, the metal bump 1021, the packaging material 104 and the substrate 101, and increasing the packaging structure's ability to withstand high and low temperature cycle changes. At the same time, the flatness of the metal ball 108 can be improved, especially for large-sized packaging structures, and the improvement effect is more obvious, which is also conducive to the surface mounting of printed circuit boards.

[0039] Specifically, as a possible implementation method, see further Figure 8 , Figure 8 FIG. 5 is a schematic diagram of a package structure 500 according to an embodiment of the present disclosure. The package structure 500 is similar to the package structure 100, except that: The metal support block 1032 is not provided on the heat dissipation component 103 of the packaging structure 100, while the metal support block 1032 is provided on the heat dissipation component 103 of the packaging structure 500. By utilizing the solid characteristics of the metal support block 1032, the effect of suppressing the warping of the substrate within the air cavity is further enhanced, thereby significantly reducing the stress caused by deformation.

[0040] As a possible implementation, see further Fig. 9 , Fig. 9 FIG. 6 is a schematic diagram of a package structure 600 according to an embodiment of the present disclosure. The package structure 600 is similar to the package structure 200, except that: The metal support block 1032 is not provided on the heat dissipation component 103 of the packaging structure 200, while the metal support block 1032 is provided on the heat dissipation component 103 of the packaging structure 600. By utilizing the solid characteristics of the metal support block 1032, we aim to achieve a more effective suppression of the substrate warping within the air cavity, thereby significantly reducing the stress level caused by deformation.

[0041] Optionally, the second adhesive 106 may be filled between the metal support block 1032 and the substrate 101 to increase the stability of the metal support block 1032. The number and position of the metal support blocks 1032 may be set according to specific needs and are not limited here.

[0042] For example, as long as it does not affect the mounting of other components on the surface of the substrate 101, they can be dispersedly arranged in the air cavity of the heat dissipation component 103. Figure 8 , Fig. 9 The package structure along the cross section shown by AA' can be as follows Figure 6As shown, the metal support block 1032 is a plurality of columnar structures that are dispersedly arranged. It should be noted that the size and number of the columnar structures can be set according to actual needs and are not limited here. At the same time, the cross section of the pin 1031 constitutes a ring structure, and the size (length of each side) of the ring structure can be set according to needs and is not limited here.

[0043] Or, if Figure 8 , Fig. 9 The package structure in the cross section along AA' can be as follows Figure 7 As shown, the metal support block 1032 also forms a ring structure like the pin 1031 of the heat dissipation component 103. It should be noted that the size (length of each side) of the ring structure formed by the metal support block 1032 can be set as needed and is not limited here. The number of the ring structures can also be set according to actual needs and is not limited here.

[0044] It should be noted that the heat dissipation assembly 103 and the metal support block 1032 can form a whole. Figure 8 The side view of the heat dissipation component 103 in the package structure 500 shown can be as follows: Fig.10 As shown, Fig. 9 The side view of the heat dissipation component 103 in the package structure 600 shown can be as follows: Fig.11 shown.

[0045] As used herein, the terms "substantially," "substantial," "approximately," and "about" are used to indicate and explain minor variations. For example, when used in conjunction with a numerical value, the above terms may refer to a range of variation less than or equal to ±10% of the corresponding numerical value, such as a range of variation less than or equal to ±5%, less than or equal to ±4%, less than or equal to ±3%, less than or equal to ±2%, less than or equal to ±1%, less than or equal to ±0.5%, less than or equal to ±0.1%, or less than or equal to ±0.05%. As another example, the thickness of a film or layer is "substantially uniform" and may refer to a standard deviation of the average thickness of the film or layer less than or equal to ±10%, such as a standard deviation less than or equal to ±5%, less than or equal to ±4%, less than or equal to ±3%, less than or equal to ±2%, less than or equal to ±1%, less than or equal to ±0.5%, less than or equal to ±0.1%, or less than or equal to ±0.05%. The term "substantially coplanar" may refer to two surfaces that are within 50 μm along the same plane, such as within 40 μm, within 30 μm, within 20 μm, within 10 μm, or within 1 μm along the same plane. Two components may be considered to be "substantially aligned" if, for example, the two components overlap or overlap within 200 μm, within 150 μm, within 100 μm, within 50 μm, within 40 μm, within 30 μm, within 20 μm, within 10 μm, or within 1 μm. Two surfaces or components may be considered to be "substantially perpendicular" if the angle between the two surfaces or components is, for example, 90°±10°, such as ±5°, ±4°, ±3°, ±2°, ±1°, ±0.5°, ±0.1°, or ±0.05°. When used in conjunction with an event or situation, the terms "substantially", "substantial", "approximately", and "about" may refer to situations where the event or situation occurs exactly as well as situations where the event or situation occurs very approximately.

Claims

1. A packaging structure, characterized in that: include: substrate; A chip, wherein the chip is disposed on the substrate; A heat dissipation component, the heat dissipation component covers the chip, and the heat dissipation component is provided with pins, the pins are arranged on the substrate, the heat dissipation component is provided with a metal support block, one end of the metal support block is connected to the substrate, and the metal support block is a ring structure or a columnar structure.

2. The packaging structure according to claim 1, characterized in that: The heat dissipation component is in a hat shape or a Chinese-shaped shape.

3. The packaging structure according to claim 1, characterized in that: The packaging structure further includes: A packaging material is filled between the chip and the substrate.

4. The packaging structure according to claim 1, characterized in that: The packaging structure further includes: A first adhesive is filled between the chip and the heat dissipation component.

5. The packaging structure according to claim 1, characterized in that: The packaging structure further includes: A second adhesive is filled between the pin and the substrate and / or between the metal support block and the substrate.

6. The packaging structure according to claim 1, characterized in that: The packaging structure further includes: A passive component is disposed on the substrate and covered by the heat dissipation component.

7. The packaging structure according to claim 1, characterized in that: The chip is provided with a metal bump, and the metal bump is electrically connected to the substrate.

8. The packaging structure according to claim 1, characterized in that: The packaging structure further includes: A metal ball is disposed on a bottom surface of the substrate away from the chip.

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