Design method of copper strip frame with low on-resistance

Abstract

The invention provides a design method of a copper strip frame with low on-resistance, which comprises the following steps: S1, a PDFN5X6 lead frame is in an eight-row lead frame sheet type design and belongs to a main carrier of a semi-finished product; the invention provides a design method of a low-on-resistance copper strip frame. Compared with an old single-row or double-row copper strip frame in the prior art, a newly designed copper strip row structure has higher production efficiency; the newly-designed copper strip frame adopts the design of frame elastic sheet supporting legs, so that extrusion deformation of a copper strip unit caused by packaging external force in the strip winding process can be effectively prevented; the newly-designed copper strip frame reinforcing ribs 7 can effectively protect the copper strip units from deformation in the cutting process, the stability of the copper strip units on the frame is enhanced, the newly-designed lead frame with four rows of copper strips and eight rows of copper strips can be perfectly matched and compounded after being blanked and mounted twice, and compared with a single-row or two-row copper strip frame in trial production at present, the copper strip lead frame has the advantages that the copper strip lead frame is simple in structure and convenient to use. And the four rows of copper strip frames have higher production efficiency.

Description

Technical Field

[0001] The present invention relates to the field of copper tape frame design and packaging structure design of clipbond process in semiconductor packaging industry, and in particular to a copper tape frame design method with low on-resistance. Background Art

[0002] In the semiconductor packaging industry, the copper tape frame design and packaging structure design of the clip bond process are crucial. For the copper tape frame of the clip bond process, the first thing to do is to choose a suitable copper material. High-purity copper has good electrical conductivity and thermal conductivity, and can effectively transmit current and dissipate heat to meet the requirements of semiconductor packaging. At the same time, the mechanical strength of the copper material also needs to be considered to ensure that it can withstand certain pressure and stress during the packaging process and is not easily deformed or damaged. In the clipbond process, the chip is usually fixed to the copper tape frame by welding or gluing. The welding method can provide better electrical connection and mechanical strength, but requires higher process temperature and precision. The gluing method is relatively simple, but it is necessary to select a suitable adhesive to ensure that the chip is firmly and reliably fixed. The selection of packaging materials needs to consider factors such as its insulation performance, mechanical strength, heat resistance, and corrosion resistance. Commonly used packaging materials include plastics, ceramics, metals, etc. Plastic packaging has the advantages of low cost, light weight, and simple molding process, and is suitable for most semiconductor packaging applications. Ceramic packaging has good insulation performance, mechanical strength and heat resistance, and is suitable for some high-performance and high-reliability semiconductor packaging applications. Metal packaging has good heat dissipation performance and mechanical strength, and is suitable for some high-power and high-heat dissipation semiconductor packaging applications. In short, the copper tape frame design and packaging structure design of the clip bond process need to comprehensively consider material selection, size design, pin design, heat dissipation design, chip fixing method, packaging material selection, packaging structure design and reliability design, etc., to meet the performance, reliability and cost requirements of semiconductor packaging.

[0003] Clip Bond (copper ribbon bonding) is a packaging process that uses a solid copper bridge welded to the solder to achieve chip and pin connection. Compared with the traditional bonding packaging method, the advantages of Cu Clip technology are: 1. The connection between the chip and the pin uses copper sheets, which to a certain extent replaces the standard wire bonding method between the chip and the pin, so that a unique packaging resistance value, higher current, and better thermal conductivity can be obtained. 2. The lead pin welding does not need to be silver-plated, which can fully save the cost of silver plating and poor silver plating. 3. The product appearance is completely consistent with the normal product; copper ribbon is a bonding material, which is a key structural component to achieve the electrical connection between the internal circuit lead end of the chip and the external lead to form an electrical circuit. It acts as a bridge to connect with the external wire. Compared with the conventional wire bonding (metal wire) process, it can enable the product to obtain better on-resistance and better thermal effect.

[0004] The old single-row or double-row copper tapes in the past had low production efficiency, the porosity ratio between the copper tape and the solder between the chip was high, which was not conducive to the discharge of volatile gases, and the production efficiency was low. The external force of the packaging during the tape winding process could easily cause the copper tape unit to be squeezed and deformed, and could not protect the copper tape unit from deformation during the cutting process, reducing the stability of the copper tape unit on the frame, and had poor practicality.

[0005] Therefore, it is necessary to provide a copper tape frame design method with low on-resistance to solve the above technical problems. Summary of the invention

[0006] The present invention provides a copper tape frame design method with low on-resistance, which solves the problems that the old single-row or double-row copper tape has low production efficiency, a high porosity ratio of the solder between the copper tape and the chip, which is not conducive to the discharge of volatile gases, low production efficiency, and the external force of packaging in the tape winding process easily squeezes and deforms the copper tape unit, and cannot protect the copper tape unit from deformation during the cutting process, thereby reducing the stability of the copper tape unit on the frame and having poor practicality.

[0007] In order to solve the above technical problems, the present invention provides a method for designing a copper tape frame with low on-resistance, comprising the following steps: S1: the PDFN5X6 lead frame is an 8-row lead frame sheet design, which is the main carrier of the semi-finished product;

[0008] S2: PDFN5X6 copper tape frame 1 is a 4-row copper tape frame design, which is packaged in reels;

[0009] S3: Punch out 2 columns of 8 sub-units of 4 rows of copper tapes for the first time, and place the 2 columns of 8 sub-units on the lead frame as shown in the upper left corner below;

[0010] S4: Punching out 4 rows of copper strips for the second time to form 2 columns of 8 sub-units, and placing the newly punched 2 columns of 8 sub-units at the lower position of the lead frame;

[0011] S5: Repeat this process. A lead frame has 256 units in total, and the copper tape is placed 256 / 8=32 times to complete.

[0012] Preferably, a copper sheet unit is provided on the surface of the copper belt frame, exhaust holes are opened on the surface of the copper sheet unit, a chip is fixedly mounted on the surface of the copper sheet unit, and a reinforcing rib is provided on one side of the surface of the copper sheet unit.

[0013] Preferably, a positioning hole is provided on one side of the surface of the copper belt frame.

[0014] Preferably, a spring support frame is provided on the other side of the surface of the copper belt frame.

[0015] Preferably, a silicon nitride insulating ceramic substrate is provided on one side of the surface of the lead frame, an epoxy plastic-sealed shell is provided on the outer surface of the silicon nitride insulating ceramic substrate, and a heat dissipating copper substrate is provided on the outer surface of the epoxy plastic-sealed shell.

[0016] Preferably, the silicon nitride insulating ceramic substrate adopts a silicon nitride AMB ceramic substrate, the upper and lower layers of the silicon nitride insulating ceramic substrate respectively form an oxygen-free copper layer structure, and the middle layer is made of a Si3N4 ceramic material layer with high thermal conductivity and high reliability.

[0017] Preferably, a circuit etching area is provided on the upper surface of the silicon nitride insulating ceramic substrate, and a lower surface of the silicon nitride insulating ceramic substrate is connected to the heat dissipating copper substrate.

[0018] Preferably, the gate electrode of the chip and each gate electrode of the silicon nitride insulating ceramic substrate, as well as each gate electrode of the same silicon nitride insulating ceramic substrate, are connected by aluminum wires to achieve electrical connection.

[0019] Preferably, the upper and lower copper layer structures are sintered on the middle layer by a silver sintering process to meet the requirements of high thermal conductivity and high reliability.

[0020] Preferably, the epoxy molded shell is formed by epoxy mold injection molding and then wraps the silicon nitride insulating ceramic substrate.

[0021] Compared with the related art, the low on-resistance copper tape frame design method provided by the present invention has the following beneficial effects:

[0022] The invention provides a design method for a copper tape frame with low on-resistance. The key point is that the number of rows is increased through a newly designed copper tape row structure, and the production efficiency is higher than that of the previous old single-row or double-row structure. The newly designed copper tape unit design adopts an evenly distributed exhaust hole design, which reduces the air hole ratio of the solder between the copper tape and the chip, and can also promote the accelerated discharge of volatile gases, thereby increasing the production efficiency. The newly designed copper tape frame adopts a frame spring support foot 4 design, which can effectively prevent the extrusion deformation of the copper tape unit caused by the external force of packaging during the tape rolling process. The newly designed copper tape frame reinforcement rib design can effectively protect the copper tape unit from deformation during the cutting process, and effectively enhance the stability of the copper tape unit on the frame. The newly designed copper tape 4 rows and the PDFN5X6 8-row lead frame can be perfectly matched and compounded after two punching and lamination. Compared with the single-row or 2-row copper tape frame in the current trial production, the 4-row copper tape frame has higher production efficiency, thereby improving the practicality of the device. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] Figure 1 A schematic structural diagram of a first embodiment of a method for designing a copper tape frame with low on-resistance provided by the present invention;

[0024] Figure 2 for Figure 1 The copper strip frame blanking process diagram shown;

[0025] Figure 3 for Figure 1 Schematic diagram of the composite effect of the copper tape frame, the lead frame base island and the semiconductor chip shown;

[0026] Figure 4 for Figure 2 The PDFN5X6 lead frame schematic shown;

[0027] Figure 5 A schematic diagram showing a comparison of a method for designing a copper tape frame with low on-resistance provided by the present invention before and after modification;

[0028] Figure 6 for Figure 1 The schematic diagram of the spring support foot structure shown;

[0029] Figure 7 A schematic structural diagram of a second embodiment of a method for designing a copper tape frame with low on-resistance provided by the present invention.

[0030] Numbers in the figure: 1. Copper tape frame, 2. Lead frame, 3. Positioning hole, 4. Spring support foot, 5. Copper sheet unit, 6. Exhaust hole, 7. Reinforcement rib, 8. Chip, 9. Heat dissipation copper substrate, 10. Epoxy plastic packaging shell, 11. Silicon nitride insulating ceramic substrate. DETAILED DESCRIPTION

[0031] The present invention will be further described below in conjunction with the accompanying drawings and implementation modes.

[0032] First embodiment

[0033] Please refer to Figure 1 , Figure 2 , Figure 3 , Figure 4 , Figure 5 and Figure 6 ,in, Figure 1 A schematic structural diagram of a first embodiment of a method for designing a copper tape frame with low on-resistance provided by the present invention; Figure 2 for Figure 1 The copper strip frame blanking process diagram shown; Figure 3 for Figure 1 Schematic diagram of the composite effect of the copper tape frame, the lead frame base island and the semiconductor chip shown; Figure 4 for Figure 2 The PDFN5X6 lead frame schematic shown;

[0034] Figure 5 A schematic diagram showing a comparison of a method for designing a copper tape frame with low on-resistance provided by the present invention before and after modification; Figure 6 for Figure 1 The schematic diagram of the spring support foot structure is shown. A method for designing a copper tape frame with low on-resistance comprises the following steps: S1: the PDFN5X6 lead frame is an 8-row lead frame sheet design, which is the main carrier of the semi-finished product;

[0035] S2: PDFN5X6 copper tape frame 1 is a 4-row copper tape frame design, which is packaged in reels;

[0036] S3: Punch out 2 columns of 8 sub-units of 4 rows of copper tapes for the first time, and place the 2 columns of 8 sub-units on the lead frame as shown in the upper left corner below;

[0037] S4: Punching out 4 rows of copper strips for the second time to form 2 columns of 8 sub-units, and placing the newly punched 2 columns of 8 sub-units at the lower position of the lead frame;

[0038] S5: Repeat this process. A lead frame has 256 units in total, and the copper tape is placed 256 / 8=32 times to complete.

[0039] A copper sheet unit 5 is provided on the surface of the copper belt frame. An exhaust hole 6 is opened on the surface of the copper sheet unit 5. A chip 8 is fixedly mounted on the surface of the copper sheet unit 5. A reinforcing rib 7 is provided on one side of the surface of the copper sheet unit 5.

[0040] A positioning hole 3 is provided on one side of the surface of the copper belt frame 1 .

[0041] A spring support frame 4 is arranged on the other side of the surface of the copper belt frame.

[0042] The working principle of a low on-resistance copper tape frame design method provided by the present invention is as follows:

[0043] When working, firstly, the PDFN5X6 lead frame is an 8-row lead frame sheet design, which is the main carrier of the semi-finished product;

[0044] PDFN5X6 copper tape frame 1 is a 4-row copper tape frame design, which is packaged in reels;

[0045] Punch out 8 sub-units in 2 columns of 4 rows of copper tapes for the first time, and place 8 sub-units in 2 columns on the lead frame as shown in the upper left corner below;

[0046] Punch out 4 rows of copper strips for the second time to continue punching out 2 columns of 8 sub-units, and place the newly punched out 2 columns of 8 sub-units at the lower position of the lead frame;

[0047] This process is repeated over and over again. A lead frame has a total of 256 units, which is completed by placing the copper tape 256 / 8=32 times.

[0048] Compared with the related art, the low on-resistance copper tape frame design method provided by the present invention has the following beneficial effects:

[0049] The present invention provides a design method for a copper tape frame with low on-resistance. The newly designed copper tape 4-row structure has a key point that the number of rows is increased, and the production efficiency is higher than that of the previous old single-row or double-row structure. The newly designed copper tape unit design adopts an evenly distributed exhaust hole 6 design to reduce the pore ratio of the solder between the copper tape and the chip 8, and at the same time, it can also promote the accelerated discharge of volatile gases and increase the production efficiency. The newly designed copper tape frame 1 adopts a frame spring support foot 4 design, which can effectively prevent the extrusion deformation of the copper tape unit caused by the external force of the packaging during the tape rolling process. The newly designed copper tape frame reinforcement rib 7 design can effectively protect the copper tape unit from deformation during the cutting process, and effectively enhance the stability of the copper tape unit on the frame. The newly designed copper tape 4-row structure and the PDFN5X6 8-row lead frame can be perfectly matched and compounded after two punching and lamination. Compared with the single-row or 2-row copper tape frame in the current trial production, the 4-row copper tape frame has higher production efficiency and improves the practicality of the device.

[0050] Second embodiment

[0051] Please refer to Figure 7Based on the design method of a copper tape frame with low on-resistance provided by the first embodiment of the present application, the second embodiment of the present application proposes another design method of a copper tape frame with low on-resistance. The second embodiment is only a preferred method of the first embodiment, and the implementation of the second embodiment will not affect the independent implementation of the first embodiment.

[0052] Specifically, the difference of the low on-resistance copper tape frame design method provided in the second embodiment of the present application is that, in a low on-resistance copper tape frame design method, a silicon nitride insulating ceramic substrate 11 is provided on one side of the surface of the lead frame 2, and an epoxy plastic sealing shell 10 is provided on the outer surface of the silicon nitride insulating ceramic substrate 11, and a heat dissipating copper substrate 9 is provided on the outer surface of the epoxy plastic sealing shell 10.

[0053] The silicon nitride insulating ceramic substrate 11 adopts a silicon nitride AMB ceramic substrate. The upper and lower layers of the silicon nitride insulating ceramic substrate 11 respectively form an oxygen-free copper layer structure, and the middle layer is made of a Si3N4 ceramic material layer with high thermal conductivity and high reliability.

[0054] A circuit etching area is provided on the upper surface of the silicon nitride insulating ceramic substrate 11 , and a lower surface of the silicon nitride insulating ceramic substrate 11 is connected to the heat dissipation copper substrate 9 .

[0055] The gate of the chip 8 and each gate of the silicon nitride insulating ceramic substrate 11 as well as each gate of the same silicon nitride insulating ceramic substrate 11 are connected by aluminum wires to achieve electrical connection.

[0056] The upper and lower copper layer structures are sintered on the middle layer through a silver sintering process to meet the requirements of high thermal conductivity and high reliability.

[0057] The epoxy molding shell 10 is formed by epoxy molding injection molding and then wraps the silicon nitride insulating ceramic substrate 11 .

[0058] The working principle of a low on-resistance copper tape frame design method provided by the present invention is as follows:

[0059] During operation, the copper tape is first connected to the silicon carbide chip 8 and the surface of the silicon nitride insulating ceramic substrate 11 through a bonding process, which can effectively increase the maximum fuse current of the chip package. The copper tape is used as a lead connection, which has a large current-carrying capacity, strong stress resistance, and strong power cycle resistance. Compared with aluminum wire, the contact area between the copper tape and the DBC and the chip is increased, which can greatly reduce the thermal resistance and temperature rise of the power device, thereby obtaining a lower on-resistance, improving the thermal conductivity of the module, and reducing power loss. The copper tape and the silicon carbide chip are connected by multiple copper tape bonding points corresponding to multiple chip bonding points. The copper tape and the surface of the silicon nitride insulating ceramic substrate 11 are connected by multiple copper tape bonding points corresponding to the surface of the silicon nitride insulating ceramic substrate 11. When bonded, pressure and ultrasonic energy act on a larger area, reducing the pressure on the unit area of ​​the chip 8 and reducing the possibility of damage to the chip 8.

[0060] Compared with the related art, the low on-resistance copper tape frame design method provided by the present invention has the following beneficial effects:

[0061] The present invention provides a design method for a copper tape frame with low on-resistance, which realizes connection between a chip 4 and a silicon nitride insulating ceramic substrate 11 by copper tape bonding, can effectively reduce parasitic parameters caused by the linear structure of traditional aluminum wires or copper wires, improve thermal conductivity and resistivity, improve reliability, and effectively reduce warping and contamination problems of the silicon nitride insulating ceramic substrate 11; compared with copper wire bonding, when the copper tape frame is bonded, pressure and ultrasonic energy act on a larger area, reducing the pressure on the unit area of ​​the chip 8 and reducing the possibility of chip damage.

[0062] The above descriptions are merely embodiments of the present invention and are not intended to limit the patent scope of the present invention. Any equivalent structure or equivalent process transformation made using the contents of the present invention specification and drawings, or directly or indirectly applied in other related technical fields, are also included in the patent protection scope of the present invention.

Claims

1. A method for designing a copper tape frame with low on-resistance, characterized in that: The following steps are involved: S1: PDFN5X6 lead frame is an 8-row lead frame sheet design and is the main carrier of semi-finished products; S2: PDFN5X6 copper tape frame 1 is a 4-row copper tape frame design, which is packaged in reels; S3: Punch out 2 columns of 8 sub-units of 4 rows of copper tapes for the first time, and place the 2 columns of 8 sub-units on the lead frame as shown in the upper left corner below; S4: Punching out 4 rows of copper strips for the second time to form 2 columns of 8 sub-units, and placing the newly punched 2 columns of 8 sub-units at the lower part of the lead frame; S5: Repeat this process. A lead frame has 256 units in total, and the copper tape is placed 256 / 8=32 times to complete.

2. A method for designing a copper tape frame with low on-resistance according to claim 1, characterized in that: A copper sheet unit is arranged on the surface of the copper belt frame, an exhaust hole is opened on the surface of the copper sheet unit, a chip is fixedly mounted on the surface of the copper sheet unit, and a reinforcing rib is arranged on one side of the surface of the copper sheet unit.

3. A method for designing a copper tape frame with low on-resistance according to claim 1, characterized in that: A positioning hole is arranged on one side of the surface of the copper belt frame.

4. A method for designing a copper tape frame with low on-resistance according to claim 1, characterized in that: A spring support frame is arranged on the other side of the surface of the copper belt frame.

5. The method for designing a copper tape frame with low on-resistance according to claim 1, characterized in that: A silicon nitride insulating ceramic substrate is arranged on one side of the lead frame surface, an epoxy plastic-sealed shell is arranged on the outer surface of the silicon nitride insulating ceramic substrate, and a heat dissipation copper substrate is arranged on the outer surface of the epoxy plastic-sealed shell.

6. A method for designing a copper tape frame with low on-resistance according to claim 5, characterized in that: The silicon nitride insulating ceramic substrate adopts a silicon nitride AMB ceramic substrate. The upper and lower layers of the silicon nitride insulating ceramic substrate respectively form an oxygen-free copper layer structure, and the middle layer is made of a Si3N4 ceramic material layer with high thermal conductivity and high reliability.

7. A method for designing a copper tape frame with low on-resistance according to claim 5, characterized in that: A circuit etching area is provided on the upper surface of the silicon nitride insulating ceramic substrate, and the lower surface of the silicon nitride insulating ceramic substrate is connected to the heat dissipation copper substrate.

8. The method for designing a copper tape frame with low on-resistance according to claim 5, characterized in that: The gate electrode of the chip and each gate electrode of the silicon nitride insulating ceramic substrate, as well as each gate electrode of the same silicon nitride insulating ceramic substrate, are connected by aluminum wires to achieve electrical connection.

9. A method for designing a copper tape frame with low on-resistance according to claim 6, characterized in that: The upper and lower copper layer structures are sintered on the middle layer through a silver sintering process to meet the requirements of high thermal conductivity and high reliability.

10. A method for designing a copper tape frame with low on-resistance according to claim 5, characterized in that: The epoxy molding shell is formed by epoxy molding injection molding and then wraps the silicon nitride insulating ceramic substrate.

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