Output signal synchronization method and system, intelligent terminal and storage medium

Abstract

The invention relates to an output signal synchronization method and system, an intelligent terminal and a storage medium, and relates to the technical field of signal synchronization, and the method comprises the steps: obtaining a chip detection signal of a preset single-chip microcomputer; controlling a preset main controller to forward the chip detection signal to a preset expansion controller for backup; controlling the expansion controller to output a preset receiving response signal to the main controller according to the chip detection signal; and controlling the main controller and the expansion controller to output a chip detection signal to the single chip microcomputer according to the received response signal. The method has the effect of improving the synchronism of output signals of the controller.

Description

Technical Field

[0001] The present application relates to the field of signal synchronization technology, and in particular to an output signal synchronization method, system, intelligent terminal and storage medium. Background Art

[0002] MCU chip detection requires sending relevant detection signals to the MCU chip, and judging whether the MCU chip is qualified through the signal returned by the MCU. Generally, during detection, the controller is connected to the MCU chip, and the controller outputs the detection signal.

[0003] In the related art, the number of I / O ports of a controller is generally fixed. When the number of microcontroller chips that the controller needs to control is greater than the number of I / O ports of the controller itself, the I / O ports need to be expanded. The usual practice is to add another controller to the controller and achieve expansion by adding I / O ports of the newly added controller.

[0004] In response to the above-mentioned related technologies, a new controller is added to the controller, and the two communicate with each other to realize signal transmission. However, since the signal needs to be forwarded, there will be a certain time difference in the signals output by the two controllers, resulting in the controller output signals being out of sync. There is still room for improvement. Summary of the invention

[0005] In order to improve the synchronization of controller output signals, the present application provides an output signal synchronization method, system, intelligent terminal and storage medium.

[0006] In a first aspect, the present application provides an output signal synchronization method, which adopts the following technical solution: An output signal synchronization method, comprising: Get the chip detection signal of the preset single chip microcomputer; Control the preset main controller to forward the chip detection signal to the preset expansion controller for backup; Control the expansion controller to output a preset receiving response signal to the main controller according to the chip detection signal; According to the received response signal, the main controller and the expansion controller are controlled to output the chip detection signal to the single chip microcomputer.

[0007] By adopting the above technical solution, the main controller is controlled to send the chip detection signal to the expansion processor for backup. After the expansion processor feeds back the received response signal to the main controller, the main controller and the expansion controller are controlled to synchronously output the chip detection signal to the single-chip microcomputer, and there will be no situation where the main controller outputs the chip detection signal to the single-chip microcomputer and the expansion processor at the same time, and the expansion processor then outputs it to the single-chip microcomputer, thereby improving the synchronization of the controller output signal.

[0008] Optionally, the step of controlling the main controller and the expansion controller to output the chip detection signal to the single-chip microcomputer according to the received response signal includes: Get the MCU connection status of the main controller and expansion controller; Determine whether the connection status of the single chip microcomputer meets the requirements of the preset single connection status; If it meets the requirements, the connection of the microcontroller is analyzed to determine the output controller; The control output controller outputs the chip detection signal to the single chip microcomputer; If not, the main controller and the expansion controller are time synchronized according to the received response signal, and the synchronized trigger signal is obtained; The main controller and the expansion controller are controlled according to the synchronized trigger signal to output the chip detection signal to the single chip microcomputer.

[0009] By adopting the above technical solution, when it is determined that the connection status of the single-chip microcomputer meets the single connection status, it means that only one controller is connected to the single-chip microcomputer, so the output controller is controlled to output the chip detection signal to the single-chip microcomputer; when it does not meet the requirements, it means that both controllers are connected to the single-chip microcomputer. At this time, the main controller and the expansion controller are controlled to synchronously output the chip detection signal to the single-chip microcomputer, thereby improving the convenience and synchronization of the signal output.

[0010] Optionally, the step of performing time synchronization on the main controller and the expansion controller according to the received response signal includes: Acquire the synchronized time of the main controller and the expansion controller based on the received response signal; Determine whether the synchronized time meets the requirements of the preset benchmark synchronization time; If it does not meet the requirements, the preset synchronized trigger signal is directly output, and the synchronized time of the main controller and the expansion controller is continuously obtained for cyclic judgment; If they match, the time of the main controller and the expansion controller will be synchronized.

[0011] By adopting the above technical solution, when it is determined that the synchronized time of the main controller and the expansion controller does not meet the requirements of the benchmark synchronization time, it means that the interval between the last synchronization between the two is short and it is not easy to be out of sync. Therefore, the synchronized trigger signal is directly output. If it meets the requirements, it means that the synchronization interval is long and synchronization is required again. Therefore, the two controllers are synchronized, thereby improving the convenience of synchronization.

[0012] Optionally, the steps of performing time synchronization on the main controller and the expansion controller include: Obtain the main output signal of the main controller and the extended output signal of the extended controller; Analyze the main output signal to determine the main signal time; Analyze the extended output signal to determine the extended signal time; Determine whether the main signal time meets the requirements of the extended signal time; If it meets the requirements, the preset synchronized trigger signal will be directly output; If not, the main controller and the expansion controller are connected to the same preset clock source for time synchronization.

[0013] By adopting the above technical solution, when it is determined that the main signal time meets the requirements of the extended signal time, it indicates that the main controller and the extended controller are still synchronized. At this time, a synchronized trigger signal is output. If it does not meet the requirements, it indicates that the two controllers are not synchronized. At this time, the main controller and the extended controller are connected to the same clock source for time synchronization, thereby improving the convenience of controller synchronization.

[0014] Optionally, the steps of controlling the main controller and the expansion controller to be connected to the same preset clock source for time synchronization include: Control the main controller and expansion controller to be connected to the same clock source; Get the main timestamp tag of the main controller and the extended timestamp tag of the extended controller; Analyze the main timestamp and the extended timestamp to determine the controller time difference; Get the delay controller corresponding to the controller time difference; The delay controller is delayed according to the controller time difference to achieve time synchronization between the main controller and the expansion controller.

[0015] By adopting the above technical solution, after the two controllers are connected to the same clock source, the main timestamp mark and the extended timestamp mark are detected and analyzed to determine the controller time difference, and the delay controller is delayed by controlling the time difference, so that the two controllers are synchronized, thereby improving the convenience of controller synchronization.

[0016] Optionally, the step of controlling the main controller and the expansion controller to output the chip detection signal to the single chip microcomputer according to the synchronized trigger signal includes: Acquire the main controller time of the main controller and the extended controller time of the extended controller based on the synchronized trigger signal; When the main controller time is equal to the preset synchronous output time, the main controller is controlled to output the chip detection signal to the single chip microcomputer; When the expansion controller time is equal to the preset synchronization output time, the expansion controller is controlled to output the chip detection signal to the single chip microcomputer; Obtain the main output signal time of the main controller and the extended output signal time of the extended controller; The main controller and the extended controller are calibrated according to the main output signal time and the extended output signal time.

[0017] By adopting the above technical solution, when the main controller time is equal to the synchronous output time, the main controller is controlled to output the chip detection signal to the microcontroller. When the extended controller time is equal to the synchronous output time, the extended controller is controlled to output the chip detection signal to the microcontroller, thereby improving the synchronization of the output signal.

[0018] Optionally, the step of calibrating the main controller and the extended controller according to the main output signal time and the extended output signal time includes: Analyze the main output signal time and the extended output signal time to determine the output interval time; When the output interval time does not meet the preset reference interval time requirement, the main controller and the expansion controller are controlled to transmit the preset invalidation detection signal to the single chip microcomputer; Synchronize and calibrate the main controller and expansion controller according to the output interval time; The main controller and the expansion controller after the control synchronization calibration output the chip detection signal to the single chip microcomputer again.

[0019] By adopting the above technical solution, the output interval time of the main controller and the expansion controller is detected. When the output interval time does not meet the requirements of the reference interval time, the original chip detection signal is invalidated, and the two controllers are synchronously calibrated and the chip detection signal is re-output to the microcontroller, thereby improving the synchronization of the controller output signal.

[0020] In a second aspect, the present application provides an output signal synchronization system, which adopts the following technical solution: An output signal synchronization system, comprising: An acquisition module, used for acquiring a chip detection signal; A memory, used to store a program of an output signal synchronization method as described in any one of the above items; The program in the processor memory can be loaded and executed by the processor to implement any of the above-mentioned output signal synchronization methods.

[0021] By adopting the above technical solution, the control processor loads and executes a program of an output signal synchronization method stored in the memory, so that the acquisition module obtains a series of data related to the output signal synchronization, thereby controlling the main controller to send the chip detection signal to the expansion processor for backup. After the expansion processor feeds back the receiving response signal to the main controller, the main controller and the expansion controller are controlled to synchronously output the chip detection signal to the single-chip microcomputer, and the main controller will not output the chip detection signal to the single-chip microcomputer and the expansion processor at the same time, and the expansion processor will not output it to the single-chip microcomputer, thereby improving the synchronization of the controller output signal.

[0022] In a third aspect, the present application provides a smart terminal, which adopts the following technical solution: An intelligent terminal comprises a memory and a processor, wherein the memory stores a computer program which can be loaded by the processor and execute any one of the output signal synchronization methods described above.

[0023] By adopting the above technical solution, by operating the intelligent terminal, the processor is made to load and execute a computer program of an output signal synchronization method stored in the memory, thereby controlling the main controller to send the chip detection signal to the expansion processor for backup. After the expansion processor feeds back the received response signal to the main controller, the main controller and the expansion controller are controlled to synchronously output the chip detection signal to the single-chip microcomputer, and there will be no situation in which the main controller outputs the chip detection signal to the single-chip microcomputer and the expansion processor at the same time, and the expansion processor then outputs it to the single-chip microcomputer, thereby improving the synchronization of the controller output signal.

[0024] In a fourth aspect, the present application provides a computer storage medium capable of storing corresponding programs, which has the characteristic of facilitating the improvement of synchronization of controller output signals, and adopts the following technical solutions: A computer-readable storage medium stores a computer program that can be loaded by a processor and execute any of the above-mentioned output signal synchronization methods.

[0025] By adopting the above technical solution, a computer program of an output signal synchronization method is stored in a computer-readable storage medium, so that the processor loads and executes the computer program in the storage medium, thereby controlling the main controller to send the chip detection signal to the expansion processor for backup. After the expansion processor feeds back the received response signal to the main controller, the main controller and the expansion controller are controlled to synchronously output the chip detection signal to the single-chip microcomputer, and the main controller will not output the chip detection signal to the single-chip microcomputer and the expansion processor at the same time, and the expansion processor will not output it to the single-chip microcomputer, thereby improving the synchronization of the controller output signal.

[0026] In summary, the present application includes at least one of the following beneficial technical effects: By controlling the main controller to send the chip detection signal to the expansion processor for backup, after the expansion processor feeds back the receiving response signal to the main controller, the main controller and the expansion controller are controlled to synchronously output the chip detection signal to the single-chip microcomputer, and the main controller will not output the chip detection signal to the single-chip microcomputer and the expansion processor at the same time, and the expansion processor will output it to the single-chip microcomputer, thereby improving the synchronization of the controller output signal; When it is determined that the synchronized time of the main controller and the expansion controller does not meet the requirements of the reference synchronization time, it indicates that the interval between the last synchronization between the two is short and it is not easy to be out of sync. Therefore, the synchronized trigger signal is directly output. If it meets the requirements, it indicates that the synchronization interval is long and synchronization is required again. Therefore, the two controllers are synchronized, thereby improving the convenience of synchronization. By controlling the main controller to output the chip detection signal to the microcontroller when the main controller time is equal to the synchronous output time, and controlling the extended controller to output the chip detection signal to the microcontroller when the extended controller time is equal to the synchronous output time, the synchronization of the output signal is improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] Figure 1 It is a flow chart of an output signal synchronization method in an embodiment of the present application.

[0028] Figure 2 It is a flowchart of the steps of controlling the main controller and the expansion controller to output the chip detection signal to the single-chip microcomputer according to the received response signal in an embodiment of the present application.

[0029] Figure 3 It is a flowchart of the steps of performing time synchronization between the main controller and the expansion controller according to the received response signal in an embodiment of the present application.

[0030] Figure 4 It is a flowchart of the steps for time synchronization between the main controller and the expansion controller in an embodiment of the present application.

[0031] Figure 5 It is a flowchart of the steps of controlling the main controller and the expansion controller to connect to the same preset clock source for time synchronization in an embodiment of the present application.

[0032] Figure 6 It is a flowchart of the steps of controlling the main controller and the expansion controller to output the chip detection signal to the single-chip microcomputer according to the synchronized trigger signal in an embodiment of the present application.

[0033] Figure 7 It is a flowchart of the steps of calibrating the main controller and the extended controller according to the main output signal time and the extended output signal time in an embodiment of the present application. DETAILED DESCRIPTION

[0034] In order to make the purpose, technical solutions and advantages of this application more clear, the following Figure 1-Figure 7 It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0035] The embodiment of the present application discloses a method for synchronizing the output signals of a controller, specifically a main controller and an expansion controller, wherein the expansion controller is connected to the I / O port of the main controller, and other I / O ports of the main controller and the expansion controller are connected to a single-chip microcomputer chip to be detected. After the main controller receives a chip detection signal, the main controller forwards the chip detection signal to the expansion controller and backs it up. After the expansion controller receives the chip detection signal, it feeds back a reception response signal to the main controller, and then controls the main controller and the expansion controller to output the chip detection signal to the single-chip microcomputer. The main controller will not output the chip detection signal to the single-chip microcomputer and the expansion processor at the same time, and the expansion processor will not output the chip detection signal to the single-chip microcomputer, thereby improving the synchronization of the controller output signal.

[0036] Reference Figure 1 The embodiment of the present application discloses an output signal synchronization method, comprising the following steps: Step S100: obtaining a chip detection signal of a preset single chip microcomputer.

[0037] The MCU refers to the chip connected to the controller I / O port waiting for detection. The chip detection signal refers to the signal for detecting the MCU chip. The operator inputs the chip detection signal and stores it in the main controller according to the specific situation of the MCU detection. After the main controller sends the chip detection signal to the MCU, it determines whether the MCU chip is qualified through the signal returned by the MCU.

[0038] Step S101: controlling the preset main controller to forward the chip detection signal to the preset expansion controller for backup.

[0039] Among them, after the main controller receives the chip detection signal, the main controller responds to the chip detection signal, thereby forwarding the chip detection signal to the expansion controller for backup, so that the chip detection signal exists on both the main controller and the expansion controller, providing basic support for the subsequent synchronous output of the chip detection signal.

[0040] The main controller and the expansion controller are essentially the same, referring to electronic devices used to perform test tasks, with certain processing capabilities and input and output interfaces, able to send test signals to the microcontroller according to preset programs or instruction sets, and receive and process response signals from the microcontroller. The main controller and the expansion controller are defined by the operator, and the connection and communication between the two uses LVDS bus and SPI communication protocol.

[0041] Step S102: controlling the expansion controller to output a preset receiving response signal to the main controller according to the chip detection signal.

[0042] After the expansion controller receives and backs up the chip detection signal, the expansion controller sends a reception response signal to the main controller, thereby indicating that the chip detection signal can be output.

[0043] The receiving response signal refers to a signal indicating that the expansion controller has backed up the chip detection signal and is waiting for output, and is stored in the expansion controller by the operator.

[0044] Step S103: controlling the main controller and the expansion controller to output the chip detection signal to the single chip microcomputer according to the received response signal.

[0045] Among them, when the main controller receives the receiving response signal, it indicates that the expansion controller is ready to output the chip detection signal, so the main controller and the expansion controller are controlled to synchronously output the chip detection signal to the microcontroller. For specific methods, refer to Figure 2 steps to complete the detection of the microcontroller.

[0046] Reference Figure 2 The steps of controlling the main controller and the expansion controller to output the chip detection signal to the single chip microcomputer according to the received response signal include: Step S200: obtaining the connection status of the single-chip microcomputers of the main controller and the expansion controller.

[0047] Among them, the MCU connection status refers to the MCU connection status of the main controller and the expansion controller, which is determined by the main controller and the expansion controller performing self-tests on all their own I / O ports, including three situations: only the main controller is connected to the MCU, only the expansion controller is connected to the MCU, and both are connected to the MCU.

[0048] Step S201: determine whether the connection status of the single chip microcomputer meets the requirements of the preset single connection status.

[0049] Among them, the single connection situation refers to the situation where only one controller is connected to the single chip microcomputer, and the requirements of the single connection situation refer to the situation corresponding to the single connection situation, which are all stored in the controller by the operator.

[0050] The controller determines whether the situation corresponding to the single-chip connection situation is consistent with the situation corresponding to the separate connection situation, thereby determining whether it is necessary to synchronize the two controllers for signal output.

[0051] Step S2011: If it meets the requirements, the connection status of the microcontroller is analyzed to determine the output controller.

[0052] Among them, if the controller determines that the situation corresponding to the microcontroller connection situation is consistent with the situation corresponding to the single connection situation, it means that only one controller is connected to the microcontroller, and there is no need to synchronize the two controllers for signal output. Therefore, the output controller is determined according to the microcontroller connection situation to provide basic support for subsequent output signals.

[0053] The output controller refers to a controller that needs to output a detection signal to the single-chip microcomputer, and the controller that has a single-chip microcomputer connection in the single-chip microcomputer connection situation is defined as the output controller.

[0054] Step S20111: Control the output controller to output the chip detection signal to the single chip microcomputer.

[0055] Among them, after the output controller is determined, the output controller is controlled to output the chip detection signal to the single-chip microcomputer, so as to determine whether the single-chip microcomputer chip is qualified through the signal returned by the single-chip microcomputer.

[0056] Step S2012: If not, time synchronization is performed on the main controller and the expansion controller according to the received response signal, and a synchronized trigger signal is obtained.

[0057] If the controller determines that the situation corresponding to the single-chip connection situation is inconsistent with the situation corresponding to the separate connection situation, it indicates that both the main controller and the expansion controller need to output chip detection signals. Therefore, the main controller and the expansion controller are synchronized according to the received response signal. The specific method is referred to Figure 3 steps to ensure the synchronization of the output signal, and detect the synchronized trigger signal to provide a specific time for the subsequent output detection signal.

[0058] The synchronized trigger signal refers to the signal that the main controller and the expansion controller are synchronized. It is stored in the controller by the operator and activated by the controller. For the specific activation process, refer to Figure 3 steps.

[0059] Step S20121: Control the main controller and the expansion controller to output the chip detection signal to the single chip microcomputer according to the synchronized trigger signal.

[0060] Among them, after the controller activates the synchronized trigger signal, the main controller and the expansion controller respond to the synchronized trigger signal, thereby synchronously outputting the chip detection signal to the single-chip microcomputer. The specific method is referred to Figure 6 steps.

[0061] Reference Figure 3 The steps of performing time synchronization on the main controller and the expansion controller according to the received response signal include: Step S300: Acquire the synchronized time of the main controller and the extended controller based on the received response signal.

[0062] The synchronized time refers to the interval between the current time and the last synchronization time of the main controller and the expansion controller, which is obtained by timing with a high-precision timer built into the main controller or the expansion controller.

[0063] Step S301: Determine whether the synchronized time meets the requirement of the preset reference synchronization time.

[0064] The reference synchronization time refers to the interval time between two synchronizations. The specific value is determined by the operator according to the actual situation of the controller. The reference synchronization time requirement is that it should not be less than the reference synchronization time, which is stored in the controller by the operator.

[0065] The controller determines whether the synchronized time is not less than the reference synchronization time, thereby determining whether the time synchronization of the main controller and the expansion controller is required.

[0066] Step S3011: If it does not meet the requirements, directly output the preset synchronized trigger signal, and continue to obtain the synchronized time of the main controller and the expansion controller for cyclic judgment.

[0067] Among them, if the controller determines that the synchronized time is less than the benchmark synchronization time, it means that the time since the last synchronization between the main controller and the expansion controller is short, and the two are not likely to have time differences. Therefore, there is no need to synchronize the time again. The synchronized trigger signal is directly output, and the synchronized time of the main controller and the expansion controller continues to be counted, thereby continuously paying attention to the time synchronization status of the main controller and the expansion controller.

[0068] The synchronized trigger signal in this step is consistent with the synchronized trigger signal in step S2012, and will not be described in detail here.

[0069] Step S3012: If it is in compliance, time synchronization is performed on the main controller and the expansion controller.

[0070] If the controller determines that the synchronized time is not less than the reference synchronization time, it means that the time between the main controller and the expansion controller is long and the time between the two controllers is not synchronized. Therefore, the main controller and the expansion controller are synchronized. For specific methods, refer to Figure 4 steps.

[0071] Reference Figure 4 The steps for synchronizing the time between the main controller and the expansion controller include: Step S400: Acquire the main output signal of the main controller and the extended output signal of the extended controller.

[0072] Among them, the main output signal refers to the signal output by the main controller for time synchronization, and the extended output signal refers to the signal output by the extended controller for time synchronization. Both are stored in the controller by the operator and input into the oscilloscope by the main controller and the extended controller.

[0073] Step S401: Analyze the main output signal to determine the main signal time.

[0074] The main signal time refers to the time corresponding to the rising edge or falling edge of the main output signal, which is directly measured by an oscilloscope and fed back to the controller.

[0075] Step S402: Analyze the extended output signal to determine the extended signal time.

[0076] The extended signal time refers to the time corresponding to the rising edge or falling edge in the extended output signal, which is directly measured by an oscilloscope and fed back to the controller.

[0077] Step S403: Determine whether the main signal time meets the requirement of the extended signal time.

[0078] The requirement of the extended signal time is to be consistent with the extended signal time. The controller determines whether the main signal time is consistent with the extended signal time, thereby determining whether there is a delay in the signals actually output by the main controller and the extended controller.

[0079] Step S4031: If it is in compliance, directly output the preset synchronized trigger signal.

[0080] Among them, if the controller determines that the main signal time is consistent with the extended signal time, it means that there is no delay in the signals actually output by the main controller and the extended controller, so the main controller and the extended controller are synchronized, and a synchronized trigger signal is output at this time. The synchronized trigger signal in this step is consistent with the synchronized trigger signal in step S2012, and will not be repeated here.

[0081] Step S4032: If not, the main controller and the expansion controller are controlled to be connected to the same preset clock source for time synchronization.

[0082] If the controller determines that the main signal time is inconsistent with the extended signal time, it means that the main controller and the extended controller are out of sync. At this time, the main controller and the extended controller are connected to the same clock source to adjust the synchronization of the two controllers. For specific methods, refer to Figure 5 steps.

[0083] A clock source refers to a device or circuit that provides a clock signal. A clock signal is a periodic electrical signal that provides a synchronization reference for each component in a digital circuit, ensuring that these components can perform operations according to a predetermined time sequence. A 200MHz clock source is used in the embodiment of the present application.

[0084] Reference Figure 5 , the steps of controlling the main controller and the expansion controller to connect to the same preset clock source for time synchronization include: Step S500: Control the main controller and the expansion controller to be connected to the same clock source.

[0085] The main controller and the expansion controller are connected to the same clock source to ensure that the two controllers run according to the same clock signal, thereby avoiding synchronization problems caused by clock frequency differences or drifts.

[0086] Step S501: Obtain a main timestamp tag of a main controller and an extended timestamp tag of an extended controller.

[0087] Among them, the main timestamp mark refers to the timestamp when the main controller outputs a signal, and the current timestamp is recorded before the signal when the main controller outputs a signal. The extended timestamp mark refers to the timestamp when the extended controller outputs a signal, and the current timestamp is recorded before the signal when the extended controller outputs a signal.

[0088] Step S502: Analyze the main timestamp mark and the extended timestamp mark to determine the controller time difference.

[0089] The controller time difference refers to the time difference between the main controller and the extended controller when outputting signals, which is obtained by subtracting the main timestamp mark and the extended timestamp mark by the processing terminal.

[0090] Step S503: Obtain a delay controller corresponding to the controller time difference.

[0091] Among them, the delay controller refers to the controller that needs to be delayed, which is determined by the controller after analyzing the controller time difference. If the controller time difference is a positive number, it means that the main controller is faster and the main controller needs to be delayed. Therefore, the main controller is the delay controller. Otherwise, the extended controller is the delay controller.

[0092] Step S504: Delay control is performed on the delay controller according to the controller time difference to achieve time synchronization between the main controller and the extended controller.

[0093] Among them, after determining the delay controller, a delay function corresponding to the controller time difference is added to the output code of the delay controller, so as to ensure that the controller with fast output and the controller with slow output output output at the same time, so as to achieve time synchronization between the main controller and the expansion controller.

[0094] Reference Figure 6 The steps of controlling the main controller and the expansion controller to output the chip detection signal to the single chip microcomputer according to the synchronized trigger signal include: Step S600: acquiring the main controller time of the main controller and the extended controller time of the extended controller based on the synchronized trigger signal.

[0095] The main controller time refers to the time of the main controller, which is recorded by the main controller and sent to the controller. The extended controller time refers to the time of the extended controller, which is recorded by the extended controller and sent to the controller.

[0096] Step S601: When the main controller time is equal to the preset synchronous output time, the main controller is controlled to output the chip detection signal to the single chip microcomputer.

[0097] When the main controller determines that the main controller time is equal to the synchronous output time, it indicates that the time for outputting the detection signal has arrived, so the main controller is controlled to output the chip detection signal to the single-chip microcomputer.

[0098] The synchronous output time refers to the time when the main controller and the expansion controller output signals simultaneously after synchronization. It is determined by the operator based on actual conditions and stored in the controller.

[0099] Step S602: When the expansion controller time is equal to the preset synchronization output time, the expansion controller is controlled to output the chip detection signal to the single chip microcomputer.

[0100] When the expansion controller determines that the expansion controller time is equal to the synchronous output time, it indicates that the time for outputting the detection signal has arrived, so the expansion controller is controlled to output the chip detection signal to the single-chip microcomputer. The synchronous output time in this step is consistent with the synchronous output time in step S601, and will not be repeated here.

[0101] Step S603: Acquire the main output signal time of the main controller and the extended output signal time of the extended controller.

[0102] Among them, the main output signal time refers to the time when the main controller outputs the chip detection signal, which is obtained by the controller identifying the timestamp recorded by the main controller before the chip detection signal. The extended output signal time refers to the time when the extended controller outputs the chip detection signal, which is obtained by the controller identifying the timestamp recorded by the extended controller before the chip detection signal.

[0103] Step S604: Calibrate the main controller and the extended controller according to the main output signal time and the extended output signal time.

[0104] After obtaining the main output signal time and the extended output signal time, the main controller and the extended controller are calibrated. For specific methods, refer to Figure 7 steps to further ensure the output synchronization of the main controller and the expansion controller.

[0105] Reference Figure 7 The steps of calibrating the main controller and the extended controller according to the main output signal time and the extended output signal time include: Step S700: Analyze the main output signal time and the extended output signal time to determine the output interval time.

[0106] The output interval time refers to the time difference between the main controller output signal time and the extended controller output signal time, which is obtained by the controller calculating the difference between the main output signal time and the extended output signal time.

[0107] Step S701: When the output interval time does not meet the requirement of the preset reference interval time, the main controller and the expansion controller are controlled to transmit the preset invalidation detection signal to the single chip microcomputer.

[0108] The reference interval time refers to the interval time between the output signals of two controllers. In this application, 5 nanoseconds is taken as an example. The reference interval time requirement refers to not being greater than the reference interval time, which is stored in the controller by the operator.

[0109] When the controller determines that the output interval time is greater than the reference interval time, it indicates that the main controller and the expansion controller are still not synchronized when outputting signals. At this time, the main controller and the expansion controller are controlled to send the invalid detection signal to the microcontroller, thereby invalidating the previously output chip detection signal.

[0110] The invalidation detection signal is a signal used to invalidate the chip detection signal and is stored in the controller by the operator.

[0111] Step S702: Synchronize and calibrate the main controller and the expansion controller according to the output interval time.

[0112] After the output interval time is obtained, the main controller and the expansion controller are synchronized and calibrated again. The specific method is the same as that in step S503 and step S504, and will not be described in detail here.

[0113] Step S703: Control the main controller and the expansion controller after synchronization calibration to output the chip detection signal to the single chip microcomputer again.

[0114] Among them, after the synchronization calibration, the main controller and the expansion controller are controlled to output the chip detection signal to the microcontroller again, so as to ensure the output synchronization of the main controller and the expansion controller.

[0115] Based on the same inventive concept, an embodiment of the present application provides an output signal synchronization system, including: An acquisition module is used to acquire chip detection signals, MCU connection status, synchronized trigger signals, synchronized time, main output signals, extended output signals, main timestamp marks, extended timestamp marks, delay controllers, main controller time, extended controller time, main output signal time, and extended output signal time; A memory for storing a program of an output signal synchronization method; The program in the memory can be loaded and executed by the processor and realize an output signal synchronization method.

[0116] Those skilled in the art can clearly understand that for the convenience and simplicity of description, only the division of the above-mentioned functional modules is used as an example. In actual applications, the above-mentioned functions can be assigned to different functional modules as needed, that is, the internal structure of the device is divided into different functional modules to complete all or part of the functions described above. The specific working process of the system, device and unit described above can refer to the corresponding process in the aforementioned method embodiment, and will not be repeated here.

[0117] An embodiment of the present application provides a computer-readable storage medium storing a computer program that can be loaded by a processor and execute an output signal synchronization method.

[0118] Computer storage media include, for example, various media that can store program codes, such as USB flash drives, mobile hard disks, read-only memories (ROM), random access memories (RAM), magnetic disks or optical disks.

[0119] Based on the same inventive concept, an embodiment of the present application provides an intelligent terminal, including a memory and a processor, wherein the memory stores a computer program that can be loaded by the processor and execute an output signal synchronization method.

[0120] Those skilled in the art can clearly understand that for the convenience and simplicity of description, only the division of the above-mentioned functional modules is used as an example. In actual applications, the above-mentioned functions can be assigned to different functional modules as needed, that is, the internal structure of the device is divided into different functional modules to complete all or part of the functions described above. The specific working process of the system, device and unit described above can refer to the corresponding process in the aforementioned method embodiment, and will not be repeated here.

[0121] The above are all preferred embodiments of the present application, and are not intended to limit the protection scope of the present application. Any feature disclosed in this specification (including the abstract and drawings), unless otherwise stated, can be replaced by other equivalent or alternative features with similar purposes. That is, unless otherwise stated, each feature is only an example of a series of equivalent or similar features.

Claims

1. An output signal synchronization method, characterized in that: include: Get the chip detection signal of the preset single chip microcomputer; Control the preset main controller to forward the chip detection signal to the preset expansion controller for backup; Control the expansion controller to output a preset receiving response signal to the main controller according to the chip detection signal; According to the received response signal, the main controller and the expansion controller are controlled to output the chip detection signal to the single chip microcomputer.

2. The output signal synchronization method according to claim 1, characterized in that: The steps of controlling the main controller and the expansion controller to output the chip detection signal to the single chip microcomputer according to the received response signal include: Get the MCU connection status of the main controller and expansion controller; Determine whether the connection status of the single chip microcomputer meets the requirements of the preset single connection status; If it meets the requirements, the connection of the microcontroller is analyzed to determine the output controller; The control output controller outputs the chip detection signal to the single chip microcomputer; If not, the main controller and the expansion controller are time synchronized according to the received response signal, and the synchronized trigger signal is obtained; The main controller and the expansion controller are controlled according to the synchronized trigger signal to output the chip detection signal to the single chip microcomputer.

3. The output signal synchronization method according to claim 2, characterized in that: The steps of performing time synchronization on the main controller and the expansion controller according to the received response signal include: Acquire the synchronized time of the main controller and the expansion controller based on the received response signal; Determine whether the synchronized time meets the requirements of the preset benchmark synchronization time; If it does not meet the requirements, the preset synchronized trigger signal is directly output, and the synchronized time of the main controller and the expansion controller is continuously obtained for cyclic judgment; If they match, the time of the main controller and the expansion controller will be synchronized.

4. The output signal synchronization method according to claim 3, characterized in that: The steps to synchronize the time between the main controller and the expansion controller include: Obtain the main output signal of the main controller and the extended output signal of the extended controller; Analyze the main output signal to determine the main signal time; Analyze the extended output signal to determine the extended signal time; Determine whether the main signal time meets the requirements of the extended signal time; If it meets the requirements, the preset synchronized trigger signal will be directly output; If not, the main controller and the expansion controller are connected to the same preset clock source for time synchronization.

5. The output signal synchronization method according to claim 4, characterized in that: The steps of controlling the main controller and the expansion controller to be connected to the same preset clock source for time synchronization include: Control the main controller and expansion controller to be connected to the same clock source; Get the main timestamp tag of the main controller and the extended timestamp tag of the extended controller; Analyze the main timestamp and the extended timestamp to determine the controller time difference; Get the delay controller corresponding to the controller time difference; The delay controller is delayed according to the controller time difference to achieve time synchronization between the main controller and the expansion controller.

6. The output signal synchronization method according to claim 2, characterized in that: The steps of controlling the main controller and the expansion controller to output the chip detection signal to the single chip microcomputer according to the synchronized trigger signal include: Acquire the main controller time of the main controller and the extended controller time of the extended controller based on the synchronized trigger signal; When the main controller time is equal to the preset synchronous output time, the main controller is controlled to output the chip detection signal to the single chip microcomputer; When the expansion controller time is equal to the preset synchronization output time, the expansion controller is controlled to output the chip detection signal to the single chip microcomputer; Obtain the main output signal time of the main controller and the extended output signal time of the extended controller; The main controller and the extended controller are calibrated according to the main output signal time and the extended output signal time.

7. The output signal synchronization method according to claim 6, characterized in that: The steps of calibrating the main controller and the expansion controller according to the main output signal time and the expansion output signal time include: Analyze the main output signal time and the extended output signal time to determine the output interval time; When the output interval time does not meet the preset reference interval time requirement, the main controller and the expansion controller are controlled to transmit the preset invalidation detection signal to the single chip microcomputer; Synchronize and calibrate the main controller and expansion controller according to the output interval time; The main controller and the expansion controller after the control synchronization calibration output the chip detection signal to the single chip microcomputer again.

8. An output signal synchronization system, characterized in that: include: An acquisition module, used for acquiring a chip detection signal; A memory for storing a program of an output signal synchronization method according to any one of claims 1 to 7; The program in the memory can be loaded and executed by the processor to implement an output signal synchronization method as described in any one of claims 1 to 7.

9. An intelligent terminal, characterized in that: The method comprises a memory and a processor, wherein the memory stores a computer program that can be loaded by the processor and executes an output signal synchronization method as claimed in any one of claims 1 to 7.

10. A computer-readable storage medium, characterized in that: A computer program is stored which can be loaded by a processor and executes an output signal synchronization method according to any one of claims 1 to 7.

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