Balance bridge control method, device, equipment, storage medium and system

Abstract

The invention provides a balance bridge control method, device, equipment, storage medium and system, and relates to the technical field of circuit control, and the control method comprises the steps: judging whether the voltage difference between the first voltage of a first capacitor and the second voltage of a second capacitor is greater than zero or not when an interruption period arrives; if the voltage difference is greater than zero, judging whether the PWM voltage of the first switching device at the arrival moment of the interruption period is less than or equal to zero; if the PWM voltage is larger than zero, the second switch is controlled to be switched off, and the PWM voltage is applied to the first switch to control the first switch. According to the invention, the condition that only the first switching device works and the second switching device does not work is realized, the voltage balance is realized, and the half-wave load condition is adapted.

Description

Technical Field

[0001] The present application relates to the field of circuit control technology, and more specifically to a control method, device, equipment, storage medium and system for a balanced bridge. Background Art

[0002] With the rapid promotion of three-phase inverters, in addition to common balanced loads, three-phase inverters will also carry a variety of other unconventional loads, such as a single-phase fully loaded with the other two phases empty, or impact loads such as air conditioners and water pumps, and even more severe half-wave loads such as hair dryers. These loads will pose a great challenge to the balance of the three-phase circuit, and then there will be problems such as unbalanced circuit inverter and bus voltage collapse. Summary of the invention

[0003] The purpose of the present application is to provide a control method, device, equipment, storage medium and system for a balanced bridge, aiming to solve the problem of voltage imbalance in an inverter circuit caused by a half-wave load in the related art.

[0004] A first aspect of an embodiment of the present application provides a control method for a washing device, wherein a balancing bridge comprises: a first capacitor, a second capacitor, a first switch device, a second switch device and an inductor;

[0005] The first end of the first capacitor is respectively connected to the first end of the external bus and the first end of the first switch device;

[0006] The second end of the first capacitor is connected to the first end of the second capacitor and the first end of the inductor respectively;

[0007] The second end of the inductor is connected to the second end of the first switch device and the first end of the second switch device respectively;

[0008] The second end of the second capacitor is respectively connected to the second end of the external bus and the second end of the second switch device;

[0009] The first end of the first switch device is connected to the first end of the inverter;

[0010] The second end of the second switch device is connected to the second end of the inverter;

[0011] A voltage-current dual closed-loop control module is used to control the balancing bridge;

[0012] The voltage and current dual closed-loop control module inputs the voltage of the first switch device and the voltage of the second switch device at its input end, and outputs the PWM wave of the first switch device at its output end;

[0013] determining a PWM wave of a second switching device according to a PWM wave of the first switching device;

[0014] controlling the first switching device using a PWM wave of the first switching device;

[0015] controlling the second switching device using a PWM wave of the second switching device;

[0016] When the interruption period arrives, determining whether a voltage difference between a first voltage of the first capacitor and a second voltage of the second capacitor is greater than zero;

[0017] If the voltage difference is greater than zero, determining whether the PWM voltage of the first switching device at the time when the interruption period arrives is less than or equal to zero;

[0018] If the PWM voltage is greater than zero, the second switching device is controlled to be turned off, and the PWM voltage is applied to the first switching device to control the first switching device.

[0019] In one embodiment, the voltage and current dual closed-loop control module includes at least a PI integral node,

[0020] If the PWM voltage is less than or equal to zero, the parameter in the PI integral node is set to a positive number, and the first switch device and the second switch device are controlled to be disconnected; so as to clear the negative integral parameter in the PI loop integral and speed up the regulation to reduce the voltage difference.

[0021] In one implementation, if the voltage difference is less than zero, it is determined whether the PWM voltage at the time when the interruption period arrives is greater than or equal to zero;

[0022] If the PWM voltage is less than zero, the first switch is controlled to be turned off, and the PWM voltage is applied to the second switch to control the second switch.

[0023] In one implementation, if the PWM voltage is greater than or equal to zero, the parameter in the PI integral node is set to a negative number, and the first switching device and the second switching device are controlled to be disconnected; so as to clear the positive integral parameter in the PI loop integral and speed up the regulation to reduce the voltage difference.

[0024] In one implementation, in the voltage-current dual closed-loop control module, a first voltage of the first capacitor and a second voltage of the second capacitor are collected;

[0025] calculating a voltage difference between a first voltage of the first capacitor and a second voltage of the second capacitor;

[0026] Inputting the voltage difference into the PI integral node, performing an integral operation, and obtaining a first integral result;

[0027] Inputting the first integral result into a second integral node to perform an integral operation to obtain a second integral result;

[0028] Using the second integration result as a reference current, and calculating a current difference between the reference current and a feedback current;

[0029] Inputting the current difference into a third integral node to perform an integral operation to obtain a third integral result;

[0030] Inputting the third integral operation result into a fourth integral node to perform an integral operation to obtain a fourth integral result;

[0031] Adding the fourth integration result to the first voltage value to obtain a voltage sum result;

[0032] Inputting the voltage sum result into a division node to obtain a quotient result of the voltage sum and the bus voltage;

[0033] The quotient result is input into the fifth integral node to obtain a PWM waveform for controlling the first switch.

[0034] In one implementation, the range of the fifth integration node is 0.3-0.7.

[0035] In one implementation, in the PWM wave of the first switch device Q1 , the high level time occupies 30% of the entire PWM cycle, and the low level time of the PWM wave occupies 70% of the entire PWM cycle.

[0036] In a second aspect, the present application proposes a control device for a balancing bridge, the balancing bridge comprising: a first capacitor, a second capacitor, a first switch device, a second switch device and an inductor;

[0037] The first end of the first capacitor is respectively connected to the first end of the external bus and the first end of the first switch device;

[0038] The second end of the first capacitor is connected to the first end of the second capacitor and the first end of the inductor respectively;

[0039] The second end of the inductor is connected to the second end of the first switch device and the first end of the second switch device respectively;

[0040] The second end of the second capacitor is respectively connected to the second end of the external bus and the second end of the second switch device;

[0041] The first end of the first switch device is connected to the first end of the inverter;

[0042] The second end of the second switch device is connected to the second end of the inverter;

[0043] A voltage-current dual closed-loop control module is used to control the balancing bridge;

[0044] The voltage and current dual closed-loop control module inputs the voltage of the first switch device and the voltage of the second switch device at its input end, and outputs the PWM wave of the first switch device at its output end;

[0045] determining a PWM wave of a second switching device according to a PWM wave of the first switching device;

[0046] controlling the first switching device using a PWM wave of the first switching device;

[0047] controlling the second switching device using a PWM wave of the second switching device;

[0048] The device comprises: a judgment module, used to judge whether the voltage difference between the first voltage of the first capacitor and the second voltage of the second capacitor is greater than zero when the interruption period arrives;

[0049] If the voltage difference is greater than zero, determining whether the PWM voltage of the first switching device at the time when the interruption period arrives is less than or equal to zero;

[0050] The switch control module is used for controlling the second switch device to be disconnected if the PWM voltage is greater than zero, and applying the PWM voltage to the first switch device to control the first switch device.

[0051] In a third aspect, the present application proposes an electronic device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements the steps of a control method for a balancing bridge as described in any one of the above items when executing the computer program.

[0052] In a fourth aspect, the present application proposes a storage medium storing a computer program, wherein the computer program, when executed by a processor, implements the steps of any of the above-mentioned methods for controlling a balancing bridge.

[0053] In a fifth aspect, the present application proposes a control system for a balancing bridge, including the above-mentioned electronic device and the voltage-current dual closed-loop control module; the voltage-current dual closed-loop control module is connected to the above-mentioned electronic device.

[0054] The beneficial effects of the embodiments of the present invention compared with the prior art are as follows: the technical solution of the present application, when an interruption period arrives, determines whether the voltage difference between the first voltage of the first capacitor and the second voltage of the second capacitor is greater than zero; if the voltage difference is greater than zero, determines whether the PWM voltage of the first switching device at the time of the arrival of the interruption period is less than or equal to zero; if the PWM voltage is greater than zero, controls the second switch to be disconnected, and applies the PWM voltage to the first switch to control the first switch.

[0055] If the PWM voltage is greater than zero, it means that the first switch device should be enabled. If the voltage difference is greater than zero, it means that the first voltage of the first capacitor is greater than the second voltage of the second capacitor. The first voltage should be reduced to achieve voltage balance. By controlling the first switch device and disconnecting the second switch device, the first voltage of the first capacitor can be reduced, which is conducive to achieving voltage balance. In this way, the situation where only the first switch device works and the second switch device does not work is achieved, which is conducive to achieving voltage balance and adapting to the situation of half-wave load. BRIEF DESCRIPTION OF THE DRAWINGS

[0056] Figure 1 A flow chart of a balanced bridge control method provided in one embodiment of the present application;

[0057] Figure 2 A structural schematic diagram of a balancing bridge provided in one embodiment of the present application;

[0058] Figure 3 1 is a waveform diagram of a PWM waveform and an interruption period of a first switching device Q1 provided in an embodiment of the present application;

[0059] Figure 4 This is a schematic diagram of an interruption cycle setting provided by an embodiment of the present application;

[0060] Figure 5 It is a schematic diagram of a voltage and current dual closed-loop control module provided in one embodiment of the present application;

[0061] Figure 6 is a structural block diagram of a balanced bridge control device provided by an embodiment of the present application;

[0062] Figure 7 is a block diagram of an electronic device provided by an embodiment of the present application;

[0063] Figure 8 It is a structural block diagram of a balanced bridge control system provided in one embodiment of the present application. DETAILED DESCRIPTION

[0064] In order to make the purpose, technical solution and advantages of the embodiments of the present invention clearer, the technical solution in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0065] The terms used in the embodiments of the present invention are only for the purpose of describing specific embodiments, and are not intended to limit the present invention. The singular forms "a", "said" and "the" used in the embodiments of the present invention and the appended claims are also intended to include plural forms, unless the context clearly indicates other meanings, and "multiple" generally includes at least two, but does not exclude the inclusion of at least one.

[0066] It should be understood that the term "and / or" used in this article is only a description of the association relationship of associated objects, indicating that there can be three relationships. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. In addition, the character " / " in this article generally indicates that the associated objects before and after are in an "or" relationship.

[0067] It should also be noted that the terms "include", "comprises" or any other variations thereof are intended to cover non-exclusive inclusion, so that a product or system including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such a product or system. In the absence of more restrictions, the elements defined by the sentence "comprises a ..." do not exclude the existence of other identical elements in the product or system including the elements.

[0068] Figure 1 A flow chart of a control method of a balancing bridge provided by an embodiment of the present application is shown. For ease of description, only the part related to the present embodiment is shown, which is described in detail as follows:

[0069] A method for controlling a balancing bridge may include the following steps:

[0070] See attached Figure 2, the balancing bridge includes: a first capacitor Cpos, a second capacitor Cneg, a first switch device Q1, a second switch device Q2 and an inductor L. The first end of the first capacitor Cpos is respectively connected to the first end of the external bus Bus and the first end of the first switch device Q1. The second end of the first capacitor Cpos is respectively connected to the first end of the second capacitor Cneg and the first end of the inductor. The second end of the inductor is respectively connected to the second end of the first switch device Q1 and the first end of the second switch device Q2. The second end of the second capacitor Cneg is respectively connected to the second end of the external bus Bus and the second end of the second switch device Q2. The first end of the first switch device Q1 is connected to the first end of the inverter. The second end of the second switch device Q2 is connected to the second end of the inverter.

[0071] A voltage-current dual closed-loop control module is used to control the balancing bridge.

[0072] The voltage and current dual closed-loop control module inputs the voltage of the first switch device Q1 and the voltage of the second switch device Q2 at its input end, and outputs the PWM wave of the first switch device Q1 at its output end. The PWM wave of the second switch device Q2 is determined based on the PWM wave of the first switch device Q1. The first switch device Q1 is controlled using the PWM wave of the first switch device Q1. The second switch device Q2 is controlled using the PWM wave of the second switch device Q2.

[0073] In some embodiments, the first switch device Q1 and the second switch device Q2 are controlled to be turned on and off alternately, so as to adjust the charging and discharging of the first capacitor Cpos and the second capacitor Cneg.

[0074] The first switch device Q1 is controlled to be closed, and the second switch device Q2 is controlled to be open. In this case, the first capacitor Cpos, the inductor L and the first switch device form a closed loop. The bus voltage charges the first capacitor Cpos.

[0075] The second switch device Q2 is controlled to be closed, and the first switch device Q1 is controlled to be opened. In this case, the second capacitor Cneg, the inductor L and the second switch device Q2 form a closed loop. The inductor L discharges and charges the second capacitor Cneg.

[0076] See also Figure 3 FIG. 1 is a schematic diagram of voltage waveforms of the first capacitor Cpos and the second capacitor Cneg, wherein the horizontal axis represents time and the vertical axis represents voltage.

[0077] In step S102, when the interruption period arrives, it is determined whether the voltage difference between the first voltage of the first capacitor Cpos and the second voltage of the second capacitor Cneg is greater than zero.

[0078] In this embodiment, see the attached Figure 4 The schematic diagram of the PWM waveform and interruption period of the first switching device Q1 is shown, the horizontal axis represents time, the vertical axis represents voltage, and the dotted line represents the interruption period; the rectangular frame represents the PWM wave, and the sinusoidal waveform represents the sinusoidal period of PWM.

[0079] The interruption period can be set flexibly, and the interruption period should be less than the period of the sine wave of the PWM wave. The purpose of the interruption period is to compare and judge the PWM wave corresponding to the period, the first voltage value of the first capacitor Cpos and the second voltage value of the second capacitor Cneg when each interruption period arrives, and to flexibly control according to the values ​​of the above parameters, including adjusting the PWM wave, or adjusting the switching of the first switch device Q1 and the second switch device Q2, so as to achieve a more refined control effect.

[0080] If the voltage difference is greater than zero, step S104 is executed.

[0081] In this embodiment, the voltage difference is greater than zero, indicating that the first voltage value of the first capacitor Cpos is greater than the second voltage value of the second capacitor Cneg, and the first switch device Q1 needs to be closed and the second switch device Q2 needs to be opened.

[0082] In step S104, it is determined whether the PWM voltage of the first switch device Q1 is less than or equal to zero when the interruption period arrives.

[0083] If the PWM voltage is greater than zero, step S106 is executed.

[0084] In step S106 , the second switch device Q2 is controlled to be turned off, and the PWM voltage is applied to the first switch device Q1 to control the first switch device Q1 .

[0085] When the first switch device Q1 is closed and the second switch device Q2 is open, the positive bus capacitor, that is, the first capacitor Cpos, charges the inductor L through the inductor L and the first switch device Q1, and the inductor L stores energy.

[0086] When the first switch device Q1 is turned off and the second switch device Q2 is turned on, the energy stored in the inductor L in the previous stage flows into the second capacitor Cneg, and this process is repeated. When the voltage of the first capacitor Cpos is lower than the voltage of the second capacitor Cneg, the situation is just the opposite. This method can achieve balanced regulation of the positive and negative bus voltages.

[0087] In this embodiment, the PWM voltage is greater than zero, indicating that the first switch device Q1 should be enabled to work, and the second switch device Q2 should not be enabled to work. By controlling the second switch device Q2 to be disconnected, it is beneficial to prevent the second switch device Q2 from being enabled to work, thereby avoiding the voltage waveform disorder caused by the operation of the second switch device Q2. Applying the PWM voltage to the first switch to control the first switch device Q1 can achieve the effect of enabling the first switch device Q1 to work, thereby avoiding the situation that the first switch device Q1 should work but does not work, resulting in a voltage waveform disorder.

[0088] The above-mentioned technical solution of the present application, when the interruption period arrives, determines the voltage difference between the first voltage of the first capacitor and the second voltage of the second capacitor, and if the voltage difference is greater than zero, then determines whether the PWM voltage of the first switch device at the time of the interruption period is less than or equal to zero; if the PWM voltage is greater than zero, then the second switch is controlled to be disconnected, and the PWM voltage is applied to the first switch to control the first switch. In this way, only the first switch device works, while the second switch device does not work. In the case of unbalanced positive and negative busbars, the new control strategy uses unipolar wave generation after determining the direction of the positive and negative busbar voltage errors, and only generates waves for the switch device that needs to generate waves. This method has obvious effects on unbalanced half-wave loads, because the half-wave load only exists for half a cycle, and the wave generation is only effective for half a cycle, which is just matched, which is conducive to achieving voltage balance and adapting to the half-wave load situation. Thereby realizing the function of the inverter to operate stably with various unbalanced loads.

[0089] In some embodiments, in the PWM wave of the first switch device Q1 , the high level time occupies 30% of the entire PWM cycle, and the low level time of the PWM wave occupies 70% of the entire PWM cycle.

[0090] In this embodiment, since the high-level time of PWM accounts for 30% of the entire PWM cycle, which is a relatively small proportion, the inductor current will often enter the discontinuous mode, and the inductor current cannot increase, thereby reducing the current impact, thereby solving the problem of uncontrollable current in the dual closed-loop state.

[0091] In some embodiments, if the PWM voltage is less than or equal to zero, step S108 is executed.

[0092] Step S108, setting the parameters in the PI integral node (proportional integral controller, PI) to positive numbers, and controlling the first switch device Q1 and the second switch device Q2 to be disconnected; to clear the negative integral parameters in the PI loop integral, and speed up the regulation to reduce the voltage difference.

[0093] like Figure 3 From the positive and negative bus envelopes shown, we can see that the error direction of the positive and negative bus will change frequently, so it is necessary to introduce an integral logic processing strategy. Since there may be negative integral parameters in the PI integral node, the negative integral parameters will cause the loop response to slow down. Therefore, when the PWM voltage is less than or equal to zero, the integral parameter in the PI integral node is directly set to a positive number to speed up the loop response and eliminate the impact of previous bus changes, which greatly improves the dynamics of the entire system. The new control loop under this control strategy combines logical judgment and fast logic processing of the integral of the PI control loop, and uses a unipolar wave generation method that adapts to unbalanced loads to achieve a stable and reliable function with unbalanced loads. This enables the inverter to operate stably with various unbalanced loads.

[0094] If in step S102, the voltage difference is greater than zero, step S110 is executed.

[0095] Step S110, determining whether the PWM voltage at the time when the interruption cycle arrives is greater than or equal to zero.

[0096] If the PWM voltage at the time when the interruption period arrives is greater than or equal to zero, step S112 is executed.

[0097] In step S112, the parameter in the PI integral node is set to a negative number, and the first switch device Q1 and the second switch device Q2 are controlled to be disconnected, so as to clear the positive integral parameter in the PI loop integral and speed up the regulation to reduce the voltage difference.

[0098] In this embodiment, by setting the parameters in the PI integral node to negative numbers, the positive integral parameters in the PI loop integral can be cleared, and the negative parameters can speed up the regulation.

[0099] If the PWM voltage at the time when the interruption cycle arrives is less than zero, step S114 is executed.

[0100] In step S114, the first switch is controlled to be turned off, and the PWM voltage is applied to the second switch to control the second switch.

[0101] In this embodiment, the PWM voltage at the time when the interruption cycle arrives is less than zero, indicating that the first switch should not be enabled and the second switch should be enabled to work, so the first switch is directly disconnected and the PWM voltage is applied to the second switch. In this way, it is possible to avoid the situation where the first switch continues to work when it should not be enabled, and the second switch does not work when it should be enabled, which is conducive to avoiding the occurrence of voltage disorder.

[0102] In some embodiments, the voltage-current dual closed-loop control module includes an inner loop 402, i.e., a balanced current loop, and an outer loop 401, i.e., a balanced voltage loop. Finally, the positive half bus voltage feedforward 403 is superimposed, and the result is divided by the total bus, and the output range is limited to 0.2. That is, the output is [0.3, 0.7], in order to prevent the PWM regulation from being too large.

[0103] From the actual effect analysis, when facing normal loads or well-balanced loads, the outer loop has voltage balance control and the inner loop has current limitation, so the system can operate stably and reliably. However, when facing harsh half-wave loads such as hair dryers, since power is only available half of the time and the other half is always empty, due to the existence of other interference factors such as circuit drive and sampling, the control loop will only execute one side for a long time, which will cause the loop's operation effect to slowly shift to one side, eventually leading to loss of control. The balanced bridge inductor current becomes very large, and eventually the fault shuts down to protect the machine, affecting the stability of the inverter.

[0104] In one embodiment, see the attached Figure 5 In the voltage-current dual closed-loop control module, a first voltage of the first capacitor Cpos and a second voltage of the second capacitor Cneg are collected.

[0105] A voltage difference between a first voltage of the first capacitor Cpos and a second voltage of the second capacitor Cneg is calculated.

[0106] The voltage difference is input into the PI integral node (proportional integral controller, PI) to perform an integral operation to obtain a first integral result.

[0107] Specifically, the above PI integral node is a proportional integral controller.

[0108] Inputting the first integral result into a second integral node to perform an integral operation to obtain a second integral result;

[0109] Wherein, the second integral node mentioned above is a proportional integral controller.

[0110] The second integration result is used as a reference current, and a current difference between the reference current and a feedback current flowing through the inductor L is calculated.

[0111] The current difference is input into a third integral operation node to perform an integral operation to obtain a third integral operation result.

[0112] The third integral result is input into the fourth integral node to perform integral operation to obtain a fourth integral operation result. The fourth integral node is a proportional integral controller.

[0113] The fourth integration result is added to the first voltage value to obtain a voltage sum result.

[0114] The voltage sum result is input into a division node to obtain a quotient result of the voltage sum and the bus voltage.

[0115] The quotient result is input into the fifth integral node to obtain a PWM waveform for controlling the first switch device Q1.

[0116] The fifth integral node outputs a PWM waveform for controlling the first switch device Q1.

[0117] In this embodiment, in the voltage-current dual closed-loop control module, through the above-mentioned settings, a more optimized PWM waveform of the first switch device Q1 can be obtained, so as to better control the first switch device Q1.

[0118] Because the PWM wave of the second switching device is opposite to the PWM wave of the first switching device, the PWM wave of the second switching device can be determined according to the complementary principle. The PWM wave of the second switching device is used to control the second switching device.

[0119] The complementary principle is that when the first PWM wave is at a high level, the corresponding second PWM wave is at a low level. When the first PWM wave is at a low level, the corresponding second PWM wave is at a high level. Based on this principle, the PWM wave of the second switch device can be determined.

[0120] In some embodiments, the range of the third integral node is set to 0.3-0.7. Because the positive and negative half-buses are normally balanced, the PWM should be 50%, that is, 0.5, and the output is limited to +-0.2, so it is plus or minus 0.2 on the basis of 0.5, and the range is [0.3, 0.7].

[0121] In the second aspect, the present application proposes a control device for a balancing bridge, see Figure 6 , the balancing bridge comprises: a first capacitor, a second capacitor, a first switching device, a second switching device and an inductor;

[0122] The first end of the first capacitor is respectively connected to the first end of the external bus and the first end of the first switch device;

[0123] The second end of the first capacitor is connected to the first end of the second capacitor and the first end of the inductor respectively;

[0124] The second end of the inductor is connected to the second end of the first switch device and the first end of the second switch device respectively;

[0125] The second end of the second capacitor is respectively connected to the second end of the external bus and the second end of the second switch device;

[0126] The first end of the first switch device is connected to the first end of the inverter;

[0127] The second end of the second switch device is connected to the second end of the inverter;

[0128] A voltage-current dual closed-loop control module is used to control the balancing bridge;

[0129] The voltage and current dual closed-loop control module inputs the voltage of the first switch device and the voltage of the second switch device at its input end, and outputs the PWM wave of the first switch device at its output end;

[0130] determining a PWM wave of a second switching device according to a PWM wave of the first switching device;

[0131] controlling the first switching device using a PWM wave of the first switching device;

[0132] The second switching device is controlled using a PWM wave of the second switching device.

[0133] The device comprises: a judgment module 61, which is used to judge whether the voltage difference between the first voltage of the first capacitor and the second voltage of the second capacitor is greater than zero when the interruption period arrives;

[0134] If the voltage difference is greater than zero, it is determined whether the PWM voltage of the first switching device at the time when the interruption period arrives is less than or equal to zero.

[0135] The control module 62 is configured to control the second switch device to be disconnected if the PWM voltage is greater than zero, and apply the PWM voltage to the first switch device to control the first switch device.

[0136] In some embodiments, the voltage-current dual closed-loop control module includes at least a PI integration node:

[0137] The control module 62 is also used to set the parameter in the PI integral node to a positive number and control the first switch device and the second switch device to be disconnected if the PWM voltage is less than or equal to zero; so as to clear the negative integral parameter in the PI loop integral and speed up the regulation to reduce the voltage difference.

[0138] In some embodiments, the judgment module 61 is further used to judge whether the PWM voltage at the time when the interruption cycle arrives is greater than or equal to zero if the voltage difference is less than zero;

[0139] The control module 62 is further configured to, if the judgment module 61 determines that the PWM voltage is less than zero, control the first switch to be disconnected, and apply the PWM voltage to the second switch to control the second switch.

[0140] In some embodiments, the control module 62 is also used to, if the PWM voltage is greater than or equal to zero, set the parameter in the PI integral node to a negative number, and control the first switching device and the second switching device to be disconnected; so as to clear the positive integral parameter in the PI loop integral and speed up the regulation to reduce the voltage difference.

[0141] Figure 7 is a schematic diagram of an electronic device provided by an embodiment of the present application. Figure 7 As shown, the electronic device 7 of this embodiment includes: a processor 70, a memory 71, and a computer program 72 stored in the memory 71 and executable on the processor 70, such as a control program for a balancing bridge. When the processor 70 executes the computer program 72, the steps in the above-mentioned control method embodiments of the balancing bridge are implemented, or when the processor 70 executes the computer program 72, the functions of the modules / units in the above-mentioned device embodiments are implemented, such as Figure 6 The judging module 61 and the controlling module 62 are shown.

[0142] Exemplarily, the computer program 72 may be divided into one or more modules / units, which are stored in the memory 71 and executed by the processor 70 to complete the present application. The one or more modules / units may be a series of computer program instruction segments capable of completing specific functions, which are used to describe the execution process of the computer program 72 in the electronic device 7. For example, the computer program 72 may be divided into a judgment module 61 and a control module 62.

[0143] The electronic device 7 may be a computing device such as a desktop computer, a notebook, a PDA, or a cloud server. The electronic device may include, but is not limited to, a processor 70 and a memory 71. Those skilled in the art will appreciate that Figure 7 It is only an example of the electronic device 7 and does not constitute a limitation of the electronic device 7. It may include more or fewer components than shown in the figure, or a combination of certain components, or different components. For example, the electronic device may also include input and output devices, network access devices, buses, etc.

[0144] The processor 70 may be a central processing unit (CPU), or other general-purpose processors, digital signal processors (DSP), application-specific integrated circuits (ASIC), field-programmable gate arrays (FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. A general-purpose processor may be a microprocessor or any conventional processor, etc.

[0145] The memory 71 may be an internal storage unit of the electronic device 7, such as a hard disk or memory of the electronic device 7. The memory 71 may also be an external storage device of the electronic device 7, such as a plug-in hard disk, a smart media card (SMC), a secure digital card (SD), a flash card, etc. equipped on the electronic device 7. Further, the memory 71 may also include both an internal storage unit and an external storage device of the electronic device 7. The memory 71 is used to store the computer program and other programs and data required by the electronic processing device. The memory 71 may also be used to temporarily store data that has been output or is to be output.

[0146] In a fourth aspect, the present application proposes a storage medium storing a computer program, wherein the computer program, when executed by a processor, implements the steps of any of the above-mentioned methods for controlling a balancing bridge.

[0147] In the fifth aspect, the present application proposes a control system 8 for a balancing bridge, including the above-mentioned electronic device 7, and also including a voltage and current dual closed-loop control module 83; the voltage and current dual closed-loop control module 83 is connected to the above-mentioned electronic device 7, and specifically the voltage and current dual closed-loop control module 83 is connected to the processor 70 in the electronic device 7.

[0148] In the controller of the processor 70 , the voltage-current dual closed-loop control module 83 generates a PWM waveform for outputting control of the first switch device Q1 and the second switch Q2 .

[0149] The technicians in the relevant field can clearly understand that for the convenience and simplicity of description, only the division of the above-mentioned functional units and modules is used as an example for illustration. In practical applications, the above-mentioned function allocation can be completed by different functional units and modules as needed, that is, the internal structure of the device can be divided into different functional units or modules to complete all or part of the functions described above. The functional units and modules in the embodiment can be integrated in a processing unit, or each unit can exist physically separately, or two or more units can be integrated in one unit. The above-mentioned integrated unit can be implemented in the form of hardware or in the form of software functional units. In addition, the specific names of the functional units and modules are only for the convenience of distinguishing each other, and are not used to limit the scope of protection of this application. The specific working process of the units and modules in the above-mentioned system can refer to the corresponding process in the aforementioned method embodiment, which will not be repeated here.

[0150] In the above embodiments, the description of each embodiment has its own emphasis. For parts that are not described or recorded in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0151] Those of ordinary skill in the art will appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of this application.

[0152] In the embodiments provided in the present application, it should be understood that the disclosed devices / terminal equipment and methods can be implemented in other ways. For example, the device / terminal equipment embodiments described above are only schematic. For example, the division of the modules or units is only a logical function division. There may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.

[0153] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0154] In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit. The above-mentioned integrated unit may be implemented in the form of hardware or in the form of software functional units.

[0155] If the integrated module / unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the present application implements all or part of the processes in the above-mentioned embodiment method, and can also be completed by instructing the relevant hardware through a computer program. The computer program can be stored in a computer-readable storage medium, and the computer program can implement the steps of the above-mentioned various method embodiments when executed by the processor. Among them, the computer program includes computer program code, and the computer program code can be in source code form, object code form, executable file or some intermediate form. The computer-readable medium may include: any entity or device capable of carrying the computer program code, recording medium, U disk, mobile hard disk, disk, optical disk, computer memory, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), electric carrier signal, telecommunication signal and software distribution medium. It should be noted that the content contained in the computer-readable medium can be appropriately increased or decreased according to the requirements of legislation and patent practice in the jurisdiction. For example, in some jurisdictions, according to legislation and patent practice, computer-readable media do not include electric carrier signals and telecommunication signals.

[0156] The technicians in the relevant field can clearly understand that for the convenience and simplicity of description, only the division of the above-mentioned functional units and modules is used as an example for illustration. In practical applications, the above-mentioned function allocation can be completed by different functional units and modules as needed, that is, the internal structure of the device can be divided into different functional units or modules to complete all or part of the functions described above. The functional units and modules in the embodiment can be integrated in a processing unit, or each unit can exist physically separately, or two or more units can be integrated in one unit. The above-mentioned integrated unit can be implemented in the form of hardware or in the form of software functional units. In addition, the specific names of the functional units and modules are only for the convenience of distinguishing each other, and are not used to limit the scope of protection of this application. The specific working process of the units and modules in the above-mentioned system can refer to the corresponding process in the aforementioned method embodiment, which will not be repeated here.

[0157] The embodiments described above are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the aforementioned embodiments, a person skilled in the art should understand that the technical solutions described in the aforementioned embodiments may still be modified, or some of the technical features may be replaced by equivalents. Such modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present application, and should all be included in the protection scope of the present application.

Claims

1. A method for controlling a balancing bridge, characterized in that: The balancing bridge comprises: a first capacitor, a second capacitor, a first switch device, a second switch device and an inductor; The first end of the first capacitor is respectively connected to the first end of the external bus and the first end of the first switch device; The second end of the first capacitor is connected to the first end of the second capacitor and the first end of the inductor respectively; The second end of the inductor is connected to the second end of the first switch device and the first end of the second switch device respectively; The second end of the second capacitor is respectively connected to the second end of the external bus and the second end of the second switch device; The first end of the first switch device is connected to the first end of the inverter; The second end of the second switch device is connected to the second end of the inverter; A voltage-current dual closed-loop control module is used to control the balancing bridge; The voltage and current dual closed-loop control module inputs the voltage of the first switch device and the voltage of the second switch device at its input end, and outputs the PWM wave of the first switch device at its output end; determining a PWM wave of a second switching device according to a PWM wave of the first switching device; controlling the first switching device using a PWM wave of the first switching device; controlling the second switching device using a PWM wave of the second switching device; When the interruption period arrives, determining whether a voltage difference between a first voltage of the first capacitor and a second voltage of the second capacitor is greater than zero; If the voltage difference is greater than zero, determining whether the PWM voltage of the first switching device at the time when the interruption period arrives is less than or equal to zero; If the PWM voltage is greater than zero, the second switching device is controlled to be turned off, and the PWM voltage is applied to the first switching device to control the first switching device.

2. The control method of the balancing bridge according to claim 1, characterized in that: The voltage and current dual closed-loop control module at least includes a PI integral node: If the PWM voltage is less than or equal to zero, setting the parameter in the PI integral node to a positive number, and controlling the first switch device and the second switch device to be disconnected; This is to clear the negative integral parameter in the PI loop integral and speed up the regulation to reduce the voltage difference.

3. The control method of the balancing bridge according to claim 1, characterized in that: If the voltage difference is less than zero, determining whether the PWM voltage at the time when the interruption period arrives is greater than or equal to zero; If the PWM voltage is less than zero, the first switch is controlled to be turned off, and the PWM voltage is applied to the second switch to control the second switch.

4. The control method of the balancing bridge according to claim 2, characterized in that: If the PWM voltage is greater than or equal to zero, setting a parameter in the PI integral node to a negative number, and controlling the first switch device and the second switch device to be disconnected; This is to clean up the positive integral parameter in the PI loop integral and speed up the regulation to reduce the voltage difference.

5. The control method of the balancing bridge according to claim 2, characterized in that: In the voltage-current dual closed-loop control module, a first voltage of the first capacitor and a second voltage of the second capacitor are collected; calculating a voltage difference between a first voltage of the first capacitor and a second voltage of the second capacitor; Inputting the voltage difference into the PI integral node, performing an integral operation, and obtaining a first integral result; Inputting the first integral result into a second integral node to perform an integral operation to obtain a second integral result; Using the second integration result as a reference current, calculating a current difference between the reference current and a feedback current flowing through the inductor; Inputting the current difference into a third integral node to perform an integral operation to obtain a third integral result; Inputting the third integral result into a fourth integral node to perform an integral operation to obtain a fourth integral result; Adding the fourth integration result to the first voltage value to obtain a voltage sum result; Inputting the voltage sum result into a division node to obtain a quotient result of the voltage sum and the bus voltage; The quotient result is input into the fifth integral node to obtain a PWM waveform for controlling the first switch.

6. The control method of the balancing bridge according to claim 1, characterized in that: In the PWM wave of the first switch device Q1, the high level time occupies 30% of the entire PWM cycle, and the low level time of the PWM wave occupies 70% of the entire PWM cycle.

7. A control device for a balancing bridge, characterized in that: The balancing bridge comprises: a first capacitor, a second capacitor, a first switch device, a second switch device and an inductor; The first end of the first capacitor is respectively connected to the first end of the external bus and the first end of the first switch device; The second end of the first capacitor is connected to the first end of the second capacitor and the first end of the inductor respectively; The second end of the inductor is connected to the second end of the first switch device and the first end of the second switch device respectively; The second end of the second capacitor is respectively connected to the second end of the external bus and the second end of the second switch device; The first end of the first switch device is connected to the first end of the inverter; The second end of the second switch device is connected to the second end of the inverter; A voltage-current dual closed-loop control module is used to control the balancing bridge; The voltage and current dual closed-loop control module inputs the voltage of the first switch device and the voltage of the second switch device at its input end, and outputs the PWM wave of the first switch device at its output end; determining a PWM wave of a second switching device according to a PWM wave of the first switching device; controlling the first switching device using a PWM wave of the first switching device; controlling the second switching device using a PWM wave of the second switching device; The device comprises: a judgment module, used to judge whether the voltage difference between the first voltage of the first capacitor and the second voltage of the second capacitor is greater than zero when the interruption period arrives; If the voltage difference is greater than zero, determining whether the PWM voltage of the first switching device at the time when the interruption period arrives is less than or equal to zero; The control module is configured to control the second switch device to be disconnected if the PWM voltage is greater than zero, and to apply the PWM voltage to the first switch device to control the first switch device.

8. A storage medium storing a computer program, characterized in that: When the computer program is executed by a processor, the steps of any of the above-mentioned methods for controlling a balancing bridge are implemented.

9. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that: When the processor executes the computer program, the steps of the method for controlling a balancing bridge according to any one of claims 1 to 6 are implemented.

10. A control system for a balancing bridge, characterized in that: The electronic device as claimed in claim 9 further comprises the voltage-current dual closed-loop control module; the voltage-current dual closed-loop control module is connected to the electronic device.

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