Circuit board having edge with conductive region

By plating conductive materials on the edges of the circuit board and removing some materials to form conductive areas, the problem of signal loss in traditional electrical connection complex and high-frequency signal transmission is solved, and the effect of simplifying connections and reducing signal interference is achieved.

CN119497296APending Publication Date: 2025-02-21TERADYNE INC
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Patent Information

Application Number
CN202410962485.6
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2023-08-14
Filing Date
2024-07-18
Publication Date
2025-02-21

AI Technical Summary

Technical Problem

Existing circuit boards need to rely on traditional conductive pads when electrically connected, resulting in complex connections and prone to signal loss, signal attenuation and signal interference during high-frequency signal transmission.

Method used

Electrical connection of the edges is achieved by plating conductive material on the edges of the circuit board and removing part of the conductive material using a tool such as a CNC milling machine or laser, a substantially flat and electrically insulated conductive area is formed.

Benefits of technology

This method reduces dependence on cable assemblies, shortens the length and complexity of electrical connections, and effectively reduces signal loss and interference in high-frequency signal transmission.

✦ Generated by Eureka AI based on patent content.

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Abstract

An example apparatus includes a circuit board. The circuit board comprises one or more layers, and the one or more layers form a first conductive area and a non-conductive area; an edge angled with respect to the one or more layers; and a second conductive region on the edge and electrically connected to one or more of the first conductive regions. The second conductive regions are substantially flat and each have a connection surface substantially parallel to the surface of the edge.
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Description

Technical Field

[0001] This specification describes example implementations of circuit boards having one or more edges including conductive regions. Background Art

[0002] A typical exemplary circuit board includes a plurality of conductive layers separated by dielectric layers. The conductive layers form circuits and / or traces within the circuit board. Electrical connections to the circuit board are traditionally achieved through conductive pads on the primary or secondary sides of the circuit board, which are also referred to as the top side, bottom side, component side, and / or solder side of the circuit board. The primary and secondary sides generally represent the largest parallel sides of the circuit board, with other layers parallel between them. Summary of the invention

[0003] An exemplary device includes a circuit board. The circuit board includes one or more layers, the one or more layers forming a first conductive region and a non-conductive region; an edge, the edge being angled relative to the one or more layers; and a second conductive region, the second conductive region being located on the edge and electrically connected to one or more of the first conductive regions. The second conductive regions are substantially flat and each have a connection surface that is substantially parallel to the surface of the edge. The device may include one or more of the following features (alone or in combination).

[0004] The edge may be at a right angle to one or more layers or at an oblique angle to one or more layers.The second conductive region may be or include a remaining portion of the original larger conductive region.

[0005] The device may include a filler or coating including a protective substance in the second conductive region.The circuit board may be a test instrument, or a part of a test instrument, or a subassembly of a test instrument.

[0006] The device may be electrically connected to the second conductive region. The device may be an interposer, include an interposer, or be a part of an interposer. The interposer may be used to translate the spacing of a signal path between the second conductive region and another device connected to the interposer.

[0007] The circuit board may be a first circuit board, and the device may be or include a second circuit board. The device may include a connector assembly. The connector assembly may be configured to electrically connect to a mating connector assembly.

[0008] An exemplary method includes manufacturing a circuit board having an edge plated with a conductive material. The method includes mounting the circuit board so that a tool can access the edge; and controlling the tool to execute a path to remove some of the conductive material on the edge, thereby forming a conductive region on the edge. The conductive regions may be electrically insulated from each other on the edge. The conductive regions may be substantially flat and each may have a connection surface in substantially the same plane. The method may include one or more of the following features (alone or in combination).

[0009] The tool may be or include a computer numerically controlled (CNC) milling machine that rotates the structure to gradually remove at least some of the conductive material on the edge. The CNC milling machine may be configured to remove additional conductive plating on the edge to form at least one mechanical alignment registration feature. The tool may be or include a laser that applies a laser beam to at least some of the conductive material on the edge. The laser beam ablates at least some of the conductive material.

[0010] The circuit board can be a test instrument, include a test instrument, or be a part of a test instrument. The test instrument can be used to send a test signal to a device under test (DUT) and to analyze a response from the DUT. The method can also include coupling the circuit board to a device interface board (DIB), wherein the DIB includes contacts electrically connected to the DUT; sending the test signal from the circuit board to the DUT via a conductive area; and receiving a response from the DUT at the circuit board via the conductive area. The method can also include connecting an interposer between the circuit board and the DIB. The interposer enables mechanical compliance between the conductive area and the DIB. The circuit board can be coupled to the DIB at an oblique angle or a right angle.

[0011] An exemplary method includes manufacturing a circuit board having an edge plated with a conductive material. The method includes mounting the circuit board so that chemical etching can be performed on the edge; and chemically etching the edge to remove some of the conductive material on the edge to form a conductive region on the edge. The conductive regions may be electrically insulated from each other on the edge. The conductive regions may be substantially flat and each may have a connection surface in substantially the same plane.

[0012] An exemplary system includes a first circuit board and a second circuit board, wherein the first circuit board has a first conductive area. The second circuit board includes one or more layers and an edge, the one or more layers forming a second conductive area and a non-conductive area, the edge being angled relative to the one or more layers. The second circuit board also includes a third conductive area on the edge. The third conductive areas are substantially flat and each have a connection surface substantially parallel to the surface of the edge. The third conductive area is electrically connected to the first conductive area and the second conductive area. The first circuit board and the second circuit board are physically coupled to each other. The second circuit board may be at an oblique angle or a right angle relative to the first circuit board. The exemplary system may include one or more of the following features (alone or in combination).

[0013] The second circuit board may be at an angle between 45° and 90°, inclusive, relative to the first circuit board. The system may include an interposer between the first circuit board and the second circuit board. The interposer may physically couple the first circuit board and the second board.

[0014] The first circuit board may be, include, or be a portion of a DIB. The DIB may include a slot for holding the DUT. The system may also include a test instrument including the second circuit board. The test instrument may be configured to perform the following operations: send a test signal to the DUT via the third conductive region; receive a response from the DUT via the third conductive region; and analyze the response to determine whether the DUT passed or failed the test.

[0015] Any two or more of the features described in this specification (including this summary) may be combined to form implementations not specifically described in this specification.

[0016] At least a portion of the test systems and processes described in this specification may be configured or controlled by executing instructions stored on one or more non-transitory machine-readable storage media on one or more processing devices. Examples of non-transitory machine-readable storage media include read-only memory, optical disk drives, memory disk drives, and random access memory. At least a portion of the test systems and processes described in this specification may be configured or controlled using a computing system consisting of one or more processing devices and a memory storing instructions that may be executed by the one or more processing devices to perform various control operations. The devices, test systems, and methods described in this specification may be configured, for example, by design, construction, conception, arrangement, placement, programming, operation, activation, deactivation, and / or control.

[0017] The details of one or more implementations are set forth in the accompanying drawings and the detailed description that follows. Other features and advantages will be apparent from the description and drawings, and from the claims. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 is a diagram of an exemplary circuit board having conductive areas on its edge connected to an interposer connected to another circuit board having conductive areas on its major or minor side.

[0019] Figure 2 yes Figure 1 A partially transparent perspective view of a circuit board.

[0020] Figure 3A , Figure 3B and Figure 3C is an exemplary configuration of conductive areas on the edge of a circuit board.

[0021] Figure 4A and Figure 4B Here is a close up view of the conductive areas connected to the outer layers of the board.

[0022] Figure 5A and Figure 5B A close-up view of the conductive areas connected to the inner layers of the circuit board.

[0023] Fig. 6A and Figure 6B A close-up view of the conductive areas connected to multiple inner layers of the board.

[0024] Figure 7 is a partially transparent perspective view of a circuit board with integrated alignment features.

[0025] Fig. 8A and Figure 8B is a close-up view of the conductive area surrounded by the protective coating.

[0026] Fig. 9 is a diagram of an exemplary circuit board having a conductive region on an edge thereof connected at an oblique angle to an interposer connected to another circuit board having a conductive region on a major or minor side thereof.

[0027] Fig.10 is a partially transparent perspective view of two circuit boards connected together by an interposer via conductive areas on their edges.

[0028] Fig.11 is a partially transparent perspective view of a circuit board connected to a cable assembly using conductive areas on its edges.

[0029] Fig.12 is a partially transparent perspective view of a circuit board connected to multiple devices on various edges.

[0030] Fig.13 is a perspective view of an exemplary test system instrument design based on a circuit board having conductive areas on its edges.

[0031] Fig.14 It shows the detailed structure of the circuit board. Fig.13 Partially transparent type.

[0032] Fig.15 is a flow chart illustrating an exemplary method for manufacturing a circuit board having conductive areas at its edges and for using the circuit board in a test system.

[0033] Fig.16 is a perspective view showing a progression of manufacturing steps performed on an edge of a circuit board having conductive areas at its edge.

[0034] Fig.17A and Fig. 17B is a side perspective view of an exemplary circuit board before and after forming conductive areas on its edges.

[0035] Fig.18 is a block diagram illustrating components of an exemplary test system in which the circuit boards described herein may be used.

[0036] Like reference numbers in different drawings indicate similar elements. DETAILED DESCRIPTION

[0037] Described herein are examples of circuit boards having more than one conductive area across one or more circuit board edges. In some implementations, the edge of the circuit board includes any flat surface or curved surface that intersects one or more parallel layers included in the circuit board. The edge may be at a right angle (90°) or an oblique angle (0° to 90°, inclusive) relative to one or more parallel layers. The conductive area is configured and arranged to provide a connection surface parallel to one or more of the edge surfaces.

[0038] The conductive area enables the circuit board to be electrically connected to another structure, such as another circuit board, through the edge of the circuit board.For example, the circuit board can be part of a group of circuit boards that are vertically electrically connected to a back plate.

[0039] Electrical connections made via conductive areas on the edge of a circuit board can have various advantages. For example, such connections can reduce the need for cable assemblies, which can be cumbersome to implement in a small space. In addition, conductive areas on the edge of a circuit board can reduce the length and / or complexity of the electrical connection between two circuit boards. This can be particularly useful for signals with high frequency transmission components, such as in the gigahertz range, because such signals can be susceptible to signal loss, signal attenuation, and / or signal interference during transmission.

[0040] Figure 1 1 is a cross-sectional view of an exemplary circuit board 100 having conductive areas formed on its edge 101. The circuit board 100 is connected to another circuit board 130 via these conductive areas and an interposer 120. In this example, the edge 101 of the circuit board 100 is perpendicular to one or more parallel layers 106 / 107 of the circuit board 100, thereby forming a right angle (90°) connection between the two circuit boards 100 and 130. However, if the edge is formed at a different angle (as described below), connections at other angles can be achieved.

[0041] Figure 1 Also shown is an exemplary internal construction of circuit board 100, including parallel conductive layers 106 that may form a conductive path for power signal transmission to and from the conductive areas on edge 101. Conductive layers 106 are arranged between non-conductive layers 107, which may be a dielectric such as FR-4. Six conductive layers are shown, but any number of layers may be used.

[0042] Figure 2 Shows Figure 1 FIG. 1 is a partially transparent perspective view of components of an exemplary circuit board 100 in FIG. 1. In this view, edge 101 is configured with multiple conductive areas 102. As previously described, conductive areas 102 have connection surfaces arranged along one or more edge surfaces. The size, shape and / or location of conductive areas 102 on the edge can be any suitable. In this exemplary view, conductive areas 102 are circular.

[0043] like Figure 1 and Figure 2 As shown, the interposer 120 can be incorporated between the circuit board 100 and the circuit board 130. In some embodiments, the interposer is used to support a robust electrical connection while compensating for tolerance errors in various manufacturing steps and assembly steps. The interposer can be combined with a feature structure that utilizes an alignment pin (described below). In some embodiments, the interposer compliance can be achieved by a reversible mechanism such as a spring or a vacuum pump. In some embodiments, the attachment can be fixed such as with solder. In any embodiment, the interposer is not necessary; the connection can be a direct connection.

[0044] Figure 1Also shown are circuit components 140 that may physically reside on the surface of circuit board 100 and be electrically connected to circuits and traces within circuit board 106 formed by one or more of the parallel conductive layers. Circuit system 140 may include active components such as a power supply or microprocessor and / or passive components such as resistors or capacitors. Circuit system 140 may be configured to condition and / or process signals sent between circuit board 100 and circuit board 130. The selection and configuration of circuit system may encompass any aspect of typical circuit board design techniques.

[0045] Figure 3A , Figure 3B and Figure 3C Additional examples of possible configurations for conductive region 102 are shown. Figure 3A A square conductive area is shown, which may be easier to manufacture. Figure 3B Hexagonal conductive regions are shown, which may form higher density connections. Figure 3C Additional possible region shapes are shown, including concentric regions 302 that may be used for shielded coaxial signals. When configuring the conductive regions, examples of parameters to consider in determining their size, shape, and / or location may relate to contact size, impedance matching, shielding, current rating (amperage), isolation voltage, plating thickness, product assembly tolerances, and / or manufacturing tolerances.

[0046] Figure 4A , Figure 4B , Figure 5A and Figure 5B Two exemplary ways in which a circuit board may interconnect conductive regions with parallel conducting layers 106 are shown.

[0047] Figure 4A and Figure 4B 400 (which may be a conductive trace 404 formed by circuit board processing techniques) is connected to the circuit board 400 (which may be a conductive trace 404 formed by circuit board processing techniques) through an intermediate conductive region 403 (which is also located on the edge 401 of the circuit board 400). Figure 1 Conductive regions 402 and 403 may be formed in a single step.

[0048] Figure 5A and Figure 5B 504 is shown forming a connection to the inner conductive layer of the circuit board 100, which is surrounded on both sides by non-conductive material 507a and 507b. In particular, the exemplary conductive trace 504 can be designed so that it is directly connected to the circuit board 500 (which can be Figure 1The conductive area 502 on the edge 501 of the circuit board 100 of the embodiment of the present invention is shown in FIG. Additional conductive areas 506a and 506b may also be present on the same internal conductive layer, which may or may not be connected to the additional conductive areas on the edge 101.

[0049] Fig. 6A and Figure 6B An exemplary implementation is shown, in which a circuit board 600 (which may be Figure 1 1 ) is connected to more than one conductive layer. Such a configuration may be desirable for a variety of reasons and may have electrical related benefits such as load sharing of large currents and / or mechanical related benefits such as increased tolerance to peeling damage. This example shows five separate layer connections made to the conductive region 602 on edge 601. Of the five connections, one longer connection 604 may provide a connection to other circuitry on the circuit board, while four "stub" connections 608a, 608b, 608c, and 608d provide mechanical structure. Many other configurations may also be used.

[0050] Figure 7 A circuit board 700 (which may be Figure 1 ), interposer 120, and circuit board 730 (which may be Figure 1 708) may incorporate one or more alignment features, such as blind vias 708, to help position the conductive regions in an assembled configuration. In this example, alignment pins 710a and 710b control the relative position of the components in two dimensions. Of particular note, circuit board 700 may be designed so that the alignment features and the conductive regions may be manufactured in a common manufacturing step, thereby reducing or minimizing the amount of tolerance error accumulation. The configuration of the alignment features may be symmetrical or asymmetrical, depending on the assembly requirements.

[0051] Fig. 8A and Figure 8B A filler or coating 809, such as a polymer or plastic, is shown that may be introduced onto the edge 101 of the circuit board between the conductive areas 102. Such a filler or coating may be included to protect any exposed non-conductive layer 107 and / or the perimeter of the conductive areas 102. The filler or coating 809 may prevent contaminants such as dust or other debris. The filler or coating 809 may also improve the durability of the conductive areas by preventing mechanical stresses such as peeling.

[0052] As previously described, edge 101 may be configured relative to Figure 1 The parallel constituent layers 106 and 107 are at different angles. Figure 1 and Figure 2As shown, the edge 101 may be at right angles to the parallel constituent layers. Fig. 9 A diagram of an exemplary circuit board 900 connected to the circuit board 130 at an oblique angle 950 is shown. In some implementations, the circuit board edge 901 will be at an angle between 45° and 135° (inclusive) relative to the parallel component layers 906, 907; however, any angle between 0° and 180° (exclusive) can be used. Parameters that may affect the angle include, but are not limited to, the size of the two circuit boards, the number of circuit boards connected, the location of the connection, etc.

[0053] Fig.10 , Fig.11 and Fig.12 Different configurations of devices that can be electrically and / or mechanically connected to conductive areas on one or more edges of a circuit board are shown. These devices can be or include another circuit board, a cable assembly, a circuit component, or any other suitable device. Fig.10 Two circuit boards 100 and 1030 are shown, which are connected by an interposer 120 via conductive areas on their edges. Fig.11 A wired connector assembly 1130 is shown connected directly to a conductive area on the edge of the circuit board 100 . Fig.12 Circuit board 1200 is shown connected to DIB circuit board 1230 via interposer 1220. Fig.12 Also shown is the circuit board 1200 connected to the cabled connector assemblies 1240 and 1241. Finally, Fig.12 Circuit components 1260 are shown soldered directly to conductive areas on an edge of circuit board 1200. In general, a circuit board may include conductive areas on more than one edge, such as on two edges, on three edges, on four or more edges, depending on the shape of the circuit board. The edges so used need not be arranged in any particular relative shape.

[0054] Fig.13 and Fig.14 is a perspective view of the test instrument 1300 . Fig.13 The major components are shown, including a mechanical structure 1310, an interposer 1320, a circuit board 1330, one or more processing devices such as 1335, and a cable assembly 1340. Detail 1305 of the interposer 1320 shows conductive interposer contacts 1350 and alignment pins 1360. In this instrument design, the interposer 1320 routes signals from conductive areas on the edge of the circuit board 1330 so that those signals reach the intended conductive areas on the DIB (not shown).

[0055] Fig.14A partially transparent view of the test instrument 1300 is shown, focusing on a circuit board 1330 with conductive pads formed on edges 1331 and 1332. Detail 1405 of circuit board edge 1331 shows conductive areas 1450 and alignment blind vias 1460. As previously described, conductive areas 1450 can have any configuration; this example shows only one possible configuration.

[0056] Fig.15 The operations included in an exemplary method 1500 for manufacturing a conductive region are shown starting with a circuit board having the necessary continuous plating edges, such as Fig.17A A circuit board 1700 with a plated edge 1701 is shown. The edge 1701 is plated with a conductive material such as copper, gold, silver, platinum, or even a combination of multiple conductive materials. As shown, the plating is on all or part of the edge 1701 and produces a flat surface along it.

[0057] According to exemplary method 1500, circuit board 1700 is mounted 1502 to enable removal of material on edge 1701. That is, the circuit board is mounted and held in position to allow manufacturing equipment to access the plated edge.

[0058] The manufacturing equipment is configured to remove some of the conductive material on the edge. In one example, method 1500 includes forming 1504 a conductive region on edge 1701 of circuit board 1700. In some implementations, this may be accomplished by chemical etching 1506 or mechanical processing 1508 including laser ablation. Other techniques not described herein may also be used to form the conductive region. The remaining conductive material, i.e., the remaining portion, forms a set of edge-based conductive regions (e.g., Figure 2 120, or Figure 3A , Figure 3B , Figure 3C and elsewhere herein). The conductive areas on a particular edge are initially formed by continuous electroplating so that the resulting set of separate conductive areas are all substantially located within the same surface and parallel to the surface of the edge. This may be useful in situations where tight mechanical tolerances are implemented, such as DIB applications that require a final flatness tolerance of + / - 1 mil. A mil is a measurement equal to one thousandth of an inch or 0.001 inch. One mil is also equal to 0.0254 millimeters (mm). Some exemplary systems have a pad-to-pad coplanar tolerance of + / - 2 mils or a tolerance of less than 1 mil for a single pad. Coplanar tolerance refers to the maximum deviation from ideal flatness.

[0059] In some implementations, chemical etching 1506 includes applying 1506a one or more chemicals that dissolve conductive material in areas of edge 1701 that do not contain conductive areas. For example, a masking material may be applied to the edge, wherein the omitted portions in the mask correspond to portions of the conductive material that will be removed from the edge. The chemical dissolves 1506b some of the unmasked conductive material in the edge without substantially affecting (e.g., causing it to dissolve) the template or protected materials beneath it. The chemical may be applied under appropriate conditions, such as a specific temperature range, humidity, application time, etc., to facilitate the removal of the conductive material. After chemical etching, cleaning 1506c may be required to remove debris, residual chemicals, and / or masking material from the edge 1701 of the circuit board. The chemical etching process may be fully automated or partially automated.

[0060] In some implementations, mechanical processing 1508 may include programming 1508a a tool or a control system that controls the tool to operate on the edge of the circuit board. The programming may include, for example, specifying the size and shape of the circuit board edge, the size and location of the desired conductive area, and / or the path the tool should follow.

[0061] Examples of machining tools that may be used include, but are not limited to, a computer numerical control (CNC) milling machine that rotates the structure to gradually remove some of the conductive material on the edge and / or a laser that applies a laser beam to some of the conductive material on the edge. The laser beam ablates some of the conductive material to remove the material. The tool may be controlled, for example, by programming alone or in combination with user input, to perform a plurality of operations on a circuit board (e.g., Fig.17A The operation 1508b is performed on a target edge of a circuit board 1700 of the embodiment of the present invention. Therefore, the tool is controlled to remove some of the conductive materials on the edge along the path to form a conductive area on the edge. The conductive areas should be electrically isolated from each other on the edge so that the tool can leave non-conductive material between each conductive area.

[0062] Mechanical processing 1508 may include forming Fig. 17B Those conductive areas shown are then cleaned 1508c the edges of the circuit board. For example, excess material may be removed by vacuum.

[0063] In some implementations, chemical etching or mechanical processing may include removing some excess material on the circuit board (i.e., material beyond the undesired areas necessary to form the conductive pads) to form an integral alignment feature. The alignment feature may be used to position the edge of the circuit board with other features or components in a mechanical assembly. Figure 7 An example of alignment registration features 108 formed on an edge of a circuit board is shown.

[0064] Fig.16 A high level overview of the manufacturing stages is shown. A circuit board 1600 is initially manufactured with a continuous flat conductive area 1601. The manufacturing process progressively removes unwanted material 1602. Finally, in this example, only the desired configuration of conductive areas 1603 remains.

[0065] In such Fig. 17B The circuit board shown is a test instrument or includes a specific implementation of a test instrument. The test instrument can be directly or indirectly connected to a DIB in a test system such as described herein and used in the test system to test one or more DUTs connected to the DIB.

[0066] Return to reference Fig.15 After forming 1504 the conductive regions, some of the conductive regions should be electrically insulated from each other on the edge of the circuit board. At this point, some of the spaces between the newly formed conductive regions may be filled by adding dielectric 1510, such as those described above in the description of FIG. 8 . The dielectric may serve as a protective layer and electrically insulating isolation layer between the conductive regions on the edge. A computer controlled deposition tool may be programmed and / or controlled to add dielectric in / between the conductive regions.

[0067] Method 1550 illustrates operations for using a test instrument (e.g., a circuit board having a conductive edge region) in a test system. In this regard, it should be noted that Fig.15 The manufacturing method 1510 and the testing method 1550 generally do not occur almost simultaneously, so there is a dashed arrow between them. For example, the manufacturing method may be performed days, months, or years before the testing.

[0068] Method 1550 includes installing the test instrument in the test system. This installation may include connecting 1552 the test instrument to a DIB or other circuit board in a test head or elsewhere in the test system. The connection is made using conductive areas on the edges of the test instrument, so the resulting connection is as follows: Figure 1 and Fig. 9 The connection between the test instrument and the DIB can be an indirect connection (such as Figure 1 In some embodiments, the connection between the test system and the DIB may be a direct connection, with an interposer between the two. In some embodiments, the indirect connection may include one or more structural elements and / or electrical elements in addition to the interposer. For example, there may be a mechanical support assembly.

[0069] After installation, testing can be performed. Testing includes transmitting 1554 a signal from the test instrument to the DUT via a conductive area on the edge of the test instrument (e.g., through the DIB and, if possible, through an interposer). The signal can be a high-speed signal, e.g., with a frequency in the gigahertz range, but any type of signal can be sent, including low-frequency signals. For example, the signal can be a digital signal, an analog signal, or a radio frequency (RF) signal.

[0070] The test also includes receiving 1556 a response from the DUT to the test instrument via a conductive area on the edge of the test instrument (e.g., through the DIB and, if possible, through an interposer). The test instrument may analyze the response to determine whether the DUT passed or failed the test, or send a signal such as the following: Fig.18 A control system such as the one described above is provided for analysis.

[0071] Fig.18 1 is a diagram showing components of an exemplary automatic test equipment (ATE) 1800, which is a type of test system. In some implementations, ATE 1800 may include a test head 1801 and a control system 1802. Test head 1801 may include a DIB 1810 to support one or more DUTs 1820 connected through one or more interface sites 1830. DIB 1810 may include, among other things, connectors, conductive traces, conductive layers, and circuitry for routing signals between test instruments in test head 1801, DUTs connected to DIB sites, and other circuitry in ATE.

[0072] Test head 1801 includes one or more test instruments such as instrument 1840, each of which can be configured to perform testing and / or other functions as appropriate. Some of these test instruments can incorporate conductive areas on one or more edges, the construction of which has been shown and described above.

[0073] Although only five test instruments are shown, ATE 1800 may include any suitable number of test instruments, including one or more test instruments that reside external to test head 1801 .

[0074] The control system 1802 is configured (e.g., programmed) to communicate with a test instrument such as 1840 to direct and / or control testing of the DUT. In some implementations, the communication can be achieved through a computer network or via a direct connection such as a copper medium or an optical medium. The control system can be or include a computing system consisting of one or more processing devices and a memory for storing test programs and / or test patterns that can be executed on the control system to control the test instrument or transmitted to the test instrument to perform the test. The control system alone or in combination with the test instrument can determine whether the DUT has passed or failed the test.

[0075] Testing performed as described herein may be implemented using hardware or a combination of hardware and software. For example, a test system similar to that described herein may include various controllers and / or processing devices located at various points within and / or outside the test head 1801 and the control system 1802. A central computer may coordinate operations in the various controllers or processing devices. Testing may be controlled at least in part by using one or more computer program products, such as one or more computer programs tangibly embodied in one or more information carriers (such as one or more non-transitory machine-readable media) to be executed by one or more data processing devices or to control the operation of one or more data processing devices, such as programmable processors, computers, multiple computers, and / or programmable logic components.

[0076] Although this specification describes exemplary implementations related to "testing" and "testing systems," the apparatus and methods described herein may be used in any suitable system and are not limited to testing systems, or to the exemplary testing systems described herein.

[0077] Any "electrical connection" as used herein may imply a direct physical connection, or a connection that includes intermediate components but still allows electrical signals (including wireless signals) to flow between the connected components. Unless otherwise specified, any "connection" involving circuit systems mentioned herein is an electrical connection, not necessarily a direct physical connection, regardless of whether the term "connection" is modified by "electrical".

[0078] In the description and claims provided herein, the adjectives "first", "second", "third", etc. do not specify priority or order unless the context indicates otherwise. These adjectives are merely used to distinguish the nouns they modify.

[0079] The elements of the different implementations described may be combined together to form other implementations not specifically described above. Elements may be omitted from a previously described system without generally adversely affecting its operation or the operation of the system. In addition, individual elements may be combined into one or more single elements to perform the functions described in this specification.

[0080] Other implementations not specifically described in this specification are also within the scope of the following claims.

Claims

1. A device, comprising: A circuit board, the circuit board comprising: one or more layers, the one or more layers forming a first conductive region and a non-conductive region; an edge that is angled relative to the one or more layers; and A second conductive region is located on the edge and is electrically connected to one or more of the first conductive regions, the second conductive regions being substantially flat and each having a connection surface substantially parallel to a surface of the edge.

2. The device according to claim 1, wherein: The edge is at a right angle to the one or more layers or at an oblique angle to the one or more layers.

3. The device according to claim 1, wherein: The second conductive region includes a remaining portion of the original larger conductive region.

4. The apparatus according to claim 1, further comprising: A filler or a coating, the filler or the coating comprising a protective substance in the second conductive region.

5. The device according to claim 1, wherein: The circuit board includes a test instrument or a subassembly of the test instrument.

6. The apparatus according to claim 1, further comprising: a device electrically connected to the second conductive region; Wherein the device includes an interposer for translating a pitch of a signal path between the second conductive region and another device connected to the interposer.

7. The device according to claim 6, wherein: The circuit board is a first circuit board and the device comprises a second circuit board.

8. The apparatus according to claim 1, further comprising: a device electrically connected to the second conductive region; Therein, the device includes a connector assembly configured to be electrically connected to a mating connector assembly.

9. A method of manufacturing a circuit board, the circuit board comprising an edge plated with a conductive material, the method comprising: mounting the circuit board to allow tool access to the edge; as well as The tool is controlled to execute a path to remove some of the conductive material on the edge to form conductive areas on the edge, the conductive areas are electrically insulated from each other on the edge, and the conductive areas are substantially flat and each has a connection surface in substantially the same plane.

10. The method according to claim 9, wherein: The tool includes a computer numerically controlled (CNC) mill that rotates the structure to incrementally remove at least some of the conductive material on the edge.

11. The method according to claim 10, wherein: The CNC milling machine is configured to remove additional conductive plating on the edge to form at least one mechanical alignment feature.

12. The method according to claim 9, wherein: The tool includes a laser that applies a laser beam to at least some of the conductive materials on the edge, the laser beam ablating at least some of the conductive materials.

13. The method according to claim 9, wherein: The circuit board is part of a test instrument for sending test signals to a device under test (DUT) and for analyzing responses from the DUT; and The method comprises: coupling the circuit board to a device interface board (DIB), the DIB including contacts electrically connected to the DUT; transmitting the test signal from the circuit board to the DUT via the conductive area; and The response from the DUT is received at the circuit board via the conductive area.

14. The method according to claim 13, further comprising: An interposer is connected between the circuit board and the DIB, the interposer enabling mechanical compliance between the conductive regions and the DIB.

15. The method according to claim 13, wherein: The circuit board is coupled to the DIB at an oblique angle or a right angle.

16. A method of manufacturing a circuit board, the circuit board comprising an edge plated with a conductive material, the method comprising: mounting the circuit board to enable chemical etching to be performed on the edge; as well as Chemical etching is performed on the edge to remove some of the conductive material on the edge, thereby forming conductive regions on the edge, the conductive regions are electrically insulated and isolated from each other on the edge, and the conductive regions are substantially flat and each has a connection surface in substantially the same plane.

17. A system, comprising: a first circuit board, the first circuit board comprising a first conductive area; as well as A second circuit board, the second circuit board comprising: one or more layers, the one or more layers forming a second conductive region and a non-conductive region, the second circuit board comprising an edge, the edge being angled relative to the one or more layers; third conductive regions, located on the edge and being substantially flat and each having a connection surface substantially parallel to the edge surface, the third conductive regions being electrically connected to the first conductive region and to the second conductive region; The first circuit board and the second circuit board are physically coupled to each other, and the second circuit board is at an oblique angle or a right angle relative to the first circuit board.

18. The system of claim 17, wherein: The second circuit board is at an angle between 45° and 90°, inclusive, relative to the first circuit board.

19. The system according to claim 17, further comprising: An interposer is located between the first circuit board and the second circuit board and physically couples the first circuit board and the second board.

20. The system of claim 17, wherein: The first circuit board includes a device interface board (DIB), the DIB including a slot for holding a device under test (DUT); The system further includes a test instrument, the test instrument includes the second circuit board and is configured to perform operations, the operations including: sending the test signal to the DUT via the third conductive region; receiving the response from the DUT via the third conductive region; and The responses are analyzed to determine whether the DUT passed or failed the test.