Preparation method of back contact solar cell and back contact solar cell

Abstract

The invention discloses a preparation method of a back contact solar cell and the back contact solar cell, and relates to the technical field of solar cell manufacturing, and the method comprises the steps: sequentially preparing an emitter containing a first doping element and an oxide layer on a first main surface in the thickness direction of a silicon substrate from inside to outside; removing and polishing the emitter and the oxide layer in the first area on the first main surface; sequentially preparing a tunneling oxide layer and a doped polycrystalline silicon layer containing a second doping element on the second main surface and the first region in the thickness direction of the silicon substrate from inside to outside, so as to form high-low junctions on the surfaces of the second main surface and the first region; wherein the doping type of the emitter is opposite to that of the doped polycrystalline silicon layer; and removing the tunneling oxide layer and the doped polycrystalline silicon layer on the second main surface. According to the embodiment, the sunlight utilization rate of one side of the shady face of a partial area is effectively improved, meanwhile, a high-low junction is formed on the second main surface of the silicon substrate, and the overall photoelectric conversion efficiency of the solar cell is improved.

Description

Technical Field

[0001] The present invention relates to the technical field of solar cell manufacturing, and in particular to a method for preparing a back-contact solar cell and a back-contact solar cell. Background Art

[0002] Existing back-contact cells usually require a P-type doped region and an N-type doped region to be cross-arranged on the backlight side of the silicon substrate, so as to utilize the two different types of doped regions as positive and negative electrodes for power generation. In conventional back-contact cells, both the P-type doped region and the N-type doped region are prepared using a structure in which a tunneling oxide layer and a doped polysilicon layer are stacked to obtain a higher passivation level and improve the photoelectric conversion efficiency. However, due to the serious parasitic absorption problem caused by the doped polysilicon layer, the existing back-contact cells can only utilize the sunlight on the light-receiving side to generate electricity, but cannot utilize the sunlight reflected on the backlight side. Therefore, there is an urgent need to provide a method for preparing a back-contact solar cell and a back-contact solar cell that can improve the double-sided light-receiving efficiency of solar cells without affecting the passivation performance. Summary of the invention

[0003] In view of this, the embodiment of the present invention provides a method for preparing a back-contact solar cell and a back-contact solar cell, which uses an emitter obtained by direct diffusion of a first doping element to replace the stacked structure of a tunneling oxide layer and a doped polysilicon layer in some regions of the prior art, thereby improving the utilization rate of sunlight on the backlight side of some regions. At the same time, while preparing the tunneling oxide layer and the doped polysilicon layer in the first region, a high-low junction can be formed between the first region and the second main surface of the silicon substrate, thereby increasing the overall photoelectric conversion efficiency of the solar cell.

[0004] In order to solve the above technical problems, the present invention provides the following technical solutions:

[0005] In a first aspect, the present invention provides a method for preparing a back-contact solar cell, comprising: step 1, preparing an emitter and an oxide layer containing a first doping element in sequence from the inside to the outside on a first main surface in a thickness direction of a silicon substrate; step 2, removing and polishing the emitter and the oxide layer in a first region on the first main surface; step 3, preparing a tunneling oxide layer and a doped polysilicon layer containing a second doping element in sequence from the inside to the outside on a second main surface in a thickness direction of the silicon substrate and the first region, so as to form a high-low junction on the second main surface and the surface of the first region; wherein the doping types of the emitter and the doped polysilicon layer are opposite; step 4, removing the tunneling oxide layer and the doped polysilicon layer on the second main surface.

[0006] Optionally, step 1 includes: step 11, preparing an emitter and an oxide layer on the first main surface and the second main surface in the thickness direction of the silicon substrate from the inside to the outside in sequence; step 12, etching the emitter and the oxide layer on the second main surface; step 13, texturing the second main surface and preparing a protective layer on the formed texturing surface.

[0007] Optionally, the step 2 includes: step 21, removing the oxide layer of the first region by using a laser process; step 22, polishing the first region and removing the protective layer after polishing.

[0008] Optionally, step 3 includes: step 31, preparing a tunneling oxide layer, a doped polysilicon layer and a silicon glass layer on the first main surface and the second main surface of the silicon substrate from the inside to the outside in sequence; step 32, modifying the silicon glass layer on the second area on the first main surface through a laser modification process, wherein the second area is the other area on the first main surface except the first area; step 33, removing the modified silicon glass layer and the doped polysilicon layer on the second area using an alkaline solution.

[0009] Optionally, after step 4, the method further includes: step 5, removing the remaining silicon glass layer and oxide layer in the second region on the first main surface and the second main surface using an acid solution; step 6, preparing a passivation anti-reflection layer on the first main surface and the second main surface, respectively, and preparing metal electrodes on the first region and the second region of the first main surface respectively.

[0010] Optionally, the thickness of the oxide layer is 50 nm to 150 nm; and / or the ratio of the area of ​​the first region to the area of ​​the second main surface is 0.3 to 0.7.

[0011] Optionally, the laser wavelength of the laser modification process is 300nm~1000nm; and / or, the laser power range of the laser modification process is 10~50W; and / or, the width of the scanning area of ​​the laser modification process is greater than the width of the second area and partially overlaps with the first area.

[0012] In a second aspect, the present invention provides a back-contact solar cell, comprising: a silicon substrate; wherein a first region and a second region are arranged on a first main surface in a thickness direction of the silicon substrate; a tunneling oxide layer and a doped polysilicon layer containing a second doping element are stacked from the inside to the outside in the first region, and an emitter containing the first doping element is arranged in the second region; wherein a high-low junction is arranged on the second main surface in the thickness direction of the silicon substrate.

[0013] The technical solution of the first aspect of the above invention has the following advantages or beneficial effects: the stacked structure of the tunneling oxide layer and the doped polysilicon layer in some regions of the prior art is replaced by the emitter obtained by direct diffusion of the first doping element, thereby improving the utilization rate of sunlight on the backlight side of some regions. At the same time, when preparing the tunneling oxide layer and the doped polysilicon layer in the first region, a high-low junction can be formed between the first region and the second main surface of the silicon substrate, thereby increasing the overall photoelectric conversion efficiency of the solar cell. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] The accompanying drawings are used to better understand the present invention and do not constitute an improper limitation of the present invention.

[0015] Figure 1 is a schematic flow chart of a method for preparing a back-contact solar cell according to an embodiment of the present invention;

[0016] Figure 2 is a schematic flow chart of a preparation method according to step S101 of an embodiment of the present invention;

[0017] Figure 3 is a schematic diagram of a cross-sectional structure of a silicon substrate prepared in step S201 according to an embodiment of the present invention;

[0018] Figure 4 is a schematic diagram of a cross-sectional structure of a silicon substrate obtained after step S203 according to an embodiment of the present invention;

[0019] Figure 5 is a schematic flow chart of the preparation method of step S102 according to an embodiment of the present invention;

[0020] Figure 6 is a schematic diagram of a cross-sectional structure of a silicon substrate prepared after step S502 according to an embodiment of the present invention;

[0021] Figure 7 is a schematic flow chart of the preparation method of step S103 according to an embodiment of the present invention;

[0022] Figure 8 is a schematic diagram of a cross-sectional structure of a silicon substrate prepared in step S701 according to an embodiment of the present invention;

[0023] Fig. 9 is a schematic diagram of a cross-sectional structure of a silicon substrate prepared in step S703 according to an embodiment of the present invention;

[0024] Fig.10 is a schematic flow chart of a preparation method after step S104 according to an embodiment of the present invention;

[0025] Fig.11is a schematic diagram of a cross-sectional structure of a silicon substrate prepared in step S1001 according to an embodiment of the present invention;

[0026] Fig.12 is a schematic diagram of a cross-sectional structure of a silicon substrate prepared in step S1002 according to an embodiment of the present invention;

[0027] Fig.13 Schematic diagram of the variation trend of the doping concentration of a silicon substrate with the surface depth according to an embodiment of the present invention.

[0028] The reference numerals are as follows:

[0029] 1-silicon substrate; 11-first region; 12-second region; 2-emitter; 3-oxide layer; 4-tunneling oxide layer; 5-doped polysilicon layer; 6-protective layer; 7-silicon glass layer; 8-passivation anti-reflection layer; 9-metal electrode. DETAILED DESCRIPTION

[0030] A solar cell is a photoelectric semiconductor wafer that uses sunlight to generate electricity directly. It is also called a "solar chip" or "photovoltaic cell". As long as it is illuminated by light that meets certain illumination conditions, it can instantly output voltage and generate current in the presence of a circuit. In physics, it is called solar photovoltaic (PV), or photovoltaic for short. In order to conveniently and clearly describe the method for preparing a solar cell and the solar cell of the present invention, the following exemplary embodiments of the present invention are described in conjunction with the accompanying drawings, which include various details of the embodiments of the present invention to facilitate understanding, and they should be considered to be merely exemplary. Therefore, those of ordinary skill in the art should recognize that various changes and modifications can be made to the embodiments described herein without departing from the scope and spirit of the present invention. Similarly, for the sake of clarity and conciseness, the description of well-known functions and structures is omitted in the following description.

[0031] For back-contact solar cells, in order to improve the passivation level as much as possible and reduce the metal recombination in the metal area, in the prior art, a stacked structure consisting of a tunneling oxide layer and a doped polysilicon layer is generally used for the preparation of the P-type doped area and the N-type doped area. For this structure, due to the serious parasitic absorption of the doped polysilicon layer, the sunlight reflected from the back side of the silicon substrate cannot be effectively utilized, so the double-sided utilization rate is very low. Moreover, the existing preparation process requires multiple laser processes and wet chemical processes to cooperate to avoid the influence between adjacent areas caused by the high-temperature doping process during the preparation of different areas, and it is difficult to metallize and co-fire the P-type doped area and the N-type doped area when preparing the metal electrode. In view of this, the embodiment of the present invention provides a method for preparing a back-contact solar cell and a solar cell, which can not only improve the double-sided utilization rate of the solar cell, but also simplify the preparation process on the basis of ensuring the photoelectric conversion efficiency of the solar cell.

[0032] In one embodiment of the present invention, Figure 1 As shown, this embodiment provides a method for preparing a back-contact solar cell, and the preparation method may include the following steps:

[0033] Step S101, preparing an emitter 2 containing a first doping element and an oxide layer 3 in sequence from the inside to the outside on a first main surface in the thickness direction of a silicon substrate 1;

[0034] Step S102, removing and polishing the emitter 2 and the oxide layer 3 in the first region 11 on the first main surface;

[0035] Step S103, sequentially preparing a tunneling oxide layer 4 and a doped polysilicon layer 5 containing a second doping element on the second main surface and the first region 11 in the thickness direction of the silicon substrate 1 from the inside to the outside, so as to form a high-low junction on the second main surface and the surface of the first region 11; wherein the emitter 2 and the doped polysilicon layer 5 have opposite doping types;

[0036] Step S104 , removing the tunneling oxide layer 4 and the doped polysilicon layer 5 on the second main surface.

[0037] The first main surface refers to the side of the silicon substrate facing away from light, and the second main surface refers to the light-receiving side of the silicon substrate. The element types of the first doping element and the second doping element are related to the type of the silicon substrate itself. Specifically, when the silicon substrate is an N-type silicon substrate, the first doping element can be boron to obtain a p+ emitter, and when the silicon substrate is a P-type silicon substrate, the first doping element can be phosphorus to obtain an n+ emitter.

[0038] It can be seen from the above process that the embodiment of the present invention first prepares the entire surface of the emitter 2 and the oxide layer 3 on the first main surface of the silicon substrate 1 through step S101 and step S102, and then removes and polishes the emitter 2 and the oxide layer 3 of the first region 11 to obtain a P-type doped region composed of the emitter 2 and the oxide layer 3, and then prepares the first region 11 through step S103, thereby quickly realizing the partitioned preparation of the P-type doped region and the N-type doped region.

[0039] It is understandable that the oxide layer 3 in step S101 is formed synchronously during the process of preparing the emitter 2 by diffusing the first doping element. Taking the first element as boron as an example, while forming the p+ emitter, a surface oxide layer BSG (i.e., oxide layer 3) is formed on the surface of the emitter 2, and no additional preparation process is required. In an optional embodiment, the thickness of the oxide layer 3 is 50nm to 150nm, such as 50nm, 80nm, 120nm, 150nm, etc.

[0040] Specifically, in an optional embodiment, step S101 may be performed as follows: Figure 2 As shown, including:

[0041] Step S201, preparing an emitter 2 and an oxide layer 3 in sequence from the inside to the outside on a first main surface and a second main surface in a thickness direction of a silicon substrate 1;

[0042] Step S202, etching the emitter 2 and the oxide layer 3 on the second main surface;

[0043] Step S203, texturing the second main surface and preparing a protective layer 6 on the formed texturing surface.

[0044] Specifically, before step S201, the first main surface and the second main surface of the silicon substrate can be alkali-textured to remove the damage to the surface of the silicon substrate caused during the cutting process. At the same time, the velvet structure formed can improve the light trapping structure of the silicon substrate surface and reduce the light reflection of the silicon substrate surface, thereby increasing the silicon substrate's absorption of sunlight and improving the overall photoelectric conversion efficiency. For example, the schematic diagram of the cross-sectional structure of the silicon substrate prepared in step S201 can be as follows: Figure 3 As shown, the emitter 2 and the oxide layer 3 are both prepared on the textured structures of the first main surface and the second main surface of the silicon substrate.

[0045] In an optional embodiment, the emitter 2 and the oxide layer 3 can be etched with a hydrofluoric acid solution, and after the etching, the second main surface can be textured again with an alkali texturing method. Specifically, the silicon substrate structure obtained after step S202 and step S203 is as follows: Figure 4 As shown, through Figure 3and Figure 4 It can be seen that after the second main surface of the silicon substrate 1 is etched and re-textured, the micro-suede surface formed has a relatively smaller pyramid base than the suede surface, which is more conducive to the preparation of the subsequent front field and has better passivation performance. In a preferred embodiment, the reflectivity of the micro-suede surface obtained in step S203 can be 10%-11%.

[0046] Through the above process, the emitter 2 and the oxide layer 3 are arranged in sequence from the inside to the outside on the first main surface, and the protective layer 6 is arranged on the second main surface. This is for the purpose of protecting the second main surface 6 during the subsequent step S102, so as to avoid affecting the surface structure of the second main surface during the selective removal and polishing of the first area 11 on the first main surface.

[0047] For step S102, in an optional embodiment, it can be as follows Figure 5 As shown, including:

[0048] Step S501, removing the oxide layer 3 of the first region 11 by laser process;

[0049] Step S502 , polishing the first region 11 , and removing the protective layer 6 after polishing.

[0050] The wavelength of the laser process is 300nm to 800nm, such as 300nm, 350nm, 500nm, 600nm, 700nm, 750nm, 800nm, etc.; the laser power range is 10W to 50W, such as 10W, 20W, 30W, 40W, 50W, etc. By removing the oxide layer 3 of the first region 11 by the laser process, the emitter 2 inside the oxide layer 3 of the first region 11 can be exposed, so that the emitter 2 can be polished by a polishing solution that can chemically react with the emitter 2 in step S502. At the same time, the protective layer 6 on the second main surface isolates the contact between the polishing solution and the second main surface of the silicon substrate during the polishing process, thereby protecting the micro-suede structure of the second main surface of the silicon substrate. Among them, the thickness of the protective layer 6 is 10nm~100nm, for example, 10nm, 30nm, 50nm, 70nm, 90nm, 100nm, etc. It can be understood that if the thickness of the protective layer 6 is too thin, the second main surface cannot be effectively protected during the subsequent exposure process, and if the thickness of the protective layer 6 is too thick, the subsequent removal process is increased, resulting in excessive waste of resources. Therefore, controlling the thickness of the protective layer 6 to 10nm~100nm can not only achieve the purpose of the embodiment of the present invention, but also save material costs.

[0051] In an optional embodiment, the ratio of the area of ​​the first region 11 to the area of ​​the second main surface is 0.3 to 0.7, for example 0.3, 0.4, 0.5, 0.6, 0.7, etc. Specifically, the laser opening area of ​​the first region 11 determines the preparation area of ​​the subsequent tunneling oxide layer 4 and the doped polysilicon layer 5 containing the second doping element. In other words, the opening area of ​​the first region 11 determines the area ratio between the P-type doping region and the N-type doping region, thereby determining the overall power generation efficiency of the back-contact solar cell.

[0052] Exemplarily, after the above steps S501 and S502, the following can be obtained: Figure 6 The schematic diagram of the cross-sectional structure of the silicon substrate is shown in FIG. Figure 6 It can be seen that after the processing of step S501 and step S502, only the emitter 2 and the oxide layer 3 of the second area 12 except the first area 11 of the first main surface are retained, and the first area 11 of the first main surface and the second main surface are both in a bare silicon substrate state.

[0053] For step S103, in an optional embodiment, the Figure 7 As shown, including:

[0054] Step S701, sequentially preparing a tunneling oxide layer 4, a doped polysilicon layer 5 and a silicon glass layer 7 on the first main surface and the second main surface of the silicon substrate 1 from the inside to the outside;

[0055] Step S702, modifying the silicon glass layer 7 on the second region 12 on the first main surface by a laser modification process, wherein the second region 12 is other regions on the first main surface except the first region 11;

[0056] Step S703 , removing the modified silicon glass layer 7 and the doped polysilicon layer 5 on the second region 12 by using an alkaline solution.

[0057] Among them, in step S701, a plasma enhanced chemical vapor deposition method or a low pressure chemical vapor deposition method can be used to prepare the tunneling oxide layer 4, the doped polysilicon layer 5 and the silicon glass layer 7. In an optional embodiment, the thickness of the tunneling oxide layer 4 is 0.8nm to 2.8nm, such as 0.8nm, 1.0nm, 1.5nm, 2.0nm, 2.4nm, 2.8nm, etc., and the thickness of the doped polysilicon layer 5 is 50nm to 250nm, such as 50nm, 100nm, 150nm, 200nm, 250nm, etc. Further, the doping process of the second doping element can adopt at least one of the following: a furnace tube diffusion process, an ion implantation process, and an in-situ doping process. It is understandable that the thickness of the tunnel oxide layer 4 and the thickness of the doped polysilicon layer 5 will simultaneously affect the doping concentration of the second doping element that eventually migrates to the doped polysilicon layer 5 during the diffusion process. Therefore, the thickness of the tunnel oxide layer 4 and the doped polysilicon layer 5 can be adjusted according to the doping concentration required for the doped polysilicon layer 5. The present invention does not specifically limit this. However, for the doping concentration of the second doping element in the doped polysilicon layer 5, in an optional embodiment, it can be 1E 19 ~1E 21 Atoms / cm 3 , for example 1E 19 Atoms / cm 3 , 1E 20 Atoms / cm 3 , 1E 21 Atoms / cm 3 wait.

[0058] For example, the silicon substrate structure obtained after step S701 is as follows: Figure 8As shown. For the first region 11, the tunneling oxide layer 4, the doped polysilicon layer 5 and the silicon glass layer 7 are directly arranged on the smooth silicon substrate surface, while for the second region 12, the tunneling oxide layer 4, the doped polysilicon layer 5 and the silicon glass layer 7 are arranged on the emitter 2 and the oxide layer 3 surface. In order to obtain the second region 12 including only the emitter 2, it is necessary to remove the redundant tunneling oxide layer 4, the doped polysilicon layer 5 and the silicon glass layer 7 outside the oxide layer 3. In an optional embodiment, the present invention selects the laser modification process in step S702 to modify the silicon glass layer 7, so that the silicon glass layer 7 can react with the alkaline solution after modification, so that it can be removed once by the alkaline solution in step S703. Compared with the conventional laser process for removing the silicon glass layer 7, the laser power and energy required for the laser modification process are lower, and the side effects caused by the laser damage are smaller, so as to minimize the influence of the high heat generated in the laser process on the distribution of the first doping element in the emitter 2. In an optional embodiment, the laser wavelength of the laser modification process is 300nm to 1000nm, such as 532nm, 355nm, etc.; the laser power range of the laser modification process is 10W to 50W, such as 10W, 20W, 30W, 40W, 50W, etc. Further, in order to ensure the removal effect of the silicon glass layer 7, the width of the scanning area of ​​the laser modification process is greater than the width of the second area 12, and partially overlaps with the first area 11. Exemplarily, the silicon substrate structure obtained after step S703 is as follows Fig. 9 As shown, from Fig. 9 It can be seen that the silicon glass layer 7 that has not been modified will not react with the alkaline solution. Therefore, after step S703, the stacked doped polysilicon layer 5 and the silicon glass layer 7 in the first region 11 are retained, and the silicon glass layer 7 and the doped polysilicon layer 5 on the modified second region 12 are simultaneously removed by the alkaline solution, and only the stacked emitter 2, oxide layer 3 and tunnel oxide layer 4 are retained.

[0059] It should be noted that, since the embodiment of the present invention replaces the tunneling oxide structure of a part of the region (the second region 12) with the emitter 2 structure, it will affect the performance of the solar cell. Therefore, in the embodiment of the present invention, the front field can be formed on the front side while preparing the tunneling oxide structure of the first region 11 through step S103. Not only does it not add additional preparation processes, but it also greatly improves the filling factor in the solar cell, thereby ensuring the overall photoelectric conversion efficiency of the solar cell. Specifically, when the silicon substrate 1 is an N-type silicon substrate, with the phosphorus diffusion process of the second main surface and the second region 12 on the first main surface, some phosphorus atoms will migrate along the surface of the silicon substrate 1 to the inside of the silicon substrate 1. Therefore, high and low junctions with the same doping elements but different concentrations can be formed simultaneously on the second main surface of the silicon substrate 1 and the surface of the second region 12.

[0060] In an optional embodiment, not only the tunneling oxide layer 4 and the doped polysilicon layer 5 on the second main surface need to be removed in step S104, but also the additional tunneling oxide structure on the first main surface needs to be removed. Therefore, after step S104, Fig.10 As shown, it also includes:

[0061] Step S1001, using an acid solution to remove the second region 12 on the first main surface and the remaining silicon glass layer 7 and the oxide layer 3 on the second main surface;

[0062] Step S1002 , preparing a passivation anti-reflection layer 8 on the first main surface and the second main surface respectively, and preparing a metal electrode 9 on the first area 11 and the second area 12 of the first main surface respectively.

[0063] Among them, when the emitter is a p+ emitter, the preparation process of metal click 9 can use silver aluminum paste and LECO technology, which greatly alleviates the problem of BC battery metallization co-firing.

[0064] After step S1001, the following can be obtained: Fig.11 The schematic diagram of the cross-sectional structure of the silicon substrate is shown in FIG. Fig.11 As shown, after the oxide layer 3 is removed from the first region 11, only the emitter 2 is retained, and after the silicon glass layer 7 is removed from the second region 12, only the tunnel oxide layer 4 and the doped polysilicon layer 5 stacked from the inside to the outside are retained, and there is a height difference between the emitter 2 of the first region 11 and the doped polysilicon layer 5 of the second region 12, ensuring that there is no electrical connection between the P-type doped region and the N-type doped region. Exemplarily, Fig.12 It is a schematic diagram of the cross-sectional structure of the silicon substrate obtained after step S1002, and is also a schematic diagram of the cross-sectional structure of the silicon substrate finally obtained in the embodiment of the present invention.

[0065] In summary, the method for preparing a back-contact solar cell provided by an embodiment of the present invention uses an emitter obtained by direct diffusion of a first doping element to replace the stacked structure of a tunneling oxide layer and a doped polysilicon layer in some regions of the prior art, thereby improving the utilization rate of sunlight on the backlight side of some regions. At the same time, while preparing the tunneling oxide layer and the doped polysilicon layer in the first region, a high-low junction can be formed between the first region and the second main surface of the silicon substrate, thereby increasing the overall photoelectric conversion efficiency of the solar cell.

[0066] Likewise Fig.12Taking as an example, the solar cell structure provided by the present invention is specifically described, including: a silicon substrate 1; wherein a first region 11 and a second region 12 are arranged on a first main surface in a thickness direction of the silicon substrate 1; a tunneling oxide layer 4 and a doped polysilicon layer 5 containing a second doping element are stacked from the inside to the outside of the first region 11, and an emitter 2 containing a first doping element is arranged in the second region 12; wherein a high-low junction is arranged on the second main surface in a thickness direction of the silicon substrate 1.

[0067] In an optional embodiment, as described above in the preparation method, the high-low junction and the doped polysilicon layer 5 are formed simultaneously.

[0068] In a further optional embodiment, the doping concentration of the high and low junctions is 1E 18 ~5E 20 Atoms / cm3, and as the depth from the surface of the silicon substrate 1 increases, the doping concentration of the high and low junctions gradually decreases. In an optional embodiment, the doping concentration of the silicon substrate 1 varies with the depth from the surface as shown in Fig.13 As shown, from Fig.13 It can be seen that in the depth range of 0.95μm to 0.125μm from the surface, the doping concentration of the high-low junction on the second main surface side is 5E 18 Atoms / cm3~1E 20 Atoms / cm3, indicating that effective doping has been achieved on the second main surface side.

[0069] In an optional embodiment, the thickness of the doped polysilicon layer 5 is 50 nm to 250 nm, for example, 50 nm, 100 nm, 150 nm, 200 nm, 250 nm, etc.; further, the doping concentration of the doped polysilicon layer 5 is 1E 19 ~1E 21 Atoms / cm 3 , for example 1E 19 Atoms / cm 3 , 1E 20 Atoms / cm 3 , 1E 21 Atoms / cm 3 wait.

[0070] In summary, the back-contact solar cell provided by the embodiment of the present invention uses an emitter obtained by direct diffusion of the first doping element to replace the stacked structure of the tunneling oxide layer and the doped polysilicon layer in some regions of the prior art, thereby improving the utilization rate of sunlight on the backlight side of some regions. At the same time, when preparing the tunneling oxide layer and the doped polysilicon layer in the first region, a high-low junction can be formed in the first region and the second main surface of the silicon substrate, thereby increasing the overall photoelectric conversion efficiency of the solar cell.

[0071] Embodiment 1

[0072] a. Clean and texture both sides of the N-type silicon substrate in the thickness direction;

[0073] b. Boron diffusion is performed on the velvet surface prepared in step a to obtain a p+ emitter, and a surface oxide layer BSG is formed on the outside of the p+ emitter through a thermal oxidation process;

[0074] c. single-sided etching is performed on the light-receiving surface (second main surface) of the silicon substrate obtained in step b to remove the p+ emitter and the oxide layer, and the silicon substrate is re-textured after removal;

[0075] d. Prepare a protective layer with a thickness of 50 nm on the light-receiving side by a thermal oxidation process;

[0076] e. removing the BSG in a selective area (first area) on one side of the backlight surface (first main surface) by a laser process, and polishing the first area by a polishing process;

[0077] f. Remove the protective layer of the light-receiving surface by single-side engraving process;

[0078] g. A tunnel oxide layer and an intrinsic polysilicon layer are sequentially prepared on the light-receiving surface and the backlight surface of the silicon substrate from the inside to the outside by low-pressure chemical deposition (LPCVD), and then the polycrystalline layer is phosphorus-doped by a diffusion process, and a phosphorus silicon glass layer PSG is formed while obtaining the doped polycrystalline silicon layer; wherein, while the doped polycrystalline silicon layer is formed, a high-low junction is formed on the second main surface of the silicon substrate;

[0079] h. Modifying the PSG outside the BSG in the second region by a laser modification process, and then simultaneously removing the PSG and the doped polysilicon layer in the second region by an alkaline solution;

[0080] i. Remove the PSG and doped polysilicon layer on the front side through single-side etching and alkali washing process, leaving only the high and low junctions on the light-receiving side;

[0081] j. Remove all oxide layers on the light-receiving and back-lighting surfaces using an acid solution;

[0082] k. Prepare the passivation anti-reflection layer on both sides and complete the preparation of metal electrodes in the P-type area and N-type area.

[0083] Embodiment 2

[0084] a. Clean and texture both sides of the P-type silicon substrate in the thickness direction;

[0085] b. Perform phosphorus diffusion on the velvet surface prepared in step a to obtain an n+ emitter, and form a surface oxide layer PSG on the outside of the n+ emitter through a thermal oxidation process;

[0086] c. single-sided etching is performed on the light-receiving surface (second main surface) of the silicon substrate obtained in step b to remove the n+ emitter and the oxide layer, and the silicon substrate is re-textured after removal;

[0087] d. Prepare a protective layer with a thickness of 50 nm on the light-receiving side by a thermal oxidation process;

[0088] e. removing the BSG in a selective area (first area) on one side of the backlight surface (first main surface) by a laser process, and polishing the first area by a polishing process;

[0089] f. Remove the protective layer of the light-receiving surface by single-side engraving process;

[0090] g. A tunnel oxide layer and a doped polysilicon layer doped with boron are sequentially prepared on the light-receiving surface and the backlight surface of the silicon substrate from the inside to the outside by plasma enhanced chemical deposition (PECVD), and then the polysilicon layer is activated and crystallized by an annealing process, and a borosilicate glass layer BSG is formed while the doped polysilicon layer is obtained; wherein, while the doped polysilicon layer is formed, a high-low junction is formed on the second main surface of the silicon substrate;

[0091] h. modifying the BSG outside the PSG in the second region by a laser modification process, and then simultaneously removing the BSG and the doped polysilicon layer in the second region by an alkaline solution;

[0092] i. Remove the PSG and doped polysilicon layer on the front side through single-side etching and alkali washing process, leaving only the high and low junctions on the light-receiving side;

[0093] j. Remove all oxide layers on the light-receiving and back-lighting surfaces using an acid solution;

[0094] k. Prepare the passivation anti-reflection layer on both sides and complete the preparation of metal electrodes in the P-type area and N-type area.

[0095] Comparative Example 1

[0096] a. Clean and texture both sides of the N-type silicon substrate in the thickness direction;

[0097] b. Depositing a tunnel oxide layer and an intrinsic polysilicon layer on both sides of the silicon substrate, and forming a doped polysilicon layer doped with boron and BSG through a boron diffusion process;

[0098] c. Remove the BSG in the local area (first area) of the backlight surface by laser film opening process, and then remove the BSG in the entire area of ​​the light-receiving surface by single-side etching;

[0099] d. Remove the doped polysilicon in the area not protected by BSG and the silicon substrate at a certain depth below through an alkaline polishing process;

[0100] e. Depositing the tunnel oxide layer and the intrinsic polysilicon layer again on both sides, and forming a doped polysilicon layer doped with phosphorus and PSG by a phosphorus diffusion process;

[0101] f. Remove the PSG in the local area (second area) of the backlight surface by laser film opening process again, and then remove the PSG in the entire area of ​​the light-receiving surface by single-side etching. Remove the doped polysilicon on the light-receiving surface by alkali washing and texturing process, and form the polysilicon in the textured surface and the backlight surface that is not protected by PSG, that is, the doped polysilicon outside the BSG;

[0102] g. Use acid solution to remove all oxide layers;

[0103] h. Prepare the passivation anti-reflection film on both sides and complete the preparation of the metal electrodes in the P-type area and the N-type area.

[0104] The following test results were obtained by testing the performance of the back-contact solar cells prepared in Example 1, Example 2 and Comparative Example 1:

[0105] Jsc(%) Voc(%) FF(%) Eta(%) Bifacial power generation rate Embodiment 1 102.09％ 99.59％ 100.86％ 102.59％ 80％ Embodiment 2 102.08％ 99.61％ 100.77％ 102.46％ 80％ Comparative Example 100％ 100％ 100％ 100％ 60％

[0106] It can be seen from the above test results that the preparation method provided by the embodiment of the present invention greatly improves the bifacial power generation rate by improving the tunneling oxidation structure of the second region in the comparative example (existing technology). At the same time, the front field structure on the light-receiving side of the silicon substrate can be formed synchronously in the preparation process, which effectively improves the filling factor in the solar cell, thereby improving the overall photoelectric conversion efficiency of the solar cell.

[0107] The introduction provided in the above steps is only used to help understand the structure, method and core idea of ​​the present invention. For ordinary technicians in this technical field, without departing from the principle of the present invention, several improvements and modifications can be made to the present invention, and these improvements and modifications also belong to the scope of protection of the claims of the present invention.

Claims

1. A method for preparing a back contact solar cell, characterized in that: include: Step 1, preparing an emitter (2) containing a first doping element and an oxide layer (3) in sequence from the inside to the outside on a first main surface in the thickness direction of a silicon substrate (1); Step 2, removing and polishing the emitter (2) and the oxide layer (3) in the first region (11) on the first main surface; Step 3, preparing a tunneling oxide layer (4) and a doped polysilicon layer (5) containing a second doping element in sequence from the inside to the outside on the second main surface in the thickness direction of the silicon substrate (1) and the first region (11), so as to form a high-low junction on the second main surface and the surface of the first region (11); wherein the doping types of the emitter (2) and the doped polysilicon layer (5) are opposite; Step 4, removing the tunneling oxide layer (4) and the doped polysilicon layer (5) on the second main surface.

2. The preparation method according to claim 1, characterized in that: The step 1 comprises: Step 11, preparing an emitter (2) and an oxide layer (3) in sequence from the inside to the outside on the first main surface and the second main surface in the thickness direction of the silicon substrate (1); Step 12, etching the emitter (2) and the oxide layer (3) on the second main surface; Step 13, texturing the second main surface and preparing a protective layer (6) on the formed texturing surface.

3. The preparation method according to claim 2, characterized in that: The step 2 comprises: Step 21, removing the oxide layer (3) of the first region (11) by using a laser process; Step 22, polishing the first region (11), and removing the protective layer (6) after polishing.

4. The preparation method according to claim 1, characterized in that: The step 3 comprises: Step 31, preparing a tunneling oxide layer (4), a doped polysilicon layer (5) and a silicon glass layer (7) on the first main surface and the second main surface of the silicon substrate (1) in sequence from the inside to the outside; Step 32, modifying the silicon glass layer (7) on the second region (12) on the first main surface by a laser modification process, wherein the second region (12) is a region other than the first region (11) on the first main surface; Step 33: using an alkaline solution to remove the modified silicon glass layer (7) and the doped polysilicon layer (5) on the second region (12).

5. The preparation method according to claim 4, characterized in that: After step 4, the method further includes: Step 5, removing the second region (12) on the first main surface and the remaining silicon glass layer (7) and oxide layer (3) on the second main surface by using an acid solution; Step 6: prepare a passivation anti-reflection layer (8) on the first main surface and the second main surface respectively, and prepare metal electrodes (9) on the first region (11) and the second region (12) of the first main surface respectively.

6. The preparation method according to claim 1, characterized in that: The thickness of the oxide layer (3) is 50nm to 150nm; and / or, The ratio of the area of ​​the first region (11) to the area of ​​the second main surface is 0.3 to 0.

7.

7. The preparation method according to claim 4, characterized in that: The laser wavelength of the laser modification process is 300nm to 1000nm; and / or, The laser power range of the laser modification process is 10 to 50 W; and / or, The width of the scanning area of ​​the laser modification process is greater than the width of the second area (12), and partially overlaps with the first area (11).

8. A back contact solar cell, characterized in that: include: A silicon substrate (1); wherein a first region (11) and a second region (12) are provided on a first main surface in a thickness direction of the silicon substrate (1); A tunneling oxide layer (4) and a doped polysilicon layer (5) containing a second doping element are stacked from inside to outside in the first region (11), and an emitter (2) containing the first doping element is arranged in the second region (12); Wherein, a high-low junction is arranged on the second main surface in the thickness direction of the silicon substrate (1).

9. The back contact solar cell according to claim 8, characterized in that: The high-low junction is formed synchronously with the doped polysilicon layer (5).

10. The back contact solar cell according to claim 8, characterized in that: The doping concentration of the high and low junctions is 1E 18 Atoms / cm3~5E 20 Atoms / cm3, and as the depth from the surface of the silicon substrate (1) increases, the doping concentration of the high-low junction gradually decreases; and / or, The thickness of the doped polysilicon layer (5) is 50nm to 250nm; and / or, The doping concentration of the doped polysilicon layer (5) is 1E 19 ~1E 21 Atoms / cm 3 .

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