Power supply module, router, switch and electronic equipment
Patent Information
- Application Number
- CN202380013046.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2023-06-12
- Publication Date
- 2025-02-21
AI Technical Summary
The prior art cannot accurately and timely overcurrent protection of DC-DC conversion modules, resulting in overstress damage to the power components of the power module and high system complexity.
Control circuits, including sampling and amplification circuits, comparison circuits and processing circuits, are used to amplify the output parameters of the sampling voltage conversion circuit, and compare them with preset thresholds to achieve accurate overload protection, including slow overcurrent, backflow current and Wave-by-wave current limit protection.
It improves the safety and stability of the power supply module, simplifies the system structure, realizes multiple current protection, and enhances product competitiveness.
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Figure CN119497953A_ABST
Abstract
Description
Power modules, routers, switches, and electronic devices Technical Field
[0001] The present application relates to the field of power electronics technology, and in particular to a power supply module, a router, a switch, and an electronic device. Background Art
[0002] DC-DC converter modules are widely used in the electronic power sector due to their low power consumption, high efficiency, and wide voltage regulation range. However, in some scenarios, such as when the output power of a DC-DC converter module is very high, this can cause problems such as overstress and damage to the power components of the power module.
[0003] Some solutions monitor overcurrent conditions on the primary side by acquiring the rectified voltage on the secondary side. If a pulse signal loss is detected, it can be determined that a power component has failed, triggering overcurrent protection. However, these solutions cannot accurately and promptly detect overcurrent conditions and require transmitting the detected signal from the secondary side to the primary side, which complicates the system. Therefore, achieving accurate and timely overcurrent protection for DC-DC converter modules is an urgent problem that needs to be solved.
[0004] Summary of the Invention
[0005] The present application provides a power module, router, switch, and electronic device that can solve the problem in the prior art of being unable to accurately and timely provide overcurrent protection for the power module. The present application can improve the safety and stability of the power module and enhance product competitiveness.
[0006] The first aspect of the present application also provides a power supply module. The power supply module may include a control circuit and a voltage conversion circuit for supplying power to a load. The control circuit is configured to control the voltage conversion circuit. The control circuit includes a sampling and amplifying circuit, a comparison circuit, and a processing circuit. The sampling and amplifying circuit may sample a first current output by the voltage conversion circuit, amplify the first current by a preset coefficient, and output a second current. The comparison circuit may compare the second current with a first overcurrent threshold and output a first comparison signal when the second current is greater than or equal to the first overcurrent threshold. Upon receiving the first comparison signal, the processing circuit may stop outputting a pulse signal to the voltage conversion circuit to provide overcurrent protection for the voltage conversion circuit. Using the power supply module of the present application, the sampling and amplifying circuit samples the output parameters of the voltage conversion circuit, amplifies the output parameters with high precision, and compares the amplified output parameters with the protection threshold to achieve more accurate overload protection. This application can address the problem of the prior art in being unable to accurately and promptly provide overcurrent protection for power supply modules, thereby improving the safety and stability of the power supply module and enhancing product competitiveness.
[0007] As an optional implementation, the comparison circuit is further configured to compare the second current with a second overcurrent threshold, and to output a second comparison signal when the second current is greater than or equal to the second overcurrent threshold. The processing circuit is configured to output a pulse signal to the voltage conversion circuit within a first time period of one or more switching cycles, and to start timing when the second comparison signal is received at the midpoint of the first time period. If the timing reaches a preset time, the processing circuit will stop outputting the pulse signal to the voltage conversion circuit. Based on this design, the control circuit of the present application samples the output parameters at the midpoint of the wave transmission time period and determines whether the output parameters are overcurrent, thereby achieving high overload protection accuracy and realizing slow overcurrent protection for the power module.
[0008] As an optional implementation, the comparison circuit is configured to compare the second current with a third overcurrent threshold and to output a third comparison signal when the second current is less than the third overcurrent threshold; wherein the third overcurrent threshold is less than the first overcurrent threshold. The processing circuit may also stop outputting the pulse signal to the voltage conversion circuit upon receiving the third comparison signal. Based on this design, the present application can implement backflow current protection for the power module, thereby improving the safety and stability of the power module.
[0009] As an optional implementation, the comparison circuit may further compare the second current with a fourth overcurrent threshold and output a fourth comparison signal when the second current is greater than or equal to the fourth overcurrent threshold. The processing circuit may also be configured to, upon receiving the fourth comparison signal, stop outputting the pulse signal to the voltage conversion circuit for one or more switching cycles, thereby providing overcurrent protection for the voltage conversion circuit.
[0010] As an optional implementation, the comparison circuit is used to compare the second output parameter with a fourth threshold value, and to output a fourth comparison signal when the second output parameter is greater than or equal to the fourth threshold value. The processing circuit is further used to stop outputting the pulse signal to the voltage conversion circuit within one or more switching cycles upon receiving the fourth comparison signal. Based on this design, the present application can implement wave-by-wave current limiting protection for the power module, thereby improving the safety and stability of the power module.
[0011] As an optional implementation, the sampling and amplification circuit includes an amplifier, a first transistor, a first current source, a second current source, and a third current source. The first input terminal of the amplifier is connected to the first output terminal of the voltage conversion circuit through a first resistor, the second input terminal of the amplifier is connected to the second output terminal of the voltage conversion circuit through a second resistor, the first current source is electrically connected to the first resistor and the first input terminal of the amplifier, the output terminal of the amplifier is electrically connected to the first terminal of the first transistor, the second terminal of the first transistor is electrically connected to the second input terminal of the amplifier, the third terminal of the first transistor is electrically connected to the second current source, the third current source is grounded through a third resistor, the first node between the third current source and the third resistor is connected to the comparison circuit, and the second current source and the third current source form a current mirror. Based on such a design, the present application can realize the sampling and amplification of the output parameters of the voltage conversion circuit, that is, the present application can realize high-precision amplification of parameters such as current.
[0012] As an optional implementation, the comparison circuit may include a first comparator, a second comparator, a third comparator, and a fourth comparator. The first input of the first comparator is connected to the first node, the second input of the comparator is electrically connected to the processing circuit, and the output of the first comparator is electrically connected to the processing circuit. The first input of the second comparator is connected to the first node, the second input of the second comparator is electrically connected to the reference voltage generation circuit, and the output of the second comparator is electrically connected to the processing circuit. The first input of the third comparator is connected to the first node, the second input of the third comparator is electrically connected to the processing circuit, and the output of the third comparator is electrically connected to the processing circuit; the first input of the fourth comparator is connected to the first node, the second input of the fourth comparator is electrically connected to the processing circuit, and the output of the fourth comparator is electrically connected to the processing circuit.
[0013] As an optional implementation, the control circuit may further include a reference voltage generating circuit, which includes a fourth current source, a fifth current source and a first voltage source, wherein the first end of the first voltage source is grounded, the second end of the first voltage source is grounded through a fourth resistor, the second end of the first voltage source is also connected to the power supply through a fifth resistor, the fourth current source is grounded through a sixth resistor, the two ends of the sixth resistor are respectively connected to the two ends of the fifth current source, the fifth current source is used to receive a slope compensation reset signal, and the node between the fourth current source and the sixth resistor is electrically connected to the comparison circuit.
[0014] A second aspect of the present application also provides an electronic device comprising an input power supply and a power module. The input power supply can be used to power the power module. The power module can include a control circuit and a voltage conversion circuit for powering a load. The control circuit is configured to control the voltage conversion circuit. The control circuit can include a sampling and amplifying circuit, a comparison circuit, and a processing circuit. The sampling and amplifying circuit can sample a first current output by the voltage conversion circuit, amplify the first current by a preset coefficient, and output a second current. The comparison circuit can compare the second current with a first overcurrent threshold and output a first comparison signal when the second current is greater than or equal to the first overcurrent threshold. Upon receiving the first comparison signal, the processing circuit can stop outputting pulse signals to the voltage conversion circuit to provide overcurrent protection for the voltage conversion circuit. Using the power module of the present application, the sampling and amplifying circuit samples the output parameters of the voltage conversion circuit, amplifies the output parameters with high precision, and compares the amplified output parameters with the protection threshold to achieve more accurate overload protection. This application can address the existing problem of the inability to accurately and promptly provide overcurrent protection for power modules, thereby improving the safety and stability of the power module and enhancing product competitiveness.
[0015] As an optional implementation, the comparison circuit is further configured to compare the second current with a second overcurrent threshold, and to output a second comparison signal when the second current is greater than or equal to the second overcurrent threshold. The processing circuit is configured to output a pulse signal to the voltage conversion circuit within a first time period of one or more switching cycles, and to start timing when the second comparison signal is received at the midpoint of the first time period. If the timing reaches a preset time, the processing circuit will stop outputting the pulse signal to the voltage conversion circuit. Based on this design, the control circuit of the present application samples the output parameters at the midpoint of the wave transmission time period and determines whether the output parameters are overcurrent, thereby achieving high overload protection accuracy and realizing slow overcurrent protection for the power module.
[0016] As an optional implementation, the comparison circuit is configured to compare the second current with a third overcurrent threshold and to output a third comparison signal when the second current is less than the third overcurrent threshold; wherein the third overcurrent threshold is less than the first overcurrent threshold. The processing circuit may also stop outputting the pulse signal to the voltage conversion circuit upon receiving the third comparison signal. Based on this design, the present application can implement backflow current protection for the power module, thereby improving the safety and stability of the power module.
[0017] As an optional implementation, the comparison circuit may further compare the second current with a fourth overcurrent threshold and output a fourth comparison signal when the second current is greater than or equal to the fourth overcurrent threshold. The processing circuit may also be configured to, upon receiving the fourth comparison signal, stop outputting the pulse signal to the voltage conversion circuit for one or more switching cycles, thereby providing overcurrent protection for the voltage conversion circuit.
[0018] As an optional implementation, the comparison circuit is used to compare the second output parameter with a fourth threshold value, and to output a fourth comparison signal when the second output parameter is greater than or equal to the fourth threshold value. The processing circuit is further used to stop outputting the pulse signal to the voltage conversion circuit within one or more switching cycles upon receiving the fourth comparison signal. Based on this design, the present application can implement wave-by-wave current limiting protection for the power module, thereby improving the safety and stability of the power module.
[0019] As an optional implementation, the sampling and amplification circuit includes an amplifier, a first transistor, a first current source, a second current source, and a third current source. The first input terminal of the amplifier is connected to the first output terminal of the voltage conversion circuit through a first resistor, the second input terminal of the amplifier is connected to the second output terminal of the voltage conversion circuit through a second resistor, the first current source is electrically connected to the first resistor and the first input terminal of the amplifier, the output terminal of the amplifier is electrically connected to the first terminal of the first transistor, the second terminal of the first transistor is electrically connected to the second input terminal of the amplifier, the third terminal of the first transistor is electrically connected to the second current source, the third current source is grounded through a third resistor, the first node between the third current source and the third resistor is connected to the comparison circuit, and the second current source and the third current source form a current mirror. Based on such a design, the present application can realize the sampling and amplification of the output parameters of the voltage conversion circuit, that is, the present application can realize high-precision amplification of parameters such as current.
[0020] As an optional implementation, the comparison circuit may include a first comparator, a second comparator, a third comparator, and a fourth comparator. The first input of the first comparator is connected to the first node, the second input of the comparator is electrically connected to the processing circuit, and the output of the first comparator is electrically connected to the processing circuit. The first input of the second comparator is connected to the first node, the second input of the second comparator is electrically connected to the reference voltage generation circuit, and the output of the second comparator is electrically connected to the processing circuit. The first input of the third comparator is connected to the first node, the second input of the third comparator is electrically connected to the processing circuit, and the output of the third comparator is electrically connected to the processing circuit; the first input of the fourth comparator is connected to the first node, the second input of the fourth comparator is electrically connected to the processing circuit, and the output of the fourth comparator is electrically connected to the processing circuit.
[0021] As an optional implementation, the control circuit also includes a reference voltage generating circuit, which includes a fourth current source, a fifth current source and a first voltage source, the first end of the first voltage source is grounded, the second end of the first voltage source is grounded through a fourth resistor, the second end of the first voltage source is also connected to the power supply through a fifth resistor, the fourth current source is grounded through a sixth resistor, the two ends of the sixth resistor are respectively connected to the two ends of the fifth current source, the fifth current source is used to receive a slope compensation reset signal, and the node between the fourth current source and the sixth resistor is electrically connected to the comparison circuit.
[0022] A third aspect of the present application further provides a router, which may include the power module and one or more chips as described above. The power module may be connected to the one or more chips to provide power to the one or more chips.
[0023] A fourth aspect of the present application further provides a switch, which may include the power module and one or more chips as described above. The power module may be connected to the one or more chips to provide power to the one or more chips.
[0024] The power modules, routers, switches, and electronic devices provided in the embodiments of the present application can solve the problem in the prior art of being unable to accurately and timely perform overcurrent protection on the power modules. Multiple current protections can be achieved by adopting a simple circuit structure, and precise overload protection functions can also be implemented, thereby improving the safety and stability of the power modules. BRIEF DESCRIPTION OF THE DRAWINGS
[0025] FIG1 is a schematic structural diagram of an electronic device provided in this application.
[0026] FIG2 is another schematic structural diagram of the electronic device provided in this application.
[0027] FIG3 is another schematic structural diagram of the electronic device provided in this application.
[0028] FIG4 is a schematic structural diagram of a power supply module provided in this application.
[0029] FIG5 is a schematic structural diagram of a sampling and amplifying circuit provided in this application.
[0030] FIG6 is a signal timing diagram when the power module performs slow overcurrent protection.
[0031] FIG7 is another signal timing diagram when the power module performs slow overcurrent protection.
[0032] FIG8 is a signal timing diagram when the power module performs fast overcurrent protection.
[0033] FIG9 is a signal timing diagram when the power module performs backflow current protection.
[0034] FIG10 is another signal timing diagram when the power module performs backflow current protection.
[0035] FIG11 is a signal timing diagram when the power module performs wave-by-wave current limiting protection.
[0036] FIG12 is another schematic structural diagram of the power module provided in this application.
[0037] FIG13 is a schematic diagram of the structure of a router provided in this application.
[0038] FIG14 is a schematic diagram of the structure of a switch provided in this application. DETAILED DESCRIPTION
[0039] In the embodiments of this application, terms such as "first" and "second" are used solely to distinguish between different objects and should not be construed as indicating or implying relative importance or order. For example, terms such as "first application" and "second application" are used to distinguish between different applications, not to describe a specific order of applications. Features defined as "first" or "second" may explicitly or implicitly include one or more of these features.
[0040] It should be noted that when an element is considered to be “connected” to another element, it may be directly connected to the other element or there may be a centrally disposed element. When an element is considered to be “disposed on” another element, it may be directly disposed on the other element or there may be a centrally disposed element.
[0041] Typically, when a DC-DC converter module outputs very high power, it can cause problems such as overstress and damage to the power components of the power module. In some solutions, the overcurrent status of the primary side is monitored by obtaining the rectified voltage on the secondary side. If a pulse signal loss is detected, it can be determined that the power component has failed, triggering overcurrent protection. However, this solution cannot accurately protect the power module from overcurrent and requires transmitting the detected signal from the secondary side to the primary side, which complicates the system. Therefore, how to achieve accurate and timely overcurrent protection for the DC-DC converter module is an urgent problem that needs to be solved.
[0042] To address the above issues, embodiments of the present application provide a power module, router, switch, and electronic device. By employing a simple and reliable current sampling method, these embodiments can achieve more accurate overload protection for the power module, improving the safety and stability of the power module and, in turn, enhancing the competitiveness of the product. These embodiments will be described in detail below using specific embodiments.
[0043] Please refer to FIG1 , which is a schematic structural diagram of an electronic device 100 provided in one embodiment of the present application.
[0044] As shown in FIG1 , the electronic device 100 may include a power module 10 and a load 20. The power module 10 is configured to receive an input voltage V in and provides an output voltage V out Power is supplied to the load 20. In one embodiment, the input voltage V in It can be provided by an external power source, or it can also be provided by the internal power source of the electronic device 100. It is understood that the electronic device 100 provided in the embodiment shown in Figure 1 can be a mobile phone, a laptop computer, a computer case, a smart speaker, a smart watch, or a wearable device, etc. It is understood that the power module 10 can be applied to the electronic device 100 shown in Figure 1.
[0045] Please refer to FIG. 2 , which is another structural diagram of the electronic device 100 provided in an embodiment of the present application.
[0046] As shown in FIG2 , the electronic device 100 may include a power module 10. The power module 10 may be configured to receive an input voltage V in and provides an output voltage V out , to power the loads subsequently connected to the electronic device 100. In one embodiment, the input voltage V in The power may be provided by an external power source, or may be provided by an internal power source of the electronic device 100 .
[0047] As shown in FIG2 , the electronic device 100 provided in this embodiment can be a power supply device such as a power adapter, a charger, a mobile power supply, etc. The power module 10 provided in this embodiment of the application can be applied to the electronic device 100 shown in FIG2 .
[0048] In one embodiment of the present application, the electronic device 100 may further include a plurality of power modules 10, which provide output voltages V out Power the load 20. In one embodiment of the present application, the electronic device 100 may include multiple loads 20, and the power module 10 may provide multiple output voltages V out In one embodiment of the present application, the electronic device 100 may include multiple power modules 10 and multiple loads 20. The multiple power modules 10 may provide multiple output voltages V out A plurality of loads 20 are supplied with power.
[0049] In one embodiment of the present application, the input voltage V in It can be AC power, and the power supply module 10 can include an AC-DC conversion circuit. In the embodiment of the present application, the input voltage V inThe internal power supply may include an energy storage device, and the power module 10 may include a DC conversion circuit. Accordingly, when the electronic device 100 operates independently, the energy storage device of the internal power supply may supply power to the power module 10.
[0050] In one embodiment of the present application, the input voltage V in It can be direct current. The load 20 of the electronic device 100 can include one or more of a power-consuming device, an energy storage device, or an external device. In one embodiment, the load 20 can be a power-consuming device of the electronic device 100, such as a processor, a display, etc. In one embodiment, the load 20 can be an energy storage device of the electronic device 100, such as a battery. In one embodiment, the load 20 can be an external device of the electronic device 100, such as a display, keyboard, or other electronic device.
[0051] The internal structure of the power module is introduced in detail below.
[0052] Please refer to FIG3 , which is a schematic structural diagram of an electronic device 100 provided in one embodiment of the present application.
[0053] As an example, the electronic device 100 may include a power module 10, a load 20, and an input power source 30. The power module 10 is electrically connected between the input power source 30 and the load 20. The power module 10 in this embodiment may include a voltage conversion circuit 12 and a control circuit 14.
[0054] The voltage conversion circuit 12 can be connected between the input power supply 30 and the load 20. It will be understood that the voltage conversion circuit 12 can be used to receive the input voltage of the input power supply 30 and provide an output voltage to the load 20. For example, the voltage conversion circuit 12 can convert the input voltage of the input power supply 30 and provide an output voltage to the load 20 to power the load 20.
[0055] In this embodiment, the control circuit 14 may be configured to be electrically connected to the voltage conversion circuit 12 and may be configured to obtain output parameters of the voltage conversion circuit 12 .
[0056] In some application scenarios, the control circuit 14 may also be used to process parameters of the voltage conversion circuit 12 and output a corresponding pulse width modulation (PWM) signal to the voltage conversion circuit 12 .
[0057] In some possible embodiments, the input power source 30 may be a 48V power source.
[0058] For example, the input power supply 30 can output a first voltage to the voltage conversion circuit 12, and the voltage conversion circuit 12 can then convert the first voltage into a second voltage. It is understood that in some possible application scenarios, the first voltage can be a 48V DC voltage. The second voltage can be a 12V DC voltage. In other words, the voltage conversion circuit 12 can convert the 48V DC voltage input by the input power supply 30 into a 12V DC voltage. The voltage conversion circuit 12 can output the converted 12V DC voltage to the load 20 to power the load 20.
[0059] Please refer to FIG. 4 , which is a schematic structural diagram of a power module 10 provided in one embodiment of the present application.
[0060] In this embodiment, the voltage conversion circuit 12 may include a power stage circuit 121 , a transformer 122 , and a rectifier circuit 123 .
[0061] The power stage circuit 121 in this embodiment is a half-bridge circuit, that is, the power stage circuit 121 may include a switch tube Q1 and a switch tube Q2.
[0062] It is understood that the control circuit 14 can send control signals to the switch tubes Q1 and Q2, so that the switch tubes Q1 and Q2 can be turned on or off according to the received control signals. The first end of the switch tube Q2 is connected to the first output end of the input power supply 30, the second end of the switch tube Q2 is connected to the first end of the switch tube Q1, and the second end of the switch tube Q1 is connected to the second output end of the input power supply 30 and the reference ground via the resistor R1. The third end of the switch tube Q2 is the control end of the switch tube Q2. In other words, the third end of the switch tube Q2 can be used to receive the control signal sent by the control circuit 14. The third end of the switch tube Q1 is the control end of the switch tube Q1. In other words, the third end of the switch tube Q1 can be used to receive the control signal sent by the control circuit 14.
[0063] In this embodiment, the first end of the switch tube Q2 can also be connected to the first end of the bus capacitor C2, the second end of the bus capacitor C2 can be connected to the first end of the bus capacitor C1, and the second end of the bus capacitor C1 can also be connected to the second end of the switch tube Q1 through the resistor R1.
[0064] The power stage circuit 121 can be used to receive an input voltage V in, and provides an output voltage to the primary winding 16 of the transformer 122 according to the control signal provided by the control circuit 14. The transformer 122 includes a primary winding 16, a secondary winding 18 and a magnetic core 17. The secondary winding 18 of the transformer 122 is coupled to the primary winding 16 through the magnetic core 17. The primary winding 16 of the transformer 122 is used to receive the output voltage of the power stage circuit 121 and can generate a primary winding voltage. The secondary winding 18 of the transformer 122 is coupled to the primary winding 16, and a secondary winding voltage can be generated on the secondary winding 18. It can be understood that the primary winding can refer to the winding placed on the primary side of the transformer. The secondary winding can refer to the winding placed on the secondary side of the transformer.
[0065] A first end of the primary winding 16 is electrically connected to a node P1 between the second end of the switch Q2 and the first end of the switch Q1 . A second end of the primary winding 16 is electrically connected to a node P2 between the second end of the capacitor C2 and the first end of the capacitor C1 .
[0066] The rectifier circuit 123 can be used to receive the secondary winding voltage on the secondary winding 18 and convert it into an output voltage V1 to the filter circuit 124. The filter circuit 124 can be used to filter the output voltage V1 and obtain the output voltage V1 after filtering. out is provided to the load 20 .
[0067] The rectifier circuit 123 may include a switch tube Q3 and a switch tube Q4. The first end of the switch tube Q3 is electrically connected to the first end of the secondary winding 18, and the second end of the switch tube Q3 is electrically connected to the second end of the switch tube Q4.
[0068] The first terminal of the switch Q4 is electrically connected to the second terminal of the secondary winding 18. The third terminal of the switch Q3 serves as a control terminal for the switch Q3. In other words, the third terminal of the switch Q3 can be used to receive a control signal from the control circuit 14. The third terminal of the switch Q4 serves as a control terminal for the switch Q4. In other words, the third terminal of the switch Q4 can be used to receive a control signal from the control circuit 14.
[0069] It is understood that the switch transistors Q1-Q4 can be metal-oxide-semiconductor field-effect transistors (MOSFETs), insulated gate bipolar transistors (IGBTs), bipolar power transistors (bipolar power transistors) or wide bandgap semiconductor field-effect transistors, etc.
[0070] The filter circuit 124 may include an inductor L b and capacitor C o Inductor Lb The first end of the inductor L can be electrically connected to the midpoint of the secondary winding 18. b The second end can be electrically connected to the capacitor C o The first end of the capacitor C o The second end of the capacitor C3 can be grounded, and the second end of the capacitor C3 is also electrically connected to the second end of the switch tube Q3, the second end of the switch tube Q4 and the second end of the load 20.
[0071] In this embodiment, the control circuit 14 may be electrically connected to the output end of the power stage circuit 121. The control circuit 14 may sample the output voltage or output current of the power stage circuit 121.
[0072] Specifically, the control circuit 14 may include a sampling and amplifying circuit 141 , a comparing circuit 142 , a reference voltage generating circuit 143 , and a processing circuit 144 .
[0073] The sampling and amplifying circuit 141 is electrically connected to the voltage conversion circuit 12 and the comparison circuit 142. The comparison circuit 142 is electrically connected to the processing circuit 144 and the reference voltage generation circuit 143. The sampling and amplifying circuit 141 can sample the output parameter of the voltage conversion circuit 12, amplify the output parameter by a preset coefficient, and output the amplified parameter. For example, the output parameter can be the output current of the voltage conversion circuit 12. As one possible example, the sampling and comparison circuit 21 can sample the output current of the power stage circuit 121 and output a corresponding sampling signal to the comparison circuit 142 based on the sampled output current.
[0074] The sampling and amplifying circuit 141 may include an amplifier U1, a transistor Q5, current sources S1-S3, a resistor R 2- R4.
[0075] A first input terminal of amplifier U1 is connected to a first terminal of resistor R1 via resistor R2, and a second input terminal of amplifier U1 is connected to a second terminal of resistor R1 via resistor R3. Current source S1 is electrically connected to resistor R2 and the first input terminal of amplifier U1. An output terminal of amplifier U1 is electrically connected to a first terminal of transistor Q5, and a second terminal of transistor Q5 is electrically connected to a second input terminal of amplifier U1 and resistor R3. A third terminal of transistor Q5 is electrically connected to current source S2. Current source S3 is grounded via resistor R4. Current source S2 and current source S3 can form a 1:N cs The current source S3 can be connected to the comparison circuit 142 through the node P3 between the resistor R4, and the node P3 can output the voltage V CS_O To the comparison circuit 142.
[0076] It can be understood that the transistor Q5 can be a MOS transistor or a triode.
[0077] The sampling and amplifying circuit 141 is electrically connected to both ends of the resistor R1 . The sampling and amplifying circuit 141 can sample the current flowing through the resistor R1 , and further sample the current I1 of the switch tube Q1 .
[0078] For example, assuming that the resistance value of resistor R1 is r1, the resistance value of resistor R2 is r2, the resistance value of resistor R3 is r3, the resistance value of resistor R4 is r4, and the current output by current source S1 is I offset It can be understood that the resistance value of the resistor R2 is r2 and the resistance value of the resistor R1 is r1. According to the basic working principle of the operational amplifier circuit, the voltage V output by the node P3 is CS_O The following formula (1) can be satisfied.
[0079] Among them, V CS_O is the voltage output from node P3, N cs is the proportional coefficient of the current mirror formed by current source S2 and current source S3.
[0080] It is understood that in some more specific application scenarios, the resistance value r2 of the resistor R2 can be close to or equal to the resistance value r3 of the resistor R3. Therefore, the voltage V output by the node P3 is CS_O The following formula (2) can also be satisfied. CS_O =I1×k1+V offset (2)
[0081] The bias voltage V in the above formula (2) offset The following formula (3) can be satisfied, and k1 can satisfy the following formula (4). offset =I offset ×N CS ×r4 (3)
[0082] From the above formulas (1)-(4), it can be seen that the sampling and amplifying circuit 141 can obtain a second current by sampling the current I1 of the switch tube Q1 and amplifying the sampled current I1 with a preset coefficient k1 as a ratio, that is, obtaining a voltage V related to the current I1 of the switch tube Q1. CS_O Based on such a design, the control circuit 14 of the present application can obtain a voltage related to the current I1 of the switch tube Q1 by sampling through the sampling and amplifying circuit 141 .
[0083] Please refer to FIG5 , which is another structural diagram of a sampling and amplifying circuit provided in one embodiment of the present application.
[0084] The difference from the sampling and amplifying circuit shown in the embodiment of FIG. 4 is that, as shown in FIG. 5 , in this embodiment, the sampling and amplifying circuit 141 may further include an amplifier U6 , a transistor Q8 , current sources S7 - S8 , and a resistor R8 .
[0085] It can be understood that the transistor Q8 can be a MOS transistor or a triode.
[0086] A first input terminal of amplifier U6 is connected to processing circuit 144, a second input terminal of amplifier U6 is grounded via resistor R8, an output terminal of amplifier U6 is connected to a first terminal of transistor Q8, a second terminal of transistor Q8 is grounded via resistor R8, and a third terminal of transistor Q8 is connected to current source S8. Current source S7 is electrically connected to resistor R2 and the first input terminal of amplifier U1. Current source S8 and current source S7 can form a 1:N offset current mirror.
[0087] For example, assuming that the resistance value of the resistor R8 is r8, and the voltage received by the first input terminal of the amplifier U6 is V ref_os According to the basic working principle of the operational amplifier circuit, the voltage V output by the node P3 is CS_O The following formula (5) can be satisfied.
[0088] Among them, V CS_O is the voltage output from node P3, N cs is the proportional coefficient of the current mirror formed by current source S2 and current source S3, N offset is the proportional coefficient of the current mirror formed by current source S7 and current source S8.
[0089] It can be understood that in this embodiment, R2, R3, R4, and R8 are matched with each other, and the amplification factor and bias are only affected by the voltage reference, the current mirror ratio, and the resistance ratio. The accuracy can be guaranteed in the design, thereby achieving high-precision amplification of the current of the switch tube Q1, thereby improving the current sampling accuracy.
[0090] Referring again to FIG. 4 , the reference voltage generating circuit 143 may include resistors R5 - R7 , current sources S4 - S5 , and a voltage source S6 .
[0091] The first end of the resistor R5 is connected to the power supply V in, the second end of the resistor R5 is grounded through the resistor R6, and the node P4 between the resistor R5 and the resistor R6 can be grounded through the voltage source S6. The current source S4 is grounded through the resistor R7, and the two ends of the resistor R7 are respectively connected to the two ends of the current source S5. It can be understood that the current source S5 in this embodiment is a slope current source, and the current source S5 can generate a current ramp signal. Among them, the current source S5 can receive the slope compensation reset signal slope_rst. The node P5 between the current source S4 and the resistor R7 is electrically connected to the comparison circuit 142 to output the reference signal V REF_CBC to the comparison circuit 142.
[0092] In this embodiment, the comparison circuit 142 may include a comparator U2 , a comparator U3 , a comparator U4 , and a comparator U5 .
[0093] The first input terminal of the comparator U2 can be connected to the node P3 between the current source S3 and the resistor R4 to receive the voltage signal V outputted from the node P3. CS_O The second input terminal of the comparator U2 is electrically connected to the processing circuit 144 to receive the reference signal V output by the processing circuit 144. REF_SOC The output terminal of the comparator U2 is electrically connected to the processing circuit 144. The comparator U2 can convert the voltage signal V CS_O and the reference signal V REF_SOC The comparison is performed to output a first comparison signal CMP_SOC to the processing circuit 144 .
[0094] The first input terminal of the comparator U3 can be connected to the node P3 between the current source S3 and the resistor R4 to receive the voltage signal V outputted from the node P3. CS_O The second input terminal of the comparator U3 is electrically connected to the reference voltage generating circuit 143 to receive the reference signal V output by the reference voltage generating circuit 143. REF_CBC The output terminal of the comparator U3 is electrically connected to the processing circuit 144. The comparator U3 can convert the voltage signal V CS_O and the reference signal V REF_CBC The comparison is performed to output a second comparison signal CMP_CBC to the processing circuit 144 .
[0095] The first input terminal of the comparator U4 can be connected to the node P3 between the current source S3 and the resistor R4 to receive the voltage signal V outputted from the node P3. CS_O The second input terminal of the comparator U4 is electrically connected to the processing circuit 144 to receive the reference signal V output by the processing circuit 144. REF_QOC The output terminal of the comparator U4 is electrically connected to the processing circuit 144. The comparator U4 can convert the voltage signal V CS_O and the reference signal V REF_QOCThe comparison is performed to output a third comparison signal CMP_QOC to the processing circuit 144 .
[0096] The first input terminal of the comparator U5 can be connected to the node P3 between the current source S3 and the resistor R4 to receive the voltage signal V outputted from the node P3. CS_O The second input terminal of the comparator U5 is electrically connected to the processing circuit 144 to receive the reference signal V output by the processing circuit 144. REF_NOC The output terminal of the comparator U5 is electrically connected to the processing circuit 144. The comparator U5 can convert the voltage signal V CS_O and the reference signal V REF_NOC The comparison is performed to output a fourth comparison signal CMP_NOC to the processing circuit 144 .
[0097] The comparison circuit 142 receives the voltage signal V output by the sampling and amplifying circuit 141. CS_O , and outputs a corresponding comparison signal to the processing circuit 144. The processing circuit 144 can control the state of the voltage conversion circuit 12 according to the received comparison signal, thereby realizing overcurrent protection for the voltage conversion circuit 12. The following will be described with examples based on possible application scenarios.
[0098] 1. Slow overcurrent protection scenario:
[0099] As shown in Figure 6, I Q1 is the current of the switch tube Q1, and CMP_SOC is the first comparison signal output by the comparator U2. The processing circuit 144 can sample the first comparison signal CMP_SOC of the switch tube Q1 at the midpoint of the pulse signal. If the current I Q1 Greater than the current threshold I SOC_TH When the first comparison signal CMP_SOC is at a high level, the processing circuit 144 can start to count overcurrent. SOC Greater than or equal to the preset time t SOC_DELAY , the processing circuit 144 can determine that the voltage conversion circuit 12 is in an overcurrent state, that is, the processing circuit 144 stops outputting pulse signals to the voltage conversion circuit 12 and enters a hiccup state. SOC Less than the preset time t SOC_DELAY , then reset the timing time.
[0100] For example, during the time period t0-t1, the processing circuit 144 outputs a pulse signal to the switch tube Q1, t m1 The processing circuit 144 can sample the switch tube Q1 at the midpoint between time t0 and time t1. m1 The first comparison signal CMP_SOC at the moment, as shown in FIG6 , the switch tube Q1 at t m1Current I at the moment Q1 Less than the current threshold I SOC_TH , the first comparison signal CMP_SOC is at a low level, and the processing circuit 144 does not perform overcurrent timing. During the time period t0-t1, when the current I Q1 Greater than or equal to the current threshold I SOC_TH , the comparator U2 outputs a high-level first comparison signal CMP_SOC to the processing circuit 144 .
[0101] During the time period t1 - t2 , the processing circuit 144 does not output a pulse signal to the switch tube Q1 , so that the switch tube Q1 stops outputting current.
[0102] The time period t0-t1 and the time period t1-t2 constitute a switching cycle T.
[0103] During the time period t2-t3, the processing circuit 144 outputs a pulse signal to the switch tube Q1. m2 The processing circuit 144 can sample the switch tube Q1 at the midpoint between time t2 and time t3. m2 The first comparison signal CMP_SOC at the moment, as shown in FIG6 , the switch tube Q1 at t m2 Current I at the moment Q1 Greater than or equal to the current threshold I SOC_TH , the processing circuit 144 can sample the high level first comparison signal CMP_SOC, and the processing circuit 144 starts to count the overcurrent. Q1 Greater than or equal to the current threshold I SOC_TH , the comparator U2 outputs a high-level first comparison signal CMP_SOC to the processing circuit 144 .
[0104] During the time period t3 - t4 , the processing circuit 144 does not output a pulse signal to the switch tube Q1 , so that the switch tube Q1 stops outputting current.
[0105] The time period t2-t3 and the time period t3-t4 constitute a switching cycle T.
[0106] During the time period t4-t5, the processing circuit 144 outputs a pulse signal to the switch tube Q1. m3 The processing circuit 144 can sample the switch tube Q1 at the midpoint between time t4 and time t5. m3 Current I at the moment Q1 As shown in Figure 6, the switch tube Q1 is m3 Current I at the moment Q1 Greater than or equal to the current threshold I SOC_TH, the processing circuit 144 can sample the high-level first comparison signal CMP_SOC. At this time, the timing time t SOC Greater than or equal to t SOC_DELAY , the processing circuit 144 can determine that the voltage conversion circuit 12 is in a slow overcurrent state, that is, the processing circuit 144 stops outputting pulse signals to the voltage conversion circuit 12 and enters a hiccup state.
[0107] It can be understood that the current at the midpoint of the pulse signal sampled in this application will not change with the input voltage V in Therefore, this application does not require the input voltage V in Compensation is then performed to achieve accurate output current monitoring.
[0108] In one scenario, as shown in Figure 7, during the time period t6-t7, t m4 The midpoint between t6 and t7, if the current of the switch tube Q1 is triggered to the current threshold I CBC_TH , which will cause the duty cycle of the pulse signal to decrease, and the processing circuit 144 cannot sample the overcurrent information. The processing circuit 144 can determine that the current of the switch tube Q1 is still greater than the current threshold I SOC_TH In another scenario, when the duty cycle of the pulse signal is output with a small pulse width, in order to avoid noise interference, the midpoint of the pulse signal transmission time period needs to be adjusted to after the blanking time.
[0109] Based on the control circuit of the embodiment of the present application, the current midpoint can be used as the overload protection point. The overload protection has high accuracy and can accurately and timely perform overcurrent protection on the power module, thereby improving the safety and stability of the power module.
[0110] 2. Rapid overcurrent protection scenario:
[0111] In some possible scenarios, when the power module is short-circuited, the control circuit may output a pulse signal with a minimum duty cycle. At this time, the pulse signal cannot limit the inductance L b The current rises, in other words, the inductor L b The current will exceed the safe range, thus creating a safety hazard.
[0112] To this end, the control circuit 14 provided in the present application can compare the sampled current with an overcurrent protection threshold (i.e., the current threshold I QOC_TH ) for comparison. The current threshold I CBC_TH is a ratio of the wave-by-wave current limiting threshold I CBC_TH Larger fast overcurrent protection threshold.
[0113] As shown in Figure 8, I Q1is the current of the switch tube Q1, CMP_QOC is the third comparison signal output by the comparator U4. Q1 Greater than or equal to the current threshold I QOC_TH When the comparator U4 outputs the third comparison signal CMP_QOC of high level, the processing circuit 144 may detect that the comparator U4 outputs the third comparison signal CMP_QOC of high level.
[0114] As shown in FIG8 , the processing circuit 144 performs the following operations during the leading edge blanking time t QOC_BLK After the end, the pulse signal output stops, thus entering the hiccup state. This can limit the inductance L b The current continues to rise, protecting the voltage conversion circuit 12 from overcurrent.
[0115] 3. Backflow current protection scenario:
[0116] In some possible scenarios, for example, when the output current of the switch tube Q1 flows backward, the inductor L b The current will reverse. If the inductor L b The reverse current continues to increase, which will cause the circuit to be unable to clamp the voltage when the rectifier tubes (such as switch tubes Q3 and Q4) are turned off.
[0117] For example, in one scenario, when the system's output residual voltage is very high, the duty cycle of the switch tube Q1 starts from 0 and increases slowly. If the duty cycle of the rectifier tube (i.e., the switch tube Q3 and the switch tube Q4) increases slowly, the freewheeling time of the rectifier tube will be too long, which will cause the inductor L to b The current increases in the reverse direction, forming a reverse current. In another scenario, if the input voltage V in When the voltage drops rapidly from high to low, the duty cycle of the switch Q1 expands slowly, and the freewheeling time of the rectifier is longer than that in steady state, resulting in the inductor L b The current is smaller than that in steady state, and even backflow occurs.
[0118] As shown in Figure 9, I Q1 is the current of the switch tube Q1, CMP_NOC is the fourth comparison signal output by the comparator U4. NOC_TH When the processing circuit 144 detects that the comparator U5 outputs the fourth comparison signal CMP_NOC of high level, the processing circuit 144 can detect that the comparator U5 outputs the fourth comparison signal CMP_NOC of high level. NOC_BLK After the end, the processing circuit 144 turns off all the switch tubes Q1-Q4 and enters the hiccup state, thereby reducing the inductance L b , thereby protecting the voltage conversion circuit 12 from overcurrent.
[0119] It can be understood that in another possible scenario, when the input voltage V in Less than the output voltage V out , and when the rectifier tubes (such as switch tubes Q3 and Q4) are turned on, the inductor L b As shown in Figure 10, when the reverse current of the switch tube Q1 is less than the current threshold I NOC_TH When the processing circuit 144 detects that the comparator U5 outputs the high level fourth comparison signal CMP_NOC, the processing circuit 144 needs to stop outputting pulse signals to the switch tubes Q1-Q4. NOC_BLK After the end, the processing circuit 144 turns off all the switch tubes Q1-Q4 and enters the hiccup state, reducing the inductance L b , thereby protecting the voltage conversion circuit 12 from overcurrent.
[0120] 4. Wave-by-wave current limiting protection scenario:
[0121] As shown in Figure 11, I Q1 is the current of the switch tube Q1, CMP_CBC is the second comparison signal output by the comparator U3, LPWM is the pulse signal output by the processing circuit 144 to the switch tube Q1, and HPWM is the pulse signal output by the processing circuit 144 to the switch tube Q2. Q1 Greater than or equal to the current threshold I CBC_TH , during the blanking time t CBC_BLK After the completion of the operation, if the comparator U3 outputs a high-level comparison signal CMP_CBC to the processing circuit 144, the processing circuit 144 will stop outputting pulse signals to all switches Q1 within one switching cycle until the next switching cycle begins. It can be understood that in order to ensure the magnetic balance of the transformer 122, it is necessary to perform pulse matching on the pulse signals output to the switches Q1 and Q2.
[0122] Based on such a design, the present application can realize multiple current protections such as slow overcurrent protection, fast overcurrent protection, backflow current protection and wave-by-wave current limiting protection without adding IC ports. The present application adopts a simpler peripheral circuit to realize more current protection functions.
[0123] Please refer to FIG. 12 , which is a schematic structural diagram of a power module 10 provided in another embodiment of the present application.
[0124] The difference from the power module 10 shown in the embodiment of Figure 4 is that in this embodiment, as shown in Figure 12, the power stage circuit 121 is a full-bridge circuit, that is, the power stage circuit 121 can include switch tubes Q1, Q2, Q6 and Q7.
[0125] The first terminal of the switch Q2 is connected to the first output terminal of the input power supply 30. The second terminal of the switch Q2 is connected to the first terminal of the switch Q1. The second terminal of the switch Q1 is connected to the second output terminal of the input power supply 30 and the reference ground via resistor R1. The third terminal of the switch Q1 is connected to the processing circuit 144. The third terminal of the switch Q2 is also connected to the processing circuit 144. The third terminal of the switch Q2 serves as the control terminal of the switch Q2. The third terminal of the switch Q1 serves as the control terminal of the switch Q1.
[0126] A first terminal of the switch Q7 is connected to the first output terminal of the input power supply 30. A second terminal of the switch Q7 is connected to the first terminal of the switch Q6. The second terminal of the switch Q6 is connected to the second terminal of the switch Q1. A node P2 between the second terminal of the switch Q7 and the first terminal of the switch Q6 is connected to the second terminal of the primary winding 16. A third terminal of the switch Q7 is connected to the processing circuit 144. A third terminal of the switch Q6 is connected to the processing circuit 144. The third terminal of the switch Q7 serves as a control terminal of the switch Q7. The third terminal of the switch Q6 serves as a control terminal of the switch Q6.
[0127] It is understood that an embodiment of the present application further provides a communication device, which may be, but is not limited to, a router or a switch, etc. The communication device may include the power module in the above embodiment, which may supply power to a load in the communication device.
[0128] Referring to FIG. 13 , one embodiment of the present application further provides a router 200. The router 200 may include one or more chips and the power module described in the above embodiments, wherein the power module may be used to power the one or more chips. As an example, the router 200 may include multiple chips 201a, 201b, 201c and a power module 10. The power module 10 may be electrically connected to an input power source. The power module 10 may convert a first voltage inputted by the input power source into a second voltage to power the multiple chips 201a, 201b, 201c. The first voltage may be a 48V DC voltage. The second voltage may be a 12V DC voltage. The power module 10 may convert the 48V DC voltage inputted by the input power source into a 12V DC voltage to power the multiple chips 201a, 201b, 201c.
[0129] It will be appreciated that in another possible application scenario, the router 200 may further include multiple DC conversion circuits 202a, 202b, and 202c. The multiple DC conversion circuits 202a, 202b, and 202c correspond one-to-one to and are electrically connected to the multiple chips 201a, 201b, and 201c. The DC conversion circuit 202a is electrically connected between the output terminal of the power module 10 and the chip 201a. The DC conversion circuit 202b is electrically connected between the output terminal of the power module 10 and the chip 201b. The DC conversion circuit 202c is electrically connected between the output terminal of the power module 10 and the chip 201c. The DC conversion circuit 202a is configured to convert the voltage output by the power module 10 into the voltage required by the chip 201a. The DC conversion circuit 202b is configured to convert the voltage output by the power module 10 into the voltage required by the chip 201b. The DC conversion circuit 202c is configured to convert the voltage output by the power module 10 into the voltage required by the chip 201c.
[0130] Referring to FIG. 14 , one embodiment of the present application further provides a switch 300 . The switch 300 may include one or more chips and the power module described in the above embodiments, wherein the power module may be used to power the one or more chips. As an example, the switch 300 may include multiple chips 301 a, 301 b, 301 c and a power module 10 . The power module 10 may be electrically connected to an input power source. The power module 10 may convert a first voltage inputted by the input power source into a second voltage to power the multiple chips 301 a, 301 b, 301 c. The power module 10 may convert a 48 V DC voltage inputted by the input power source into a 12 V DC voltage to power the multiple chips 301 a, 301 b, 301 c.
[0131] It will be appreciated that in another possible application scenario, the switch 300 may further include multiple DC conversion circuits 302a, 302b, and 302c. The multiple DC conversion circuits 302a, 302b, and 302c correspond one-to-one to and are electrically connected to the multiple chips 301a, 301b, and 301c. The DC conversion circuit 302a is electrically connected between the output end of the power module 10 and the chip 301a. The DC conversion circuit 302b is electrically connected between the output end of the power module 10 and the chip 301b. The DC conversion circuit 302c is electrically connected between the output end of the power module 10 and the chip 301c. The DC conversion circuit 302a is configured to convert the voltage output by the power module 10 into the voltage required by the chip 301a. The DC conversion circuit 302b is configured to convert the voltage output by the power module 10 into the voltage required by the chip 301b. The DC conversion circuit 302c is configured to convert the voltage output by the power module 10 into the voltage required by the chip 301c.
[0132] Those skilled in the art should recognize that the above embodiments are merely intended to illustrate the present application and are not intended to limit the present application. Any appropriate changes and modifications to the above embodiments are within the scope of protection claimed in the present application, as long as they are within the spirit of the present application.
Claims
1. A power module, characterized in that: The power supply module includes a control circuit and a voltage conversion circuit for supplying power to a load, wherein the control circuit is used to control the voltage conversion circuit, and the control circuit includes a sampling and amplifying circuit, a comparison circuit, and a processing circuit; The sampling and amplifying circuit is used to sample the first current output by the voltage conversion circuit, and amplify the first current by a preset coefficient and then output a second current; The comparison circuit is used to compare the second current with a first overcurrent threshold, and to output a first comparison signal when the second current is greater than or equal to the first overcurrent threshold; The processing circuit is used to stop outputting the pulse signal to the voltage conversion circuit when receiving the first comparison signal, so as to perform overcurrent protection on the voltage conversion circuit.
2. The power module according to claim 1, characterized in that: The comparison circuit is further used to compare the second current with a second overcurrent threshold, and to output a second comparison signal when the second current is greater than or equal to the second overcurrent threshold; The processing circuit is used to: output a pulse signal to the voltage conversion circuit in a first time period of one or more switching cycles, and start timing when the second comparison signal is received at the midpoint of the first time period; The processing circuit is also used to stop outputting the pulse signal to the voltage conversion circuit when the timing time reaches a preset time.
3. The power module according to claim 1 or 2, characterized in that: The comparison circuit is used to compare the second current with a third overcurrent threshold, and to output a third comparison signal when the second current is less than the third overcurrent threshold; wherein the third overcurrent threshold is less than the first overcurrent threshold; The processing circuit is further configured to stop outputting the pulse signal to the voltage conversion circuit upon receiving the third comparison signal.
4. The power module according to any one of claims 1 to 3, characterized in that: The comparison circuit is further used for comparing the second current with a fourth overcurrent threshold, and for outputting a fourth comparison signal when the second current is greater than or equal to the fourth overcurrent threshold; The processing circuit is further configured to stop outputting the pulse signal to the voltage conversion circuit within one or more switching cycles when receiving the fourth comparison signal.
5. The power module according to any one of claims 1 to 4, characterized in that: The sampling and amplifying circuit includes an amplifier, a first transistor, a first current source, a second current source and a third current source. The first input terminal of the amplifier is connected to the first output terminal of the voltage conversion circuit through a first resistor, the second input terminal of the amplifier is connected to the second output terminal of the voltage conversion circuit through a second resistor, the first current source is electrically connected to the first resistor and the first input terminal of the amplifier, the output terminal of the amplifier is electrically connected to the first terminal of the first transistor, the second terminal of the first transistor is electrically connected to the second input terminal of the amplifier, the third terminal of the first transistor is electrically connected to the second current source, the third current source is grounded through a third resistor, and the third current source is electrically connected to the ground. A first node between the first resistor and the third resistor is connected to the comparison circuit.
6. The power module according to claim 5, characterized in that: The control circuit also includes a reference voltage generating circuit, which includes a fourth current source, a fifth current source and a first voltage source, wherein a first end of the first voltage source is grounded, a second end of the first voltage source is grounded through a fourth resistor, and a second end of the first voltage source is also connected to a power supply through a fifth resistor, the fourth current source is grounded through a sixth resistor, and both ends of the sixth resistor are respectively connected to both ends of the fifth current source, the current source is used to receive a slope compensation reset signal, and a node between the fourth current source and the sixth resistor is electrically connected to the comparison circuit.
7. An electronic device, characterized in that: The electronic device comprises an input power supply and a power supply module, wherein the input power supply is used to supply power to the power supply module, the power supply module comprises a control circuit and a voltage conversion circuit for supplying power to a load, the control circuit is used to control the voltage conversion circuit, and the control circuit comprises a sampling and amplifying circuit, a comparison circuit and a processing circuit; The sampling and amplifying circuit is used to sample the first current output by the voltage conversion circuit, and amplify the first current by a preset coefficient and then output a second current; The comparison circuit is used to compare the second current with a first overcurrent threshold, and to output a first comparison signal when the second current is greater than or equal to the first overcurrent threshold; The processing circuit is used to stop outputting the pulse signal to the voltage conversion circuit when receiving the first comparison signal, so as to perform overcurrent protection on the voltage conversion circuit.
8. The electronic device according to claim 7, characterized in that: The comparison circuit is further used to compare the second current with a second overcurrent threshold, and to output a second comparison signal when the second current is greater than or equal to the second overcurrent threshold; The processing circuit is used to: output a pulse signal to the voltage conversion circuit in a first time period of one or more switching cycles, and start timing when the second comparison signal is received at the midpoint of the first time period; The processing circuit is also used to stop outputting the pulse signal to the voltage conversion circuit when the timing time reaches a preset time.
9. The electronic device according to claim 7 or 8, characterized in that: The comparison circuit is used to compare the second current with a third overcurrent threshold, and to output a third comparison signal when the second current is less than the third overcurrent threshold; wherein the third overcurrent threshold is less than the first overcurrent threshold; The processing circuit is further configured to stop outputting the pulse signal to the voltage conversion circuit upon receiving the third comparison signal.
10. The electronic device according to any one of claims 7 to 9, characterized in that: The comparison circuit is further used for comparing the second current with a fourth overcurrent threshold, and for outputting a fourth comparison signal when the second current is greater than or equal to the fourth overcurrent threshold; The processing circuit is further configured to stop outputting the pulse signal to the voltage conversion circuit within one or more switching cycles when receiving the fourth comparison signal.
11. The electronic device according to any one of claims 7 to 10, characterized in that: The sampling and amplifying circuit includes an amplifier, a first transistor, a first current source, a second current source and a third current source, wherein the first input terminal of the amplifier is connected to the first output terminal of the voltage conversion circuit through a first resistor, the second input terminal of the amplifier is connected to the second output terminal of the voltage conversion circuit through a second resistor, the first current source is electrically connected to the first resistor and the first input terminal of the amplifier, the output terminal of the amplifier is electrically connected to the first terminal of the first transistor, the second terminal of the first transistor is electrically connected to the second input terminal of the amplifier, the third terminal of the first transistor is electrically connected to the second current source, the third current source is grounded through a third resistor, and a first node between the third current source and the third resistor is connected to the comparison circuit.
12. The electronic device according to claim 11, characterized in that: The control circuit also includes a reference voltage generating circuit, which includes a fourth current source, a fifth current source and a first voltage source, wherein a first end of the first voltage source is grounded, a second end of the first voltage source is grounded through a fourth resistor, and a second end of the first voltage source is also connected to a power supply through a fifth resistor, the fourth current source is grounded through a sixth resistor, and both ends of the sixth resistor are respectively connected to both ends of the fifth current source, the current source is used to receive a slope compensation reset signal, and a node between the fourth current source and the sixth resistor is electrically connected to the comparison circuit.
13. A router, characterized in that: The router comprises the power module according to any one of claims 1 to 6 and one or more chips, wherein the power module is connected to the one or more chips to supply power to the one or more chips.
14. A switch, characterized in that: The switch comprises the power module according to any one of claims 1 to 6 and one or more chips, wherein the power module is connected to the one or more chips to supply power to the one or more chips.