Inspection method and method for manufacturing image pickup element

Abstract

The inspection method comprises the following steps: preparing equipment; the device is provided with a plurality of pixel electrodes (11), a counter electrode (13) disposed facing the plurality of pixel electrodes (11), a photoelectric conversion layer (12) disposed between the plurality of pixel electrodes (11) and the counter electrode (13), a test electrode disposed between two adjacent pixel electrodes (11) among the plurality of pixel electrodes (11) and facing the counter electrode (13) with the photoelectric conversion layer (12) therebetween, and a counter electrode (13). A first electrode pad electrically connected to and exposed to the outside, and a second electrode pad electrically connected to the test electrode and exposed to the outside; and a step in which a voltage is applied between the first electrode pad and the second electrode pad, and a current flowing between the first electrode pad and the second electrode pad is measured.

Description

Technical Field

[0001] The present disclosure relates to an inspection method and a method for manufacturing an imaging element. Background Art

[0002] In recent years, imaging elements in which a photoelectric conversion layer is stacked on top of a CMOS (Complementary Metal Oxide Semiconductor) readout circuit have become known. In such imaging elements, the finish of the photoelectric conversion layer affects the characteristics of the imaging element. Inspecting the finish of the photoelectric conversion layer during the manufacturing process of the imaging element is important because it can avoid assembly and processing of defective products in the process after inspection.

[0003] Patent Document 1 discloses a method of inspecting a photoelectric conversion layer using a test photoelectric conversion unit disposed outside the photoelectric conversion unit.

[0004] Patent Document 2 discloses a method of inspecting a photoelectric conversion layer using a test pattern formed outside an imaging region.

[0005] Prior art literature

[0006] Patent Literature

[0007] Patent Document 1: Japanese Patent No. 4783868

[0008] Patent Document 2: Japanese Patent No. 5806635 Summary of the invention

[0009] Problems to be solved by the invention

[0010] The present disclosure provides an inspection method capable of inspecting a photoelectric conversion layer with high accuracy and suppressing a decrease in the yield rate of an imaging element, and a method for manufacturing an imaging element using the inspection method.

[0011] Means used to solve problems

[0012] An inspection method related to a technical solution of the present disclosure includes: a process of preparing an equipment, wherein the equipment has a plurality of pixel electrodes, an opposing electrode arranged to be opposite to the plurality of pixel electrodes, a photoelectric conversion layer arranged between the plurality of pixel electrodes and the opposing electrode, a test electrode sandwiching the photoelectric conversion layer and opposite to the opposing electrode and arranged between two adjacent pixel electrodes among the plurality of pixel electrodes, a first electrode pad electrically connected to the opposing electrode and exposed to the outside, and a second electrode pad electrically connected to the test electrode and exposed to the outside; and a process of applying a voltage between the first electrode pad and the second electrode pad and measuring a current flowing between the first electrode pad and the second electrode pad.

[0013] A method for manufacturing an imaging element according to a technical solution of the present disclosure includes: a process of manufacturing an apparatus, wherein the apparatus comprises a plurality of pixel electrodes, an opposing electrode arranged opposite to the plurality of pixel electrodes, a photoelectric conversion layer arranged between the plurality of pixel electrodes and the opposing electrode, a test electrode sandwiching the photoelectric conversion layer and opposite to the opposing electrode and arranged between two adjacent pixel electrodes among the plurality of pixel electrodes, a first electrode pad electrically connected to the opposing electrode and exposed to the outside, and a second electrode pad electrically connected to the test electrode and exposed to the outside; and a process of inspecting the apparatus by the inspection method; if the photoelectric conversion layer is judged to be qualified in the inspection, continuing the process of forming the imaging element on the apparatus; if the photoelectric conversion layer is judged to be unqualified in the inspection, not continuing the process of forming the imaging element.

[0014] Effects of the Invention

[0015] According to one aspect of the present disclosure, it is possible to provide an inspection method capable of inspecting a photoelectric conversion layer with high accuracy and suppressing a decrease in the yield rate of an imaging element, and a method for manufacturing an imaging element using the inspection method. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 This is a diagram for explaining the arrangement of the inspection structure in the wafer.

[0017] Figure 2 It is a cross-sectional view showing a wafer according to the embodiment.

[0018] Figure 3 It is a plan view showing an example of a plan layout of a pixel electrode and a shielding electrode according to an embodiment.

[0019] Figure 4 It is a schematic cross-sectional view of a region corresponding to one pixel of a wafer according to an embodiment.

[0020] Figure 5 It is a flowchart of the inspection method related to the implementation method.

[0021] Figure 6 This is a diagram showing an example of the current-voltage characteristics of the photoelectric conversion layer according to the embodiment.

[0022] Figure 7 This is a diagram for explaining the current-voltage characteristics of the voltage range used in the global shutter operation.

[0023] Figure 8 This is a diagram showing another example of the current-voltage characteristics of the photoelectric conversion layer according to the embodiment.

[0024] Fig. 9 It is a schematic diagram showing an exemplary circuit configuration of an imaging element according to an embodiment.

[0025] Fig.10 It is a cross-sectional view showing an exemplary device structure of a pixel according to the embodiment.

[0026] Fig.11 This is a flowchart of a method for manufacturing an imaging element according to an embodiment.

[0027] Fig.12 is a cross-sectional view showing a wafer according to a modified example.

[0028] Fig.13 It is a cross-sectional view showing an exemplary device structure of a pixel related to a modification example. DETAILED DESCRIPTION

[0029] (Process of obtaining a technical solution of the present disclosure)

[0030] In an imaging element in which a photoelectric conversion layer is stacked on top of a CMOS readout circuit, the current-voltage characteristics affected by the finish of the photoelectric conversion layer affect the characteristics of the imaging element. For example, if a defect occurs in the photoelectric conversion layer, current is likely to flow through the photoelectric conversion layer even when no light is irradiated to the photoelectric conversion layer, and dark current increases. Therefore, it is important to detect the finish of the photoelectric conversion layer during the manufacturing process because it can avoid assembly and processing of defective products in the process after inspection.

[0031] On the other hand, in order to measure the current flowing into the photoelectric conversion layer, it is necessary to control the state of light irradiation to the photoelectric conversion layer after applying a bias voltage to the electrode connected to the photoelectric conversion layer to measure the current. However, if a new structure for testing is installed, there is a problem of reducing the yield of the imaging element and reducing the performance.

[0032] Figure 1 This is a diagram for explaining the arrangement of the inspection structure in the wafer.

[0033] Conventionally, a test structure for a process control monitor (PCM) for checking the completion status of a photoelectric conversion layer in a manufacturing process of an imaging element is often arranged at a Figure 1 In the diagram, the gap is represented as a tiny area such as a scribe line area between chips in the wafer or an end of a chip.

[0034] However, in the inspection using such a small area, Figure 1 As shown in part (b), when measuring the dark current and photocurrent generated in the photoelectric conversion layer, the current is too small and the inspection accuracy is low due to the small area of ​​the photoelectric conversion layer. In particular, the dark current is more difficult to measure because it is smaller than the photocurrent.

[0035] Since the dark current and photocurrent generated in the photoelectric conversion layer increase in direct proportion to the area of ​​the photoelectric conversion layer, the inspection accuracy can be improved by increasing the area of ​​the photoelectric conversion layer to be inspected. On the other hand, if the test structure used only for inspection is enlarged, the yield of the imaging element decreases, resulting in an increase in the unit price of the chip. In addition, the test structure configured on the scribe line area is destroyed when the chip is sliced, but if a test structure including the photoelectric conversion layer is set in the scribe line area, there is also the problem of the dicing saw being contaminated by the material used in the photoelectric conversion layer.

[0036] The inventors of the present application have focused on the above-mentioned issues. Figure 1 As shown in part (a) of the invention, the current flowing into the photoelectric conversion layer is measured using the photoelectric conversion unit used for actual imaging. It is found that the yield of the imaging element can be reduced without forming a test structure, the area of ​​the photoelectric conversion layer used for inspection can be increased, and the amount of current measured can be increased, thereby obtaining a technical solution of the present disclosure. The following is a detailed description of a technical solution of the present disclosure.

[0037] (Overview of the present disclosure)

[0038] An outline of one aspect of the present disclosure is as follows.

[0039] An inspection method related to a technical solution of the present disclosure includes: a process of preparing an equipment, wherein the equipment has a plurality of pixel electrodes, an opposing electrode arranged to be opposite to the plurality of pixel electrodes, a photoelectric conversion layer arranged between the plurality of pixel electrodes and the opposing electrode, a test electrode sandwiching the photoelectric conversion layer and opposite to the opposing electrode and arranged between two adjacent pixel electrodes among the plurality of pixel electrodes, a first electrode pad electrically connected to the opposing electrode and exposed to the outside, and a second electrode pad electrically connected to the test electrode and exposed to the outside; and a process of applying a voltage between the first electrode pad and the second electrode pad and measuring a current flowing between the first electrode pad and the second electrode pad.

[0040] Thus, the first electrode pad and the second electrode pad can be used to measure the current flowing into the photoelectric conversion layer between the test electrode and the opposing electrode arranged between the plurality of pixel electrodes. Therefore, the area where the plurality of pixel electrodes are formed can be effectively used to measure the current of the photoelectric conversion layer, so there is no need to increase the chip size compared to the case where a structure for testing is formed separately, and the decrease in the yield of the imaging element can be suppressed. In addition, since the current flows into the photoelectric conversion layer using the test electrode arranged between the plurality of pixel electrodes, it is easy to ensure the area of ​​the photoelectric conversion layer as the inspection object. Thus, the amount of current flowing into the photoelectric conversion layer can be increased to improve the accuracy of the inspection.

[0041] In addition, for example, the device may further include a charge storage unit that stores the charge obtained from the photoelectric conversion layer; the plurality of pixel electrodes may be electrically connected to the charge storage unit, and the test electrode may not be electrically connected to the charge storage unit.

[0042] Furthermore, for example, the test electrode may have the same potential throughout the region where the plurality of pixel electrodes are arranged.

[0043] Thus, the test electrodes can be connected in the region where the plurality of pixel electrodes are arranged, so that the region where the test electrodes are formed can be further reduced, and a decrease in the yield of the imaging element can be further suppressed.

[0044] In addition, for example, the photoelectric conversion layer converts light incident on the photoelectric conversion layer into electric charges; the multiple pixel electrodes capture the electric charges; and the test electrode functions as a shield that suppresses the electric charges from moving between the multiple pixel electrodes when the electric charges are captured by the multiple pixel electrodes.

[0045] This allows the test electrode to be used as a shield electrode.

[0046] In addition, for example, the test electrode may also surround the plurality of pixel electrodes respectively.

[0047] This allows the current flowing through the photoelectric conversion layer around the pixel electrode to be efficiently collected and measured with high sensitivity.

[0048] In addition, for example, the test electrodes may be arranged in a mesh shape in the region where the plurality of pixel electrodes are arranged.

[0049] This makes it possible to measure the current flowing through the entire photoelectric conversion layer in the region where the plurality of pixel electrodes are arranged.

[0050] Furthermore, for example, the inspection method may further include determining whether the photoelectric conversion layer is acceptable based on the current.

[0051] Thus, the quality of the photoelectric conversion layer can be determined based on the current flowing through the photoelectric conversion layer. For example, by using the determination result to determine whether to continue the subsequent manufacturing process, the occurrence of defective products and the increase in the cost of manufacturing defective products can be avoided.

[0052] In addition, for example, in the process of measuring the above-mentioned current, a specified voltage may be applied between the above-mentioned first electrode pad and the above-mentioned second electrode pad; in the process of determining whether the above-mentioned photoelectric conversion layer is qualified or not, when the value of the above-mentioned current flowing between the above-mentioned first electrode pad and the above-mentioned second electrode pad when the above-mentioned specified voltage is applied is greater than the specified current value, the above-mentioned photoelectric conversion layer may be determined to be unqualified; when the value of the above-mentioned current is less than the above-mentioned specified current value, the above-mentioned photoelectric conversion layer may be determined to be qualified.

[0053] This makes it possible to easily determine a defect when a current easily flows in the photoelectric conversion layer, such as when a defect occurs in the photoelectric conversion layer.

[0054] In addition, for example, in the process of measuring the above-mentioned current, the voltage applied between the above-mentioned first electrode pad and the above-mentioned second electrode pad can also be swept to measure the current-voltage characteristic between the above-mentioned first electrode pad and the above-mentioned second electrode pad; in the process of determining whether the above-mentioned photoelectric conversion layer is qualified or not, the qualification of the above-mentioned photoelectric conversion layer can also be determined based on the above-mentioned current-voltage characteristic.

[0055] Thus, the currents corresponding to the plurality of voltages are measured, so that the accuracy of the inspection can be further improved.

[0056] Furthermore, for example, in the step of determining whether the photoelectric conversion layer is good or bad, the quality of the photoelectric conversion layer may be determined based on the slope of the current-voltage characteristic.

[0057] This can be expected to detect changes in current values ​​corresponding to changes in voltage with high sensitivity, and improve the accuracy of inspection.

[0058] In addition, a method for manufacturing an imaging element according to a technical solution of the present disclosure includes: a process of manufacturing an apparatus, wherein the apparatus comprises a plurality of pixel electrodes, an opposing electrode arranged opposite to the plurality of pixel electrodes, a photoelectric conversion layer arranged between the plurality of pixel electrodes and the opposing electrode, a test electrode sandwiching the photoelectric conversion layer and opposite to the opposing electrode and arranged between two adjacent pixel electrodes among the plurality of pixel electrodes, a first electrode pad electrically connected to the opposing electrode and exposed to the outside, and a second electrode pad electrically connected to the test electrode and exposed to the outside; and a process of inspecting the apparatus by the inspection method; if the photoelectric conversion layer is judged to be qualified in the inspection, continuing the process of forming the imaging element on the apparatus; if the photoelectric conversion layer is judged to be unqualified in the inspection, not continuing the process of forming the imaging element on the apparatus.

[0059] Thus, in the manufacturing process of the imaging element, the above inspection method can be used to evaluate the finish of the photoelectric conversion layer and manufacture the imaging element. In addition, the imaging element having the photoelectric conversion layer judged as good can be manufactured, and the occurrence of defective products can be suppressed.

[0060] In addition, a camera device related to a technical solution of the present disclosure comprises: a plurality of pixel electrodes; an opposing electrode, arranged to be opposite to the plurality of pixel electrodes; a photoelectric conversion layer, arranged between the plurality of pixel electrodes and the opposing electrode; a test electrode, sandwiching the photoelectric conversion layer and opposing to the opposing electrode, and arranged between two adjacent pixel electrodes among the plurality of pixel electrodes; a first electrode pad, electrically connected to the opposing electrode; and a second electrode pad, electrically connected to the test electrode.

[0061] Below, while referring to the attached Figure 1 The implementation method will be described.

[0062] In addition, the embodiments described below all represent inclusive or specific examples. The numerical values, shapes, constituent elements, configuration positions and connection forms of constituent elements, processes (steps), and the order of processes (steps) shown in the following embodiments are examples and are not intended to limit the present disclosure. In addition, regarding the constituent elements of the following embodiments that are not recorded in the independent claims, they are set as arbitrary constituent elements for description. In addition, each figure is a schematic diagram and is not necessarily a strict illustration. Therefore, for example, the scales in each figure are not necessarily consistent. In addition, in each figure, the same reference numerals are given to substantially the same structure, and repeated descriptions may be omitted or simplified.

[0063] In the present specification, terms indicating the relationship between elements, terms indicating the shapes of elements, and numerical ranges are not intended to express strict meanings but also include substantially equivalent ranges, for example, expressions with differences of about several percentage points.

[0064] Furthermore, in this specification, the terms "above" and "below" do not refer to the upper direction (vertically above) and the lower direction (vertically below) in absolute spatial recognition, but are used as terms specified by relative positional relationships based on the stacking order in the stacking structure. Specifically, the light-receiving side of the imaging element is set to "above", and the side opposite to the light-receiving side is set to "below". In addition, the terms "above" and "below" are merely used to specify the relative configuration between components, and do not limit the posture of the imaging element when in use. In addition, the terms "above" and "below" can be applied not only to the case where two components are spaced apart from each other and there is another component between the two components, but also to the case where two components are closely arranged and the two components are connected.

[0065] (Implementation Method)

[0066] Hereinafter, a wafer, an inspection method, an imaging element, and a method for manufacturing the imaging element according to the embodiments will be described.

[0067] [Wafer structure]

[0068] First, the overall structure of the wafer 1 according to the present embodiment will be described. Figure 2 1 is a cross-sectional view showing a wafer 1 according to the present embodiment. Figure 2 : shows a cross section of a part of the wafer 1 .

[0069] like Figure 2 As shown, wafer 1 has a CMOS circuit layer 60, a plurality of pixel electrodes 11, a shielding electrode 17, an electrode pad 51, an electrode pad 52, an extraction electrode 55, a photoelectric conversion layer 12, an opposing electrode 13, an electron blocking layer 15, and a hole blocking layer 16. Wafer 1 is an example of a device, and is a wafer on which a plurality of imaging elements are formed. Wafer 1 has a plurality of imaging element regions A1 corresponding to one imaging element, respectively, and a scribe line region A2 which is a region removed by cutting when the imaging element is singulated. The same imaging element structure is formed in the plurality of imaging element regions A1. A plurality of pixel electrodes 11, a shielding electrode 17, an electrode pad 51, an electrode pad 52, an extraction electrode 55, a photoelectric conversion layer 12, an opposing electrode 13, an electron blocking layer 15, and a hole blocking layer 16 are formed in the imaging element region A1, but not in the scribe line region A2.

[0070] The CMOS circuit layer 60 includes a semiconductor substrate 61 and an interlayer insulating layer 62 disposed on the semiconductor substrate 61. Figure 2 Although detailed illustration is omitted, a ROIC (Read Out IC) is formed in the CMOS circuit layer 60. The CMOS circuit layer 60 includes a charge storage unit 41 and a plug 31 that connects the charge storage unit 41 to the pixel electrode 11. The CMOS circuit layer 60 is manufactured, for example, through a BEOL (Back End of Line) and a FEOL (Front End of Line) process.

[0071] The semiconductor substrate 61 is, for example, a substrate made of silicon such as a p-type silicon substrate. The semiconductor substrate 61 is not limited to a substrate whose entirety is a semiconductor. The interlayer insulating layer 62 is formed of an insulating material such as silicon dioxide.

[0072] The plurality of pixel electrodes 11, the photoelectric conversion layer 12, the counter electrode 13, the electron blocking layer 15, and the hole blocking layer 16 constitute a photoelectric conversion unit 20 above the CMOS circuit layer 60. The shielding electrode 17 is disposed between the photoelectric conversion unit 20 and the CMOS circuit layer 60. The photoelectric conversion unit 20 is provided in each of the plurality of imaging element regions A1.

[0073] The plurality of pixel electrodes 11 are film-shaped electrodes formed on the interlayer insulating layer 62. The pixel electrodes 11 capture signal charges generated by the photoelectric conversion layer 12. The pixel electrodes 11 are electrically connected to the charge storage unit 41 via the plug 31. The signal charges captured by the pixel electrodes 11 are accumulated in the charge storage unit 41. The charge storage unit 41 is a portion including a so-called floating diffusion unit (FD).

[0074] The pixel electrode 11 is formed using a conductive material, such as a metal such as aluminum or copper, a metal nitride, or polysilicon that has been given conductivity by doping with impurities.

[0075] The photoelectric conversion layer 12 is located between the pixel electrode 11 and the counter electrode 13. The photoelectric conversion layer 12 is also located between the shielding electrode 17 and the counter electrode 13. The photoelectric conversion layer 12 receives incident light and generates hole-electron pairs as carriers.

[0076] As the photoelectric conversion material constituting the photoelectric conversion layer 12, for example, organic semiconductor materials, semiconductor quantum dots, semiconductor carbon nanotubes, or compound semiconductors such as InGaAs (indium gallium arsenide) can be used. In addition, the photoelectric conversion material can also be a combination of two or more of organic semiconductor materials, semiconductor quantum dots, semiconductor carbon nanotubes, and compound semiconductors, or can also include multiple organic semiconductor materials.

[0077] The photoelectric conversion layer 12 may also have absorptivity, i.e., sensitivity, to the wavelength range of infrared light. In order to absorb the wavelength range of infrared light, the band gap of the photoelectric conversion material becomes narrower, so it is easier to generate dark current by thermal excitation than the photoelectric conversion material that absorbs visible light. Therefore, by measuring the dark current flowing into the photoelectric conversion layer 12, it is possible to easily determine whether the photoelectric conversion layer 12 is qualified or not.

[0078] The counter electrode 13 is arranged to be opposite to the plurality of pixel electrodes 11 and the shielding electrode 17 with the photoelectric conversion layer 12 sandwiched therebetween. The counter electrode 13 is, for example, a film-shaped transparent electrode formed of a transparent conductive material. In addition, the term "transparent" in this specification means that at least a portion of the light in the wavelength range to be detected is transmitted, and it does not necessarily mean that the light is transmitted across the entire wavelength range of visible light and infrared light. In this specification, for convenience, all electromagnetic waves including visible light and infrared light are expressed as "light".

[0079] The counter electrode 13 is formed using a transparent conductive oxide (TCO: Transparent Conducting Oxide) such as ITO, IZO, AZO, FTO, SnO 2 , TiO 2 , or ZnO.

[0080] By controlling the potential of the counter electrode 13 relative to the potential of the pixel electrode 11, the pixel electrode 11 can capture one of the holes and electrons in the hole-electron pairs generated in the photoelectric conversion layer 12 by photoelectric conversion as signal charges. The signal charges captured by the pixel electrode 11 are accumulated in the charge accumulation unit 41 via the plug 31. More specifically, in a bright state, which is a state in which light is incident on the photoelectric conversion layer 12, a photocurrent of an amount corresponding to the amount of light incident on the photoelectric conversion layer 12 and the sensitivity of the photoelectric conversion layer 12 flows through the pixel electrode 11, and in a dark state, which is a state in which light is not incident on the photoelectric conversion layer 12, a dark current flows through the pixel electrode 11. The pixel electrode 11 captures the charge generated by such a current.

[0081] The signal charge accumulated in the charge storage unit 41 is read out by a readout circuit connected to the charge storage unit 41. For example, when holes are used as signal charges, the holes can be selectively captured by the pixel electrode 11 by increasing the potential of the counter electrode 13 compared to the pixel electrode 11. The case where holes are used as signal charges is described below. In addition, electrons can also be used as signal charges. In this case, it is sufficient to make the potential of the counter electrode 13 lower than that of the pixel electrode 11.

[0082] The electron blocking layer 15 has a function of suppressing the injection of electrons from the pixel electrode 11 to the photoelectric conversion layer 12. In addition, the electron blocking layer 15 transports holes, which are signal charges generated by the photoelectric conversion layer 12, to the pixel electrode 11. The upper surface of the electron blocking layer 15 is in contact with the photoelectric conversion layer 12. The lower surface of the electron blocking layer 15 is in contact with the pixel electrode 11 and the shielding electrode 17.

[0083] The hole blocking layer 16 has a function of suppressing the injection of holes from the counter electrode 13 to the photoelectric conversion layer 12. In addition, the hole blocking layer 16 transports electrons, which are charges opposite to the signal charges generated by the photoelectric conversion layer 12, to the counter electrode 13. The upper surface of the hole blocking layer 16 is in contact with the counter electrode 13. The lower surface of the hole blocking layer 16 is in contact with the photoelectric conversion layer 12.

[0084] The material of each of the electron blocking layer 15 and the hole blocking layer 16 is selected from known materials in consideration of, for example, the bonding strength with adjacent layers, the difference in ionization potential, and the difference in electron affinity.

[0085] When electrons are used as signal charges, the wafer 1 may have a structure in which the electron blocking layer 15 is replaced with the hole blocking layer 16. In addition, the wafer 1 may not include at least one of the electron blocking layer 15 and the hole blocking layer 16.

[0086] The photoelectric conversion layer 12, the electron blocking layer 15, and the hole blocking layer 16 are formed by, for example, a coating method based on spin coating or a vacuum deposition method such as vaporizing the material of the layer by heating under vacuum and depositing it on the substrate. The photoelectric conversion layer 12, the electron blocking layer 15, and the hole blocking layer 16 are formed on the CMOS circuit layer 60 in the entire wafer 1, and are patterned as follows: Figure 2 The shape of each imaging element area A1 is shown.

[0087] The shield electrode 17 is disposed opposite to the counter electrode 13 across the photoelectric conversion layer 12. The shield electrode 17 is formed on the interlayer insulating layer 62 and disposed between the plurality of pixel electrodes 11. The shield electrode 17 is an example of a test electrode. The shield electrode 17 overlaps the photoelectric conversion unit 20 in a plan view.

[0088] The shielding electrode 17 is supplied with a voltage from a voltage supply circuit 35 provided in the CMOS circuit layer 60. The shielding electrode 17 is controlled to a predetermined potential, and when the charge is captured by the plurality of pixel electrodes 11, it functions as a shield to suppress the movement of the charge between the plurality of pixel electrodes 11, and can be used to suppress the so-called crosstalk. In addition, the voltage supply circuit 35 may not be provided in the CMOS circuit layer 60, and the shielding electrode 17 may be supplied with a voltage from a voltage supply circuit 35 provided outside. The shielding electrode 17 may not be electrically connected to the charge storage unit 41.

[0089] The shield electrode 17 and the pixel electrode 11 are separated from each other via a part of the interlayer insulating layer 62 . Figure 3 1 is a top view showing an example of a top view layout of the pixel electrode 11 and the shielding electrode 17. Figure 3 Illustrations other than the pixel electrode 11 and the shielding electrode 17 are omitted.

[0090] like Figure 3 As shown, the plurality of pixel electrodes 11 are arranged two-dimensionally in a matrix. The shielding electrode 17 is arranged between adjacent pixel electrodes 11 when viewed from above. The shielding electrode 17 is arranged, for example, in a manner of sandwiching each of the plurality of pixel electrodes 11 when viewed from above. In the present embodiment, the shielding electrode 17 surrounds the plurality of pixel electrodes 11 respectively. The shielding electrode 17 is formed, for example, in batches in an area where the plurality of pixel electrodes 11 are arranged, and has the same potential throughout the area where the plurality of pixel electrodes 11 are arranged. The area where the plurality of pixel electrodes 11 are arranged may also be referred to as an area where the above-mentioned photoelectric conversion unit 20 is arranged when viewed from above, or an imaging surface formed by the pixel array PA described later.

[0091] The shielding electrode 17 is stretched in a mesh shape in a region where a plurality of pixel electrodes 11 are arranged. In other words, the shielding electrode 17 is grid-shaped when viewed from above. A pixel electrode 11 is arranged in each of the plurality of openings formed in the shielding electrode 17. In addition, when viewed from above, the area of ​​the plurality of pixel electrodes 11 is larger than the area of ​​the shielding electrode 17. Thus, the decrease in the sensitivity of the imaging element can be suppressed. In addition, the top view shape of the shielding electrode 17 is not particularly limited as long as it is arranged between adjacent pixel electrodes 11. For example, more than two shielding electrodes 17 may be separately arranged. In the case where more than two shielding electrodes 17 are separately arranged, the two or more shielding electrodes 17 have the same potential, for example, by being connected to wiring. In addition, the two or more shielding electrodes 17 may also be provided with electrode pads 52 connected to the shielding electrodes 17 corresponding to each shielding electrode 17. In addition, when viewed from above, the area of ​​the plurality of pixel electrodes 11 may be the same as the area of ​​the shielding electrode 17 or smaller than the area of ​​the shielding electrode 17.

[0092] The shield electrode 17 is formed of a conductive material. The conductive material is, for example, a metal such as aluminum or copper, a metal nitride, or polysilicon that has been given conductivity by doping with impurities.

[0093] Refer again Figure 2 The structure around the photoelectric conversion part 20 will be described.

[0094] The electrode pad 51 is electrically connected to the counter electrode 13 via the extraction electrode 55 and the wiring in the interlayer insulating layer 62. The electrode pad 51 is formed in the interlayer insulating layer 62, and the upper surface is exposed to the outside of the wafer 1 through the opening formed in the interlayer insulating layer 62. The electrode pad 51 is an example of a first electrode pad.

[0095] The electrode pad 52 is electrically connected to the shield electrode 17 via wiring in the interlayer insulating layer 62. The electrode pad 52 is formed in the interlayer insulating layer 62, and its upper surface is exposed to the outside of the wafer 1 through an opening formed in the interlayer insulating layer 62. The electrode pad 52 is an example of a second electrode pad.

[0096] The electrode pads 51 and 52 are electrodes that contact the probe terminals 201 and 202 for measuring the current flowing into the photoelectric conversion layer 12. The probe terminals 201 and 202 are respectively connected to the measuring device 200. The measuring device 200 applies a voltage between the electrode pads 51 and 52 via the probe terminals 201 and 202, and measures the current flowing between the electrode pads 51 and 52. The measuring device 200 is, for example, an ammeter.

[0097] The electrode pad 51 can also be used as a power supply terminal for supplying a voltage to the counter electrode 13 in the imaging element manufactured from the wafer 1 . The electrode pad 52 can also be used as a power supply terminal for supplying a voltage to the shield electrode 17 in the imaging element manufactured from the wafer 1 .

[0098] The electrode pads 51 and the electrode pads 52 are respectively arranged in the imaging element region A1 and arranged outside the photoelectric conversion part 20 in a plan view. In addition, the electrode pads 51 and the electrode pads 52 are arranged so as to sandwich the photoelectric conversion part 20. In addition, the arrangement of the electrode pads 51 and the electrode pads 52 is not particularly limited as long as they are at positions exposed to the outside of the wafer 1.

[0099] The extraction electrode 55 is an electrode for supplying power to the counter electrode 13. The extraction electrode 55 is provided on the interlayer insulating layer 62. The extraction electrode 55 is arranged in a region outside the region where the plurality of pixel electrodes 11 and the shielding electrode 17 are provided in the interlayer insulating layer 62 when viewed from above. In addition, the extraction electrode 55 does not overlap with the photoelectric conversion layer 12 when viewed from above, but is arranged around the region where the photoelectric conversion layer 12 is provided.

[0100] The wafer 1 described above can be manufactured using a general semiconductor manufacturing process and a film forming process. In particular, when a silicon substrate is used as the semiconductor substrate 61, various silicon semiconductor processes can be used.

[0101] [Inspection method]

[0102] Next, an inspection method using the wafer 1 according to the present embodiment will be described. In the inspection method according to the present embodiment, the finish of the photoelectric conversion layer 12 included in the imaging element is inspected.

[0103] Figure 4 1 is a schematic cross-sectional view of a region corresponding to one pixel in the imaging element region A1 of the wafer 1. Figure 4 As shown, each pixel can be regarded as a three-terminal element having a counter electrode 13 arranged above the photoelectric conversion layer 12, a pixel electrode 11 arranged below the photoelectric conversion layer 12, and a shielding electrode 17. The counter electrode 13 is electrically connected to the electrode pad 51. In addition, the shielding electrode 17 is electrically connected to the electrode pad 52.

[0104] When the image pickup element manufactured from the wafer 1 performs signal reading, a bias voltage is applied between the counter electrode 13 and the pixel electrode 11, and the signal charge generated in the photoelectric conversion layer 12 is captured by the pixel electrode 11, and read out as a signal of each pixel by the readout circuit. On the other hand, since the shielding electrode 17 operates for crosstalk suppression, the signal is not read out from the shielding electrode 17.

[0105] If the pixel electrode 11 has a structure connected to other electrodes such as an electrode pad 51, the capacitance of the charge storage unit 41 connected to the pixel electrode 11 increases, and the sensitivity of the imaging element decreases. Specifically, if the pixel electrode 11 is connected to the electrode pad 51, a parasitic capacitance such as the wiring connection with the electrode pad 51 and the capacitance of the electrode pad 51 itself is added to the charge storage unit 41, which deteriorates the important conversion gain as the readout sensitivity. In addition, since the pixel electrode 11 is intended to read out the signal separately for each pixel, the pixel electrodes 11 of each pixel are electrically separated from each other. Therefore, when measuring the current flowing between one pixel electrode 11 and the opposing electrode 13, since the area of ​​one pixel electrode 11 itself is very small, the amount of current flowing between one pixel electrode 11 and the opposing electrode 13 also becomes very small. On the other hand, the shielding electrode 17 in the wafer 1 of the present embodiment is arranged in the pixel array as a region where a plurality of pixel electrodes 11 are arranged in the imaging element region A1, and is connected to the electrode pad 52. The shielding electrode 17 has the same potential throughout the pixel array. Unlike the pixel electrode 11, the shielding electrode 17 does not read out signals, so even if it is directly connected to the electrode pad 51, it does not affect the sensitivity of the imaging element.

[0106] In the inspection method according to this embodiment, focusing on these points, the completion status of the photoelectric conversion layer 12 provided in each imaging element area A1 is inspected by measuring the current between the electrode pad 51 electrically connected to the counter electrode 13 and the electrode pad 52 electrically connected to the shielding electrode 17.

[0107] Figure 5 This is a flowchart of the inspection method according to the present embodiment.

[0108] like Figure 5 As shown, in the inspection method according to the present embodiment, first, the wafer 1 is prepared for inspection (step S11). For example, the manufactured wafer 1 is placed at an inspection location.

[0109] Next, a voltage is applied between the electrode pads 51 and the electrode pads 52 in each imaging element region A1 of the prepared wafer 1, and the current flowing between the electrode pads 51 and the electrode pads 52 is measured (step S12). For example, the probe terminal 201 is brought into contact with the electrode pad 51, and the probe terminal 202 is brought into contact with the electrode pad 52, and the current is measured using the measuring device 200. In this way, a voltage can be applied between the counter electrode 13 and the shielding electrode 17 via the electrode pads 51 and the electrode pads 52, and the current flowing between the counter electrode 13 and the shielding electrode 17 in the photoelectric conversion layer 12 can be measured. Although the details will be described later, by measuring the current flowing in the photoelectric conversion layer 12, it is confirmed whether it is a current value based on the desired current-voltage characteristics of the photoelectric conversion layer 12, and the completion of the photoelectric conversion layer 12 can be checked.

[0110] The probe terminals 201 and 202 can be considered to correspond to a probe card used in conventional wafer inspection. In addition, the measuring device 200 can be considered to correspond to an ammeter or a voltmeter that is part of a wafer inspection circuit or is used in connection thereto.

[0111] In step S12, the current between the electrode pads 51 and the electrode pads 52 is measured for each of the plurality of imaging element areas A1. The current between the electrode pads 51 and the electrode pads 52 may be measured for each imaging element area A1, or may be measured for two or more imaging element areas A1 using two or more probe terminals 201 and 202.

[0112] Next, based on the current measured in step S12, the quality of the photoelectric conversion layer 12 is determined (step S13). The quality determination is performed, for example, based on the current value when a predetermined voltage is applied between the electrode pad 51 and the electrode pad 52. In addition, the quality determination may also be performed based on the current-voltage characteristics between the electrode pad 51 and the electrode pad 52.

[0113] Here, the voltage applied between the electrode pad 51 and the electrode pad 52 and the determination of whether the photoelectric conversion layer 12 is good or bad are described in detail.

[0114] For example, in the above-mentioned step S12, a predetermined voltage is applied between the electrode pad 51 and the electrode pad 52. And, in step S13, based on the current value flowing between the electrode pad 51 and the electrode pad 52 when the predetermined voltage is applied between the electrode pad 51 and the electrode pad 52, that is, the current value flowing into the photoelectric conversion layer 12, the pass or fail of the photoelectric conversion layer 12 is determined.

[0115] Here, use Figure 6 The voltage applied between the electrode pad 51 and the electrode pad 52 will be described.

[0116] Figure 6 This is a diagram showing an example of the current-voltage characteristics of the photoelectric conversion layer 12 . Figure 6 The horizontal axis shown represents the bias voltage applied to the photoelectric conversion layer 12. Figure 6 The vertical axis shown represents the absolute value of the current flowing in the photoelectric conversion layer 12. Figure 6 It is a single logarithmic curve graph with the vertical axis expressed in logarithms. Figure 6 The solid line indicated as "dark" in FIG. 1 represents the current-voltage characteristic in the dark state when no light is irradiated to the photoelectric conversion layer 12. Figure 6 The dotted line indicated as "bright" in FIG. 1 represents the current-voltage characteristic when the photoelectric conversion layer 12 is irradiated with light of a predetermined intensity. The expression of "dark" and "bright" will be described later. Figure 7 and Figure 8 The same is true in .

[0117] In addition, Figure 6 In the case where the photoelectric conversion layer 12 is regarded as a photodiode, the voltage on the left side of (d) is a reverse bias voltage, and the voltage on the right side of (d) is a forward bias voltage. In addition, in the present embodiment, the voltage at which the potential of the counter electrode 13 is higher than the potential of the pixel electrode 11 or the shielding electrode 17 is a reverse bias voltage. On the other hand, the voltage at which the potential of the counter electrode 13 is lower than the potential of the pixel electrode 11 or the shielding electrode 17 is a forward bias voltage.

[0118] During the photoelectric conversion when acquiring an image, a reverse bias voltage (e.g., about 5 V) is applied to the photoelectric conversion layer 12, for example, at the position indicated by (a). As a result, a photocurrent formed by carriers generated corresponding to the amount of light incident on the photoelectric conversion layer 12 flows, and the signal charge is captured by the pixel electrode 11. In the reverse bias voltage at the position indicated by (a), even if the signal charge is captured by the pixel electrode 11 and the potential of the pixel electrode 11 changes, the voltage applied to the photoelectric conversion layer 12 changes, and the change in photocurrent is small, and the change in sensitivity is suppressed. In addition, in the voltage indicated by (a), the photocurrent value and the dark current value flowing into the photoelectric conversion layer 12 are substantially different. For example, the photocurrent value is more than 10 times the dark current value.

[0119] For example, in checking the Figure 6 In the case of the photoelectric conversion layer 12 having the current-voltage characteristic shown in FIG. Figure 6The current is measured under the voltage state represented by (a) to confirm whether it is the desired current value. For example, the threshold value used to determine whether a qualified product is good or not is determined by the known current-voltage characteristics and the area of ​​the pixel array, and the determination is made using the data obtained from the measuring device 200. That is, when the measured current value is greater than a specified current value, it is determined to be unqualified, and when it is less than a specified current value, it is determined to be a qualified product. In the event that a defect occurs in the photoelectric conversion layer 12, charges are injected from the electrode to the photoelectric conversion layer 12 through a bias voltage, and the current value increases. Therefore, when the measured current value is greater than a specified current value, the photoelectric conversion layer 12 can be regarded as a unqualified product. In this way, it is possible to easily and accurately determine whether the photoelectric conversion layer 12 is good or not.

[0120] As a specific example, the wafer 1 is set to a light-shielded state and the dark current is measured. When the measured dark current value is greater than a specified current value, the photoelectric conversion layer 12 is judged to be unqualified. When it is less than a specified current value, the photoelectric conversion layer 12 is judged to be qualified. In the case of measuring the dark current, compared with the case of measuring the photocurrent which requires light adjustment, no light adjustment is required and stable inspection is possible. In addition, when the signal level is difficult to detect only by dark current measurement, the wafer can be irradiated with adjusted uniform light and the photocurrent can be measured to determine whether it is qualified or not. In addition, both the dark current and the photocurrent can be measured, and the qualification can be determined based on both the photocurrent value and the dark current value.

[0121] In addition, the voltage applied between the electrode pad 51 and the electrode pad 52 is not limited to Figure 6 The voltage shown in (a) may also be applied with other voltages.

[0122] For example, a connection may be applied between the electrode pads 51 and 52. Figure 6 The voltage shown in (b) or (c) is shown in Figure 6 At the voltages shown in (b) and (c), the photocurrent is sufficiently small. Figure 6 The photocurrent values ​​at the voltages indicated by (b) and (c) are given by Figure 6 1 / 10 of the photocurrent value at the voltage represented by (a). Using this characteristic, both the dark current and the photocurrent can be measured, and the pass or fail of the photoelectric conversion layer 12 can be determined based on the difference between the photocurrent value and the dark current value. For example, when the difference between the photocurrent value and the dark current value is greater than a specified value, the photoelectric conversion layer 12 is determined to be unqualified, and when it is less than a specified value, the photoelectric conversion layer 12 is determined to be qualified. Thus, at a voltage where the photocurrent and the dark current do not deviate greatly, it can be determined based on whether the photocurrent and the dark current do not deviate.

[0123] In addition, for example, Figure 6The voltage represented by (d) is applied between the electrode pad 51 and the electrode pad 52. Figure 6 The dark current is lowest near the voltage indicated by (d). Figure 6 The dark current flowing under the voltage shown in (d) shows the lower limit of the dark current value.

[0124] In addition, in Figure 6 Since the photocurrent and the dark current are substantially the same under the voltage range represented by (c) to (e), by applying a voltage in this range between the electrode pad 51 and the electrode pad 52, inspection can be performed without being affected by the presence or absence of light irradiation to the wafer 1.

[0125] In the above voltage, Figure 6 The voltage in the range between (a) and (b) is the voltage applied to the photoelectric conversion layer 12 during the photoelectric conversion when acquiring an image. Therefore, by applying the voltage in this range between the electrode pad 51 and the electrode pad 52, the current is measured while the wafer 1 is shielded from light or the amount of light directed to the wafer 1 is appropriately controlled, and an inspection for actual use can be easily implemented.

[0126] In addition, the voltage applied between the electrode pad 51 and the electrode pad 52 may be a plurality of voltages. For example, in the above-mentioned step S12, the voltage applied between the electrode pad 51 and the electrode pad 52 may be swept, the applied voltage and the current between the probe terminals 201 and 202 may be monitored, and the current-voltage characteristics between the electrode pad 51 and the electrode pad 52 may be measured. In this case, in step S13, the pass or fail of the photoelectric conversion layer 12 is determined based on the measured current-voltage characteristics.

[0127] For example, by Figure 6 The current-voltage characteristics shown represent multiple voltages in the voltage range (e.g., Figure 6 The voltages at the three points (a), (b) and (c) shown in the figure) are applied between the electrode pad 51 and the electrode pad 52 to measure the current-voltage characteristics. And, the pass or fail of the photoelectric conversion layer 12 is determined based on the slope of the measured current-voltage characteristics. For example, when the slope of the measured current-voltage characteristics is not within the prescribed range, the photoelectric conversion layer 12 is determined to be unqualified, and when it is within the prescribed range, the photoelectric conversion layer 12 is determined to be a qualified product. In addition, multiple slopes can also be used. When the difference in size between the multiple slopes is not within the prescribed range, the photoelectric conversion layer 12 is determined to be unqualified, and when it is within the prescribed range, the photoelectric conversion layer 12 is determined to be a qualified product.

[0128] Thus, it is expected that the sensitivity of the measuring device 200 can be compensated, and the rapid change of the current value relative to the change of the voltage can be detected with high sensitivity, etc., so that the accuracy of the inspection can be improved. The prescribed range is set to a range in which the difference from the slope of the known current-voltage characteristic is less than the prescribed range, for example, based on the known current-voltage characteristic of the photoelectric conversion layer 12 measured by a previous test. In addition, the pass or fail of the photoelectric conversion layer 12 can also be determined based on the current value in the measured current-voltage characteristic. For example, in the range of the measured voltage, if the difference between the current value of the known current-voltage characteristic and the current value of the measured current-voltage characteristic is greater than the threshold value, the photoelectric conversion layer 12 is determined to be unqualified. In addition, the slope of the measured current-voltage characteristic and the current value can also be combined to determine whether the photoelectric conversion layer 12 is pass or fail.

[0129] In particular, when the photoelectric conversion layer 12 is irradiated with light, the current changes greatly depending on the applied voltage. Therefore, when the voltage applied between the electrode pad 51 and the electrode pad 52 is swept, the inspection can be performed while the wafer 1 is irradiated with light.

[0130] Here, another example of the voltage applied between the electrode pad 51 and the electrode pad 52 will be described.

[0131] For example, in step S12 , the voltage to be applied between the electrode pad 51 and the electrode pad 52 may be determined based on the voltage range used for the global shutter operation. Figure 7 This is a diagram showing current-voltage characteristics for explaining a voltage range used for a global shutter operation. Figure 7 The horizontal axis shown represents the bias voltage applied to the photoelectric conversion layer 12. Figure 7 The vertical axis shown in FIG. 1 represents the current value flowing into the photoelectric conversion layer 12. Figure 7 In the figure, the current value on the vertical axis is not an absolute value. Figure 7 In the figure, the vertical axis is not a logarithmic axis but a conventional linear axis.

[0132] exist Figure 7The photocurrent characteristics of the photoelectric conversion layer 12 in the example shown in the figure are generally characterized by the first voltage range, the second voltage range, and the third voltage range. The second voltage range is a reverse bias range, which is a region where the absolute value of the output current density increases as the reverse bias voltage increases. The third voltage range is a forward bias range, which is a region where the output current density increases as the forward bias voltage increases. The first voltage range is a voltage range between the second voltage range and the third voltage range. The first voltage range is a voltage range in which, when a voltage is applied to the photoelectric conversion layer 12, the current density flowing into the photoelectric conversion layer 12 is the same in a state where light is incident on the photoelectric conversion layer 12 and in a state where no light is incident, that is, the photocurrent and the dark current are the same. The current density is the same in a state where light is incident on the photoelectric conversion layer 12 and in a state where no light is incident, which means that it is substantially the same. For example, in the first voltage range, the ratio of the absolute value of the current density in a state where light is incident to the absolute value of the current density in a state where no light is incident is greater than 1:10 and less than 10:1. In addition, the state where light is incident may be, for example, 100 mW / cm 2 In addition, the state of light incidence may be, for example, 50 μW / cm2 in consideration of the standard illumination in the room. 2 Above the light exposure.

[0133] In the global shutter operation, a voltage in the second voltage range is applied to the photoelectric conversion layer 12 during the exposure period, and a voltage in the first voltage range is applied to the photoelectric conversion layer 12 during the non-exposure period such as when reading out the signal charge. When the voltage in the first voltage range is applied, since the photoelectric conversion layer 12 has substantially no sensitivity, the signal charge is not accumulated in the reading of each pixel, and the global shutter operation can be performed.

[0134] In step S12, the voltage applied between the electrode pad 51 and the electrode pad 52 may also be Figure 7 A voltage in a voltage range selected from any one of the first voltage range, the second voltage range, and the third voltage range shown in the figure. For example, by applying a voltage in the first voltage range between the electrode pad 51 and the electrode pad 52, the sensitivity during the non-exposure period in which the signal is read can be checked. In addition, the voltage applied between the electrode pad 51 and the electrode pad 52 can also be selected from one or more points in each of the first voltage range, the second voltage range, and the third voltage range.

[0135] In addition, the photoelectric conversion layer 12 may also have Figure 6 and Figure 7 The current-voltage characteristics shown in are different from the current-voltage characteristics. Figure 8 This is a diagram showing another example of the current-voltage characteristics of the photoelectric conversion layer 12 . Figure 8For example, this is the current-voltage characteristic that can be achieved when semiconductor quantum dots are used as photoelectric conversion materials. Figure 6 same, Figure 8 The horizontal axis shown represents the bias voltage applied to the photoelectric conversion layer 12. Figure 8 The vertical axis shown represents the absolute value of the current flowing through the photoelectric conversion layer 12. Figure 8 It is a single logarithmic curve graph with the vertical axis expressed in logarithms.

[0136] exist Figure 8 In the current-voltage characteristics shown, the difference between the photocurrent and the dark current is more significant, and there is essentially no voltage range in which the photocurrent value and the dark current value are equal. Therefore, a predetermined voltage may be applied between the electrode pad 51 and the electrode pad 52 to measure both the photocurrent value and the dark current value. Thus, the accuracy of the inspection can be improved. In addition, only the dark current value may be measured to shorten the inspection time.

[0137] In addition, use Figures 6 to 8 The current-voltage characteristics of the photoelectric conversion layer 12 are described, but in Figures 6 to 8 The current-voltage characteristics shown in may be characteristics of the entire photoelectric conversion unit 20 .

[0138] In addition, in step S12, when measuring one of the photocurrent and the dark current, which one to measure can also be determined based on the sensitivity wavelength of the photoelectric conversion layer 12. In particular, the longer the sensitivity wavelength of the photoelectric conversion layer 12 is, the easier it is for the dark current to become larger. This is because, since the band gap of the material of the photoelectric conversion layer 12 itself is a narrow band, carriers are generated in the photoelectric conversion layer 12 by thermal excitation and become dark current. Therefore, in the case where the photoelectric conversion layer 12 is sensitive to wavelengths from near infrared to short-wave infrared, the dark current can also be measured. On the other hand, in the case where the photoelectric conversion layer 12 is sensitive only to wavelengths below visible light, the photocurrent can also be measured.

[0139] As described above, the inspection method according to the present embodiment includes: a step of preparing the wafer 1; and a step of applying a voltage between the electrode pads 51 and the electrode pads 52 of the wafer 1, and measuring the current flowing between the electrode pads 51 and the electrode pads 52. As a result, the electrode pads 51 are electrically connected to the counter electrode 13, and the electrode pads 52 are electrically connected to the shielding electrode 17, so that the current flowing in the photoelectric conversion layer 12 between the counter electrode 13 and the shielding electrode 17 can be measured, and the completion of the photoelectric conversion layer 12 can be inspected.

[0140] In this embodiment, the inspection of the finish of the photoelectric conversion layer 12 is performed on a scale for the purpose of, for example, distinguishing deviations within the surface of the wafer 1 and qualified and unqualified products in each imaging element area A1 of the wafer 1. On the other hand, the deviation of each pixel in the same imaging element area A1 can be detected by image reading inspection or the like. In addition, if there is local white damage and excessive dark current for each pixel, it can be corrected by image processing depending on the scale, so it can be considered that the necessity of inspection during the manufacturing process is low.

[0141] In the film formation of the photoelectric conversion layer 12 on the surface of the wafer 1, when the film is formed by a film forming method such as spin coating, uneven film thickness and uneven coating, cracks, etc. may occur. By measuring the current flowing into the photoelectric conversion layer 12 by the inspection method related to this embodiment, it is possible to determine whether the photoelectric conversion layer 12 is qualified based on these defects. In addition, not only during film formation, but also after the photoelectric conversion part 20 is formed on the entire surface of the wafer 1, a layout that follows the shape of the area where the plurality of pixel electrodes 11 are formed and an opening process of the electrode pad portion occur. The inspection method related to this embodiment can also detect the failure of the photoelectric conversion layer 12 due to the influence of damage to the photoelectric conversion layer 12 caused by these.

[0142] By finding out the defective photoelectric conversion layer 12 in the early stage of the manufacturing process, it is possible to perform slicing in the subsequent manufacturing process of the imaging element and remove the defective products before packaging, so that the increase in packaging assembly cost and packaging cost can be suppressed. In addition, the increase in the cost of the camera module process of the packaged imaging element can also be suppressed.

[0143] In addition, inspection can also be performed by outputting an image in the state of irradiating light or shielding the wafer 1. However, it is necessary to construct an inspection program for outputting images and connect a complex inspection sequence of probe cards, and signal accumulation is required for imaging, resulting in problems such as increased inspection time. Therefore, as in the inspection method related to the present embodiment, the method of connecting the electrode pads 51 and 52 to the probe terminals 201 and 202 for inspection to measure the current between the electrode pads 51 and the electrode pads 52 is very simple, for example, there is no need to change the probe card required for inspection, nor is there any need to add a new structure for inspection. Therefore, the effect is greater in that this can be implemented for any variety and model.

[0144] In addition, in the inspection method according to the present embodiment, it is possible to measure the current flowing into the photoelectric conversion layer 12 between the shielding electrode 17 and the counter electrode 13 disposed between the plurality of pixel electrodes 11. Therefore, compared with the case where a test pattern including the photoelectric conversion layer 12 is formed separately from the photoelectric conversion part 20 on the wafer 1 for inspection, it is not necessary to provide an area for inspection on the wafer 1, so that the yield of the imaging element can be improved. Furthermore, since the photoelectric conversion layer 12 in the area used for imaging can be directly inspected over a large area, the inspection accuracy can be improved.

[0145] [Structure of the image pickup element]

[0146] Next, the structure of the image sensor 100 manufactured from the wafer 1 will be described. In the following description of the image sensor 100, the description of the points common to the wafer 1 will be omitted or simplified.

[0147] Fig. 9 1 is a schematic diagram showing an exemplary circuit configuration of the image sensor 100 according to the present embodiment. Fig. 9 The image sensor 100 shown has a pixel array PA including a plurality of pixels 10 arranged two-dimensionally. The pixel array PA forms an image pickup surface of the image sensor 100, for example. Fig. 9 The example in which the pixels 10 are arranged in a matrix of 2 rows and 2 columns is schematically shown. The number and arrangement of the pixels 10 on the imaging element 100 are not limited to Fig. 9 Example shown.

[0148] Each pixel 10 includes a photoelectric conversion unit 20 , a signal detection circuit 22 , a reset transistor 28 , a charge storage unit 41 , and a shield electrode 17 .

[0149] The photoelectric conversion unit 20 includes a pixel electrode 11, a photoelectric conversion layer 12, a counter electrode 13, an electron blocking layer 15, and a hole blocking layer 16 provided in the imaging element region A1 in the wafer 1. The photoelectric conversion unit 20 receives incident light and generates signal charges. The photoelectric conversion unit 20 does not need to be an independent element for each pixel 10 as a whole, and a portion of the photoelectric conversion unit 20, for example, may span a plurality of pixels 10.

[0150] The signal detection circuit 22 is a circuit for detecting the signal charge generated by the photoelectric conversion unit 20. In this example, the signal detection circuit 22 includes a signal detection transistor 24 and an address transistor 26. The signal detection transistor 24 and the address transistor 26 are, for example, field effect transistors (FETs). Here, an N-channel MOSFET (Metal Oxide Semiconductor Field Effect Transistor) is exemplified as the signal detection transistor 24 and the address transistor 26. Each transistor such as the signal detection transistor 24 and the address transistor 26 and the reset transistor 28 described later has a control terminal, an input terminal, and an output terminal. The control terminal is, for example, a gate. The input terminal is one of the drain and the source, for example, the drain. The output terminal is the other of the drain and the source, for example, the source.

[0151] As in Fig. 9 As schematically shown in FIG. 1 , the control terminal of the signal detection transistor 24 is electrically connected to the photoelectric conversion unit 20. The signal charge generated by the photoelectric conversion unit 20 is accumulated in the charge accumulation unit 41. The charge accumulation unit 41 is extended to include the region between the gate of the signal detection transistor 24 and the photoelectric conversion unit 20. The signal charge is positive or negative charge, such as a hole or an electron.

[0152] The image sensor 100 includes a peripheral circuit directly or indirectly connected to the photoelectric conversion unit 20. The peripheral circuit drives the pixel array PA, for example, and acquires an image based on the signal charge generated by the photoelectric conversion unit 20. The peripheral circuit includes, for example, a voltage supply circuit 32, a voltage supply circuit 35, a reset voltage source 34, a vertical scanning circuit 36, a column signal processing circuit 37, a horizontal signal readout circuit 38, and a pixel drive signal generation circuit 39. Each circuit in the peripheral circuit may be entirely provided in the CMOS circuit layer 60, or at least one circuit may be provided outside the CMOS circuit layer 60. For example, the voltage supply circuit 32 and the voltage supply circuit 35 are provided on, for example, a printed circuit board or a power supply board outside the CMOS circuit layer 60, respectively. In this case, the electrode pad 51 and the electrode pad 52 function as a terminal connected to the voltage supply circuit 32 and the voltage supply circuit 35 provided on the printed circuit board or the power supply board outside the CMOS circuit layer 60.

[0153] The photoelectric conversion unit 20 of each pixel 10 is connected to the sensitivity control line 42. Fig. 9 In the illustrated configuration, the sensitivity control line 42 is connected to the voltage supply circuit 32. The voltage supply circuit 32 supplies a voltage to the counter electrode 13 of the photoelectric conversion unit 20.

[0154] In addition, Fig. 9In the illustrated structure, the shielding electrode 17 is connected to the sensitivity control line 45. The sensitivity control line 45 is connected to the voltage supply circuit 35. The voltage supply circuit 35 supplies a voltage to the shielding electrode 17. The shielding electrode 17 and the pixel electrode 11 are electrically separated.

[0155] The voltage supply circuit 32 and the voltage supply circuit 35 are not limited to specific power supply circuits, and may be a circuit that generates a predetermined voltage or a circuit that converts a voltage supplied from another power supply into a predetermined voltage.

[0156] Each pixel 10 is connected to a power line 40 that supplies a power supply voltage VDD. As shown in the figure, the input terminal of the signal detection transistor 24 is connected to the power line 40. The signal detection transistor 24 amplifies and outputs the signal charge generated by the photoelectric conversion unit 20 by the power line 40 functioning as a source follower power supply. Specifically, a voltage corresponding to the amount of signal charge accumulated in the charge accumulation unit 41 is applied to the control terminal of the signal detection transistor 24. The signal detection transistor 24 amplifies the voltage.

[0157] The output terminal of the signal detection transistor 24 is connected to the input terminal of the address transistor 26. The output terminal of the address transistor 26 is connected to one of the plurality of vertical signal lines 47 arranged for each column of the pixel array PA. The control terminal of the address transistor 26 is connected to the address control line 46, and by controlling the potential of the address control line 46, the output of the signal detection transistor 24 can be selectively read out to the corresponding vertical signal line 47. Specifically, the voltage amplified by the signal detection transistor 24 is selectively read out as a pixel signal via the address transistor 26 as a signal voltage.

[0158] In the example shown in the figure, the address control line 46 is connected to the vertical scanning circuit 36. The vertical scanning circuit 36 ​​is also called a "row scanning circuit". The vertical scanning circuit 36 ​​selects a plurality of pixels 10 arranged in each row in units of rows by applying a predetermined voltage to the address control line 46. Thus, the signal of the selected pixel 10 is read out and the potential of the charge storage unit 41 is reset.

[0159] Furthermore, a pixel drive signal generating circuit 39 is connected to the vertical scanning circuit 36. In the example shown in the figure, the pixel drive signal generating circuit 39 generates a signal for driving the pixels 10 arranged in each row of the pixel array PA, and supplies the generated pixel drive signal to the pixels 10 of the row selected by the vertical scanning circuit 36.

[0160] The vertical signal line 47 is a main signal line that transmits the pixel signal from the pixel array PA to the peripheral circuit. The column signal processing circuit 37 is connected to the vertical signal line 47. The column signal processing circuit 37 is also called a "row signal storage circuit". The column signal processing circuit 37 performs noise suppression signal processing represented by correlated double sampling and analog-to-digital conversion (AD conversion), etc. As shown in the figure, the column signal processing circuit 37 is provided corresponding to each column of the pixel 10 in the pixel array PA. The horizontal signal readout circuit 38 is connected to these column signal processing circuits 37. The horizontal signal readout circuit 38 is also called a "column scanning circuit". The horizontal signal readout circuit 38 reads the signals from the plurality of column signal processing circuits 37 sequentially to the horizontal common signal line 49.

[0161] The imaging element 100 can be driven in a global shutter mode or a rolling shutter mode. When driven in a global shutter mode, the voltage supply circuit 32 applies a voltage such as a bias voltage in the second voltage range to the counter electrode 13 during the exposure period, and applies a voltage such as a bias voltage in the first voltage range to the counter electrode 13 during the non-exposure period. Signals are read out for each pixel row during the non-exposure period.

[0162] exist Fig. 9 In the illustrated structure, the pixel 10 has a reset transistor 28. The reset transistor 28 can be a field effect transistor, for example, like the signal detection transistor 24 and the address transistor 26. Below, unless otherwise specifically denied, an example in which an N-channel MOSFET is applied as the reset transistor 28 is described. As shown in the figure, the reset transistor 28 is connected between a reset voltage line 44 that supplies a reset voltage Vr and a charge accumulation unit 41. The control terminal of the reset transistor 28 is connected to a reset control line 48, and by controlling the potential of the reset control line 48, the potential of the pixel electrode 11 and the charge accumulation unit 41 can be reset to the reset voltage Vr. In this example, the reset control line 48 is connected to a vertical scanning circuit 36. Therefore, by applying a predetermined voltage to the reset control line 48 through the vertical scanning circuit 36, a plurality of pixels 10 arranged in each row can be reset in row units.

[0163] In this example, a reset voltage line 44 for supplying a reset voltage Vr to the reset transistor 28 is connected to the reset voltage source 34. The reset voltage source 34 is also referred to as a "reset voltage supply circuit". The reset voltage source 34 only needs to have a structure capable of supplying a predetermined reset voltage Vr to the reset voltage line 44 when the imaging element 100 is in operation, and is not limited to a specific power supply circuit as in the above-mentioned voltage supply circuit 32. The voltage supply circuit 32, the voltage supply circuit 35, and the reset voltage source 34 may each be a part of a single voltage supply circuit or an independent separate voltage supply circuit. In addition, at least one of the voltage supply circuit 32, the voltage supply circuit 35, and the reset voltage source 34 may also be a part of the vertical scanning circuit 36. Alternatively, the sensitivity control voltage from the voltage supply circuit 32, the sensitivity control voltage from the voltage supply circuit 35, and / or the reset voltage Vr from the reset voltage source 34 may be supplied to each pixel 10 via the vertical scanning circuit 36.

[0164] In addition, the image sensor 100 may include a circuit used in a known image sensor other than those described above.

[0165] Next, the device structure of the pixel 10 of the image sensor 100 will be described. Fig.10 2 is a cross-sectional view showing an exemplary device structure of the pixel 10 according to the present embodiment.

[0166] like Fig.10 As shown, the pixel 10 includes a CMOS circuit layer 60, a photoelectric conversion unit 20 located above the CMOS circuit layer 60, a sealing layer 21 located above the photoelectric conversion unit 20, a shielding electrode 17, and a charge storage unit 41. The pixel 10 may further include a filter and a microlens above the sealing layer 21. Light enters the pixel 10 from above the sealing layer 21.

[0167] The photoelectric conversion unit 20 includes a pixel electrode 11 electrically connected to the charge storage unit 41, an opposing electrode 13 located above the pixel electrode 11 and arranged opposite to the pixel electrode 11, a photoelectric conversion layer 12 located between the pixel electrode 11 and the opposing electrode 13, an electron blocking layer 15 located between the pixel electrode 11 and the photoelectric conversion layer 12, and a hole blocking layer 16 located between the opposing electrode 13 and the photoelectric conversion layer 12. Fig.10 In the example shown, the counter electrode 13 , the photoelectric conversion layer 12 , the electron blocking layer 15 , and the hole blocking layer 16 are formed over a plurality of pixels 10 .

[0168] exist Fig.10 Except for a part of the figure, the CMOS circuit layer 60 of each pixel 10 is provided with, for example, Fig. 9The signal detection circuit 22 and various transistors such as the reset transistor 28 described above, wiring of signal lines, control lines, power lines, and the charge storage unit 41, etc. In addition, a plug 31 for connecting the charge storage unit 41 and the pixel electrode 11 is provided in the interlayer insulating layer 62 of the CMOS circuit layer 60. The plug 31 is formed using a conductive material.

[0169] In addition, Fig.10 , the signal detection circuit 22 and the reset transistor 28, as well as the control lines and signal lines connected thereto are schematically shown. The gate of the reset transistor 28 is connected to the reset control line en_rst of each row. In addition, the signal detection circuit 22 outputs a pixel signal to the vertical signal line Vsig of each column. The reset control line en_rst corresponds to Fig. 9 The reset control line 48 in the vertical signal line Vsig corresponds to Fig. 9 The vertical signal line 47 in the pixel array PA is, for example, an array of n rows×m columns. Fig.10 FIG. 1 shows a pixel 10 in the i-th row and the j-th column in the pixel array PA. Therefore, the reset control line en_rst Indicates the reset control line en_rst of the i-th row, the vertical signal line Vsig <j>Represents the vertical signal line Vsig of the j-th column.

[0170] The pixel electrode 11 is an electrode for collecting signal charges generated by the photoelectric conversion layer 12. At least one pixel electrode 11 exists for each pixel 10. The signal charges collected by the pixel electrode 11 are accumulated in the charge accumulation unit 41 via the plug 31. The voltage corresponding to the signal charges accumulated in the charge accumulation unit 41 is read by the signal detection circuit 22.

[0171] The photoelectric conversion layer 12 is located between the pixel electrode 11 and the counter electrode 13. The photoelectric conversion layer 12 is also located between the shielding electrode 17 and the counter electrode 13.

[0172] The counter electrode 13 is disposed on the side on which light is incident in the photoelectric conversion layer 12 . Therefore, light that has passed through the counter electrode 13 is incident on the photoelectric conversion layer 12 .

[0173] A voltage is applied to the counter electrode 13 from the voltage supply circuit 32. By adjusting the voltage applied to the counter electrode 13 by the voltage supply circuit 32, a bias voltage which is a potential difference between the counter electrode 13 and the pixel electrode 11 can be set and maintained at a desired value.

[0174] In addition, the counter electrode 13 is formed, for example, across a plurality of pixels 10. Therefore, a voltage of a desired magnitude can be applied between the plurality of pixels 10 from the voltage supply circuit 32. By changing the voltage applied to the counter electrode 13, the sensitivity of the photoelectric conversion unit 20 can be adjusted. In addition, as long as a voltage of a desired magnitude can be applied from the voltage supply circuit 32, the counter electrode 13 can also be provided separately for each pixel 10. Similarly, the photoelectric conversion layer 12, the electron blocking layer 15, and the hole blocking layer 16 can also be formed across a plurality of pixels 10, or can be provided separately for each pixel 10.

[0175] The voltage applied to the photoelectric conversion layer 12 is the difference between the potential Vito of the counter electrode 13 and the potential Vfd of the charge storage unit 41. The potential Vfd of the charge storage unit 41 varies according to the amount of signal charge stored according to the amount of light incident on the photoelectric conversion layer 12.

[0176] The shielding electrode 17 is disposed opposite to the counter electrode 13 with the photoelectric conversion layer 12 interposed therebetween. The shielding electrode 17 is located below the photoelectric conversion unit 20. The shielding electrode 17 is in contact with the lower surface of the photoelectric conversion unit 20. Fig.10 Although not shown, as described above, the shielding electrode 17 is connected to the sensitivity control line 45, and a voltage is applied from the voltage supply circuit 35 via the sensitivity control line 45. In addition, a part of the interlayer insulating layer 62 may be arranged between the shielding electrode 17 and the photoelectric conversion part 20. That is, the shielding electrode 17 and the photoelectric conversion part 20 may not be in contact.

[0177] The shield electrode 17 is formed of a conductive material. The conductive material is, for example, a metal such as aluminum or copper, a metal nitride, or polysilicon that has been given conductivity by doping with impurities.

[0178] The voltage applied to the shielding electrode 17 can be used to suppress the movement of signal charges between pixels 10, so-called crosstalk. Therefore, color mixing can be suppressed even if the photoelectric conversion layer 12 is not physically separated. The voltage applied to the shielding electrode 17 is set to a potential higher than that of the pixel electrode 11, for example. For example, a voltage higher than the reset voltage Vr is applied to the shielding electrode 17. As a result, when viewed from above, holes easily move to the pixel electrode 11 surrounded by the shielding electrode 17, and it is possible to suppress holes from crossing the shielding electrode 17 and moving to the pixel electrode 11 of the adjacent pixel 10.

[0179] In addition, the voltage applied to the shielding electrode 17 may be set to have a lower potential than the pixel electrode 11. For example, a voltage lower than the reset voltage Vr is applied to the shielding electrode 17. Thus, when viewed from above, holes that are about to cross the shielding electrode 17 and move to the pixel electrode 11 of the adjacent pixel 10 are captured by the shielding electrode 17, and the holes that cross the shielding electrode 17 and move to the pixel electrode 11 of the adjacent pixel 10 can be suppressed.

[0180] Furthermore, the imaging element 100 may not include the sensitivity control line 45 and the voltage supply circuit 35, and the shield electrode 17 may be connected to the ground potential of the imaging element 100. This can also suppress crosstalk.

[0181] [Method for manufacturing imaging element]

[0182] Next, a method for manufacturing the image sensor 100 according to the present embodiment will be described. Fig.11 This is a flowchart of a method for manufacturing the image sensor 100 according to the present embodiment.

[0183] like Fig.11 As shown, in the manufacturing method of the imaging element 100, first, a wafer 1 is manufactured (step S21). For example, a general semiconductor manufacturing process and a film forming process can be used to manufacture the imaging element 100. Figure 2 Wafer 1 is shown.

[0184] Next, the manufactured wafer 1 is inspected (step S22 ). In step S22 , for example, the inspection is performed by the inspection method described in steps S11 and S12 .

[0185] Next, the inspection result of step S22 is compared with the determination standard (step S23). Specifically, the inspection result based on step S22 is compared with the determination standard to determine whether the photoelectric conversion layer 12 is acceptable. In step S23, the same method as the above-mentioned step S13 is performed.

[0186] Next, in step S23, the subsequent manufacturing process (step S24) is continued for the imaging element area A1 including the photoelectric conversion layer 12 determined to be qualified. That is, in step S23, the subsequent manufacturing process is continued when the photoelectric conversion layer 12 is determined to be qualified. As the subsequent manufacturing process, for example, the wafer 1 is sliced ​​to be divided into chips for each imaging element area A1, and the connection and packaging with an external substrate etc. on which the corresponding chips and peripheral circuits are formed in the imaging element area A1 are performed. Thus, the imaging element 100 is manufactured. In step S24, for example, the imaging element 100 is manufactured using the chip corresponding to the imaging element area A1 including the photoelectric conversion layer 12 determined to be qualified. On the other hand, for example, the chip corresponding to the imaging element area A1 including the photoelectric conversion layer 12 determined to be unqualified is removed, and the imaging element 100 using the chip is not manufactured.

[0187] In addition, other inspections other than the inspection of the photoelectric conversion layer 12 in step S22 may be performed on the wafer 1. In this case, the results of the other inspections may be compared with the judgment standard, and the subsequent manufacturing process may be continued for the imaging element area A1 including the photoelectric conversion layer 12 judged to be qualified in the results of the other inspections.

[0188] The above-described method for manufacturing the imaging element 100 can remove chips including the photoelectric conversion layer 12 determined to be defective to manufacture the imaging element 100, thereby preventing the imaging element 100 that will become a defective product from being manufactured to the final step, thereby suppressing an increase in cost.

[0189] [Modifications]

[0190] In addition, the structure of the wafer 1 and the imaging element 100 is not limited to the above-mentioned example, and may have a known structure of a stacked image sensor. Hereinafter, a wafer 1a having a photoelectric conversion layer 12a formed of a compound semiconductor such as InGaAs and an imaging element manufactured from the wafer 1a will be described. In the following description of the modified example, the description of the common points with the embodiment will be omitted or simplified.

[0191] Fig.12 1 is a cross-sectional view showing a wafer 1 a according to the present modification. Fig.13 1 is a cross-sectional view showing an exemplary device structure of a pixel 10a according to this modification. Fig.12 In the figure, as a part of wafer 1a, Figure 2 The area corresponding to the imaging element area A1 shown in FIG. Fig.12 and Fig.13 Detailed structures in the CMOS circuit layer are omitted in the figure. The wafer 1a is different from the wafer 1 of the embodiment mainly in that the photoelectric conversion unit 20 is replaced with a photoelectric conversion unit 20a. The imaging element manufactured from the wafer 1a has a pixel 10 instead of the pixel 10 of the imaging element 100 of the embodiment. Fig.13 The structure of the pixel 10a is shown.

[0192] The wafer 1a includes a CMOS circuit layer 60, an insulating layer 63, an insulating layer 64, a plurality of pixel electrodes 11, a shielding electrode 17, an electrode pad 51, an electrode pad 52, an extraction electrode 55, a photoelectric conversion layer 12a, an opposing electrode 13, a carrier transfer layer 18, a carrier transfer layer 19, an impurity diffusion region 9, and an impurity diffusion region 9a. Fig.12 In FIG. 1 , only the pixel electrode 11 and the shielding electrode 17 corresponding to one pixel 10 a in the pixel array are shown.

[0193] The insulating layer 63 and the insulating layer 64 are sequentially stacked on the CMOS circuit layer 60. The insulating layer 63 and the interlayer insulating layer 62 of the CMOS circuit layer 60 are bonded by hybrid bonding including metal-metal bonding and dielectric-dielectric bonding.

[0194] A plurality of pixel electrodes 11, a photoelectric conversion layer 12a, a counter electrode 13, a carrier transfer layer 18, a carrier transfer layer 19, and an impurity diffusion region 9 constitute a photoelectric conversion portion 20a above a CMOS circuit layer 60. A portion of an insulating layer 63 is located between the photoelectric conversion portion 20a and the CMOS circuit layer 60. A shielding electrode 17 and an impurity diffusion region 9a are disposed between the photoelectric conversion portion 20a and the CMOS circuit layer 60.

[0195] The photoelectric conversion layer 12 a is made of, for example, a compound semiconductor such as n-type InGaAs.

[0196] The impurity diffusion region 9 is arranged between the pixel electrode 11 and the photoelectric conversion layer 12a, and is in contact with the pixel electrode 11 and the photoelectric conversion layer 12a. The impurity diffusion region 9a is arranged between the shielding electrode 17 and the photoelectric conversion layer 12a, and is in contact with the shielding electrode 17 and the photoelectric conversion layer 12a. The impurity diffusion region 9 and the impurity diffusion region 9a are p-type impurity diffusion regions doped with p-type impurities such as Zn, for example, and have the function of capturing signal charges. The signal charges generated in the photoelectric conversion layer 12a by photoelectric conversion or the like are concentrated in the impurity diffusion region 9 and the impurity diffusion region 9a by diffusion caused by the bias voltage between the counter electrode 13 and the pixel electrode 11 and the concentration difference of the signal charges. The signal charges concentrated in the impurity diffusion region 9 are captured by the pixel electrode 11, and are accumulated in the charge accumulation unit 41 via the plugs 31a and the plugs 31. The signal charges concentrated in the impurity diffusion region 9a are captured by the shielding electrode 17.

[0197] The carrier transfer layer 18 transfers holes as signal charges generated by the photoelectric conversion layer 12a to the pixel electrode 11, and suppresses the injection of electrons from the pixel electrode 11 to the photoelectric conversion layer 12a. In addition, the carrier transfer layer 19 transfers electrons as charges opposite to the signal charges generated by the photoelectric conversion layer 12a to the counter electrode 13, and suppresses the injection of holes from the counter electrode 13 to the photoelectric conversion layer 12a. The carrier transfer layer 18 and the carrier transfer layer 19 are each composed of, for example, n-type InP.

[0198] The photoelectric conversion layer 12a made of n-type InGaAs is grown on another InP substrate, for example. The carrier transfer layers 18 and 19 also function as buffer layers for growing the n-type InGaAs layer with low defects while making the lattice constant uniform when forming the photoelectric conversion layer 12a.

[0199] The plug 31a is provided at the lower end of the insulating layer 63 to connect the pixel electrode 11 to the plug 31. The interface between the plug 31a and the plug 31 forms, for example, metal-metal bonding. When the plug 31a and the plug 31 are made of copper (Cu), the interface between the plug 31a and the plug 31 forms Cu-Cu bonding.

[0200] The plug 31d is provided at the lower end of the insulating layer 63, and connects the shield electrode 17 to the plug 31c provided in the interlayer insulating layer 62. The interface between the plug 31d and the plug 31c forms a metal-metal bond such as Cu-Cu bonding. The shield electrode 17 is electrically connected to the electrode pad 52 via the plug 31d and the plug 31c.

[0201] The extraction electrode 55a is provided on the lower end of the insulating layer 63 and is in contact with the counter electrode 13 and the extraction electrode 55. The interface between the extraction electrode 55a and the extraction electrode 55 forms a metal-metal bond such as Cu-Cu bonding. The counter electrode 13 is electrically connected to the electrode pad 51 via the extraction electrode 55a and the extraction electrode 55.

[0202] The electrode pads 51 and the electrode pads 52 are formed on the CMOS circuit layer 60. The insulating layers 63 and 64 are provided with openings for exposing the electrode pads 51 and the electrode pads 52. In addition, the electrode pads 51 only need to be electrically connected to the counter electrode 13, and may be formed on or in the insulating layer 63, or on or in the insulating layer 64. Similarly, the electrode pads 52 only need to be electrically connected to the counter electrode 13, and may be formed on or in the insulating layer 63, or on or in the insulating layer 64.

[0203] In wafer 1a, as in wafer 1 of the embodiment, a voltage can be applied between electrode pad 51 and electrode pad 52 using probe terminal 201 and probe terminal 202, and a current flowing between electrode pad 51 and electrode pad 52 can be measured. Figure 5 The inspection method described above can inspect the completion of the photoelectric conversion layer 12a of the wafer 1a. Fig.11 The manufacturing method described above can manufacture an image pickup element from the wafer 1 a .

[0204] (Other embodiments)

[0205] As mentioned above, although the wafer, the inspection method, the imaging element, and the manufacturing method of the imaging element which concern on this disclosure were demonstrated based on embodiment, this disclosure is not limited to these embodiment.

[0206] For example, in the inspection method of the above-mentioned embodiment, a voltage is applied between the electrode pad 51 and the electrode pad 52 of the wafer 1 or 1a, and the current flowing between the electrode pad 51 and the electrode pad 52 is measured, but it is not limited to this. The inspection method of the present disclosure can also be performed on a device in which the wafer 1 or 1a is monolithic. In addition, the inspection method of the present disclosure can also be performed on an imaging element incorporated in a camera system or a sensor system. In this case, the imaging element is an example of a device. In this way, in addition to the completed device, the "device" of the present disclosure also includes intermediate components in various states produced in the middle of the manufacturing process.

[0207] In addition, for example, in the inspection method of the above-mentioned embodiment, the pass or fail of the photoelectric conversion layer 12 is determined, but the present invention is not limited thereto. In the inspection method of the present disclosure, the pass or fail of the photoelectric conversion layer 12 may not be determined. In the inspection method of the present disclosure, for example, the current measured in step S12 may be recorded.

[0208] Furthermore, the wafer and the imaging element according to the present disclosure may not include all of the components described in the above embodiments, and may be configured only by components for performing intended operations.

[0209] Furthermore, the overall or specific technical solutions of the present disclosure may be implemented as an inspection device that performs the inspection method of the above-mentioned related embodiments, and may also be implemented as a manufacturing device that performs the manufacturing method of the imaging element of the above-mentioned related embodiments.

[0210] In addition, as long as they do not depart from the gist of the present disclosure, various forms obtained by applying various modifications that can be conceived by those skilled in the art to the implementation methods and examples, as well as other forms constructed by combining some of the constituent elements in the implementation methods and examples are also included in the scope of the present disclosure.

[0211] Industrial Applicability

[0212] The inspection method and the method for manufacturing an imaging element disclosed herein can be used in imaging elements applied to various camera systems and sensor systems such as for mobile phones, medical use, monitoring use, vehicle use, measurement including distance measurement, use for drones, and use for robots.

[0213] Description of symbols

[0214] 1. 1a wafer

[0215] 9.9a Impurity diffusion region

[0216] 10, 10a pixels

[0217] 11 pixel electrodes

[0218] 12. 12a Photoelectric conversion layer

[0219] 13 Counter electrode

[0220] 15 Electron blocking layer

[0221] 16 Hole blocking layer

[0222] 17 Shielding electrode

[0223] 18, 19 Carrier transfer layer

[0224] 20, 20a Photoelectric conversion unit

[0225] 21 Sealing layer

[0226] 22 Signal detection circuit

[0227] 24 Signal detection transistor

[0228] 26 Address transistors

[0229] 28 Reset transistor

[0230] 31, 31a, 31c, 31d plug

[0231] 32, 35 Voltage supply circuit

[0232] 34 Reset voltage source

[0233] 36 Vertical scanning circuit

[0234] 37 columns signal processing circuit

[0235] 38 Horizontal signal readout circuit

[0236] 39 Pixel drive signal generation circuit

[0237] 40 Power cord

[0238] 41 Charge storage unit

[0239] 42, 45 Sensitivity control line

[0240] 44 Reset voltage line

[0241] 46 address control lines

[0242] 47 vertical signal line

[0243] 48 Reset control line

[0244] 49 Horizontal common signal line

[0245] 51, 52 electrode pad

[0246] 55, 55a lead-out electrode

[0247] 60CMOS circuit layer

[0248] 61 Semiconductor substrate

[0249] 62 interlayer insulation layer

[0250] 63, 64 Insulation layer

[0251] 100 Camera Components

[0252] 200 Measuring device

[0253] 201, 202 probe terminals

[0254] A1 Camera component area

[0255] A2 Strike-through area

[0256] PA Pixel Array< / j>

Claims

1. An inspection method, characterized in that: include: A step of preparing a device, the device comprising a plurality of pixel electrodes, an opposing electrode disposed opposite to the plurality of pixel electrodes, a photoelectric conversion layer disposed between the plurality of pixel electrodes and the opposing electrode, a test electrode disposed between two adjacent pixel electrodes of the plurality of pixel electrodes, the test electrode being opposed to the opposing electrode with the photoelectric conversion layer interposed therebetween, a first electrode pad electrically connected to the opposing electrode and exposed to the outside, and a second electrode pad electrically connected to the test electrode and exposed to the outside; and A step of applying a voltage between the first electrode pad and the second electrode pad and measuring a current flowing between the first electrode pad and the second electrode pad.

2. The inspection method according to claim 1, characterized in that: The device further comprises a charge storage unit for storing the charge obtained from the photoelectric conversion layer; The plurality of pixel electrodes are electrically connected to the charge storage unit, and the test electrode is not electrically connected to the charge storage unit.

3. The inspection method according to claim 1, characterized in that: The test electrode has the same potential throughout the region where the plurality of pixel electrodes are arranged.

4. The inspection method according to claim 3, characterized in that: The photoelectric conversion layer converts light incident on the photoelectric conversion layer into electric charges; The plurality of pixel electrodes capture the charges; The test electrode functions as a shield for suppressing the charge from moving between the plurality of pixel electrodes when the charge is trapped by the plurality of pixel electrodes.

5. The inspection method according to claim 1, characterized in that: The test electrode surrounds the plurality of pixel electrodes respectively.

6. The inspection method according to claim 5, characterized in that: The test electrodes are arranged in a mesh shape in a region where the plurality of pixel electrodes are arranged.

7. The inspection method according to any one of claims 1 to 6, characterized in that: The method further includes determining whether the photoelectric conversion layer is qualified based on the current.

8. The inspection method according to claim 7, characterized in that: In the step of measuring the current, a predetermined voltage is applied between the first electrode pad and the second electrode pad; In the step of judging whether the photoelectric conversion layer is acceptable or not, When the value of the current flowing between the first electrode pad and the second electrode pad when the predetermined voltage is applied is equal to or greater than a predetermined current value, the photoelectric conversion layer is determined to be defective; When the value of the current is smaller than the predetermined current value, it is determined that the photoelectric conversion layer is acceptable.

9. The inspection method according to claim 7, characterized in that: In the step of measuring the current, the voltage applied between the first electrode pad and the second electrode pad is swept to measure the current-voltage characteristic between the first electrode pad and the second electrode pad; In the step of judging whether the photoelectric conversion layer is good or bad, the photoelectric conversion layer is judged to be good or bad based on the current-voltage characteristic.

10. The inspection method according to claim 9, characterized in that: In the step of determining whether the photoelectric conversion layer is good or bad, the photoelectric conversion layer is determined to be good or bad based on the slope of the current-voltage characteristic.

11. A method for manufacturing an imaging element, characterized in that: include: A process of manufacturing an apparatus comprising a plurality of pixel electrodes, an opposing electrode disposed opposite to the plurality of pixel electrodes, a photoelectric conversion layer disposed between the plurality of pixel electrodes and the opposing electrode, a test electrode disposed between two adjacent pixel electrodes of the plurality of pixel electrodes, the test electrode being opposed to the opposing electrode with the photoelectric conversion layer interposed therebetween, a first electrode pad electrically connected to the opposing electrode and exposed to the outside, and a second electrode pad electrically connected to the test electrode and exposed to the outside; and The step of inspecting the above-mentioned equipment by the inspection method according to claim 7; If the photoelectric conversion layer is determined to be acceptable in the inspection, a step of forming an imaging element on the device is continued; If the photoelectric conversion layer is determined to be defective in the inspection, the step of forming the imaging element is not continued.

12. A camera device, characterized in that: have: a plurality of pixel electrodes; an opposing electrode, arranged to be opposed to the plurality of pixel electrodes; A photoelectric conversion layer is arranged between the plurality of pixel electrodes and the counter electrode; a test electrode, which is opposite to the counter electrode with the photoelectric conversion layer sandwiched therebetween and is arranged between two adjacent pixel electrodes among the plurality of pixel electrodes; a first electrode pad electrically connected to the counter electrode; and The second electrode pad is electrically connected to the test electrode.

Images