Chip appearance detection method and system, computer and storage medium
By identifying the number of grains in the image data on the back of the wafer and comparing abnormal parameters, the problem of detection distortion in the prior art is solved, and more accurate detection results and higher detection efficiency are achieved.
Patent Information
- Application Number
- CN202411889487.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-20
- Publication Date
- 2025-02-25
- Estimated Expiration
- 2044-12-20
AI Technical Summary
In the prior art, there is distortion in the appearance detection of the chip, resulting in distortion of the detection result and leakage positioning, affecting the detection efficiency.
By obtaining image data on the back of the wafer, the number of grains is identified and compared according to the standard values. If the number of grains is less than the standard value, it is considered that there is a dummy blur; if it is greater than or equal to the standard value, perform abnormal parameters comparison and divert the abnormal data to different network disk paths to avoid detection distortion.
It effectively avoids the problems of low chip source yield and HOLD abnormal products caused by abnormal back-checking documents, reduces the time to deal with abnormal chip sources, and reduces production costs.
Smart Images

Figure CN119510308A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of chip appearance detection, and in particular to a chip appearance detection method, system, computer and storage medium. Background Art
[0002] In the field of LED chip manufacturing, some products need to be inspected on the back side. The current inspection method is to use an iron ring to inspect the back side after the chip is split and before the film is turned over. Because the chip is attached to the iron ring during the inspection and the mother-child ring expansion is not used, it is affected by the process flow of patch and cutting and splitting, and there are abnormal chip sources such as blue film wrinkles.
[0003] In the existing technology, the principle of appearance inspection is to use a camera to capture images and then process and calculate the images. If there are wrinkles in the blue film, the image will be out of focus and blurred, which will further cause distortion of the inspection results and missed positioning, resulting in a large number of abnormal HOLD products in subsequent processes. Subsequently, engineering personnel will need to conduct secondary judgment and processing on the abnormal HOLD wafers, affecting the inspection efficiency. Summary of the invention
[0004] In view of the deficiencies in the prior art, the purpose of the present invention is to provide a chip appearance detection method, system, computer and storage medium, aiming to solve the technical problem in the prior art that image detection is distorted and affects the detection efficiency.
[0005] In order to achieve the above object, in a first aspect, the present invention provides: a chip appearance detection method, comprising the following steps:
[0006] Acquire image data of the back side of the wafer, perform back side appearance inspection based on the back side image data, obtain back side inspection data of the wafer, and upload a yield report corresponding to the wafer to the first network disk path;
[0007] Obtaining the number of grains corresponding to the wafer according to the image data, and determining whether the number of grains is greater than a standard value;
[0008] If the number of the grains is greater than or equal to the standard value, comparing various abnormal parameters of the grains based on the back inspection data;
[0009] If each of the abnormal parameters is less than a preset value, the back-check data is diverted to the second network disk path;
[0010] When performing front appearance inspection on the wafer, determining whether there is back inspection data corresponding to the wafer in the second network disk path;
[0011] If the back inspection data is not present in the second network disk path, performing a front appearance inspection on the wafer based on the first inspection parameter to obtain front inspection data;
[0012] The positive inspection data and the photoelectric test data are combined and sent out.
[0013] According to one aspect of the above technical solution, after the step of determining whether the number of grains is less than the standard value, the method further includes:
[0014] If the number of the chips is less than the standard value, the back-check data is diverted to the third network disk path.
[0015] According to one aspect of the above technical solution, after the step of comparing various abnormal parameters of the die based on the back inspection data, the method further includes:
[0016] If each of the abnormal parameters is greater than a preset value, the back-check data is uploaded to a third network disk path.
[0017] According to one aspect of the above technical solution, the method further includes:
[0018] After completing the back surface appearance inspection of the wafer, determining whether the wafer has the yield report in the first network disk path, or whether the wafer has back surface inspection data in the second network disk path or the second network disk path;
[0019] If the yield report is not included in the first network disk path, and the back-check data is not included in the second network disk path and the third network disk path, it is determined that the wafer has failed to leave the station.
[0020] According to one aspect of the above technical solution, after the step of determining whether there is back inspection data corresponding to the wafer in the second network disk path, the method further includes:
[0021] If the back inspection data exists in the second network disk path, performing a front appearance inspection on the wafer based on the second inspection parameter to obtain front inspection data;
[0022] The back inspection data is retrieved based on the second network disk path, and the positive inspection data, the back inspection data and the photoelectric test data are combined and sent out.
[0023] In a second aspect, the present invention provides a chip appearance detection system, comprising:
[0024] A backside inspection module, used to obtain image data of the backside of the wafer, to perform backside appearance inspection based on the backside image data, to obtain backside inspection data of the wafer, and to upload a yield report corresponding to the wafer to the first network disk path;
[0025] A first judgment module, used for obtaining the number of grains corresponding to the wafer according to the image data, and judging whether the number of grains is greater than a standard value;
[0026] An abnormality comparison module, used for comparing various abnormal parameters of the grains based on the back-check data if the number of the grains is greater than or equal to the standard value;
[0027] A first shunting module, configured to shunt the backcheck data to a second network disk path if each of the abnormal parameters is less than a preset value;
[0028] A front inspection module, used to determine whether there is back inspection data corresponding to the wafer in the second network disk path when performing front appearance inspection on the wafer;
[0029] A path detection module, configured to perform a front appearance inspection on the wafer based on a first detection parameter to obtain front inspection data if the back inspection data is not present in the second network disk path;
[0030] The first combining module is used to combine the positive inspection data and the photoelectric test data for output.
[0031] According to one aspect of the above technical solution, the system further includes:
[0032] The second diversion module is used to upload the back-check data to a third network disk path if each of the abnormal parameters is greater than a preset value.
[0033] According to one aspect of the above technical solution, the system further includes:
[0034] The third diversion module is used to upload the back-check data to a third network disk path if each of the abnormal parameters is greater than a preset value.
[0035] According to one aspect of the above technical solution, the system further includes:
[0036] The outbound module is used to determine whether the yield report of the wafer exists in the first network disk path, or whether the back inspection data exists in the second network disk path or the second network disk path after completing the back appearance inspection of the wafer;
[0037] If the yield report is not included in the first network disk path, and the back-check data is not included in the second network disk path and the third network disk path, it is determined that the wafer has failed to leave the station.
[0038] According to one aspect of the above technical solution, the system further includes:
[0039] A second file closing module is used to perform a front appearance inspection on the wafer based on a second inspection parameter to obtain front inspection data if the back inspection data exists in the second network disk path;
[0040] The back inspection data is retrieved based on the second network disk path, and the positive inspection data, the back inspection data and the photoelectric test data are combined and sent out.
[0041] In a third aspect, the present invention provides a computer comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements the chip appearance detection method as described in the above technical solution when executing the computer program.
[0042] In a fourth aspect, the present invention provides a storage medium having a computer program stored thereon, characterized in that when the program is executed by a processor, the chip appearance detection method as described in the above technical solution is implemented.
[0043] Compared with the prior art, the beneficial effects of the present invention are as follows: after completing the back appearance inspection of the wafer, the number of grains is identified based on the image data, and the standard value is compared with the number of grains. If the number of grains is less than the standard value, it means that the data is out of focus and blurred, and there is a problem with the image data. If the number of grains is greater than or equal to the standard value, a secondary screening is performed based on specific abnormal parameters to divert the back inspection documents with detection problems to the third network disk path. When the subsequent files are merged and shipped out, the diversion and merging operations are performed according to the different network disk paths of the back inspection data of the wafer. Since the film sources with abnormal back documents are not involved in the merging, the low film source yield caused by abnormal back inspection documents and the problem of holding a large number of abnormal products can be avoided, the time for processing abnormal film sources is reduced, and the production cost is reduced. BRIEF DESCRIPTION OF THE DRAWINGS
[0044] Figure 1 This is a flow chart of a chip appearance detection method in a first embodiment of the present invention;
[0045] Figure 2 It is a structural block diagram of a chip appearance detection system in a second embodiment of the present invention;
[0046] Figure 3 is a schematic diagram of the hardware structure of a computer in a third embodiment of the present invention;
[0047] The following specific implementation manner will further illustrate the present invention in conjunction with the above-mentioned drawings. DETAILED DESCRIPTION
[0048] In order to facilitate the understanding of the present invention, the present invention will be described more fully below with reference to the relevant drawings. Several embodiments of the present invention are given in the drawings. However, the present invention can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the present invention more thorough and comprehensive.
[0049] It should be noted that when an element is referred to as being "fixed to" another element, it may be directly on the other element or there may be a central element. When an element is considered to be "connected to" another element, it may be directly connected to the other element or there may be a central element at the same time. The terms "vertical", "horizontal", "left", "right" and similar expressions used herein are for illustrative purposes only.
[0050] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art of the present invention. The terms used herein in the specification of the present invention are only for the purpose of describing specific embodiments and are not intended to limit the present invention. The term "and / or" used herein includes any and all combinations of one or more related listed items.
[0051] See also Figure 1 , which is a flow chart of a chip appearance detection method in a first embodiment of the present invention. Figure 1 As shown, the method comprises the following steps:
[0052] Step S100, acquiring image data of the back side of the wafer, performing back side appearance inspection based on the back side image data, obtaining back side inspection data of the wafer, and uploading a yield report corresponding to the wafer to the first network disk path.
[0053] It is easy to understand that the traditional inspection method includes the following steps: after the film source undergoes back-side appearance inspection, the yield report file is thrown into the designated network disk path A, and the back inspection document is thrown into the designated network disk path B. When leaving the station, check whether there is a corresponding file in the corresponding network disk path. After confirming that the film source operation is completed, it will leave the station and flow to the subsequent process.
[0054] Step S200, obtaining the number of grains corresponding to the wafer according to the image data, and determining whether the number of grains is greater than a standard value.
[0055] Specifically, the standard value is adjusted according to the specifications of the wafer. Taking the detection accuracy into consideration, the standard value is slightly lower than the total number of wafers corresponding to the complete wafer.
[0056] Step S300, if the number of grains is greater than or equal to the standard value, compare the various abnormal parameters of the grains based on the back-check data. It can be understood that if the number of grains is greater than or equal to the standard value, it means that the previous process of the wafer meets the standard and there is no problem of blue film wrinkles, and if the number of grains is less than the standard value, it means that the wafer has blue film wrinkles, resulting in a problem of image defocus; the above abnormal parameters are for each single abnormality detection caused by blue film wrinkles and defocus, and the number of each single abnormality is compared with the abnormal threshold set in the recipe. If it exceeds the set value, it means that there is a problem of image defocus.
[0057] Specifically, after the step of determining whether the number of grains is less than the standard value, the method further includes:
[0058] If the number of the dies is less than the standard value, the back inspection data is diverted to the third network disk path. The third network disk path is used to store the wafer data with abnormal blue film wrinkles, that is, abnormal back inspection data.
[0059] Step S400: If each of the abnormal parameters is less than a preset value, the back inspection data is shunted to a second network disk path. The second network disk path is used to store wafer back inspection data whose number of grains is greater than the standard value and whose abnormal parameters are less than the preset value, that is, wafer back inspection data whose data yield is not affected by blue film wrinkles.
[0060] Specifically, after the step of comparing various abnormal parameters of the die based on the back inspection data, the method further includes:
[0061] If each of the abnormal parameters is greater than a preset value, the back-check data is uploaded to a third network disk path.
[0062] Preferably, in this embodiment, after completing the back surface appearance inspection of the wafer, it is determined whether the wafer has the yield report in the first network disk path, or whether the second network disk path or the second network disk path has back inspection data;
[0063] If the yield report is not available in the first network disk path, and the back-check data is not available in the second network disk path and the third network disk path, it is determined that the wafer has failed to leave the station. By judging whether there is a yield report in the first network disk path, or whether there is back-check data in the second network disk path and the third network disk path, it is determined whether the wafer has completed the corresponding inspection operation.
[0064] Step S500, when performing front appearance inspection on the wafer, determine whether there is back inspection data corresponding to the wafer in the second network disk path. Before performing front appearance inspection on the wafer, determine whether the back inspection data of the wafer is abnormal due to the problem of blue film wrinkles based on the search of the second network disk path, and perform a diversion test on this.
[0065] Step S600: If the back inspection data is not present in the second network disk path, a front appearance inspection is performed on the wafer based on the first inspection parameter to obtain front inspection data.
[0066] Step S700, combining the positive inspection data and the optoelectronic test data for export.
[0067] Further, in this embodiment, after the step of determining whether there is back inspection data corresponding to the wafer in the second network disk path, the method further includes:
[0068] If the back inspection data exists in the second network disk path, performing a front appearance inspection on the wafer based on the second inspection parameter to obtain front inspection data;
[0069] The back inspection data is retrieved based on the second network disk path, and the positive inspection data, the back inspection data and the photoelectric test data are combined and sent out. If the back inspection data exists in the second network disk path, it means that the data does not have the problem of blue film wrinkles, and the data can be combined normally, which reduces the detection distortion caused by blue film wrinkles and causes the product yield to decrease; at the same time, it reduces the production of HOLD abnormal products in subsequent processes and improves production efficiency.
[0070] In summary, the chip appearance inspection method in the above-mentioned embodiment of the present invention, after completing the back side appearance inspection of the wafer, identifies the number of grains based on the image data, and compares the standard value with the number of grains. If the number of grains is less than the standard value, it means that the data is out of focus and blurred, and there is a problem with the image data. If the number of grains is greater than or equal to the standard value, a secondary screening is performed according to specific abnormal parameters to divert the back inspection documents with detection problems to the third network disk path. When the subsequent files are merged and shipped out, the diversion and merging operations are performed according to the different network disk paths of the back inspection data of the wafer. Since the film sources with abnormal back side documents are not involved in the merging, the low film source yield caused by abnormal back inspection documents and the problem of holding a large number of abnormal products can be avoided, the time for processing abnormal film sources is reduced, and the production cost is reduced.
[0071] Please refer to Figure 2 The second embodiment of the present invention provides a chip appearance inspection system, including: a back detection module 100, a first judgment module 200, an abnormality comparison module 300, a first diversion module 400, a front detection module 500, a path detection module 600 and a first file combination module 700;
[0072] The backside inspection module 100 is used to obtain image data of the backside of the wafer, to perform backside appearance inspection based on the backside image data, to obtain backside inspection data of the wafer, and to upload a yield report corresponding to the wafer to the first network disk path;
[0073] The first judgment module 200 is used to obtain the number of grains corresponding to the wafer according to the image data, and judge whether the number of grains is greater than a standard value;
[0074] The abnormality comparison module 300 is used to compare various abnormal parameters of the die based on the back-check data if the number of the die is greater than or equal to the standard value;
[0075] The first diversion module 400 is used to divert the back-check data to the second network disk path if each of the abnormal parameters is less than a preset value;
[0076] The front inspection module 500 is used to determine whether there is back inspection data corresponding to the wafer in the second network disk path when performing front appearance inspection on the wafer;
[0077] The path detection module 600 is used to perform a front appearance inspection on the wafer based on the first inspection parameter to obtain front inspection data if the back inspection data is not present in the second network disk path;
[0078] The first combining module 700 is used to combine the positive inspection data and the photoelectric test data for output.
[0079] Preferably, in this embodiment, the system further includes:
[0080] The second diversion module is used to upload the back-check data to a third network disk path if each of the abnormal parameters is greater than a preset value.
[0081] Preferably, in this embodiment, the system further includes:
[0082] The third diversion module is used to upload the back-check data to a third network disk path if each of the abnormal parameters is greater than a preset value.
[0083] Preferably, in this embodiment, the system further includes:
[0084] The outbound module is used to determine whether the yield report of the wafer exists in the first network disk path, or whether the back inspection data exists in the second network disk path or the second network disk path after completing the back appearance inspection of the wafer;
[0085] If the yield report is not included in the first network disk path, and the back-check data is not included in the second network disk path and the third network disk path, it is determined that the wafer has failed to leave the station.
[0086] Preferably, in this embodiment, the system further includes:
[0087] A second file closing module is used to perform a front appearance inspection on the wafer based on a second inspection parameter to obtain front inspection data if the back inspection data exists in the second network disk path;
[0088] The back inspection data is retrieved based on the second network disk path, and the positive inspection data, the back inspection data and the photoelectric test data are combined and sent out.
[0089] It should be noted that each module can be a functional module or a program module, and can be implemented by software or hardware. For modules implemented by hardware, each module can be located in the same processor; or each module can be located in different processors in any combination.
[0090] Embodiment 3
[0091] A third embodiment of the present application provides a computer, which may include a processor 81 and a memory 82 storing computer program commands.
[0092] Specifically, the processor 81 may include a central processing unit (CPU), or an application specific integrated circuit (ASIC), or may be configured to implement one or more integrated circuits of the embodiments of the present application.
[0093] Among them, the memory 82 may include a large-capacity memory for data or commands. By way of example and not limitation, the memory 82 may include a hard disk drive (HDD), a floppy disk drive, a solid-state drive (SSD), a flash memory, an optical disk, a magneto-optical disk, a magnetic tape, or a universal serial bus (USB) drive, or a combination of two or more of these. Where appropriate, the memory 82 may include a removable or non-removable (or fixed) medium. Where appropriate, the memory 82 may be inside or outside a data processing device. In a specific embodiment, the memory 82 is a non-volatile memory. In a specific embodiment, the memory 82 includes a read-only memory (ROM) and a random access memory (RAM). Where appropriate, the ROM may be a mask-programmed ROM, a programmable ROM (Programmable Read-Only Memory, PROM for short), an erasable PROM (Erasable ProgrammableRead-Only Memory, EPROM for short), an electrically erasable PROM (Electrically Erasable ProgrammableRead-Only Memory, EEPROM for short), an electrically alterable ROM (Electrically Alterable Read-Only Memory, EAROM for short) or a flash memory (FLASH) or a combination of two or more of these. Under appropriate circumstances, the RAM can be a static random access memory (SRAM) or a dynamic random access memory (DRAM), wherein the DRAM can be a fast page mode dynamic random access memory (FPMDRAM), an extended data output dynamic random access memory (EDODRAM), a synchronous dynamic random access memory (SDRAM), etc.
[0094] The memory 82 may be used to store or cache various data files required for processing and / or communication, as well as possible computer program commands executed by the processor 81 .
[0095] The processor 81 reads and executes the computer program commands stored in the memory 82 to implement any one of the chip appearance detection methods in the above embodiments.
[0096] In some embodiments, the computer may further include a communication interface 83 and a bus 80. Figure 3 As shown, the processor 81, the memory 82, and the communication interface 83 are connected via a bus 80 and communicate with each other.
[0097] The communication interface 83 is used to implement communication between the modules, devices, units and / or equipment in the embodiment of the present application. The communication interface 83 can also implement data communication with other components such as: external devices, image / data acquisition equipment, databases, external storage, and image / data processing workstations.
[0098] The bus 80 includes hardware, software or both, and couples the components of the computer to each other. The bus 80 includes but is not limited to at least one of the following: a data bus, an address bus, a control bus, an expansion bus, and a local bus. By way of example and not limitation, bus 80 may include an Accelerated Graphics Port (AGP) or other graphics bus, an Extended Industry Standard Architecture (EISA) bus, a Front Side Bus (FSB), a Hyper Transport (HT) interconnect, an Industry Standard Architecture (ISA) bus, an InfiniBand interconnect, a Low Pin Count (LPC) bus, a memory bus, a Micro Channel Architecture (MCA) bus, a Peripheral Component Interconnect (PCI) bus, a PCI-Express (PCI-X) bus, a Serial Advanced Technology Attachment (SATA) bus, a Video Electronics Standards Association Local Bus (VLB) bus, or other suitable buses or a combination of two or more of these. Where appropriate, bus 80 may include one or more buses. Although embodiments of the present application describe and illustrate a particular bus, the present application contemplates any suitable bus or interconnect.
[0099] Embodiment 4
[0100] The fourth embodiment of the present application provides a readable storage medium having computer program commands stored thereon; when the computer program commands are executed by a processor, any one of the chip appearance detection methods in the above embodiments is implemented.
[0101] The technical features of the above-described embodiments may be arbitrarily combined. To make the description concise, not all possible combinations of the technical features in the embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.
[0102] The above-mentioned embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the invention patent. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent of the present application shall be subject to the attached claims.
Claims
1. A chip appearance detection method, characterized in that: The following steps are involved: Acquire image data of the back side of the wafer, perform back side appearance inspection based on the back side image data, obtain back side inspection data of the wafer, and upload a yield report corresponding to the wafer to the first network disk path; Obtaining the number of grains corresponding to the wafer according to the image data, and determining whether the number of grains is greater than a standard value; If the number of the grains is greater than or equal to the standard value, comparing various abnormal parameters of the grains based on the back inspection data; If each of the abnormal parameters is less than a preset value, the back-check data is diverted to the second network disk path; When performing front appearance inspection on the wafer, determining whether there is back inspection data corresponding to the wafer in the second network disk path; If the back inspection data is not present in the second network disk path, performing a front appearance inspection on the wafer based on the first inspection parameter to obtain front inspection data; The positive inspection data and the photoelectric test data are combined and sent out.
2. The chip appearance detection method according to claim 1, characterized in that: After the step of determining whether the number of grains is less than a standard value, the method further comprises: If the number of the chips is less than the standard value, the back-check data is diverted to the third network disk path.
3. The chip appearance detection method according to claim 2, characterized in that: After the step of comparing various abnormal parameters of the die based on the back inspection data, the method further includes: If each of the abnormal parameters is greater than a preset value, the back-check data is uploaded to a third network disk path.
4. The chip appearance detection method according to claim 3, characterized in that: The method further comprises: After completing the back surface appearance inspection of the wafer, determining whether the wafer has the yield report in the first network disk path, or whether the wafer has back surface inspection data in the second network disk path or the second network disk path; If the yield report is not included in the first network disk path, and the back-check data is not included in the second network disk path and the third network disk path, it is determined that the wafer has failed to leave the station.
5. The chip appearance detection method according to any one of claims 1 to 4, characterized in that: After the step of determining whether there is back-check data corresponding to the wafer in the second network disk path, the method further includes: If the back inspection data exists in the second network disk path, performing a front appearance inspection on the wafer based on the second inspection parameter to obtain front inspection data; The back inspection data is retrieved based on the second network disk path, and the positive inspection data, the back inspection data and the photoelectric test data are combined and sent out.
6. A chip appearance detection system, characterized in that: include: A backside inspection module, used to obtain image data of the backside of the wafer, to perform backside appearance inspection based on the backside image data, to obtain backside inspection data of the wafer, and to upload a yield report corresponding to the wafer to the first network disk path; A first judgment module, used for obtaining the number of grains corresponding to the wafer according to the image data, and judging whether the number of grains is greater than a standard value; An abnormality comparison module, used for comparing various abnormal parameters of the grains based on the back-check data if the number of the grains is greater than or equal to the standard value; A first shunting module, configured to shunt the backcheck data to a second network disk path if each of the abnormal parameters is less than a preset value; A front inspection module, used to determine whether there is back inspection data corresponding to the wafer in the second network disk path when performing front appearance inspection on the wafer; A path detection module, configured to perform a front appearance inspection on the wafer based on a first detection parameter to obtain front inspection data if the back inspection data is not present in the second network disk path; The first combining module is used to combine the positive inspection data and the photoelectric test data for output.
7. The chip appearance detection system according to claim 6, characterized in that: The system further comprises: The second diversion module is used to upload the back-check data to a third network disk path if each of the abnormal parameters is greater than a preset value.
8. The chip appearance detection system according to claim 7, characterized in that: The system further comprises: The third diversion module is used to upload the back-check data to a third network disk path if each of the abnormal parameters is greater than a preset value.
9. A computer comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that: When the processor executes the computer program, the chip appearance detection method according to any one of claims 1 to 5 is implemented.
10. A storage medium having a computer program stored thereon, characterized in that: When the program is executed by a processor, a chip appearance detection method as described in any one of claims 1 to 5 is implemented.
Citation Information
Patent Citations
Mini LED wafer front and back appearance defect detection method and device
CN112255245A
Chip detection method and control device thereof, and storage medium
CN115954290A
LED chip sorting method and system and computer equipment
CN116013816A
Wafer grain defect detection method and system based on grain segmentation network
CN117007606A
Product yield detection method and equipment
CN117828439A