Circuit structure of a bandgap reference voltage source

Abstract

The embodiment of the present application relates to the field of circuit technologies, and discloses a circuit structure of a bandgap reference voltage source. The circuit structure includes: the first ends of two load resistors are respectively connected to VREF; the second ends are respectively connected to the collector of the first triode and the collector of the second triode; the base of the first triode is connected to VREF, and the collector is connected to the non-inverting input terminal of the operational amplifier; the base of the second triode is connected to VREF, and the collector is connected to the inverting input terminal of the operational amplifier; the output terminal is connected to VREF; the emitter of the first triode is connected to the first bandgap ratio resistor and the second bandgap ratio resistor; the second bandgap ratio resistor is grounded; the emitter of the second triode is connected to the first end of the second bandgap ratio resistor; the emitter of the second triode is further connected to the drain of the MOS transistor, the source of the MOS transistor is grounded, and the gate of the MOS transistor is connected to VREF. By adopting this solution, the temperature drift performance of the original structure can be significantly improved by introducing feedback through a MOS transistor.

Description

Technical Field

[0001] The present application relates to the technical field of integrated circuits, and in particular to a circuit structure of a bandgap reference voltage source. Background Art

[0002] In recent years, with the development of analog integrated circuits, more and more systems use internal voltage and current references. Traditional resistor divider and current shunt references are limited by the temperature characteristics of the device and it is difficult to achieve ideal temperature drift performance. Bandgap Reference (BGR) circuit, based on the basic principle of semiconductor bandgap energy, stands out in many design scenarios that require low temperature drift references with its extremely small temperature drift coefficient.

[0003] In the existing BGR structure, in order to obtain a smaller temperature drift coefficient, it is necessary to add a complex compensation circuit, which increases power consumption and area cost. In order to obtain a smaller temperature drift, complex second-order or even third-order compensation is also required, which is more difficult to design and highly dependent on the process. It is necessary to add more complex adjustment compensation, which consumes more costs. Therefore, how to improve the temperature drift performance of the original structure without relying on complex external circuit design is a technical problem that needs to be solved urgently in this field. Summary of the invention

[0004] One object of the present application is to provide a circuit structure of a bandgap reference voltage source, at least to solve the problems of complex temperature drift control, complex circuit design, larger circuit layout area and additional cost. The present application uses two load resistors, the first ends of the two load resistors are respectively connected to VREF; the second ends of the two load resistors are respectively connected to the collector of the first triode and the collector of the second triode; the base of the first triode is connected to VREF, and the collector is connected to the in-phase input of the operational amplifier; the base of the second triode is connected to VREF, and the collector is connected to the inverting input of the operational amplifier; the output of the operational amplifier is connected to VREF; the emitter of the first triode is connected to the first end of the first bandgap proportional resistor; the second end of the first bandgap proportional resistor is connected to the first end of the second bandgap proportional resistor; the second end of the second bandgap proportional resistor is grounded; the emitter of the second triode is connected to the first end of the second bandgap proportional resistor; the emitter of the second triode is also connected to the drain of the MOS tube, the source of the MOS tube is grounded, and the gate of the MOS tube is connected to VREF. By adopting this solution, it is possible to optimize the commonly used Ku i jk architecture BGR and greatly improve the temperature drift performance of the original structure by introducing feedback through a MOS tube. This can greatly optimize the temperature drift performance of the BGR circuit without the need for complex design, consuming very little or increasing power consumption and layout area.

[0005] To achieve the above object, some embodiments of the present application provide the following aspects:

[0006] In a first aspect, some embodiments of the present application further provide a circuit structure of a bandgap reference voltage source, including:

[0007] Two load resistors, the first ends of the two load resistors are respectively connected to VREF;

[0008] The second ends of the two load resistors are respectively connected to the collector of the first triode and the collector of the second triode;

[0009] The base of the first triode is connected to VREF, and the collector is connected to the non-inverting input terminal of the operational amplifier;

[0010] The base of the second triode is connected to VREF, and the collector is connected to the inverting input terminal of the operational amplifier;

[0011] The output terminal of the operational amplifier is connected to VREF;

[0012] The emitter of the first triode is connected to the first end of the first bandgap proportional resistor; the second end of the first bandgap proportional resistor is connected to the first end of the second bandgap proportional resistor; the second end of the second bandgap proportional resistor is grounded;

[0013] The emitter of the second triode is connected to the first end of the second bandgap proportional resistor;

[0014] The emitter of the second triode is further connected to the drain of the MOS transistor, the source of the MOS transistor is grounded, and the gate of the MOS transistor is connected to VREF.

[0015] Compared with the related art, in the solution provided by the embodiments of the present application, there are two load resistors. The first ends of the two load resistors are respectively connected to VREF; the second ends of the two load resistors are respectively connected to the collectors of the first triode and the second triode; the base of the first triode is connected to VREF, and the collector is connected to the non-inverting input terminal of the operational amplifier; the base of the second triode is connected to VREF, and the collector is connected to the inverting input terminal of the operational amplifier; the output terminal of the operational amplifier is connected to VREF; the emitter of the first triode is connected to the first end of the first bandgap ratio resistor; the second end of the first bandgap ratio resistor is connected to the first end of the second bandgap ratio resistor; the second end of the second bandgap ratio resistor is grounded; the emitter of the second triode is connected to the first end of the second bandgap ratio resistor; the emitter of the second triode is also connected to the drain of the MOS transistor, the source of the MOS transistor is grounded, and the gate of the MOS transistor is connected to VREF. By adopting this solution, it can be optimized on the basis of the commonly used Ku i jk architecture BGR. By introducing feedback through a MOS transistor, the temperature drift performance of the original structure is greatly improved. The temperature drift performance of the BGR circuit can be greatly optimized without complex design and with extremely low or no increase in power consumption and layout area. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] One or more embodiments are illustrated by way of example in the accompanying drawings, which illustrations do not constitute a limitation on the embodiments. Elements with the same reference numerals in the drawings are represented as similar elements, unless otherwise stated, and the figures in the drawings do not constitute a scale limitation.

[0017] Figure 1 FIG. is a schematic diagram of the circuit structure of a bandgap reference voltage source according to some embodiments of the present application;

[0018] Figure 2 FIG. is a schematic diagram of the range of VREF varying with temperature provided by the embodiments of the present application;

[0019] Figure 3 FIG. is a comparison diagram of the temperature drift trend of VREF provided by the present embodiment. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0020] To make the objectives, technical solutions, and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are some, but not all, of the embodiments of the present application. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present application without creative efforts shall fall within the protection scope of the present application.

[0021] The First Embodiment

[0022] The first embodiment of the present application relates to a circuit structure of a bandgap reference voltage source. As Figure 1 shown, the circuit structure of the bandgap reference voltage source includes:

[0023] Two load resistors, the first ends of the two load resistors are respectively connected to VREF;

[0024] The second ends of the two load resistors are respectively connected to the collector of the first triode and the collector of the second triode;

[0025] The base of the first triode is connected to VREF, and the collector is connected to the non-inverting input terminal of the operational amplifier;

[0026] The base of the second triode is connected to VREF, and the collector is connected to the inverting input terminal of the operational amplifier;

[0027] The output terminal of the operational amplifier is connected to VREF;

[0028] The emitter of the first triode is connected to the first end of the first bandgap proportional resistor; the second end of the first bandgap proportional resistor is connected to the first end of the second bandgap proportional resistor; the second end of the second bandgap proportional resistor is grounded;

[0029] The emitter of the second triode is connected to the first end of the second bandgap proportional resistor;

[0030] The emitter of the second triode is also connected to the drain of the MOS transistor, the source of the MOS transistor is grounded, and the gate of the MOS transistor is connected to VREF.

[0031] Among them, the bandgap reference (Bandgap Reference, abbreviated as BGR) is an important part of analog integrated circuits and mixed-signal integrated circuits. It provides a stable reference voltage with little influence of temperature drift, and this voltage also has sufficient suppression ability for fluctuations and noises at the power supply terminal. With the continuous increase of the working frequency of the SoC, the requirements for the high-frequency suppression ability of the reference voltage by some high-speed digital circuits and noise-sensitive analog (or radio frequency) circuits inside the chip are getting higher and higher. Therefore, designing a bandgap reference BGR with a wide frequency band, high power supply rejection ratio PSRR (Power-Supply Rejection Ratio), low temperature coefficient TC (Temperature Coefficient), and little influence of process deviation for internal circuit use is the key to the SoC power management system.

[0032] Figure 2It is a schematic diagram of the range of VREF varying with temperature provided by an embodiment of the present application. The basic principle of the bandgap reference source is that the difference in Vbe voltage ΔVbe between two bipolar transistors under different current densities is positively correlated with temperature T, that is, a positive temperature coefficient; the Vbe of the bipolar transistor is negatively correlated with temperature T, that is, a negative temperature coefficient; by adjusting the resistance ratio and corresponding circuit design, Vbe and ΔVbe can be multiplied by different coefficients and then added together. Theoretically, a voltage without temperature characteristics, that is, a voltage reference that does not change with temperature, can be obtained. However, in reality, due to the non-ideality of the devices and the existence of physical defects, that is, the existence of non-ideal effects, it is manifested as a second-order or higher-order form in the coefficients of each added term in the VREF function expression. The curve relationship between the reference voltage VREF obtained by the actual BGR and T is similar to a second-order function.

[0033] Calculation of temperature drift:

[0034] Among them, VREF MAX : The maximum value of the VREF voltage on the VREF / T curve;

[0035] VREF MAX : The minimum value of the VREF voltage on the VREF / T curve;

[0036] VREF NOM : The typical situation of the VREF / T curve, the VREF voltage value under normal temperature and pressure;

[0037] T MAX : The maximum value of the scanned temperature;

[0038] T MAX : The minimum value of the scanned temperature.

[0039] The present invention is optimized based on the commonly used Kuijk architecture BGR. By introducing the MOS transistor M1, a voltage with a temperature drift trend opposite to that of VREF is introduced into the VREF synthesis formula to reduce the temperature drift.

[0040] In this circuit structure, by leading back the output voltage VREF with second-order temperature characteristics to the gate of the MOS transistor M1, assuming that M1 is an ideal MOS transistor and operates in the saturation region with ideal volt-ampere characteristics, M1 is controlled by the MOS transistor gate voltage Vgs and will generate a channel current -I with similar temperature characteristics. M1 . Since M1 extracts current from the R2 branch, it is equivalent to subtracting an I M1 ×R2 from the output voltage VREF function. I M1 has a temperature drift characteristic opposite to that of VREF. Finally, the VREF output is equivalent to a reduction in the second-order temperature coefficient, and the arch shape of the VREF / T function curve becomes flatter. Compared with not adding M1, the optimized output VERF voltage has a smaller temperature drift.

[0041] As Figure 1 RL: Load resistance;

[0042] OP: Operational amplifier;

[0043] Q1&Q2: NPN transistors (A represents the emitter area, c: collector symbol, b: base symbol, e: emitter symbol);

[0044] R1&R2: Bandgap ratio resistors;

[0045] M1: MOS transistor (d: drain, g: gate, s: source);

[0046] VREF: Bandgap reference voltage output;

[0047] IQ1&IQ2: Transistor collector current;

[0048] I 1: Overcurrent of R1 resistor;

[0049] I 2: Overcurrent of R2 resistor;

[0050] I M1: M1 channel current;

[0051] I NTAT: Negative temperature coefficient current;

[0052] IPTAT: Positive temperature coefficient current.

[0053] In this embodiment, optionally, the emitter area of the first transistor is 100 times that of the second transistor.

[0054] Among them, by selecting the multiple of the emitter area, it can play a certain role in controlling the temperature drift.

[0055] In this embodiment, optionally, the first bandgap ratio resistor is a preset multiple of the second bandgap ratio resistor.

[0056] Among them, the preset multiple can be 2 times, 3 times or more multiples, or the first bandgap ratio resistor is less than the second bandgap ratio resistor. Through such a setting of this solution, it can be set according to needs, so that this solution has better flexibility in use.

[0057] In this embodiment, optionally, the load resistance, the first transistor and the first bandgap ratio resistor form a first path;

[0058] The current of the first path is the same as the current IQ1 of the first transistor and the current I1 of the first bandgap ratio resistor;

[0059] The load resistor and the second triode form a second path;

[0060] The current of the second path is the same as the current IQ2 of the second triode;

[0061] After the first path and the second path are aggregated, they are connected to the parallel circuit of the second bandgap ratio resistor and the MOS transistor; the current of the second bandgap ratio resistor is I2, and the current of the MOS transistor is IM1;

[0062] That is, I1 + IQ2 = I2 + IM1.

[0063] In this embodiment, optionally, the following formula is used to calculate VREF:

[0064]

[0065] Among them, V T is the electron thermal voltage, V T = KT / q, where k represents the Boltzmann constant, T represents the absolute temperature, q represents the charge of an electron, and N is the ratio of the emitter areas of Q1 and Q2.

[0066] Without adding M1, the output function of the reference voltage of the original architecture:

[0067] IQ1 = IQ2 = I1;

[0068] I2 = 2 * I1 = 2 * IQ1 = 2 * IQ2;

[0069]

[0070] After adding M1, the output function of the reference voltage of this architecture:

[0071] IQ1 = IQ2 = I1;

[0072] I1 + IQ2 = I2 + IM1;

[0073]

[0074] Figure 3 is the comparison chart of the temperature drift trend of VREF provided by this embodiment, as Figure 3 shown, the present invention is optimized on the basis of the common Ku ijk architecture BGR. By introducing the MOS transistor M1, a voltage with a temperature drift trend opposite to that of VREF is introduced into the VREF synthesis formula to reduce the temperature drift.

[0075] The present invention can greatly optimize the temperature drift performance of the BGR circuit without complex design, consuming very little or almost no increase in power consumption and layout area. The simulation shows that the maximum can reach 50%.

[0076] In the solution provided by the embodiment of the present application, there are two load resistors. The first ends of the two load resistors are respectively connected to VREF; the second ends of the two load resistors are respectively connected to the collector of the first triode and the collector of the second triode; the base of the first triode is connected to VREF, and the collector is connected to the non-inverting input terminal of the operational amplifier; the base of the second triode is connected to VREF, and the collector is connected to the inverting input terminal of the operational amplifier; the output terminal of the operational amplifier is connected to VREF; the emitter of the first triode is connected to the first end of the first bandgap ratio resistor; the second end of the first bandgap ratio resistor is connected to the first end of the second bandgap ratio resistor; the second end of the second bandgap ratio resistor is grounded; the emitter of the second triode is connected to the first end of the second bandgap ratio resistor; the emitter of the second triode is also connected to the drain of the MOS transistor, the source of the MOS transistor is grounded, and the gate of the MOS transistor is connected to VREF. By adopting this solution, it can be realized by optimizing on the basis of the common Ku i jk architecture BGR. By introducing feedback through a MOS transistor, the temperature drift performance of the original structure is greatly improved. The temperature drift performance of the BGR circuit can be greatly optimized without complex design and with little or no increase in power consumption and layout area.

[0077] The flowcharts or block diagrams in the accompanying drawings illustrate the possible architectures, functions, and operations of devices, methods, and computer program products according to various embodiments of the present application. In this regard, each block in the flowchart or block diagram may represent a module, a program segment, or a part of code that contains one or more executable instructions for implementing the specified logical function. It should also be noted that in some alternative implementations, the functions marked in the blocks may occur in a different order than marked in the accompanying drawings. For example, two consecutive blocks shown may actually be executed substantially in parallel, and they may sometimes be executed in the reverse order, depending on the functions involved. It should also be noted that each block in the block diagram and / or flowchart, and the combination of blocks in the block diagram and / or flowchart, can be implemented by a dedicated hardware-based system that performs the specified functions or operations, or can be implemented by a combination of dedicated hardware and computer instructions.

[0078] The scope of the present application is defined by the appended claims rather than the above description. Therefore, all changes that fall within the meaning and scope of the equivalent elements of the claims are intended to be encompassed within the present application. Any reference numerals in the claims should not be construed as limiting the claims involved. In addition, it is obvious that the term "comprising" does not exclude other elements or steps, and the singular does not exclude the plural. A plurality of elements or devices recited in the apparatus claims may also be implemented by one element or device through software or hardware. The terms "first", "second", etc. are only used for descriptive distinction and do not represent any specific order, nor can they be construed as indicating or implying relative importance.

[0079] As described above, it is only the specific implementation manner of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art within the technical scope disclosed by the present application can easily mention changes or substitutions, which should all be covered within the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the protection scope of the claims, and the above embodiments should be regarded as exemplary and non-limiting.

Claims

1. A circuit structure of a bandgap reference voltage source, characterized in that Including: Two load resistors, the first ends of the two load resistors are respectively connected to VREF; The second ends of the two load resistors are respectively connected to the collector of the first triode Q1 and the collector of the second triode Q2; The base of the first triode Q1 is connected to VREF, and the collector is connected to the non-inverting input terminal of the operational amplifier; The base of the second triode Q2 is connected to VREF, and the collector is connected to the inverting input terminal of the operational amplifier; The output terminal of the operational amplifier is connected to VREF; The emitter of the first triode Q1 is connected to the first end of the first bandgap proportional resistor R1; the second end of the first bandgap proportional resistor R1 is connected to the first end of the second bandgap proportional resistor R2; the second end of the second bandgap proportional resistor R2 is grounded; The emitter of the second triode Q2 is connected to the first end of the second bandgap proportional resistor R2; The emitter of the second triode Q2 is also connected to the drain of the MOS transistor, the source of the MOS transistor is grounded, and the gate of the MOS transistor is connected to VREF; Among them, the load resistor, the first triode Q1 and the first bandgap proportional resistor R1 form a first path; The current of the first path is the same as the current IQ1 of the first triode Q1 and the current I1 of the first bandgap proportional resistor R1; The load resistor and the second triode Q2 form a second path; The current of the second path is the same as the current IQ2 of the second triode Q2; The first path and the second path are aggregated and then connected to the parallel circuit of the second bandgap proportional resistor R2 and the MOS transistor; the current of the second bandgap proportional resistor R2 is I2, and the current of the MOS transistor is IM1; That is, I1 + IQ2 = I2 + IM1; Among them, the following formula is used to calculate VREF: ； Among them, is the electronic thermal voltage, , where k represents the Boltzmann constant, T represents the absolute temperature, q represents the electric charge of an electron, and N is the ratio of the emitter areas of Q1 and Q2.

2. The circuit structure of the bandgap reference voltage source according to claim 1, wherein The emitter area of the first triode Q1 is 100 times that of the emitter area of the second triode Q2.

3. The circuit structure of the bandgap reference voltage source according to claim 1, characterized in that, The first bandgap proportional resistor R1 is a preset multiple of the second bandgap proportional resistor R2.

Images