Transient boost buffer and gamma voltage generation system

Abstract

The application provides a transient enhancement buffer and a gamma voltage generation system, wherein the transient enhancement buffer comprises an input module, an output module and a transient enhancement module connected in sequence; the input module is used for acquiring an amplified signal; the transient enhancement module generates a pull-up coupling signal and a pull-down coupling signal based on a wave of an output signal; and the output module performs coupling enhancement on the amplified signal through the pull-up coupling signal and the pull-down coupling signal, thereby improving the stability of the output signal. Meanwhile, the gamma voltage generation system comprises an amplitude adjustment device, a region division device, a linear output device, a high nonlinearity output device and a low nonlinearity output device; the maximum value of the voltage is determined through the amplitude adjustment device, and the voltage values of three regions are output through the linear output device, the high nonlinearity output device and the low nonlinearity output device, so that the output voltage value is highly coincident with the actual voltage value distribution of the gamma voltage, thereby improving the accuracy.

Description

TECHNICAL FIELD

[0001] The application belongs to the technical field of gamma voltage, and relates to a buffer, in particular to a transient enhancement buffer and a gamma voltage generation system. BACKGROUND

[0002] In order to meet the visual characteristics of the human eye, the brightness of pixels usually needs to be corrected by gamma voltage when a display is displaying. The gamma voltage generation system needs to provide stable gamma voltage for the driving system of the display to achieve good display effect.

[0003] In the existing gamma voltage generation system, the generated gamma voltage is generally output by a buffer to improve the stability of the output gamma voltage. With the increasing requirements for the resolution and frame rate of the display, the stability and response speed of the buffer of the gamma voltage generation system are also increasing.

[0004] Therefore, how to design a new type of buffer with strong stability and fast response speed is an urgent problem to be solved by those skilled in the art. SUMMARY

[0005] The application aims to provide a transient enhancement buffer and a gamma voltage generation system to solve the problem that the stability of the buffer in the prior art is insufficient to meet the actual needs of the display.

[0006] In a first aspect, the application provides a transient enhancement buffer, comprising an input module, an output module and a transient enhancement module connected in sequence.

[0007] The input module is configured to amplify an input signal to obtain an amplified signal.

[0008] The transient enhancement module comprises a signal pull-up unit and a signal pull-down unit. The signal pull-up unit is configured to generate a pull-up coupling signal based on a feedback signal. The signal pull-down unit is configured to generate a pull-down coupling signal based on the feedback signal.

[0009] The output module comprises a buffer output end, a high potential output unit and a low potential output unit connected to the buffer output end respectively. The high potential output unit is configured to couple and enhance the amplified signal by the pull-up coupling signal to output a high potential enhancement signal. The low potential output unit is configured to couple and enhance the amplified signal by the pull-down coupling signal to output a low potential enhancement signal. The buffer output end is configured to output an output signal based on the high potential enhancement signal and the low potential enhancement signal, and feed back the output signal to the transient enhancement module as the feedback signal.

[0010] In the application, the fluctuation of the output signal is fed back through the transient enhancement module, and the pull-up coupling signal and the pull-down coupling signal are generated, so that the output module adjusts the output signal, thereby outputting a stable voltage, which is beneficial to improve the stability of the transient enhancement buffer.

[0011] In an embodiment of the application, the signal pull-up unit comprises a pull-up amplification circuit and a pull-up signal conversion circuit connected in sequence, the pull-up amplification circuit is configured to amplify the feedback signal to obtain a pull-up feedback signal, and the pull-up signal conversion circuit is configured to convert the pull-up feedback signal into a pull-up current signal as a pull-up coupling signal.

[0012] The signal pull-down unit comprises a pull-down amplification circuit and a pull-down signal conversion circuit connected in sequence, the pull-down amplification circuit is configured to amplify the feedback signal to obtain a pull-down feedback signal, and the pull-down signal conversion circuit is configured to convert the pull-down feedback signal into a pull-down current signal as a pull-down coupling signal.

[0013] In an embodiment of the application, the pull-up amplification circuit comprises a pull-up MOS tube, the pull-up signal conversion circuit comprises a pull-up capacitor, the source of the pull-up MOS tube is connected to the buffer output end for receiving the feedback signal, the drain of the pull-up MOS tube is connected to one end of the pull-up capacitor, the gate of the pull-up MOS tube inputs a pull-up conduction signal, and the other end of the pull-up capacitor is connected to the input end of the high-potential output unit.

[0014] The pull-down amplification circuit comprises a pull-down MOS tube, the pull-down signal conversion circuit comprises a pull-down capacitor, the source of the pull-down MOS tube is connected to the buffer output end for receiving the feedback signal, the drain of the pull-down MOS tube is connected to one end of the pull-down capacitor, the gate of the pull-down MOS tube inputs a pull-down conduction signal, and the other end of the pull-down capacitor is connected to the input end of the low-potential output unit.

[0015] In an embodiment of the application, the signal pull-up unit further comprises a pull-up bias circuit connected to the pull-up amplification circuit, the pull-up bias circuit is configured to provide a bias working voltage for the pull-up amplification circuit; and the signal pull-down unit further comprises a pull-down bias circuit connected to the pull-down amplification circuit, the pull-down bias circuit is configured to provide a bias working voltage for the pull-down amplification circuit.

[0016] In an embodiment of the present application, the high potential output unit comprises a high potential signal enhancement circuit and a high potential Miller compensation circuit connected to the high potential signal enhancement circuit, the high potential signal enhancement circuit is configured to obtain a high potential enhanced signal by coupling enhancement of the amplified signal through the pull-up coupling signal, and the high potential Miller compensation circuit is configured to perform signal compensation on the high potential signal enhancement circuit.

[0017] The low potential output unit comprises a low potential signal enhancement circuit and a low potential Miller compensation circuit connected to the low potential signal enhancement circuit, the low potential signal enhancement circuit is configured to obtain a low potential enhanced signal by coupling enhancement of the amplified signal through the pull-down coupling signal, and the low potential Miller compensation circuit is configured to perform signal compensation on the low potential signal enhancement circuit.

[0018] In an embodiment of the present application, the high potential signal enhancement circuit comprises a high potential output MOS transistor, the gate of the high potential output MOS transistor is connected to the output end of the high potential output unit and the output end of the signal pull-up unit respectively, the drain of the high potential output MOS transistor serves as the output end of the high potential signal enhancement circuit and is connected to the output end of the low potential signal enhancement circuit, and the source of the high potential output MOS transistor is connected to a high potential end; the high potential Miller compensation circuit comprises a high potential Miller compensation capacitor and a high potential Miller compensation resistor connected in sequence between the gate and the drain of the high potential output MOS transistor.

[0019] The low potential signal enhancement circuit comprises a low potential output MOS transistor, the gate of the low potential output MOS transistor is connected to the output end of the low potential output unit and the output end of the signal pull-down unit, the drain of the low potential output MOS transistor serves as the output end of the low potential signal enhancement circuit and is connected to the output end of the high potential signal enhancement circuit, and the source of the low potential output MOS transistor is connected to a low potential end; the low potential Miller compensation circuit comprises a low potential Miller compensation capacitor and a low potential Miller compensation resistor connected in sequence between the gate and the drain of the low potential output MOS transistor.

[0020] In an embodiment of the present application, the input module comprises a high potential differential circuit and a high potential current mirror connected to the high potential differential circuit, a low potential differential circuit and a low potential current mirror connected to the low potential differential circuit.

[0021] The high-potential differential circuit is used for common-mode rejection of the input signal in a high-potential input signal range, and outputs a high-potential differential signal; the high-potential current mirror is used for amplification based on the high-potential differential signal, and generates a stable high-potential amplified signal; the low-potential differential circuit is used for common-mode rejection of the input signal in a low-potential input signal range, and outputs a low-potential differential signal; the low-potential current mirror is used for amplification based on the low-potential differential signal, and generates a stable low-potential amplified signal.

[0022] The amplified signal in the high-potential output unit is a high-potential amplified signal, and the amplified signal in the low-potential output unit is a low-potential amplified signal.

[0023] In an embodiment of the present application, the input module further comprises a superposition circuit connected between the high-potential current mirror and the low-potential current mirror, the superposition circuit comprising a current superposition sub-circuit and a floating current source, the floating current source being used for providing constant current for the high-potential current mirror and the low-potential current mirror, and the current superposition sub-circuit controlling the static current of the high-potential output mos tube and the low-potential output mos tube, so as to realize that the high-potential amplified signal is the amplified input signal of the high-potential output mos tube, and the low-potential amplified signal is the amplified input signal of the low-potential output mos tube.

[0024] In a second aspect, the present application provides a gamma voltage generation system, comprising an amplitude adjustment device and a region division device connected in series, and a linear output device, a high nonlinearity output device and a low nonlinearity output device connected with the region division device respectively;

[0025] The amplitude adjustment device is used for generating high-amplitude voltage and low-amplitude voltage by voltage division and amplitude modulation based on a system input signal; the region division device is used for obtaining a region input signal by voltage division based on the high-amplitude voltage and the low-amplitude voltage, and generating high-linear voltage and low-linear voltage by amplitude modulation of the region input signal; the linear output device is used for obtaining a linear input signal by voltage division based on the high-linear voltage and the low-linear voltage, and generating at least one linear voltage based on the linear input signal; the high nonlinearity output device is used for obtaining a high nonlinearity region signal by voltage division based on the high-amplitude voltage and the high-linear voltage, and generating at least one high nonlinearity voltage by amplitude modulation of the high nonlinearity region signal; and the low nonlinearity output device is used for obtaining a low nonlinearity region signal by voltage division based on the low-linear voltage and the low-amplitude voltage, and generating at least one low nonlinearity voltage by amplitude modulation of the low nonlinearity region signal.

[0026] The amplitude adjusting device, the region dividing device, the linear output device, the high nonlinearity output device and the low nonlinearity output device each include at least one transient enhancement buffer as described above; the high amplitude voltage, the low amplitude voltage, the high linear voltage, all the low linear voltages, all the linear voltages, all the high nonlinearity voltages and the low nonlinearity voltages are all buffered and isolated by the transient enhancement buffer.

[0027] In the present application, the two-stage adjustment method of determining the maximum and minimum values of the gamma voltage through the amplitude adjusting device and then regulating the intermediate voltage, and the output structure of the linear output device, the high nonlinearity output device and the low nonlinearity output device outputting the voltage values in the three regions of the high nonlinearity region, the linear region and the low nonlinearity region make the voltage values output by the gamma voltage generation system highly coincide with the voltage value distribution of the gamma voltage, and when applied to a display, the brightness of the display is more in line with the human sensory system, which is beneficial to improve the display effect of the display.

[0028] In an embodiment of the present application, the amplitude adjusting device further includes an amplitude adjusting resistor, and a high amplitude voltage selector and a low amplitude voltage selector connected to the amplitude adjusting resistor respectively, the amplitude adjusting resistor is used to divide the system input signal to generate an amplitude adjusting signal, the high amplitude voltage selector is used to amplitude modulate the amplitude adjusting signal to generate the high amplitude voltage, and the low amplitude voltage selector is used to amplitude modulate the amplitude adjusting signal to generate the low amplitude voltage.

[0029] The region dividing device further includes a region dividing resistor, and a high linear voltage selector and a low linear voltage selector connected to the region dividing resistor respectively, the region dividing resistor is used to divide the high amplitude voltage and the low amplitude voltage to generate the region input signal, the high linear voltage selector is used to amplitude modulate the region input signal to generate the high linear voltage, and the low linear voltage selector is used to amplitude modulate the region input signal to generate the low linear voltage.

[0030] The linear output device further includes a linear output resistor, the linear output resistor is used to divide the high linear voltage and the low linear voltage to generate a linear input signal, and generate at least one linear voltage based on the linear input signal.

[0031] The high nonlinearity output device further comprises a high nonlinearity output resistor and at least one high nonlinearity voltage selector connected to the high nonlinearity output resistor, the high nonlinearity output resistor is configured to divide voltage based on the high amplitude voltage and the high linearity voltage to generate the high nonlinearity region signal, and the high nonlinearity voltage selector is configured to amplitude modulate based on the high nonlinearity region signal to generate the high nonlinearity voltage.

[0032] The low nonlinearity output device further comprises a low nonlinearity output resistor and at least one low nonlinearity voltage selector connected to the low nonlinearity output resistor, the low nonlinearity output resistor is configured to divide voltage based on the low amplitude voltage and the low linearity voltage to generate the low nonlinearity region signal, and the low nonlinearity voltage selector is configured to amplitude modulate based on the low nonlinearity region signal to generate the low nonlinearity voltage.

[0033] As described above, the application provides a transient enhancement buffer and a gamma voltage generation system. Through the transient enhancement module, the pull-up coupling signal and the pull-down coupling signal used to represent the fluctuation of the output signal are output, the fluctuation of the output signal is fed back, and is transmitted to the output module, so that the output module adjusts the output signal based on the fluctuation of the output signal, thereby outputting a stable voltage. At the same time, the gamma voltage generation system uses a two-stage adjustment method and a three-region output structure, so that the output voltage value is more accurate and highly coincides with the actual gamma voltage value distribution, which is beneficial to improve the display effect of the display. BRIEF DESCRIPTION OF DRAWINGS

[0034] Figure 1 A structure schematic diagram of a transient enhancement buffer according to an embodiment of the application is shown.

[0035] Figure 2 A circuit structure schematic diagram of a transient enhancement buffer according to an embodiment of the application is shown.

[0036] Figure 3 A small signal model schematic diagram of an output module of a transient enhancement buffer according to an embodiment of the application is shown.

[0037] Figure 4 A closed loop response simulation result schematic diagram of a transient enhancement buffer according to an embodiment of the application is shown.

[0038] Figure 5 A step response simulation result comparison schematic diagram of a transient enhancement buffer according to an embodiment of the application and an existing buffer is shown.

[0039] Figure 6 A 5V and 10V step response simulation result schematic diagram of a transient enhancement buffer according to an embodiment of the application is shown.

[0040] Figure 7 A circuit structure schematic diagram of a gamma voltage generating system is shown.

[0041] Figure 8 A simulation result schematic diagram of a gamma voltage generating system is shown.

[0042] Element number explanation

[0043] 100 Transient enhancement buffer

[0044] 110 Input module

[0045] 120 Output module

[0046] 130 Transient enhancement module

[0047] 111 High potential input unit

[0048] 112 Low potential input unit

[0049] 121 High potential output unit

[0050] 122 Low potential output unit

[0051] 123 Buffer output end

[0052] 131 Signal pull-up unit

[0053] 132 Signal pull-down unit

[0054] 200 Gamma voltage generating system

[0055] 210 Amplitude adjusting device

[0056] 220 Region dividing device

[0057] 230 High nonlinearity output device

[0058] 240 Linear output device

[0059] 250 Low nonlinearity output device

[0060] 211 Amplitude adjusting resistance

[0061] 212 High amplitude voltage selector

[0062] 213 Low amplitude voltage selector

[0063] 221 Region dividing resistance

[0064] 222 High linearity voltage selector

[0065] 223 low linearity voltage selector

[0066] 231 high nonlinearity output resistance

[0067] 232 high nonlinearity voltage selector

[0068] 241 linear output resistance

[0069] 251 low nonlinearity output resistance

[0070] 252 low nonlinearity voltage selector DETAILED DESCRIPTION

[0071] The present application can also be embodied in a different way or be applied to different applications, and the details in the specification can be modified or changed based on different views and applications without departing from the spirit of the present application. It should be noted that the following examples and features in the examples can be combined with each other without conflict.

[0072] It should be noted that the diagrams provided in the following examples only schematically illustrate the basic concept of the present application, and only the components related to the present application are shown in the diagrams, not the number, shape and size of the components when actually implemented. The shapes, number and proportions of the components when actually implemented can be arbitrarily changed, and the layout of the components can be more complex.

[0073] The following examples of the present application provide a transient enhancement buffer and a gamma voltage generation system. The transient enhancement buffer compensates the output voltage of the buffer through a transient enhancement module, reduces the fluctuation of the output voltage, and improves the stability of the output voltage. The transient enhancement buffer provided by the present application has a fast response speed, and solves the problem that the buffer in the prior art is not sufficient to meet the requirements of the display. At the same time, the gamma voltage generation system provided by the present application generates high amplitude voltage and low amplitude voltage first to complete the amplitude adjustment of the gamma voltage, and then further adjusts through a linear output module, a high nonlinearity output module and a low nonlinearity output module. The adjustment method of two-stage adjustment and three-region output is used to generate gamma voltage, so that the generated gamma voltage has higher accuracy, which is beneficial to the display to achieve better display effect.

[0074] The principle and implementation of the transient enhancement buffer and the gamma voltage generation system of the present embodiment will be described in detail below with reference to the accompanying drawings, so that those skilled in the art can understand the transient enhancement buffer and the gamma voltage generation system of the present embodiment without creative labor.

[0075] The transient enhancement buffer provided in the following embodiments of this application is applicable to scenarios including, but not limited to, scenarios where a gamma voltage is stably and rapidly output in a gamma voltage generation system. The following description will use the transient enhancement buffer as an example of inputting a gamma voltage and outputting a stable gamma voltage. It should be noted that the transient enhancement buffer provided in the following embodiments of this application can also be used in other application scenarios, which are not specifically limited here.

[0076] like Figure 1 As shown, this embodiment provides a transient enhancement buffer 100, including an input module 110, an output module 120, and a transient enhancement module 130 connected in sequence. The input module 110 amplifies the input signal to obtain an amplified signal. The output module 120 outputs a voltage as an output signal through the buffer output terminal 123. Specifically, the output module 120 includes a buffer output terminal 123, and a high-potential output unit 121 and a low-potential output unit 122, both connected to the buffer output terminal 123. The high-potential output unit 121 obtains a high-potential enhancement signal based on the amplified signal, and the low-potential output unit 122 obtains a low-potential enhancement signal based on the amplified signal. The output terminals of the high-potential output unit 121 and the low-potential output unit 122 are connected to lead out the buffer output terminal 123. The buffer output terminal 123 obtains and outputs an output signal based on the high-potential enhancement signal and the low-potential enhancement signal. It should be noted that the output signal is actually a voltage signal. The transient enhancement module 130 is used to perform feedback compensation on the output signal output by the output module 120 so that the transient enhancement buffer 100 finally outputs a stable signal. Specifically, the transient enhancement module 130 includes a signal pull-up unit 131 and a signal pull-down unit 132. The signal pull-up unit 131 is connected to the output terminal 123 of the buffer, generates a pull-up coupling signal based on the output signal, and transmits the pull-up coupling signal to the high-potential output unit 121 for feedback compensation of the output signal. Similarly, the signal pull-down unit 132 is connected to the output terminal 123 of the buffer, generates a pull-down coupling signal based on the output signal, and transmits it to the low-potential output unit 122 for feedback compensation.

[0077] Since the pull-up and pull-down coupling signals are generated based on the output signal and can characterize the changes in the output signal, the transient enhancement module 130 feeds back the changes in the output signal through the signal pull-up unit 131 and the signal pull-down unit 132, thereby enabling the high-potential output unit 121 and the low-potential output unit 122 to compensate for the output signal and obtain a stable output voltage.

[0078] In some embodiments of this application, such as Figure 2As shown, the signal pull-up unit 131 includes a pull-up signal conversion circuit, which is configured to convert the voltage fluctuation of the output signal into a current signal and input the current signal as a pull-up coupling signal into the high potential output unit 121, and the high potential output unit 121 compensates the output signal based on the pull-up coupling signal; similarly, the signal pull-down unit 132 includes a pull-down signal conversion circuit, which is configured to convert the voltage fluctuation of the output signal into a current signal and input the current signal as a pull-down coupling signal into the low potential output unit 122, and the low potential output unit 122 compensates the output signal based on the pull-down coupling signal.

[0079] Exemplarily, the pull-up signal conversion circuit includes a pull-up capacitor C1, and the pull-down signal conversion circuit includes a pull-down capacitor C2, so that the varying voltage is converted into a current signal.

[0080] Further, the signal pull-up unit 131 further includes a pull-up amplification circuit, an input end of the pull-up amplification circuit is connected with the buffer output end 123, and the pull-up amplification circuit amplifies the voltage fluctuation of the output signal by a preset gain value, so that the pull-up capacitor C1 captures the voltage fluctuation of the output signal and generates a corresponding pull-up coupling signal; similarly, the signal pull-down unit 132 includes a pull-down amplification circuit connected with the buffer output end 123, and the pull-down amplification circuit amplifies the voltage fluctuation of the output signal so that the pull-down capacitor C2 generates a pull-down coupling signal.

[0081] Exemplarily, the pull-up amplification circuit includes a pull-up mos tube MPU1, a source of the pull-up mos tube MPU1 is connected with the buffer output end 123, a drain of the pull-up mos tube MPU1 is connected with the pull-up capacitor C1, and a gate of the pull-up mos tube MPU1 inputs a pull-up conduction signal through a pull-up external port VBN2; the pull-down amplification circuit includes a pull-down mos tube MPD2, a source of the pull-down mos tube MPD2 is connected with the buffer output end 123, a drain of the pull-down mos tube MPD2 is connected with the pull-down capacitor C2, and a gate of the pull-down mos tube MPD2 inputs a pull-down conduction signal through a pull-down external port VBP2. Since the pull-up mos tube MPU1 and the pull-down mos tube MPD2 are both source input and drain output in a common gate connection mode, the amplification multiple of the input voltage is large, and the voltage fluctuation of the output signal is amplified, so that a small voltage change can also be acquired by the pull-up capacitor C1 and the pull-down capacitor C2 and converted into a current signal, the sensitivity of the transient enhancement module 130 is improved, and the response speed of the transient enhancement buffer is further improved.

[0082] It should be noted that the gate of the pull-up mos tube MPU1 inputs a pull-up conduction signal to control the working state of the pull-up mos tube MPU1, and the gate of the pull-down mos tube MPD2 inputs a pull-down conduction signal to control the working state of the pull-down mos tube MPD2.

[0083] Further, in order to make the pull-up amplification circuit and the pull-down amplification circuit work normally, the signal pull-up unit 131 further comprises a pull-up bias circuit, and the signal pull-down unit 132 further comprises a pull-down bias circuit, so as to provide the bias voltage required by the pull-up amplification circuit and the pull-down amplification circuit to work.

[0084] Exemplarily, the pull-up bias circuit is a pull-up bias mos transistor MPU2, and the pull-down bias circuit is a pull-down bias mos transistor MPD1.

[0085] Based on this, the signal pull-up unit 131 and the signal pull-down unit 132 convert the fluctuation of the output signal into current signals, which can accurately represent the change of the voltage, so as to make the high potential output unit 121 and the low potential output unit 122 compensate and realize the stability of the output signal.

[0086] It should be noted that the working state of the signal pull-up unit 131 and the signal pull-down unit 132 is associated with the voltage range of the input signal. When the output signal is in the high potential output range, the signal pull-up unit 131 works normally, and when the output signal is in the low potential output range, the signal pull-down unit 132 works normally. The high potential output range and the low potential output range have an overlapping range, so at least one of the signal pull-up unit 131 and the signal pull-down unit 132 can work normally, and the signal pull-up unit 131 and the signal pull-down unit 132 can work normally at the same time.

[0087] The process of the transient enhancement module 130 feeding back the change of the output signal will be described below.

[0088] Exemplarily, as shown in FIG. 1, the transient enhancement module 130 comprises a signal pull-up unit 131 and a signal pull-down unit 132. Figure 2As shown, the source of the pull-up mos transistor MPU1 is connected with the buffer output terminal 123 to receive the output signal as a feedback signal, the drain of the pull-up mos transistor MPU1 is connected with one end of the pull-up capacitor C1 and the drain of the pull-up bias mos transistor MPU2, the other end of the pull-up capacitor C1 is connected with the high potential output unit 121, and the source of the pull-up bias mos transistor MPU2 is connected with the ground terminal GND to provide the bias voltage required for the normal operation of the pull-up mos transistor MPU1. Among them, the pull-up mos transistor MPU1 amplifies the feedback signal to generate a pull-up feedback signal, and transmits it to the pull-up capacitor C1 through the drain; the pull-up capacitor C1 is connected between the pull-up mos transistor MPU1 and the input terminal of the high potential output unit 121, converts the pull-up feedback signal into a pull-up current signal, and generates a pull-up coupling signal to the high potential output unit 121; similarly, the signal pull-down unit 132 includes a pull-down mos transistor MPD2, a pull-down capacitor C2 and a pull-down bias mos transistor MPD1, the source of the pull-down mos transistor MPD2 receives the output signal as a feedback signal to generate a pull-down feedback signal and transmits it to the pull-down capacitor C2 through the drain, and the pull-down capacitor C2 generates a pull-down coupling signal based on the pull-down feedback signal and transmits it to the low potential output unit 122. The high potential output unit 121 compensates for the output signal based on the pull-up coupling signal, and the low potential output unit 122 compensates for the output signal based on the pull-down coupling signal.

[0089] Specifically, the high potential output unit 121 includes a high potential signal enhancement circuit, and the high potential signal enhancement circuit is configured to obtain a high potential enhanced signal based on the amplified signal, wherein the high potential signal enhancement circuit obtains the high potential enhanced signal by coupling and enhancing the amplified signal through the pull-up coupling signal. The low potential output unit 122 includes a low potential signal enhancement circuit, and the low potential signal enhancement circuit is configured to obtain a low potential enhanced signal based on the amplified signal, wherein the low potential signal enhancement circuit obtains the low potential enhanced signal by coupling and enhancing the amplified signal through the pull-down coupling signal. The buffer output terminal 123 is connected between the output terminal of the high potential signal enhancement circuit and the output terminal of the low potential signal enhancement circuit, and is configured to output the output signal based on the high potential enhanced signal and the low potential enhanced signal. When the output signal fluctuates, the pull-up coupling signal and the pull-down coupling signal can represent the change of the output signal, thereby affecting the generation of the high potential enhanced signal and the low potential enhanced signal, and further affecting the generation of the output signal, so as to realize the compensation of the output signal.

[0090] In the following, the compensation process of the output signal will be specifically described by taking the high potential signal enhancement circuit including a high potential output mos transistor M19 and the low potential signal enhancement circuit including a low potential output mos transistor M20 as an example.

[0091] For the convenience of understanding, the following exemplary high potential output mos M19 as the first type of mos, low potential output mos M20 as the second type of mos are described, but the type of high potential output mos M19 and low potential output mos M20 is not limited to this. Among them, the first type of mos is nmos, and the second type of mos is pmos.

[0092] As Figure 2 Described, high potential output mos M19 and low potential output mos M20 are all gate input, drain output of common source connection mode, wherein the gate of high potential output mos M19 is connected to the output end of input module 110, the source is connected to high potential end VDD, and the drain is connected to buffer output end 123; the gate of low potential output mos M20 is connected to the output end of input module 110, the source is connected to ground end GND, and the drain is connected to buffer output end 123.

[0093] When the output of the output signal occurs undershoot and drops, taking high potential output mos M19 as an example, the fluctuation of the output signal is transmitted to the pull-up capacitor C1 through the pull-up mos MPU1, at this time, the pull-up capacitor C1 generates a current signal from the pull-up capacitor C1 to the pull-up mos MPU1. Since the input current of high potential output mos M19 is the sum of the current flowing through pull-up capacitor C1 and the current flowing through high potential input unit 111, the current signal of pull-up capacitor C1 makes the input current of high potential output mos M19 drop, that is, the gate drive current of high potential output mos M19 drops, and then the gate voltage of high potential output mos M19 drops. According to the characteristics of nmos, the current output of high potential output mos M19 increases, thereby increasing the voltage of the output signal, so as to prevent the output signal from further dropping, so as to stabilize the voltage region of the output. Similarly, the fluctuation of the output signal makes the pull-down capacitor C2 generate a current signal from the pull-down capacitor C2 to the pull-down mos MPD2, so as to make the gate drive current of low potential output mos M20 drop, and the gate voltage also synchronously drop. According to the characteristics of pmos, the current output of low potential output mos M20 decreases, thereby stabilizing the voltage value of the output. It should be noted that since the working state of signal pull-up unit 131 and signal pull-down unit 132 is associated with the voltage value of output signal, that is, associated with the voltage value of feedback signal of input signal pull-up unit 131 and signal pull-down unit 132, therefore, there may be only signal pull-up unit 131 or only signal pull-down unit 132 working, but the compensation of output signal can still be realized. Specifically, please refer to the foregoing content, which is not repeated here.

[0094] Similarly, when the output signal outputted is undershoot and drops, the high potential output mos transistor M19 adjusts the output signal based on the pull-up coupling signal of the signal pull-up unit 131, and the low potential output mos transistor M20 adjusts the output signal based on the pull-down coupling signal of the signal pull-down unit 132, so as to realize the stable output of the output signal. For specific principles and processes, please refer to the foregoing content, which will not be repeated here.

[0095] The foregoing is the principle of the voltage signal outputted by the embodiment, and the small signal model of the transient enhancement module 130 and the output module 120 of the embodiment will be further described below, so as to further illustrate the effective compensation of the output signal by the transient enhancement module 130, so that the output signal is a stable voltage signal.

[0096] As shown in Figure 3 , the amplified signal transmitted from the input module 110 to the output module 120 is actually a current signal, which is outputted as a voltage signal by the high potential output mos transistor M19 and the low potential output mos transistor M20. The pull-up capacitor C1 is connected between the input end and the output end of the high potential output mos transistor M19, and is connected in parallel with the high potential output mos transistor M19. The pull-down capacitor C2 is connected between the input end and the output end of the low potential output mos transistor M20, and is connected in parallel with the low potential output mos transistor M20. When the output signal fluctuates, the voltage difference between the pull-up capacitor C1 and the pull-down capacitor C2 changes, and the current formed on the pull-up capacitor C1 and the pull-down capacitor C2 is inputted through the input end of the high potential output mos transistor M19 and the low potential output mos transistor M20 respectively, so as to compensate the output signal.

[0097] Exemplarily, when the equivalent output capacitance and the output resistance at the high potential output unit 121 and the low potential output unit 122 are equal, the pull-up capacitor C1 and the pull-down capacitor C2 are equal, and the capacitance and the resistance of the high potential Miller compensation circuit and the low potential Miller compensation circuit are equal, the direct current gain of the output module 120 is calculated as the following formula (1), the output pole expression of the output module 120 is calculated as the following formula (2), and the main pole expression of the output module 120 is calculated as the following formula (3), which are respectively shown as formula (1)-(3):

[0098] Aν(0)=(gm n ·gm 19 +gm p ·gm 20 )·R o1 R L (1)

[0099] w OUT =(gm 19 +gm 20 ) / C L (2)

[0100] w p1 = 1 / R o1 [(C o1 + gm 19 R L (C c1 + C GD19 ) + (g m r o ) PD C1)] (3)

[0101] wherein C oi and R oi (i = 1, 2) are the equivalent output capacitance and the equivalent output resistance at the high potential output unit 121 and the low potential output unit 122, respectively. gm 19 , gm 20 , gm PD , and gm PU represent the transconductance of M19, M20, MPD2, and MPU1, respectively. Z is the equivalent AC impedance of the floating current source. Since the floating current source only flows DC signal and does not pass AC signal, Z tends to infinity.

[0102] wherein C GD19 is the gate-drain parasitic capacitance of the output transistor. Since the size of the output transistor is relatively large, this capacitance cannot be ignored generally. (g m r o ) PD represents the equivalent output impedance of the signal pull-down unit 132. C L is the equivalent capacitance of the buffer output terminal 123, and R L is the equivalent resistance of the buffer output terminal 123.

[0103] It should be noted that the equivalent capacitance C L of the buffer output terminal 123 is not much different from the value of the pull-up capacitance C1, and the equivalent output resistance of the high potential output unit 121 or the low potential output unit 122 is not much different from the equivalent output resistance r o of the signal pull-up unit 131 or the signal pull-down unit 132. Based on this, the dominant pole w p1 of the transient enhancement buffer 100 provided in the embodiment is smaller than the output pole w OUT , that is, the stability of the transient enhancement buffer 100 is higher.

[0104] Preferably, the width-length ratio of the high potential output mos transistor M19 is not less than 300u / 1u, and the width-length ratio of the low potential output mos transistor M20 is not less than 100u / 1u, so as to increase the output current carrying capacity of the transient enhancement buffer 100 and facilitate the transient enhancement buffer 100 to improve performance.

[0105] Further, as shown in Figure 2 the high potential output unit 121 further comprises a high potential Miller compensation circuit connected with the high potential signal enhancement circuit, the high potential Miller compensation circuit is used for signal compensation of the high potential signal enhancement circuit, to eliminate the Miller effect, improve the frequency response and switching speed of the high potential signal enhancement circuit, and improve the performance of the transient enhancement buffer. Similarly, the low potential output unit 122 further comprises a low potential Miller compensation circuit connected with the low potential signal enhancement circuit.

[0106] Exemplarily, the high potential Miller compensation circuit comprises a high potential Miller compensation capacitor C c1 and a high potential Miller compensation resistor R z1 connected in sequence between the gate and the drain of the high potential output mos M19; the low potential Miller compensation circuit comprises a low potential Miller compensation capacitor C c2 and a low potential Miller compensation resistor R z2 .

[0107] In some embodiments of the present application, as shown in Figure 2 the input module 110 comprises a high potential differential circuit and a low potential differential circuit. Among them, the high potential differential circuit is used for common mode rejection of the input signal in the high potential input signal range, and outputs a high potential differential signal; the low potential differential circuit is used for common mode rejection of the input signal in the low potential input signal range, and outputs a low potential differential signal.

[0108] The high potential differential circuit and the low potential differential circuit are connected to the same input terminal and access the same input signal. Since the input signal voltage ranges in which the high potential differential circuit and the low potential differential circuit can work are different, the high potential differential circuit and the low potential differential circuit are simultaneously connected in the input module, which can expand the voltage range of the input signal, specifically, can cover the input signal in the range from the ground terminal GND to the high potential terminal VDD, and improves the working interval of the transient enhancement buffer 100. It should be noted that the high potential input signal range and the low potential input signal range partially overlap, so the high potential differential circuit and the low potential differential circuit may be in working state at the same time.

[0109] Exemplarily, the high potential differential circuit comprises an nmos differential input circuit, and the low potential differential circuit comprises a pmos differential input circuit.

[0110] Further, the input module 110 further comprises: a high potential current mirror connected with the high potential differential circuit, for amplifying the high potential differential signal and generating a stable high potential amplified signal; and a low potential current mirror connected with the low potential differential circuit, for amplifying the low potential differential signal and generating a stable low potential amplified signal. Specifically, as shown in Figure 2 Due to the characteristics of the current mirror, the left and right branch static currents of the high potential current mirror and the low potential current mirror are always equal, thereby ensuring the stability of the amplified signals output by the high potential current mirror and the low potential current mirror. It should be noted that the amplified signal coupled by the high potential output unit 121 is a high potential amplified signal, and the amplified signal coupled by the low potential output unit 122 is a low potential amplified signal, i.e., as shown in Figure 2 The high potential amplified signal is input to the high potential output unit 121 through the gate of the high potential output mos transistor M19, and the low potential amplified signal is input to the low potential output unit 122 through the gate of the low potential output mos transistor M20.

[0111] The input module 110 further comprises a superposition circuit connected between the high potential current mirror and the low potential current mirror. As shown in Figure 2 In order to control the static currents of the high potential output mos transistor M19 and the low potential output mos transistor M20, the superposition circuit comprises a current superposition sub-circuit, which comprises two output terminals connected with the gates of the high potential output mos transistor M19 and the low potential output mos transistor M20, respectively, to control the static currents of the high potential output mos transistor M19 and the low potential output mos transistor M20, so that the high potential amplified signal is the amplified input signal of the high potential output mos transistor M19, and the low potential amplified signal is the amplified input signal of the low potential output mos transistor M20, thereby enabling the output module 120 to realize the signal output of the transient enhancement buffer 100. Specifically, the specific structure and working principle of the current superposition sub-circuit have been disclosed in the prior art, and those skilled in the art should know that this embodiment will not be described here.

[0112] Further, the superposition circuit further comprises a floating current source for providing a constant current to the high potential current mirror and the low potential current mirror, thereby ensuring that the sum of the currents flowing through the current superposition sub-circuit is stable and unchanged, so that the static currents of the high potential output mos transistor M19 and the low potential output mos transistor M20 are stable, and thereby the output signal of the transient enhancement buffer 100 is a fixed voltage value.

[0113] For ease of understanding, the structure of an input module 110 is exemplarily given below.

[0114] As shown in Figure 2As shown, the input signal is connected to the transient enhancement buffer 100 by a high potential differential circuit and a low potential differential circuit. The high potential differential circuit includes first and second differential nmos transistors M1 and M2 with their sources connected together and to a high potential terminal VDD, their gates connected to the input of the transient enhancement buffer 100, and their drains connected to the output of the high potential differential signal and to a high potential current mirror. The low potential differential circuit includes first and second differential pmos transistors M3 and M4 with their sources connected together and to a ground terminal GND, their gates connected to the input of the transient enhancement buffer 100, and their drains connected to the output of the low potential differential signal and to a low potential current mirror.

[0115] The high potential current mirror includes a first current mirror nmos transistor M15 with its source connected to the output of the first differential nmos transistor M1 and its drain connected to a floating current source, a second current mirror nmos transistor M16 with its source connected to the output of the second differential nmos transistor M2 and its drain connected to a current superposition sub-circuit, a third current mirror nmos transistor M17 with its source connected to the ground terminal GND and its drain connected to the output of the first differential nmos transistor M1, and a fourth current mirror nmos transistor M18 with its source connected to the ground terminal GND and its drain connected to the output of the second differential nmos transistor M2. The gates of the first and second current mirror nmos transistors M15 and M16 are connected together and to the gate of an up pull mos transistor MPU1 via an up pull external port VBN2 for input of an up pull control signal. The gates of the third and fourth current mirror nmos transistors M17 and M18 are connected together and to the gate of an up pull bias mos transistor MPU2.

[0116] The low potential current mirror comprises: a first differential pmos tube M3 connected to the output end of the source, and a first current mirror pmos tube M9 connected to the drain of the floating current source; a second differential pmos tube M4 connected to the output end of the source, and a second current mirror pmos tube M10 connected to the current superposition sub-circuit; a third current mirror pmos tube M7 connected to the high potential end VDD and the output end of the source of the first differential pmos tube M3; and a fourth current mirror pmos tube M8 connected to the high potential end VDD and the output end of the source of the second differential pmos tube M4. The gate of the first current mirror pmos tube M9 and the second current mirror pmos tube M10 is connected, and the gate of the pull-down mos tube MPD2 is inputted with a pull-down guide signal through the pull-down external port VBP2. The gate of the third current mirror pmos tube M7 and the fourth current mirror pmos tube M8 is connected, and the gate of the pull-down bias mos tube MPD1 is connected.

[0117] The floating current source comprises a floating current source nmos tube M11 and a floating current source pmos tube M12. The source of the floating current source nmos tube M11 is connected to the drain of the floating current source pmos tube M12, and the drain of the floating current source nmos tube M11 is connected to the source of the floating current source pmos tube M12. The source of the floating current source nmos tube M11 and the drain of the floating current source pmos tube M12 are connected to the low potential current mirror, and the drain of the floating current source nmos tube M11 and the source of the floating current source pmos tube M12 are connected to the high potential current mirror.

[0118] The current superposition sub-circuit comprises a current superposition nmos tube M13 and a current superposition pmos tube M14. The source of the current superposition nmos tube M13 is connected to the drain of the current superposition pmos tube M14, and the drain of the current superposition nmos tube M13 is connected to the source of the current superposition pmos tube M14. The gate of the current superposition nmos tube M13 is connected to the first current source external port VBP3, and the gate of the current superposition pmos tube M14 is connected to the second current source external port VBN3. The first current source guide signal inputted by the first current source external port VBP3 and the second current source guide signal inputted by the second current source external port VBN3 control the current size flowing through the current superposition sub-circuit, thereby realizing the control of the high potential output mos tube M19 and the low potential output mos tube M20. The source of the current superposition nmos tube M13 and the drain of the current superposition pmos tube M14 are connected to the low potential current mirror, and the drain of the current superposition nmos tube M13 and the source of the current superposition pmos tube M14 are connected to the high potential current mirror.

[0119] Further, the gates of the floating current source nmos transistor M11 and the current superposition nmos transistor M13 are connected, and a first current source conduction signal is input from the first current source external port VBP3; the gates of the floating current source pmos transistor M12 and the current superposition pmos transistor M14 are connected, and a second current source conduction signal is input from the second current source external port VBN3.

[0120] The transient enhancement buffer 100 provided in the embodiment one, through the transient enhancement module 130, feeds back the fluctuation of the output signal, and generates the pull-up coupling signal and the pull-down coupling signal, so that the output module adjusts the output signal, thereby outputting a stable voltage, which is beneficial to improve the stability of the transient enhancement buffer 100.

[0121] As shown in Figures 4 to 6 , it is a simulation result schematic diagram of the transient enhancement buffer 100 provided in the embodiment.

[0122] As shown in Figure 4 , it is a closed-loop response simulation result schematic diagram of the transient enhancement buffer 100 provided in the embodiment, wherein when the load current range is 0-20mA, the open-loop gain range is 121-138dB, the unit gain frequency is 8.8-13.5MHz, the response speed is fast, the phase margin range is 67.1°-84.6°, and the system is relatively stable.

[0123] As shown in Figure 5 , it is a comparison schematic diagram of the step response simulation results of the transient enhancement buffer 100 provided in the embodiment and the existing buffer. When the load current rises from 0 to 10mA, the rise time of the transient enhancement buffer 100 provided in the embodiment is 150ns, the stable time is 251ns, and the maximum undershoot voltage is 0.327V. Compared with the buffer in the prior art, the maximum undershoot voltage is reduced by 126mV, and the transient load performance is optimized by 27.8%. When the load current drops from 10mA to 0, the drop time of the transient enhancement buffer 100 provided in the embodiment is 150ns, the stable time is 321ns, and the maximum overshoot voltage is 0.28V, and the transient load performance is optimized by 30.7%. Compared with the buffer in the prior art, the response speed is faster, the stability is better, and only 5μA of static current is consumed, so that better stability effect is achieved while the energy consumption is small.

[0124] As shown in Figure 6The simulation results of the 5V and 10V step response of the transient enhancement buffer 100 are shown. When the input step voltage is 5V and 10V, and the load is 10kΩ and 40pF, the output voltage is basically consistent with the input voltage, and the voltage swing is 13.4V / us and 43V / us respectively. The voltage stability of the output of the transient enhancement buffer 100 is good, basically without distortion, and the response speed is fast.

[0125] The theoretical calculation and simulation results of the chip under the condition of 27℃ and 5V working voltage are shown in Table 1, wherein D1-D8 are input control codes, VH_IN and VL_IN are high and low voltages input from outside of the chip respectively. In the table, ΔV1=VH_IN-VL_IN, ΔV2=VH-VL, ΔV3=VH-Vlin_H, and ΔV4=Vlin_L-VL. The ideal value and the simulation result are basically consistent, and the maximum deviation is only 0.6mV. The actual application effect of the transient enhancement buffer 100 is good.

[0126]

[0127]

[0128] Table 1.

[0129] Based on the above, the embodiment provides a transient enhancement buffer 100, which has basically no distortion in the output signal, good stability, fast response speed, and small energy consumption.

[0130] On the other hand, the application also provides a gamma voltage generation system 200, as shown in Figure 7As shown, the gamma voltage generating system 200 comprises a magnitude adjusting device 210 and a region dividing device 220 connected in series, and a high nonlinearity output device 230, a linear output device 240 and a low nonlinearity output device 250 connected to the region dividing device 220 respectively. The magnitude adjusting device 210 is configured to generate a high magnitude voltage and a low magnitude voltage by voltage division and amplitude modulation based on a system input signal, the high magnitude voltage being the maximum value of the output gamma voltage and the low magnitude voltage being the minimum value of the output gamma voltage; the region dividing device 220 is configured to obtain a region input signal by voltage division based on the high magnitude voltage and the low magnitude voltage, and generate a high linear voltage and a low linear voltage by amplitude modulation based on the region input signal, the high linear voltage being the maximum value of the linear region of the gamma voltage and the low linear voltage being the minimum value of the linear region of the gamma voltage; the linear output device 240 is configured to obtain a linear input signal by voltage division based on the high linear voltage and the low linear voltage, and generate at least one linear voltage based on the linear input signal; the high nonlinearity output device 230 is configured to obtain a high nonlinearity region signal by voltage division based on the high magnitude voltage and the high linear voltage, and generate at least one high nonlinearity voltage by amplitude modulation based on the high nonlinearity region signal; and the low nonlinearity output device is configured to obtain a low nonlinearity region signal by voltage division based on the low linear voltage and the low magnitude voltage, and generate at least one low nonlinearity voltage by amplitude modulation based on the low nonlinearity region signal.

[0131] It should be noted that, since the voltage value distribution of the gamma voltage actually conforms to a line segment with a straight line in the middle and curved lines at both ends, the voltage value distribution of the gamma voltage can be divided into three regions: a high nonlinearity region, a linear region and a low nonlinearity region. Based on this, the embodiment first outputs the high magnitude voltage and the low magnitude voltage by the magnitude adjusting device 210 as the maximum value and the minimum value of the gamma voltage, then divides the linear region and the nonlinearity region by the region dividing device 220, and finally outputs multiple voltage values by the high nonlinearity output device 230, the linear output device 240 and the low nonlinearity output device 250, i.e., by the two-stage adjustment method of first determining the maximum value and the minimum value of the gamma voltage and then regulating the intermediate voltage, and the three-region output structure of the high nonlinearity region, the linear region and the low nonlinearity region, the voltage value output by the gamma voltage generating system 200 highly coincides with the voltage value distribution of the gamma voltage. As shown, Figure 8 The embodiment exemplarily outputs eight voltage values, the connected line segments highly coincide with the actual curve of the gamma voltage, and the gamma voltage generating system 200 provided by the embodiment has simple structure and convenient operation. Based on this, the gamma voltage generating system 200 provided by the embodiment can simply and quickly output voltage values, and the voltage values highly coincide with the actual gamma voltage, which is beneficial to improving the display effect of the display, making it more consistent with the human sensory system, and is beneficial to the development of the display.

[0132] Furthermore, the amplitude adjustment device 210, the region division device 220, the linear output device 240, the high nonlinearity output device 230, and the low nonlinearity output device 250 all include the transient enhancement buffer 100 as described above. That is, high amplitude voltage, low amplitude voltage, high linear voltage, low linear voltage, all linear voltages, all high nonlinear voltages, and low nonlinear voltages are all buffered and isolated by the transient enhancement buffer to enhance the stability and accuracy of the output voltage of the gamma voltage generating system 200.

[0133] Specifically, such as Figure 7 As shown, the amplitude adjustment device 210 further includes an amplitude adjustment resistor 211 and a high amplitude voltage selector 212 and a low amplitude voltage selector 213 respectively connected to the amplitude adjustment resistor 211; the region division device 220 further includes a region division resistor 221 and a high linear voltage selector 222 and a low linear voltage selector 223 respectively connected to the region division resistor 221; the linear output device 240 further includes a linear output resistor 241; the high nonlinear output device 230 further includes a high nonlinear output resistor 231 and at least one high nonlinear voltage selector 232 connected to the high nonlinear output resistor 231; the low nonlinear output device 250 further includes a low nonlinear output resistor 251 and at least one low nonlinear voltage selector 252 connected to the low nonlinear output resistor.

[0134] The amplitude adjustment resistor 211, the region division resistor 221, the high nonlinearity output resistor 231, the linear output resistor 241, and the low nonlinearity output resistor 251 all have voltage divider structures to divide the voltage value connected across the resistor into several parts. For example, the amplitude adjustment resistor 211, the region division resistor 221, the high nonlinearity output resistor 231, the linear output resistor 241, and the low nonlinearity output resistor 251 all have taps for voltage division.

[0135] High-amplitude voltage selector 212, low-amplitude voltage selector 213, high-linearity voltage selector 222, low-linearity voltage selector 223, all high-nonlinearity voltage selectors 232, and all low-nonlinearity voltage selectors 252 can all process the input signal to generate a corresponding voltage. For example, high-amplitude voltage selector 212, low-amplitude voltage selector 213, high-linearity voltage selector 222, low-linearity voltage selector 223, all high-nonlinearity voltage selectors 232, and all low-nonlinearity voltage selectors 252 are all data selectors. The data selectors are connected to taps on corresponding resistors to select the desired output voltage value from multiple voltages.

[0136] Specifically, such as Figure 7As shown, the system input signal is a displacement voltage signal, the amplitude adjustment resistor 211 divides the system input signal and outputs different voltages through the taps, the high-amplitude voltage selector 212 and the low-amplitude voltage selector 213 select the voltages as the high-amplitude voltage and the low-amplitude voltage through the connected taps. The high-amplitude voltage and the low-amplitude voltage are output through the corresponding transient enhancement buffer 100, and at the same time, the high-amplitude voltage and the low-amplitude voltage are input to the area division resistor 221 to obtain the high-linear voltage and the low-linear voltage. The specific principle and process are described above and will not be repeated here.

[0137] Similarly, the high-nonlinear output device 230 outputs at least one high-nonlinear voltage, and the low-nonlinear output device 250 outputs at least one low-nonlinear voltage. The specific principle and process are described above and will not be repeated here.

[0138] It should be noted that the linear output device 240 outputs at least one linear voltage. Since the gamma voltage is linearly distributed in the linear region, the linear voltage does not need to be selected and amplitude-modulated by the data selector, and at least one transient enhancement buffer is connected to the tap of the linear output resistor 241 to output the linear voltage.

[0139] Based on this, the embodiment provides a gamma voltage generation system 200, which adopts a two-stage adjustment method of first determining the maximum value and the minimum value of the gamma voltage and then regulating the intermediate voltage, and a three-region output structure of the high-nonlinear region, the linear region and the low-nonlinear region, so that the voltage value output by the gamma voltage generation system 200 is highly coincident with the voltage value distribution of the gamma voltage, and is stably output through the transient enhancement buffer 100, which is applied to a display, so that the brightness of the display is more consistent with the human sensory system, and is beneficial to improving the display effect of the display.

[0140] In summary, the transient enhancement buffer and the gamma voltage generation system provided in the present application, wherein the transient enhancement buffer 100 feeds back the fluctuation of the output signal through the transient enhancement module 130, generates a pull-up coupling signal and a pull-down coupling signal, and adjusts the output signal through the output module, so as to output a stable voltage, which is beneficial to improving the stability of the transient enhancement buffer 100. At the same time, the gamma voltage generation system 200 adopts a two-stage adjustment method of first determining the maximum value and the minimum value of the gamma voltage and then regulating the intermediate voltage, and a three-region output structure of the high-nonlinear region, the linear region and the low-nonlinear region, so that the output voltage value is more accurate and highly coincident with the voltage value distribution of the actual gamma voltage, which is beneficial to improving the display effect of the display.

[0141] The description of the corresponding process or structure of each of the above figures has its own emphasis, and the parts not described in detail in a certain process or structure can be referred to the related description of other processes or structures.

[0142] The above embodiments are only illustrative of the principles of the present application and its effects, and are not intended to limit the present application. Any modification or change made by any person skilled in the art without departing from the spirit and scope of the present application shall be covered by the claims of the present application.

Claims

1. A transient enhanced buffer, characterized by, The input module, the output module and the transient enhancement module are connected in sequence; The input module is configured to amplify the input signal to obtain an amplified signal; The transient enhancement module comprises a signal pull-up unit and a signal pull-down unit, the signal pull-up unit is configured to generate a pull-up coupling signal based on a feedback signal, and the signal pull-down unit is configured to generate a pull-down coupling signal based on the feedback signal; The output module comprises a buffer output end, a high potential output unit and a low potential output unit connected to the buffer output end respectively, the high potential output unit is configured to couple and enhance the amplified signal by the pull-up coupling signal to output a high potential enhanced signal, the low potential output unit is configured to couple and enhance the amplified signal by the pull-down coupling signal to output a low potential enhanced signal, and the buffer output end is configured to output an output signal based on the high potential enhanced signal and the low potential enhanced signal and feed back the output signal to the transient enhancement module as the feedback signal.

2. The transient enhanced bumper of claim 1, wherein, The signal pull-up unit comprises a pull-up amplification circuit and a pull-up signal conversion circuit connected in sequence, the pull-up amplification circuit is configured to amplify the feedback signal to obtain a pull-up feedback signal, and the pull-up signal conversion circuit is configured to convert the pull-up feedback signal into a pull-up current signal as a pull-up coupling signal; The signal pull-down unit comprises a pull-down amplification circuit and a pull-down signal conversion circuit connected in sequence, the pull-down amplification circuit is configured to amplify the feedback signal to obtain a pull-down feedback signal, and the pull-down signal conversion circuit is configured to convert the pull-down feedback signal into a pull-down current signal as a pull-down coupling signal.

3. The transient enhancement buffer according to claim 2, wherein The pull-up amplification circuit comprises a pull-up mos tube, the pull-up signal conversion circuit comprises a pull-up capacitor, a source of the pull-up mos tube is connected to the buffer output end for receiving the feedback signal, a drain of the pull-up mos tube is connected to one end of the pull-up capacitor, a gate of the pull-up mos tube inputs a pull-up guide signal, and the other end of the pull-up capacitor is connected to an input end of the high potential output unit; The pull-down amplification circuit comprises a pull-down mos tube, the pull-down signal conversion circuit comprises a pull-down capacitor, a source of the pull-down mos tube is connected to the buffer output end for receiving the feedback signal, a drain of the pull-down mos tube is connected to one end of the pull-down capacitor, a gate of the pull-down mos tube inputs a pull-down guide signal, and the other end of the pull-down capacitor is connected to an input end of the low potential output unit.

4. The transient enhanced bumper of claim 2, wherein, The signal pull-up unit further comprises a pull-up bias circuit connected to the pull-up amplification circuit, the pull-up bias circuit is configured to provide a bias working voltage for the pull-up amplification circuit; and the signal pull-down unit further comprises a pull-down bias circuit connected to the pull-down amplification circuit, the pull-down bias circuit is configured to provide a bias working voltage for the pull-down amplification circuit.

5. The transient enhancement buffer according to claim 1, wherein The high potential output unit comprises a high potential signal enhancement circuit and a high potential Miller compensation circuit connected with the high potential signal enhancement circuit, the high potential signal enhancement circuit is used for coupling enhancement of the amplified signal by the pull-up coupling signal to obtain a high potential enhanced signal, and the high potential Miller compensation circuit is used for signal compensation of the high potential signal enhancement circuit. The low potential output unit comprises a low potential signal enhancement circuit and a low potential Miller compensation circuit connected with the low potential signal enhancement circuit, the low potential signal enhancement circuit is used for coupling enhancement of the amplified signal by the pull-down coupling signal to obtain a low potential enhanced signal, and the low potential Miller compensation circuit is used for signal compensation of the low potential signal enhancement circuit.

6. The transient enhancement buffer according to claim 5, wherein The high potential signal enhancement circuit comprises a high potential output MOS transistor, the gate of the high potential output MOS transistor is connected with the output end of the high potential output unit and the output end of the signal pull-up unit respectively, the drain of the high potential output MOS transistor is used as the output end of the high potential signal enhancement circuit and is connected with the output end of the low potential signal enhancement circuit, and the source of the high potential output MOS transistor is connected with a high potential end; the high potential Miller compensation circuit comprises a high potential Miller compensation capacitor and a high potential Miller compensation resistor connected with each other between the gate and the drain of the high potential output MOS transistor. The low potential signal enhancement circuit comprises a low potential output MOS transistor, the gate of the low potential output MOS transistor is connected with the output end of the low potential output unit and the output end of the signal pull-down unit, the drain of the low potential output MOS transistor is used as the output end of the low potential signal enhancement circuit and is connected with the output end of the high potential signal enhancement circuit, and the source of the low potential output MOS transistor is connected with a low potential end; the low potential Miller compensation circuit comprises a low potential Miller compensation capacitor and a low potential Miller compensation resistor connected with each other between the gate and the drain of the low potential output MOS transistor.

7. The transient enhanced bumper of claim 1, wherein, The input module comprises a high potential differential circuit and a high potential current mirror connected with the high potential differential circuit, a low potential differential circuit and a low potential current mirror connected with the low potential differential circuit; The high potential differential circuit is used for common-mode rejection of the input signal in a high potential input signal range to output a high potential differential signal, the high potential current mirror is used for amplification based on the high potential differential signal to generate a stable high potential amplified signal, the low potential differential circuit is used for common-mode rejection of the input signal in a low potential input signal range to output a low potential differential signal, and the low potential current mirror is used for amplification based on the low potential differential signal to generate a stable low potential amplified signal. The amplified signal in the high potential output unit is a high potential amplified signal, and the amplified signal in the low potential output unit is a low potential amplified signal.

8. The transient enhanced bumper of claim 7, wherein, The input module further comprises a superposition circuit connected between the high potential current mirror and the low potential current mirror, the superposition circuit comprising a current superposition sub-circuit and a floating current source, the floating current source being used to provide constant current for the high potential current mirror and the low potential current mirror, and the current superposition sub-circuit being used to control the static current of the high potential output mos tube and the low potential output mos tube, so as to realize that the high potential amplification signal is the amplification input signal of the high potential output mos tube, and the low potential amplification signal is the amplification input signal of the low potential output mos tube.

9. A gamma voltage generating system, characterized by, The amplitude adjusting device, the region dividing device, the linear output device, the high non-linear output device and the low non-linear output device each comprise at least one transient enhancement buffer as claimed in any one of claims 1-8. The amplitude adjusting device is used to generate high amplitude voltage and low amplitude voltage by voltage division and amplitude modulation based on the system input signal; the region dividing device is used to obtain region input signal by voltage division based on the high amplitude voltage and the low amplitude voltage, and generate high linear voltage and low linear voltage by amplitude modulation on the region input signal; the linear output device is used to obtain linear input signal by voltage division based on the high linear voltage and the low linear voltage, and generate at least one linear voltage based on the linear input signal; the high non-linear output device is used to obtain high non-linear region signal by voltage division based on the high amplitude voltage and the high linear voltage, and generate at least one high non-linear voltage by amplitude modulation on the high non-linear region signal; and the low non-linear output device is used to obtain low non-linear region signal by voltage division based on the low linear voltage and the low amplitude voltage, and generate at least one low non-linear voltage by amplitude modulation on the low non-linear region signal. The amplitude adjusting device, the region dividing device, the linear output device, the high non-linear output device and the low non-linear output device each comprise at least one transient enhancement buffer as claimed in any one of claims 1-8. The high amplitude voltage, the low amplitude voltage, the high linear voltage, all the low linear voltages, all the linear voltages, all the high non-linear voltages and the low non-linear voltages are all buffered and isolated by the transient enhancement buffer. The amplitude adjusting device further comprises amplitude adjusting resistor, high amplitude voltage selector and low amplitude voltage selector connected with the amplitude adjusting resistor respectively, the amplitude adjusting resistor being used to generate amplitude adjusting signal by voltage division on the system input signal, the high amplitude voltage selector being used to generate the high amplitude voltage by amplitude modulation on the amplitude adjusting signal, and the low amplitude voltage selector being used to generate the low amplitude voltage by amplitude modulation on the amplitude adjusting signal.

10. The gamma voltage generating system of claim 9, wherein, ​ The region dividing device further comprises a region dividing resistor, a high linear voltage selector and a low linear voltage selector connected to the region dividing resistor respectively, the region dividing resistor is used to generate the region input signal by voltage division based on the high amplitude voltage and the low amplitude voltage, the high linear voltage selector is used to generate the high linear voltage by amplitude modulation based on the region input signal, and the low linear voltage selector is used to generate the low linear voltage by amplitude modulation based on the region input signal; The linear output device further comprises a linear output resistor, the linear output resistor is used to generate a linear input signal by voltage division based on the high linear voltage and the low linear voltage, and generate at least one linear voltage based on the linear input signal; The high nonlinear output device further comprises a high nonlinear output resistor and at least one high nonlinear voltage selector connected to the high nonlinear output resistor, the high nonlinear output resistor is used to generate the high nonlinear region signal by voltage division based on the high amplitude voltage and the high linear voltage, and the high nonlinear voltage selector is used to generate the high nonlinear voltage by amplitude modulation based on the high nonlinear region signal; The low nonlinear output device further comprises a low nonlinear output resistor and at least one low nonlinear voltage selector connected to the low nonlinear output resistor, the low nonlinear output resistor is used to generate the low nonlinear region signal by voltage division based on the low amplitude voltage and the low linear voltage, and the low nonlinear voltage selector is used to generate the low nonlinear voltage by amplitude modulation based on the low nonlinear region signal.

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