Parameter configuration circuit, parameter configuration method, nonvolatile memory and chip

Abstract

The invention discloses a parameter configuration circuit, a parameter configuration method, a nonvolatile memory and a chip. The parameter configuration circuit is used for providing configuration parameters of the nonvolatile memory and comprises a storage array, the storage array comprises m storage areas, each storage area comprises n storage units, and the storage units in the same storage area sequentially record data corresponding to the user data when the corresponding number of times of user data are input. In the configuration parameters, the storage area corresponds to the numerical value change of the data bit, and n and m are positive integers; for each storage area, the conversion unit accumulates the storage data of each storage unit in the storage area to obtain a numerical value of a data bit corresponding to the storage area; and the configuration register provides configuration parameters according to the data bit values provided by the conversion unit. By simplifying the user data writing process, the time required for operation is shortened, the probability of accidental power failure in the user data writing process is reduced, and the stability is improved.

Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor non-volatile memory, and in particular to a parameter configuration circuit, a parameter configuration method, a non-volatile memory and a chip. Background Art

[0002] Non-volatile memory chips are responsible for data storage in electronic systems and are the core of semiconductor storage products. Their storage capacity and reading speed directly affect the performance of electronic devices. When the non-volatile memory chip is powered on, it is necessary to set the non-volatile memory chip through the parameter configuration circuit. Specifically, the configuration parameters stored in the storage array are read out to the configuration register to further set the parameters of other circuits in the non-volatile memory chip.

[0003] In order to prevent the configuration parameters stored in the non-volatile memory chip from being lost after the device is powered off or restarted, a non-volatile memory array (NVM) is usually used to store the configuration parameters in the prior art.

[0004] However, users will frequently adjust the configuration parameters of non-volatile memory chips to adapt to different usage requirements. During the configuration parameter adjustment process, the storage array needs to erase the existing data before programming and writing new data. The cumulative time of the erase and programming operations results in a longer operation time required to adjust the configuration parameters. If the chip unexpectedly loses power during the operation, the configuration parameters of the non-volatile memory chip will be uncontrollable after power is restored, reducing the stability of the system operation. In addition, the number of erase and write times of non-volatile storage units is limited, which greatly affects the service life of non-volatile memory chips (especially non-volatile memory chips used in application scenarios where configuration parameters need to be adjusted frequently). Summary of the invention

[0005] In view of the above problems, the purpose of the present application is to provide a parameter configuration circuit, a parameter configuration method and a non-volatile memory, which can improve the stability and service life of the system operation.

[0006] According to one aspect of the present application, a parameter configuration circuit is provided, wherein the parameter configuration circuit is used to provide configuration parameters of a non-volatile memory, and the parameter configuration circuit includes: a storage array, the storage array includes m storage areas, each of the storage areas includes n storage cells, each of the storage cells in the same storage area sequentially records the value change of the data bit corresponding to the storage area in the configuration parameter when user data is input a corresponding number of times, and n and m are both positive integers; a conversion unit, for each of the storage areas, the conversion unit accumulates the storage data of each of the storage cells in the storage area to obtain the value of the data bit corresponding to the storage area; and a configuration register, providing the configuration parameter according to the value of each data bit provided by the conversion unit.

[0007] Optionally, the parameter configuration circuit also includes: a programming unit, which, when the user data is input, obtains corresponding programming data according to the comparison result between the configuration parameter and the user data, and programs the corresponding storage cells in each storage area according to the programming data, wherein, for each data bit, if the current configuration parameter is the same as the input user data, the storage data of the corresponding storage cell corresponds to an erased state; otherwise, the storage data of the corresponding storage cell corresponds to a programmed state.

[0008] Optionally, the storage array includes n programming addresses, each of the programming addresses has a storage unit corresponding to it in each of the storage areas, and the storage units corresponding to the programming addresses in the same storage area are different. The parameter configuration circuit also includes an address unit for obtaining the used programming addresses and providing addresses to be programmed corresponding to the programming data, wherein, when the n programming addresses are not all used, the addresses to be programmed are obtained based on the used programming addresses and a preset usage order of the programming addresses; when the n programming addresses are all used, the address unit is also used to provide a valid level of an erase instruction to erase the storage array, and provide the first programming address in the preset usage order as the address to be programmed.

[0009] Optionally, the address unit includes a volatile storage module.

[0010] Optionally, the programming unit includes: a data processing module, which compares the current configuration parameters with the input user data to obtain the programming data; and a writing module, which programs the corresponding storage unit in each storage area according to the programming data.

[0011] Optionally, the conversion unit includes: a reading module, which reads the storage data of each storage cell in each storage area of ​​the storage array; and a calculation module, which, for each storage area, sums the storage data of each storage cell in the storage area, and obtains the numerical value of the data bit corresponding to the storage area based on the sum; or a counting module, which, for each storage area, counts the storage cells in the programming state / erased state corresponding to the storage area, and obtains the numerical value of the data bit corresponding to the storage area based on the counting result.

[0012] According to another aspect of the present application, a non-volatile memory is provided, wherein the non-volatile memory includes: a parameter configuration circuit as described in any one of the above items, the parameter configuration circuit is used to provide configuration parameters of the non-volatile memory; and other circuits, the other circuits include interface circuits, clock circuits, control circuits and logic circuits, and the configuration parameters are used to set at least part of the other circuits.

[0013] According to a third aspect of the present application, a chip is provided, which includes the non-volatile memory as described above.

[0014] According to a fourth aspect of the present application, a parameter configuration method is provided, wherein the parameter configuration method is used to provide configuration parameters of a non-volatile memory, and the parameter configuration method comprises: reading a storage array, the storage array comprising m storage areas, each of the storage areas comprising n storage units, each of the storage units in the same storage area sequentially recording a change in a value of a data bit corresponding to the storage area in the configuration parameter when user data is input a corresponding number of times, and n and m are both positive integers; for each of the storage areas, accumulating the storage data of each of the storage units in the storage area to obtain a value of the data bit corresponding to the storage area; and providing the configuration parameter according to the value of each of the data bits.

[0015] Optionally, the parameter configuration method also includes: when inputting the user data, obtaining corresponding programming data according to the comparison result between the configuration parameters and the user data; and programming the corresponding storage cells in each of the storage areas according to the programming data, wherein, for each of the data bits, if the current configuration parameters are the same as the input user data, the storage data of the corresponding storage cell corresponds to an erased state; otherwise, the storage data of the corresponding storage cell corresponds to a programmed state.

[0016] Optionally, the storage array includes n programming addresses, each of the programming addresses has the storage unit corresponding to it in each of the storage areas, and the storage units corresponding to the programming addresses in the same storage area are different. Before performing the programming, the parameter configuration method also includes: obtaining the used programming addresses; and obtaining the address to be programmed corresponding to the programming data based on the used programming addresses, wherein, when the n programming addresses are not all used, the address to be programmed is obtained based on the used programming addresses and a preset usage order of the programming addresses; when the n programming addresses are all used, the storage array is erased, and the first programming address in the preset usage order is provided as the address to be programmed.

[0017] Optionally, the used programming addresses are stored in a volatile storage module.

[0018] Optionally, the method for obtaining the numerical value of the data bit corresponding to each of the storage areas includes: for each of the storage areas, summing the storage data of each of the storage cells in the storage area, and obtaining the numerical value of the data bit corresponding to the storage area based on the sum; or for each of the storage areas, counting the storage cells in the programming state / erased state corresponding to the storage area, and obtaining the numerical value of the data bit corresponding to the storage area based on the counting result.

[0019] According to the parameter configuration circuit, parameter configuration method, non-volatile memory and chip provided by the present application, a plurality of storage units are set in the storage area corresponding to each data bit of the configuration parameter in the storage array of the non-volatile memory. For each storage area, when user data is input, the change of the value of the data bit corresponding to the storage area is recorded in sequence through each storage unit, so that user data writing can be achieved only through programming operation. By simplifying the operation process, the operation time is greatly shortened, and the probability of accidental power failure during the user data writing process is reduced, thereby reducing the configuration parameter errors caused by accidental power failure and improving stability.

[0020] Furthermore, the storage array only needs to be erased once after all storage cells are fully written, which realizes an exponential increase in the number of times the storage array can be erased and written, greatly improving the service life of the storage array, that is, improving the service life of the parameter configuration circuit and the non-volatile memory. In addition, through the cyclic operation of multiple writes and one erase, the number of storage cells in each storage area can be reasonably set, which is more conducive to controlling the production cost of the non-volatile memory. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] The above and other objects, features and advantages of the present invention will become more apparent through the following description of the embodiments of the present invention with reference to the accompanying drawings, in which:

[0022] Figure 1 A schematic structural diagram of a non-volatile memory according to an embodiment of the present application is shown;

[0023] Figure 2 Show Figure 1 A schematic structural block diagram of the storage array;

[0024] Figure 3a Show Figure 1 The schematic diagram of the storage array as it leaves the factory is shown;

[0025] Figure 3b Show Figure 1 The schematic diagram of the storage array shown is full;

[0026] Figure 4 A schematic flow chart showing a parameter configuration method according to an embodiment of the present application is shown;

[0027] Figure 5 A schematic flow chart showing providing configuration parameters according to built-in data of a storage array;

[0028] Figure 6 A schematic flow chart showing adjusting built-in data of a storage array according to user data;

[0029] Figure 7 A schematic flow chart of obtaining an address to be programmed is shown. DETAILED DESCRIPTION

[0030] Various embodiments of the present invention will be described in more detail below with reference to the accompanying drawings. In each of the accompanying drawings, the same elements are represented by the same or similar reference numerals. For the sake of clarity, the various parts in the accompanying drawings are not drawn to scale.

[0031] At the same time, certain words are used in this patent specification and claims to refer to specific components. It should be understood by those skilled in the art that manufacturers may use different terms to refer to the same component. This patent specification and claims do not use differences in names as a way to distinguish components, but rather use differences in components' functions as the criteria for distinction.

[0032] It should be understood that in the following description, a "circuit" may include a single or multiple combined hardware circuits, programmable circuits, state machine circuits, and elements capable of storing instructions executed by programmable circuits. When an element or circuit is said to be "connected to" another element or an element or circuit is said to be "connected between" two nodes, it may be directly coupled or connected to another element or there may be an intermediate element, and the connection between the elements may be physical, logical, or a combination thereof. Conversely, when an element is said to be "directly coupled to" or "directly connected to" another element, it means that there is no intermediate element between the two.

[0033] In addition, in this article, relational terms such as first and second are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply that there is any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that the process, method, article or equipment including a series of elements includes not only those elements, but also includes other elements not explicitly listed, or also includes elements inherent to such process, method, article or equipment. In the absence of more restrictions, the elements limited by the statement "comprise one..." do not exclude the existence of other identical elements in the process, method, article or equipment including the elements.

[0034] It should also be noted that, in the various methods and processes of the present application, the size of the step numbers does not mean the order of execution, nor does it constitute any limitation on the implementation process of the embodiments of the present application.

[0035] Figure 1 Schematic diagram of the structure of the non-volatile memory of the embodiment of the present application is shown. Figure 1 As shown, the non-volatile memory 1 includes a parameter configuration circuit 100, an interface circuit, a clock circuit, a control circuit, a logic circuit, etc. For the convenience of description, in this application, the remaining circuits in the non-volatile memory 1 except the parameter configuration circuit 100 are collectively referred to as other circuits 200. When the non-volatile memory 1 is powered on, the parameter configuration circuit 100 provides configuration parameters to at least part of the other circuits 200 to complete the setting of the interface mode, protection mechanism, driving capability and other functions of the non-volatile memory. Among them, the configuration parameters include m data bits, that is, the length is m bits (bit), and m is a positive integer.

[0036] Furthermore, if Figure 1 As shown, the parameter configuration circuit 100 includes an interface unit 110 , a programming unit 120 , a storage array 130 , a conversion unit 140 , a configuration register 150 and an address unit 160 .

[0037] The storage array 130 stores the built-in data of the non-volatile memory (i.e., the configuration parameters currently provided by the parameter configuration circuit 100). In order to prevent the built-in data from being lost after the non-volatile memory is powered off or restarted, the storage array 130 uses a non-volatile memory (NVM) array in the embodiment of the present application.

[0038] Specifically, the storage array 130 includes m storage areas 131, each storage area 131 corresponds to a data bit in the configuration parameter. Each storage area 131 also includes n storage units, each storage unit has a capacity of 1 bit (the storage data of each storage unit is one of 0 and 1). Each storage unit in the same storage area sequentially records the value change of the corresponding data bit in the configuration parameter when the user data is input a corresponding number of times, and n and m are both greater than 1 and are integers. The cumulative result of the storage data of each storage unit in each storage area 131 corresponds to the value of the corresponding data bit in the configuration parameter (that is, the value of the corresponding data bit in the built-in data).

[0039] As an example, it is assumed that the configuration parameter includes three data bits, and the storage area 131 corresponding to each data bit includes four storage units (ie, n=4, m=3). Figure 2 Show Figure 1 The schematic structure diagram of the storage array is shown in FIG. Figure 2 As shown, the storage array 130 includes a first storage area 131-1 corresponding to a first data bit, and the first storage area 131-1 includes four storage units 131-11 to 131-14; a second storage area 131-2 corresponding to a second data bit, and the second storage area 131-2 includes four storage units 131-21 to 131-24; a third storage area 131-3 corresponding to a third data bit, and the third storage area 131-3 includes four storage units 131-31 to 131-34. It should be noted that, when leaving the factory, each storage unit defaults to an erased state. In the following, the storage data corresponding to the erased state of the storage unit is 0 as an example. At the same time, it should be understood that in some cases, the storage data corresponding to the erased state can also be 1, and this application does not impose too many restrictions on this.

[0040] The interface unit 110 is used to receive user data. Each time user data is received, the built-in data of the parameter configuration circuit 100 is changed.

[0041] The programming unit 120 is connected between the interface unit 110 and the storage array 130, and the programming unit 120 is also connected to the configuration register 150. When the parameter configuration circuit 100 receives user data, the corresponding programming data is obtained according to the comparison result between the configuration parameters currently provided by the parameter configuration circuit 100 (i.e., the current built-in data of the storage array) and the currently received user data, and the storage data of the corresponding storage unit in each storage area is adjusted according to the programming data.

[0042] like Figure 1As shown, the programming unit 120 includes, for example, a data processing module 121 and a writing module 122 which are sequentially connected between the interface unit 110 and the storage array 130. The data processing module 121 is also connected to the configuration register 150 to compare the corresponding data bits of the user data and the current configuration parameters bit by bit and generate programming data according to the comparison result. For each data bit, if the user data and the current configuration parameter have the same value in the data bit, the value corresponding to the data bit in the programming data is "0"; if the user data and the current configuration parameter have different values ​​in the data bit, the value corresponding to the data bit in the programming data is "1". The writing module 122 is connected to the data processing module 121 in communication, and programs the corresponding storage unit in the address to be programmed according to the programming data.

[0043] However, it should be understood that the present application is not limited thereto. For example, in some embodiments, the host computer may directly input programming data into the parameter configuration circuit 100 as user data.

[0044] The conversion unit 140 is connected between the storage array 130 and the configuration register 150. For each storage area 131, the conversion unit 140 accumulates the storage data of each storage unit in the storage area 131 to obtain the value of the data bit corresponding to the storage area.

[0045] like Figure 1 As shown, the conversion unit 140, for example, includes a reading module 141 and a calculation module 142 connected in sequence between the storage array 130 and the configuration register 150. The reading module 141 reads the storage data of each storage unit in each storage area 131 in the storage array 130. For each storage area 131, the calculation module 142 sums the storage data of each storage unit in the storage area 131, and obtains the value of the corresponding data bit of the storage area 131 according to the sum value. For each storage area 131, if the number of storage units with storage data of 1 is an even number, then the lowest bit of the corresponding sum value is 0, that is, the value of the corresponding data bit of the storage area 131 is 0; if the number of storage units with storage data of 1 is an odd number, then the lowest bit of the corresponding sum value is 1, that is, the value of the corresponding data bit of the storage area 131 is 1.

[0046] Further, based on the calculation characteristics of binary numbers, the lowest bit of the sum of the storage cells in each storage area is related to the number of the value 1. Therefore, in some embodiments, the calculation module 142 can also be replaced by a counting module to count the storage cells with storage data of 1 in each storage area (that is, to count the storage cells in the programming state). For each storage area 131, if the number of storage cells with storage data of 1 is an even number, then the value of the corresponding data bit of the storage area 131 is 0; if the number of storage cells with storage data of 1 is an odd number, then the value of the corresponding data bit of the storage area 131 is 1. In addition, in some embodiments, the storage cells with storage data of 0 in each storage area can also be counted (that is, the storage cells in the erased state are counted), so as to obtain the value of the corresponding data bit of the storage area 131 according to the number of storage cells in the erased state and the total number of storage cells in each storage area 131.

[0047] The configuration register 150 provides configuration parameters according to the values ​​of the data bits provided by the conversion unit 140 .

[0048] It should be noted that, in some embodiments, the storage cells of each storage area are managed independently. For each storage area, only when the value of the corresponding data bit of the storage area changes, a storage cell in the storage area is programmed to 1. However, this may easily lead to confusion in the management of the storage cells.

[0049] In a preferred embodiment, the storage units of each storage area are managed uniformly. Corresponding to each storage area including n storage units, the storage array has a total of n programming addresses, each programming address has a corresponding storage unit in each storage area, and each programming address has a different storage unit in the same storage area.

[0050] Accordingly, in order to correctly program the corresponding storage unit, Figure 1 As shown, the parameter configuration circuit 100 further includes an address unit 160. The address unit 160 is connected to the storage array 130 and is used to provide a to-be-programmed address corresponding to the programming data.

[0051] In some embodiments, the address unit 160 is also connected to the read module 141, obtains the used programming address according to the read result of the storage array, and uses the next programming address in the preset usage order of the used programming address as the address to be programmed corresponding to the user data.

[0052] In the process of programming each storage unit according to the programming data, if the corresponding programming data is the same as the value corresponding to the storage unit in the erased state, then although the storage unit is programmed, it is not actually necessary to adjust the storage data corresponding to the storage unit. In other words, the storage unit with the storage data of 1 must have been programmed, so in some embodiments, the address unit 160 is connected to the reading module 141 to obtain the used programming address according to the reading result of the reading module 141.

[0053] Specifically, the reading module 141 sequentially reads each storage unit in each storage area 131 in the storage array 130. For each storage area 131, the maximum programming address corresponding to the storage unit storing data 1 in the storage area 131 is used as the current programming address of the storage area. The maximum programming address among the current programming addresses of each storage area is used as the used programming address, thereby obtaining the address to be programmed.

[0054] In some embodiments, the current programming address of each storage area can be recorded separately and then compared. In some other embodiments, only one current programming address can be recorded, and during the reading process of the storage array, the current programming address can be continuously updated according to the reading result. This application does not impose too many restrictions.

[0055] In addition, the address unit 160 is also used to determine whether the storage array is "full" according to the used programming addresses. If the used programming addresses indicate that the storage array 130 is "full" (all n programming addresses are used), the address unit 160 sends an effective level of an erase instruction to the storage array 130 to control all storage cells in the storage array 130 to be restored to an erased state. Accordingly, the used programming addresses are also reset, and the address to be programmed is the first used programming address in the preset usage order.

[0056] Furthermore, in order to improve the response speed of the address unit 160 and to increase the service life of the address unit 160, the address unit 160 uses a volatile memory to obtain the used programming address. Each time the system is powered on, the address unit 160 obtains the used programming address according to the read result of the storage array 130. If the system remains powered on, then each time programming is performed according to the input user information, the address unit 160 automatically updates the used programming address.

[0057] Still taking the example that the storage array includes three storage areas (i.e., the configuration parameter includes three data bits), and each storage area includes four storage cells, then the storage area includes four programming addresses in total, and the x-th programming address corresponds to the x-th storage cell of the storage area, where x=one of 1, 2, 3, and 4. And by way of example, the user data input for the first time is "111"; the user data input for the second time is "110"; the user data input for the third time is "100"; and the user data input for the fourth time is "101". Figure 3a Show Figure 1 The schematic diagram of the storage array as shipped from the factory is shown; Figure 3b Show Figure 1 The following is a schematic diagram of a storage array that is full. Figure 3a and Figure 3b The working process of the parameter configuration circuit of the embodiment of the present application is further explained.

[0058] like Figure 3a As shown, when leaving the factory, the storage array 130 is in an erased state, and the values ​​corresponding to each storage unit in each storage area 131 are all 0. After the non-volatile memory 1 is powered on, the storage data of each storage unit in each storage area read by the reading module 141 are all 0, so the configuration parameter provided by the calculation module 142 to the configuration register 150 is "000". At the same time, the address unit 160 obtains that each storage unit is in an erased state according to the reading result of the reading module 141, so the address to be programmed provided by the address unit 160 when the user data is input next time is the first programming address, that is, corresponding to the first storage unit of each storage area.

[0059] When inputting user data for the first time, the data processing module 121 compares the current built-in data "000" with the first input user data "111". Since the values ​​of the data bits of the current configuration parameters and the user data are different, the generated programming data is "111". Figure 3b As shown, the write module 122 adjusts the storage data of the first storage unit of each storage area to 1 according to the programming data "111". Accordingly, as the storage data of the first storage unit changes, the reading result of the read module 141 changes, and the configuration parameter provided to the configuration register by the calculation module 142 also changes. Since there is only one storage unit with storage data of 1 in each storage area, the configuration parameter is also updated to "111", which is consistent with the user data input for the first time. At the same time, since the programming address (first programming address) corresponding to the first storage unit of each storage area is the maximum programming address, the address unit 160 records the first programming address as the used programming address, and the address to be programmed provided by the address unit 160 when the user data is input next time is the second programming address (i.e., corresponding to the second storage unit of each storage area).

[0060] When the user data is input for the second time, the data processing module 121 compares the current configuration parameter "111" with the second input user data "110". Since the current configuration parameter and the user data differ only in the value of the third data bit, the generated programming data is "001". Figure 3b As shown, the write module 122 only adjusts the storage data of the second storage unit in the third storage area to 1 according to the programming data "001". Accordingly, as the storage data of the second storage unit in the third storage area changes, the reading result of the read module 141 changes, and the configuration parameter provided to the configuration register by the calculation module 142 also changes. Since there are 1 storage unit storing data of 1 in the first and second storage areas, and 2 storage units storing data of 1 in the third storage area, the configuration parameter is also updated to "110", which is consistent with the user data input for the second time. At the same time, since the programming address (second programming address) corresponding to the second storage unit in the third storage area is the maximum programming address, the address unit 160 records the second programming address as the used programming address, and the address to be programmed provided by the address unit 160 when the user data is input next time is the third programming address (i.e., the third storage unit corresponding to each storage area).

[0061] Similarly, for the third and fourth user data input, the working process of the parameter configuration circuit 100 is the same, which will not be described again.

[0062] After inputting user data four times, since the programming address (fourth programming address) corresponding to the fourth storage unit of the third storage area is the maximum programming address, and the use of the fourth programming address indicates that the storage array has been fully written. Therefore, when inputting user data for the fifth time, the address unit 160 provides the effective level of the erase instruction to the storage array 130, and programs the storage data of all storage units in the storage array 130 to 0. Correspondingly, the value of each data bit of the configuration parameter is also set to 0. At the same time, the used programming address recorded by the address unit 160 is also reset. Therefore, when inputting user data for the fifth time, the address to be programmed provided by the address unit 160 is the first programming address (i.e., corresponding to the first storage unit of each storage area).

[0063] Furthermore, although in the above embodiments, the configuration parameters provided by the configuration register 150 change with the changes in the data built into the storage array, it should be understood that the present application should not be limited thereto. For example, in some embodiments, the configuration register 150 is also in communication connection with the interface unit 110, and when user data is input, the data processing module 121 and the configuration register 150 act synchronously, thereby further improving the response speed of the parameter configuration circuit 100 to adjust the configuration parameters according to the user data.

[0064] According to the parameter configuration circuit provided by the present application, a plurality of storage units are set in the storage area corresponding to each data bit of the configuration parameter in the storage array of the non-volatile memory. For each storage area, when user data is input, the change of the value of the data bit corresponding to the storage area is recorded in sequence through each storage unit. Therefore, user data writing can be realized only through programming operation. By simplifying the operation process, the operation time is greatly shortened, and the probability of accidental power failure during the user data writing process is reduced, thereby reducing the configuration parameter errors caused by accidental power failure and improving stability.

[0065] Furthermore, the storage array only needs to be erased once after all storage cells are fully written, which realizes an exponential increase in the number of times the storage array can be erased and written, greatly improving the service life of the storage array, that is, improving the service life of the parameter configuration circuit and the non-volatile memory. In addition, through the cyclic operation of multiple writes and one erase, the number of storage cells in each storage area can be reasonably set, which is more conducive to controlling the production cost of the non-volatile memory.

[0066] The present application also provides a parameter configuration method. Figure 4 The schematic flow chart of the parameter configuration method of the embodiment of the present application is shown. The parameter configuration method provides configuration parameters of the non-volatile memory, and the configuration parameters include m data bits, that is, the length of the configuration parameters is m bits, which are used to set at least part of other circuits in the non-volatile memory. Figure 4 As shown, the parameter configuration method specifically includes the following steps S11-S13:

[0067] Step S11, providing configuration parameters according to the built-in data of the storage array,

[0068] The storage array stores the built-in data of the non-volatile memory (i.e., the configuration parameters currently provided by the parameter configuration circuit). In order to prevent the built-in data from being lost after the non-volatile memory is powered off or restarted, the storage array in the embodiment of the present application uses a non-volatile memory (NVM) array.

[0069] Specifically, the storage array includes m storage areas, each of which corresponds to a data bit in the configuration parameters. Each storage area also includes n storage cells, each of which has a capacity of 1 bit (the storage data of each storage cell is one of 0 and 1). Each storage cell in the same storage area sequentially records the value change of the corresponding data bit in the configuration parameters when the user data is input a corresponding number of times, and n and m are both greater than 1 and are integers. The cumulative result of the storage data of each storage cell in each storage area corresponds to the value of the corresponding data bit in the configuration parameters (that is, the value of the corresponding data bit in the built-in data). It should be noted that how to write data to the storage array will be described in detail below.

[0070] Step S12, determining whether user data is input.

[0071] If it is detected that user data is input to the non-volatile memory (ie, the non-volatile memory receives the user data), then step S13 is continued. It should be understood that when the non-volatile memory is maintained in the power-on state, the non-volatile memory continuously performs input detection of user data.

[0072] Step S13, adjusting the built-in data and configuration parameters of the storage array according to the user data:

[0073] In order to adapt to the usage scenario, the configuration parameters need to be adjusted according to the user data during the use of the non-volatile memory. Each time the user data is input, it means that the built-in data of the storage array and the configuration parameters provided to other circuits are adjusted once.

[0074] Figure 5 A schematic flow chart of providing configuration parameters according to the built-in data of the storage array is shown, Figure 5 As shown, step S11 further includes the following steps S21-S23:

[0075] Step S21, reading the storage array:

[0076] In this step, the storage data of each storage unit in each storage area in the storage array is read in sequence.

[0077] Step S22, for each storage area, accumulate the storage data of each storage unit in the storage area to obtain the value of the data bit corresponding to the storage area:

[0078] In this step, for each storage area, the storage data of each storage unit in the storage area is summed, and the value of the data bit corresponding to the storage area is obtained according to the sum value. For each storage area, if the number of storage units storing data 1 is an even number, then the lowest bit of the corresponding sum value is 0, that is, the value of the data bit corresponding to the storage area is 0; if the number of storage units storing data 1 is an odd number, then the lowest bit of the corresponding sum value is 1, that is, the value of the data bit corresponding to the storage area is 1.

[0079] Further, based on the calculation characteristics of binary numbers, the lowest bit of the sum of the storage cells in each storage area is related to the number of the value 1. Therefore, in some embodiments, in this step, for each of the storage areas, the storage cells in the corresponding programming state of the storage area can also be counted, and the value of the data bit corresponding to the storage area is obtained according to the counting result. For each storage area, if the number of storage cells storing data 1 is an even number, then the value of the data bit corresponding to the storage area is 0; if the number of storage cells storing data 1 is an odd number, then the value of the data bit corresponding to the storage area is 1. In addition, in some embodiments, the storage cells storing data 0 in each storage area can also be counted (that is, the storage cells in the erased state are counted), so as to obtain the value of the data bit corresponding to the storage area according to the number of storage cells in the erased state and the total number of storage cells in each storage area.

[0080] Step S23, providing configuration parameters according to the value of each data bit:

[0081] In this step, corresponding configuration parameters are provided according to the value of each data bit in the configuration parameters obtained in step S22.

[0082] Figure 6 A schematic flow chart of adjusting the built-in data of the storage array according to the user data is shown, as shown in FIG. Figure 6 As shown, step S11 further includes the following steps S31-S33:

[0083] Step S31, obtaining corresponding programming data according to the comparison result between the configuration parameters and the user data:

[0084] In this step, the corresponding data bits of the user data and the current configuration parameters are compared bit by bit and the programming data is generated according to the comparison result. For each data bit, if the values ​​of the user data and the current configuration parameter in the data bit are the same, the value corresponding to the data bit in the programming data is "0"; if the values ​​of the user data and the current configuration parameter in the data bit are different, the value corresponding to the data bit in the programming data is "1".

[0085] Step S32, obtaining the address to be programmed:

[0086] In a preferred embodiment of the present application, the storage cells of the storage area are managed uniformly. Corresponding to each storage area including n storage cells, the storage array has a total of n programming addresses, each programming address has a corresponding storage cell in each storage area, and each programming address has a different storage cell corresponding to the same storage area.

[0087] In order to correctly program the corresponding storage unit, the address to be programmed is obtained in this step.

[0088] Step S33, programming the corresponding storage cells in the address to be programmed according to the programming data.

[0089] Figure 7 FIG. 1 shows a schematic flow chart of obtaining the address to be programmed. Figure 7 As shown, the step of obtaining the address to be programmed includes the following steps S41 to S44:

[0090] Step S41, obtaining the used programming address;

[0091] In the process of programming each storage cell according to the programming data, if the corresponding programming data is the same as the value corresponding to the storage cell in the erased state, then although the storage cell is programmed, it is not actually necessary to adjust the storage data corresponding to the storage cell. In other words, the storage cell with the storage data of 1 must have been programmed, so in this step, the used programming address can be obtained according to the reading result of the storage array.

[0092] Specifically, in the process of sequentially reading each storage cell in each storage area in the storage array, for each storage area, the maximum programming address corresponding to the storage cell storing data 1 in the storage area is used as the current programming address of the storage area, and the maximum programming address among the current programming addresses of each storage area is used as the used programming address.

[0093] In some embodiments, the current programming address of each storage area can be recorded separately and then compared. In some other embodiments, only one current programming address can be recorded, and during the reading process of the storage array, the current programming address can be continuously updated according to the reading result. This application does not impose too many restrictions.

[0094] Step S42, determining whether the storage array is full:

[0095] It is determined whether the storage array is full (ie, whether all n programming addresses are used) according to the used programming addresses. If it is full, step S43 and step S44 are executed; if it is not full, step S44 is directly executed.

[0096] Step S43, erasing the storage array and resetting the used programming address:

[0097] If the used programming addresses indicate that the storage array is "full" (i.e., all n programming addresses are used), the effective level of the erase command is sent to the storage array to control all storage cells in the storage array to be restored to the erased state, that is, the value of each storage cell in each storage area is adjusted to 0. Correspondingly, the configuration parameters of the non-volatile memory are also erased, and the used programming addresses are also reset.

[0098] Step S44, obtaining the address to be programmed according to the preset programming address usage sequence:

[0099] According to the preset use order of the programming addresses, the next programming address of the used programming address is used as the address to be programmed. If the storage array is erased, the address to be programmed is the first programming address in the preset use order.

[0100] It should be noted that, in some embodiments, in order to improve the response speed and service life, a volatile storage module is used to record the used programming address. Each time the system is powered on, the used programming address is obtained according to the reading result of the storage array. If the system remains powered on, then each time programming is performed according to the input user information, the used programming address is automatically updated.

[0101] According to the parameter configuration method provided by the present application, a plurality of storage units are set in the storage area corresponding to each data bit of the configuration parameter in the storage array of the non-volatile memory. For each storage area, when user data is input, the change of the value of the data bit corresponding to the storage area is recorded in sequence through each storage unit. Therefore, user data writing can be achieved only through programming operations. By simplifying the operation process, the operation time is greatly shortened, and the probability of accidental power failure during the user data writing process is reduced. Therefore, the configuration parameter errors caused by accidental power failure are reduced, and the stability is improved.

[0102] Furthermore, the storage array only needs to be erased once after all storage cells are fully written, which realizes an exponential increase in the number of times the storage array can be erased and written, greatly improving the service life of the storage array, that is, improving the service life of the parameter configuration circuit and the non-volatile memory. In addition, through the cyclic operation of multiple writes and one erase, the number of storage cells in each storage area can be reasonably set, which is more conducive to controlling the production cost of the non-volatile memory.

[0103] In addition, the present application also provides a chip, including the parameter configuration circuit as above, and thus also including the above-mentioned beneficial effects, which will not be repeated here.

[0104] According to the embodiments of the present invention, as described above, these embodiments do not describe all the details in detail, nor do they limit the invention to specific embodiments. Obviously, many modifications and changes can be made based on the above description. This specification selects and specifically describes these embodiments in order to better explain the principles and practical applications of the present invention, so that those skilled in the art can make good use of the present invention and the modified use based on the present invention. The scope of protection of the present invention shall be based on the scope defined by the claims of the present invention.

Claims

1. A parameter configuration circuit, wherein: The parameter configuration circuit is used to provide configuration parameters of the non-volatile memory, and the parameter configuration circuit includes: A storage array, wherein the storage array includes m storage areas, each storage area includes n storage units, and each storage unit in the same storage area sequentially records the value change of the corresponding data bit of the storage area in the configuration parameter when the user data is input a corresponding number of times, and n and m are both positive integers; a conversion unit, for each of the storage areas, the conversion unit accumulating the storage data of each of the storage units in the storage area to obtain a value of the data bit corresponding to the storage area; and A configuration register is configured to provide the configuration parameters according to the values ​​of the data bits provided by the conversion unit.

2. The parameter configuration circuit according to claim 1, wherein: The parameter configuration circuit also includes: a programming unit, which, when the user data is input, obtains corresponding programming data according to a comparison result between the configuration parameter and the user data, and programs the corresponding storage unit in each storage area according to the programming data, Wherein, for each of the data bits, if the current configuration parameter is the same as the input user data, the storage data of the corresponding storage unit corresponds to an erased state; otherwise, the storage data of the corresponding storage unit corresponds to a programmed state.

3. The parameter configuration circuit according to claim 2, wherein: The storage array includes n programming addresses, each of which has a corresponding storage unit in each storage area, and each of the programming addresses corresponds to different storage units in the same storage area. The parameter configuration circuit further includes an address unit for acquiring the used programming address and providing an address to be programmed corresponding to the programming data. Among them, when the n programming addresses are not all used, the address to be programmed is obtained according to the used programming addresses and the preset usage order of the programming addresses; when the n programming addresses are all used, the address unit is also used to provide a valid level of an erase instruction to erase the storage array, and provide the first programming address in the preset usage order as the address to be programmed.

4. The parameter configuration circuit according to claim 3, wherein: The address unit includes a volatile storage module.

5. The parameter configuration circuit according to claim 2, wherein: The programming unit comprises: a data processing module, comparing the current configuration parameters with the input user data to obtain the programming data; and A writing module is used to program the corresponding storage cells in each storage area according to the programming data.

6. The parameter configuration circuit according to claim 5, wherein: The conversion unit comprises: A reading module, for reading the storage data of each storage unit in each storage area of ​​the storage array; and A calculation module, for each storage area, sums the storage data of each storage unit in the storage area, and obtains a value of a data bit corresponding to the storage area according to the sum; or The counting module counts the storage cells in the programming state / erasing state corresponding to each storage area, and obtains the value of the data bit corresponding to the storage area according to the counting result.

7. A non-volatile memory, wherein: The non-volatile memory comprises: The parameter configuration circuit according to any one of claims 1 to 6, wherein the parameter configuration circuit is used to provide configuration parameters of the non-volatile memory; and Other circuits, the other circuits include interface circuits, clock circuits, control circuits and logic circuits, and the configuration parameters are used to set at least part of the other circuits.

8. A chip, wherein: Comprising the non-volatile memory as claimed in claim 7.

9. A parameter configuration method, wherein: The parameter configuration method is used to provide configuration parameters of a non-volatile memory, and the parameter configuration method includes: Reading a storage array, the storage array comprising m storage areas, each of the storage areas comprising n storage units, each of the storage units in the same storage area sequentially recording a change in a value of a corresponding data bit of the storage area in the configuration parameter when user data is input a corresponding number of times, and both n and m are positive integers; For each of the storage areas, accumulating the storage data of each of the storage units in the storage area to obtain a value of the data bit corresponding to the storage area; and The configuration parameters are provided according to the values ​​of the data bits.

10. The parameter configuration method according to claim 9, wherein: The parameter configuration method further includes: When the user data is input, corresponding programming data is acquired according to a comparison result between the configuration parameter and the user data; and programming the corresponding storage cells in each storage area according to the programming data, Wherein, for each of the data bits, if the current configuration parameter is the same as the input user data, the storage data of the corresponding storage unit corresponds to an erased state; otherwise, the storage data of the corresponding storage unit corresponds to a programmed state.

11. The parameter configuration method according to claim 10, wherein: The storage array includes n programming addresses, each of which has a corresponding storage unit in each storage area, and each of the programming addresses corresponds to different storage units in the same storage area. Before performing the programming, the parameter configuration method further includes: Get the used programming addresses; and Acquire the address to be programmed corresponding to the programming data according to the used programming address, Among them, when the n programming addresses are not all used, the address to be programmed is obtained according to the used programming addresses and the preset usage order of the programming addresses; when the n programming addresses are all used, the storage array is erased, and the first programming address in the preset usage order is provided as the address to be programmed.

12. The parameter configuration method according to claim 11, wherein: The used programming addresses are stored in a volatile storage module.

13. The parameter configuration method according to claim 10, wherein: The method for obtaining the value of the data bit corresponding to each storage area includes: For each of the storage areas, summing the stored data of the storage units in the storage area, and obtaining the value of the data bit corresponding to the storage area according to the sum; or For each of the storage areas, the storage cells in the programming state / erasing state corresponding to the storage area are counted, and the value of the data bit corresponding to the storage area is obtained according to the counting result.

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