High-linearity millimeter wave broadband low-noise amplifier, radio frequency receiver and equipment

Abstract

The invention discloses a high-linearity millimeter wave broadband low-noise amplifier, a radio frequency receiver and equipment, and relates to the technical field of electronic circuits, and the low-noise amplifier comprises an input matching network, a primary amplification network, a secondary amplification network and an output impedance matching network. When the input matching network receives an input signal, the input impedance and the optimal noise impedance are matched at the same time, so that the broadband input matching characteristic is realized; the two stages of amplification networks both adopt inductors as loads, the maximum input voltage swing is increased, the large signal linearity is improved, the nonlinear current generated by third-order nonlinear transconductance is offset, and the small signal linearity is improved; load resonance of the two-stage amplification network is realized at the front end and the rear end of the working frequency band of the low-noise amplifier by designing the load inductor, so that the broadband load characteristic of the whole low-noise amplifier is realized, and the gain flatness is improved.

Description

Technical Field

[0001] The present application relates to the field of electronic circuit technology, and in particular to a high-linearity millimeter-wave broadband low-noise amplifier, a radio frequency receiver and a device. Background Art

[0002] The continuous development of 5G communication systems has put forward higher requirements on the signal transmission quality of the RF receiving link. As a part of the RF receiver circuit, the low noise amplifier (LNA) needs to provide a certain gain to suppress the noise of the subsequent circuit without deteriorating the linearity of the RF receiver. Therefore, the LNA itself is required to have high linearity. At the same time, in order to meet the requirements of the 5G operating frequency band, the LNA needs to have broadband characteristics and maintain good matching and low noise coefficient in multiple different frequency bands.

[0003] The LNA currently used in 5G communications is mainly based on a common-source amplifier with source degeneration. However, the common-source amplifier with source degeneration has low linearity and the input matching exhibits narrowband characteristics. Summary of the invention

[0004] The main purpose of the embodiments of the present application is to provide a high-linearity millimeter-wave broadband low-noise amplifier, a radio frequency receiver and a device to solve the problem of narrow bandwidth and low linearity of a common-source amplifier with source degeneration.

[0005] To achieve the above-mentioned purpose, an embodiment of the present application provides a high-linearity millimeter-wave broadband low-noise amplifier, the low-noise amplifier comprising: an input matching network, a primary amplification network, a secondary amplification network and an output impedance matching network; the primary amplification network and the secondary amplification network both use inductance as a load;

[0006] Wherein, the input matching network is used to: match the input impedance and the optimal noise impedance simultaneously when receiving an input signal;

[0007] The first-stage amplification network is used to: convert the input signal after passing through the input matching network into a current signal, and the current signal is converted into a voltage signal through the load;

[0008] The secondary amplification network is used to: amplify the voltage signal, expand the gain bandwidth, and enhance reverse isolation;

[0009] The output impedance matching network is used to match the output impedance of the voltage signal and then output the voltage signal to reduce reflection of the voltage signal.

[0010] In some embodiments, the input matching network includes a parallel LC network, a series LC network, and a first capacitor;

[0011] Wherein, the parallel LC network includes a first pad capacitor and an input inductor; the series LC network includes a first inductor, a second inductor, a first NMOS transistor and a second capacitor; the first inductor and the second inductor form a first magnetically coupled resonant cavity;

[0012] The first end of the first pad capacitor and the first end of the input inductor are connected to the input end of the noise amplifier; the second end of the first pad capacitor and the second end of the input inductor are grounded;

[0013] The first end of the first inductor is connected to the first end of the first bias resistor, and the second end of the first bias resistor is connected to the first bias voltage; the first end of the second inductor is grounded;

[0014] The second end of the first inductor and the first end of the second capacitor are connected to the gate of the first NMOS tube; the second end of the second inductor and the second end of the second capacitor are connected to the source of the first NMOS tube; the drain of the first NMOS tube is connected to the input end of the first-stage amplification network;

[0015] A first end of the first capacitor is connected to an input end of the noise amplifier, and a second end of the first capacitor is connected to a first end of the first inductor.

[0016] In some embodiments, the optimal noise impedance satisfies the following expression:

[0017]

[0018] Among them, Z opt represents the optimal noise impedance; ω0 is the operating frequency; C gs1 represents the gate-source capacitance of the first NMOS tube; δ is a constant related to the channel length of the first NMOS tube; γ is a bias-related coefficient of the first NMOS tube; g m1 is the transconductance of the first NMOS tube, g d01 is the first-order transconductance coefficient of the first NMOS tube; C is the correction coefficient; j is the imaginary unit; C t =C gs1 +C2, C2 represents the second capacitor; s is the Laplace variable; L1 represents the first inductor; L2 represents the second inductor; M is the mutual inductance generated between the first inductor and the second inductor.

[0019] In some embodiments, under the condition that the input impedance and the optimal noise impedance are matched simultaneously, the noise coefficient of the input matching network satisfies the following expression:

[0020]

[0021] Wherein, NF is the noise factor; R s is the signal source impedance of the input signal; ω T is the characteristic frequency of the first NMOS tube, G m is the input equivalent transconductance; g d0 is the first-order transconductance coefficient of the NMOS tube.

[0022] In some embodiments, the first-stage amplification network includes: a third inductor, a target NMOS transistor, a second bias resistor, a third bias resistor, and a third capacitor;

[0023] Wherein, the first end of the third inductor, the gate and drain of the target NMOS tube and the first end of the third capacitor are connected to the input end of the first-stage amplification network; the second end of the third inductor is connected to the power supply;

[0024] The second end of the third capacitor and the first end of the second bias resistor are connected to the output end of the first-stage amplification network; the second end of the second bias resistor is connected to the second bias voltage;

[0025] A first end of the third bias resistor is connected to the source of the target NMOS transistor, and a second end of the third bias resistor is grounded.

[0026] In some embodiments, the secondary amplification network includes: a fourth inductor, a fifth inductor, a fourth capacitor and a second NMOS transistor; wherein the fourth inductor and the fifth inductor form a second magnetically coupled resonant cavity;

[0027] Wherein, the first end of the fourth capacitor and the gate of the second NMOS transistor are connected to the output end of the first-stage amplification network; the source of the second NMOS transistor is grounded;

[0028] The drain of the second NMOS tube is connected to the first end of the fourth inductor; the second end of the fourth inductor is connected to a power supply;

[0029] The second end of the fourth capacitor is connected to the first end of the fifth inductor, and the second end of the fifth inductor is grounded.

[0030] In some embodiments, the output impedance matching network includes: the fourth capacitor, the fifth inductor, the fifth capacitor and the second pad capacitor;

[0031] Wherein, the first end of the fifth capacitor is connected to the first end of the fifth inductor;

[0032] The second end of the fifth capacitor and the first end of the second pad capacitor are connected to the output end of the low noise amplifier; the second end of the second pad capacitor is grounded.

[0033] In some embodiments, the optimal noise source impedance of the input matching network matches the signal source impedance of the input signal to obtain a minimum noise figure.

[0034] To achieve the above objective, another aspect of an embodiment of the present application provides a radio frequency receiver, wherein the radio frequency receiver includes the high-linearity millimeter-wave broadband low-noise amplifier as described above.

[0035] To achieve the above objective, another aspect of an embodiment of the present application provides an electronic device, wherein the electronic device includes the radio frequency receiver as described above.

[0036] The embodiments of the present application include at least the following beneficial effects:

[0037] The low noise amplifier of the present application includes an input matching network, a first-stage amplification network, a second-stage amplification network and an output impedance matching network; both the first-stage amplification network and the second-stage amplification network use inductors as loads; wherein the input matching network is used to: match the input impedance and the optimal noise impedance simultaneously when receiving the input signal; the first-stage amplification network is used to: convert the input signal after passing through the input matching network into a current signal, and the current signal is converted into a voltage signal through the load; the second-stage amplification network is used to: amplify the voltage signal, expand the gain bandwidth, and enhance the reverse isolation; the output impedance matching network is used to: match the output impedance of the voltage signal and then output the voltage signal to reduce the reflection of the voltage signal. When the input matching network receives the input signal, the input impedance and the optimal noise impedance are matched simultaneously, thereby realizing the broadband input matching characteristics; both the two-stage amplification networks use inductors as loads, increase the maximum input voltage swing, improve the large signal linearity, and offset the nonlinear current generated by the third-order nonlinear transconductance, thereby improving the small signal linearity; by designing the load inductance, the load of the two-stage amplification network is resonated at the front end and the back end of the working frequency band of the low noise amplifier, realizing the broadband load characteristics of the overall low noise amplifier, and improving the gain flatness. BRIEF DESCRIPTION OF THE DRAWINGS

[0038] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0039] Figure 1 An optional structural diagram of a high-linearity millimeter-wave broadband low-noise amplifier provided in an embodiment of the present application;

[0040] Figure 2 Provided in the embodiments of this application Figure 1Equivalent circuit diagram of the input matching network in the circuit shown;

[0041] Figure 3 This is an equivalent circuit diagram of a low noise amplifier provided in an embodiment of the present application when outputting a small signal. DETAILED DESCRIPTION

[0042] In order to make the purpose, technical solutions and advantages of the present application clearer, the present application is further described in detail below in conjunction with the accompanying drawings and examples. It should be understood that the specific embodiments described herein are only used to explain the present application and are not intended to limit the present application. When the following description refers to the drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the embodiments of the present application. They are only examples of devices and methods consistent with some aspects of the embodiments of the present application as detailed in the attached claims.

[0043] It is understood that the terms "first", "second", etc. used in this application can be used to describe various concepts in this article, but unless otherwise specified, these concepts are not limited by these terms. These terms are only used to distinguish one concept from another concept. For example, without departing from the scope of the embodiment of the present application, the first information may also be referred to as the second information, and similarly, the second information may also be referred to as the first information. Depending on the context, the words "if" and "if" as used herein can be interpreted as "at the time of" or "when" or "in response to determination".

[0044] The terms "at least one", "multiple", "each", "any", etc. used in this application, at least one includes one, two or more, multiple includes two or more, each refers to each of the corresponding multiple, and any refers to any one of the multiple.

[0045] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used herein are only for the purpose of describing the embodiments of this application and are not intended to limit this application.

[0046] In order to solve the problems existing in the prior art, the embodiment of the present application provides a millimeter-wave broadband low-noise amplifier with high linearity, wherein the low-noise amplifier comprises: an input matching network, a primary amplification network, a secondary amplification network and an output impedance matching network; the primary amplification network and the secondary amplification network both use inductance as a load;

[0047] Wherein, the input matching network is used to: match the input impedance and the optimal noise impedance simultaneously when receiving an input signal;

[0048] The first-stage amplification network is used to: convert the input signal after passing through the input matching network into a current signal, and the current signal is converted into a voltage signal through the load;

[0049] The secondary amplification network is used to: amplify the voltage signal, expand the gain bandwidth, and enhance reverse isolation;

[0050] The output impedance matching network is used to match the output impedance of the voltage signal and then output the voltage signal to reduce reflection of the voltage signal.

[0051] As an optional implementation, the input matching network includes a parallel LC network, a series LC network and a first capacitor;

[0052] Wherein, the parallel LC network includes a first pad capacitor and an input inductor; the series LC network includes a first inductor, a second inductor, a first NMOS transistor and a second capacitor; the first inductor and the second inductor form a first magnetically coupled resonant cavity;

[0053] The first end of the first pad capacitor and the first end of the input inductor are connected to the input end of the noise amplifier; the second end of the first pad capacitor and the second end of the input inductor are grounded;

[0054] The first end of the first inductor is connected to the first end of the first bias resistor, and the second end of the first bias resistor is connected to the first bias voltage; the first end of the second inductor is grounded;

[0055] The second end of the first inductor and the first end of the second capacitor are connected to the gate of the first NMOS tube; the second end of the second inductor and the second end of the second capacitor are connected to the source of the first NMOS tube; the drain of the first NMOS tube is connected to the input end of the first-stage amplification network;

[0056] A first end of the first capacitor is connected to an input end of the noise amplifier, and a second end of the first capacitor is connected to a first end of the first inductor.

[0057] Furthermore, the optimal noise impedance satisfies the following expression:

[0058]

[0059] Among them, Z opt represents the optimal noise impedance; ω0 is the operating frequency; C gs1 represents the gate-source capacitance of the first NMOS tube; δ is a constant related to the channel length of the first NMOS tube; γ is a bias-related coefficient of the first NMOS tube; g m1is the transconductance of the first NMOS tube, g d01 is the first-order transconductance coefficient of the first NMOS tube; C is the correction coefficient; j is the imaginary unit; C t =C gs1 +C2, C2 represents the second capacitor; s is the Laplace variable; L1 represents the first inductor; L2 represents the second inductor; M is the mutual inductance generated between the first inductor and the second inductor.

[0060] Furthermore, under the condition that the input impedance and the optimal noise impedance are matched simultaneously, the noise coefficient of the input matching network satisfies the following expression:

[0061]

[0062] Wherein, NF is the noise factor; R s is the signal source impedance of the input signal; ω T is the characteristic frequency of the first NMOS tube, G m is the input equivalent transconductance; g d0 is the first-order transconductance coefficient of the NMOS tube.

[0063] As an optional implementation, the first-stage amplification network includes: a third inductor, a target NMOS tube, a second bias resistor, a third bias resistor, and a third capacitor;

[0064] Wherein, the first end of the third inductor, the gate and drain of the target NMOS tube and the first end of the third capacitor are connected to the input end of the first-stage amplification network; the second end of the third inductor is connected to the power supply;

[0065] The second end of the third capacitor and the first end of the second bias resistor are connected to the output end of the first-stage amplification network; the second end of the second bias resistor is connected to the second bias voltage;

[0066] A first end of the third bias resistor is connected to the source of the target NMOS transistor, and a second end of the third bias resistor is grounded.

[0067] As an optional implementation, the secondary amplification network includes: a fourth inductor, a fifth inductor, a fourth capacitor and a second NMOS transistor; wherein the fourth inductor and the fifth inductor form a second magnetically coupled resonant cavity;

[0068] Wherein, the first end of the fourth capacitor and the gate of the second NMOS transistor are connected to the output end of the first-stage amplification network; the source of the second NMOS transistor is grounded;

[0069] The drain of the second NMOS tube is connected to the first end of the fourth inductor; the second end of the fourth inductor is connected to a power supply;

[0070] The second end of the fourth capacitor is connected to the first end of the fifth inductor, and the second end of the fifth inductor is grounded.

[0071] Further, the output impedance matching network includes: the fourth capacitor, the fifth inductor, the fifth capacitor and the second pad capacitor;

[0072] Wherein, the first end of the fifth capacitor is connected to the first end of the fifth inductor;

[0073] The second end of the fifth capacitor and the first end of the second pad capacitor are connected to the output end of the low noise amplifier; the second end of the second pad capacitor is grounded.

[0074] In some embodiments, the optimal noise source impedance of the input matching network matches the signal source impedance of the input signal to obtain a minimum noise figure.

[0075] Exemplarily, the signal source impedance of the input signal may be 50Ω, and the noise matching of this embodiment may match the optimal noise source impedance to 50Ω to obtain the minimum noise factor.

[0076] Next, the solution of the embodiment of the present application will be described in detail and explained in conjunction with specific application examples:

[0077] Reference Figure 1 , this embodiment provides an optional structural diagram of a high-linearity millimeter-wave broadband low-noise amplifier.

[0078] Specifically, the low noise amplifier of this embodiment includes: an input matching network, a first-stage amplification network, a second-stage amplification network, and an output impedance matching network.

[0079] The parallel LC network in the input matching network is combined with the series LC network to achieve broadband input matching, wherein the parallel LC network is connected from the input end (V i,RF ) is connected to the ground pad capacitor C pad1 (first pad capacitance) and inductance L in(input inductor), the series LC network is composed of the magnetic coupling resonant cavity composed of the inductor L1 (first inductor) connected in series with the gate of the NMOS tube M1 (first NMOS tube) and the inductor L2 (second inductor) connected in series with the source of the NMOS tube M1, the NMOS tube M1 and the capacitor C2 (second capacitor) between the gate and source of M1, which is equivalent. One end of the capacitor C1 (first capacitor) is connected to the input and the other end is connected to the inductor L1, which plays a role in blocking DC signals. The input signal passes through the input matching network to achieve simultaneous matching of the input impedance and the optimal noise impedance, and is converted into a current signal by the NMOS tube M1 in the first-stage amplification network. One end of the load inductor L3 (third inductor) is connected to the drain of the NMOS tube M1, and the other end is connected to the power supply, which converts the output current signal into a voltage signal. The NMOS tube M 1a The gate and drain of the target NMOS tube are connected to the drain of M1. 1a The source of M is connected to ground through a series bias resistor R3 (third bias resistor). 1a The introduction is used to offset the nonlinear current generated by the third-order nonlinear transconductance of the NMOS tube M1, thereby improving the signal linearity. The capacitor C3 (the third capacitor) is connected in series between the drain of M1 and the gate of M2 to block the DC signal between the two-stage amplification network. The signal after the first stage of amplification is amplified twice through a second stage amplification network composed of an inductor L4 (the fourth inductor), an inductor L5 (the fifth inductor), a capacitor C4 (the fourth capacitor) and an NMOS tube M2 (the second NMOS tube), wherein the signal is input through the gate of the NMOS tube M2 and converted into a current signal at the drain. One end of the inductor L4 is connected to the drain of M2 and the other end is connected to the power supply. One end of the inductor L5 is connected to the gate of M2 through a series capacitor C4 and the other end is connected to the ground. The inductor L4 and the inductor L5 form a reverse magnetic coupling resonant cavity. The current signal is induced to the coil of the inductor L5 through the inductor L4 and converted into a voltage signal output through the inductor L5. The feedback path introduced by the capacitor C4 neutralizes the feedforward path caused by the parasitic inductance between the gate and the drain of the NMOS tube M2, thereby improving the signal isolation and gain. The output impedance matching network includes: from the output end (V o,RF ) is connected to the ground pad capacitor C pad2 (second pad capacitor), capacitor C5 connected between the output end of the low noise amplifier and the inductor L5, capacitor C4 and inductor L5, together achieve output impedance matching and reduce output signal reflection.

[0080] It should also be noted that Figure 1 V G1 (First bias voltage) provides bias voltage for M1, V G2(Second bias voltage) provides bias voltage for M2, and resistor R1 (first bias resistor) and resistor R2 (second bias resistor) prevent bias voltage fluctuation from causing gate breakdown of transistors M1 and M2.

[0081] Next, the input matching network of this embodiment is further described. Figure 2 for Figure 1 Equivalent circuit diagram of the input matching network in the circuit shown.

[0082] Specifically, in the input matching network, the input small signal is analyzed, where i1 is the current flowing through the inductor L1, i2 is the current flowing through the inductor L2, is the induced current generated by L2 in L1, is the induced current generated by L1 in L2, g m1 is the transconductance of transistor M1, g m1 is the transconductance of transistor M1, C gd1 is the gate-drain parasitic capacitance of M1, C gs1 is the gate-source parasitic capacitance of M1, V gs1 is the gate-source voltage of M1. From the input end, the parallel C pad1 and L in , L1 in series, C gs1 , L2 together form a high-order parallel-series LC resonant network, which expands the input matching bandwidth compared to the traditional second-order LC resonant network. While achieving input impedance matching, it is also necessary to achieve optimal noise impedance matching to obtain the minimum noise factor. The optimal noise impedance of the signal source can be expressed as:

[0083]

[0084] Where ω0 is the operating frequency, C gs1 The gate-source capacitance of M1 is δ, which is a constant related to the transistor channel length, γ is a coefficient related to the transistor bias, C is a correction coefficient, and C t =C gs1 +C2, where g m is the transconductance of M1, g d01 is the first-order transconductance coefficient of M1. It can be seen that Z opt The real part is determined by the gate-source capacitance C of M1. gs1 Decide, and C gs1 Determined by the size of M1. Since the signal source impedance of the input port is usually 50Ω, noise matching can make the optimal noise source impedance Z opt Matched to 50Ω for minimum noise figure, in order to increase Z opt The real part is matched to 50Ω without deteriorating power consumption. The introduction of parallel capacitor C2 makes the size of M1 not limited by noise matching, so that power consumption can be reduced by reducing the size of M1.

[0085] At the same time, the noise coefficient under the conditions of input matching and noise matching can be expressed as Where R s is the signal source impedance, ω T is the characteristic frequency of transistor M1, G m is the input equivalent transconductance. It can be seen that the noise coefficient NF increases with the equivalent transconductance G m Therefore, in order to reduce the noise coefficient, the equivalent transconductance G can be reduced by m By coupling the inductor L1 and the inductor L2 to form a magnetic coupling resonator, the induced current between L1 and L2 forms feedback between the gate and source of M1. When the gate voltage of M1 rises, the source of M1 induces a reverse voltage. Therefore, for the same small input signal, M1 has a larger equivalent gate-source voltage, and therefore has a larger output current, thereby having a larger equivalent transconductance G. m , and ultimately has a smaller noise figure NF.

[0086] In addition, the coupling of L1 and L2 makes the overall area more compact, compensating for the additional inductance L introduced in the high-order LC network. in The area sacrifice caused by this is to reduce the chip area. The low noise amplifier has a compact chip area and low power consumption performance. When used in portable mobile devices, it can reduce the area and volume occupied in the mobile device.

[0087] For large signals, the linearity of the low-noise amplifier is characterized by the input 1dB compression point, that is, the input power corresponding to the 1dB drop in gain as the input power increases. This embodiment uses an inductor as the output load. Compared with the resistive load, M1 and M2 have a larger drain-source voltage. Therefore, when the input power increases and the output swing becomes larger, the transistor is less likely to enter the linear region and has a higher 1dB compression point. For small signals, the output voltage distortion in the low-noise amplifier is mainly caused by the nonlinear current generated by the nonlinear transconductance of the transistor itself. The nonlinear current generated by the nonlinear transconductance can be expressed as where v gs is the transistor gate-source voltage, i ds is the transistor drain current, g1 is the transistor first-order transconductance, g2 is the transistor second-order nonlinear transconductance, and g3 is the transistor third-order nonlinear transconductance. The third-order intermodulation distortion determined by the third-order nonlinear transconductance g3 has the most important influence on small signal linearity, and when the transistor transitions from the weak inversion region to the strong inversion region, its g3 value changes from positive to negative. Therefore, in order to optimize the small signal linearity, this embodiment introduces an NMOS transistor M working in the strong inversion region. 1a , the g3 value in its drain current is negative, due to M 1aThe polarity is opposite to that of the M1 gate input voltage, so it can offset the negative term g3 in the M1 drain current working in the strong inversion region, thereby eliminating the third-order nonlinear current and improving the small signal linearity.

[0088] Next, the implementation of the output signal will be described.

[0089] Figure 3 The equivalent circuit diagram of the low noise amplifier in this embodiment when outputting a small signal is shown. m2 is the transconductance of transistor M2, C gd2 is the gate-drain parasitic capacitance of M2, C gs2 is the gate-source parasitic capacitance of M2, V gs2 is the gate-source voltage of M2. Due to the parasitic capacitance C gd2 The presence of will cause the output signal to flow to the input gate and destroy the gain and reverse isolation of the low noise amplifier. This embodiment introduces a magnetic coupling resonator composed of inductor L4 and inductor L5 and capacitor C4 to neutralize C gd2 .from Figure 3 As can be seen from the figure, since L4 and L5 are connected in a reverse coupling manner, the signal forms opposite phases at L4 and L5, thereby generating two opposite currents I1 and I2 between the input gate. Therefore, according to C gd2 The size of C4 determines the value of I1 and I2, which eliminates the current flowing from the drain of M2 to the gate of M2, avoiding C gd2 Damage to LNA gain and reverse isolation.

[0090] The beneficial effects of this embodiment include:

[0091] A high-order input matching network is introduced to achieve broadband input matching characteristics. At the same time, the magnetic coupling resonant cavity formed by the M1 source and gate inductance reduces the chip area and eliminates the extra area caused by the high-order matching network inductance. In addition, the magnetic coupling resonant cavity of the M1 source and gate introduces a current feedback path, which enhances the equivalent input transconductance and thus reduces the noise coefficient. The use of an additional M1 gate-source capacitor makes the M1 size no longer restricted by the simultaneous matching of the input impedance and the optimal noise impedance, so that the power consumption can be optimized by changing the M1 size. Each stage of the circuit uses an inductive load to increase the maximum input voltage swing and improve the large signal linearity. At the same time, by connecting in parallel the M1 working in the strong inversion region and with opposite input signals 1a Together with M1, third-order nonlinear transconductance cancellation is achieved to improve small signal linearity. By designing the load inductance, the two-stage amplification network load is resonant at the front and back ends of the operating frequency band, thereby achieving the broadband load characteristics of the overall low-noise amplifier and improving gain flatness. By combining the M2 source-drain magnetically coupled resonant cavity with the feedback capacitor to neutralize the source-drain parasitic capacitance, gain and isolation are improved.

[0092] The embodiment of the present application further provides a radio frequency receiver, which includes the low noise amplifier as described in the embodiment of the present application.

[0093] It can be understood that the contents of the above-mentioned low-noise amplifier embodiment are all applicable to the present RF receiver embodiment, the functions specifically implemented by the present RF receiver embodiment are the same as those of the above-mentioned low-noise amplifier embodiment, and the beneficial effects achieved are also the same as those achieved by the above-mentioned low-noise amplifier embodiment.

[0094] An embodiment of the present application further provides an electronic device, which includes the radio frequency receiver as described in the embodiment of the present application.

[0095] Exemplarily, the electronic device of this embodiment may be a communication device such as a base station, a mobile terminal, a server or a gateway.

[0096] It can be understood that the contents of the above-mentioned low-noise amplifier embodiment are all applicable to the present electronic device embodiment, the functions specifically implemented by the present electronic device embodiment are the same as those of the above-mentioned low-noise amplifier embodiment, and the beneficial effects achieved are also the same as those achieved by the above-mentioned low-noise amplifier embodiment.

[0097] The terms "first", "second", "third", "fourth", etc. (if any) in the specification of the present application and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the objects used in this way can be interchangeable where appropriate, so that the embodiments of the present application described herein can be implemented in addition to those illustrated or described herein. In addition, the terms "including" and "having" and any of their variations are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units that are clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0098] It should be understood that in the present application, "at least one (item)" means one or more, and "plurality" means two or more. "And / or" is used to describe the association relationship of associated objects, indicating that three relationships may exist. For example, "A and / or B" can mean: only A exists, only B exists, and A and B exist at the same time, where A and B can be singular or plural. The character " / " generally indicates that the objects associated before and after are in an "or" relationship. "At least one of the following" or similar expressions refers to any combination of these items, including any combination of single or plural items. For example, at least one of a, b or c can mean: a, b, c, "a and b", "a and c", "b and c", or "a and b and c", where a, b, c can be single or multiple.

[0099] The preferred embodiments of the present invention are described above with reference to the accompanying drawings, but the scope of the rights of the present invention is not limited thereto. Any modification, equivalent substitution and improvement made by a person skilled in the art without departing from the scope and essence of the present invention should be within the scope of the rights of the present invention.

Claims

1. A high linearity millimeter wave broadband low noise amplifier, characterized in that: The low noise amplifier comprises: an input matching network, a primary amplification network, a secondary amplification network and an output impedance matching network; the primary amplification network and the secondary amplification network both use inductance as a load; Wherein, the input matching network is used to: match the input impedance and the optimal noise impedance simultaneously when receiving an input signal; The first-stage amplification network is used to: convert the input signal after passing through the input matching network into a current signal, and the current signal is converted into a voltage signal through the load; The secondary amplification network is used to: amplify the voltage signal, expand the gain bandwidth, and enhance reverse isolation; The output impedance matching network is used to match the output impedance of the voltage signal and then output the voltage signal to reduce reflection of the voltage signal.

2. The high linearity millimeter wave broadband low noise amplifier according to claim 1, characterized in that: The input matching network includes a parallel LC network, a series LC network and a first capacitor; Wherein, the parallel LC network includes a first pad capacitor and an input inductor; the series LC network includes a first inductor, a second inductor, a first NMOS transistor and a second capacitor; the first inductor and the second inductor form a first magnetically coupled resonant cavity; The first end of the first pad capacitor and the first end of the input inductor are connected to the input end of the noise amplifier; the second end of the first pad capacitor and the second end of the input inductor are grounded; The first end of the first inductor is connected to the first end of the first bias resistor, and the second end of the first bias resistor is connected to the first bias voltage; the first end of the second inductor is grounded; The second end of the first inductor and the first end of the second capacitor are connected to the gate of the first NMOS tube; the second end of the second inductor and the second end of the second capacitor are connected to the source of the first NMOS tube; the drain of the first NMOS tube is connected to the input end of the first-stage amplification network; A first end of the first capacitor is connected to an input end of the noise amplifier, and a second end of the first capacitor is connected to a first end of the first inductor.

3. The high linearity millimeter wave broadband low noise amplifier according to claim 2, characterized in that: The optimal noise impedance satisfies the following expression: Among them, Z opt represents the optimal noise impedance; ω0 is the operating frequency; C gs1 represents the gate-source capacitance of the first NMOS tube; δ is a constant related to the channel length of the first NMOS tube; γ is a bias-related coefficient of the first NMOS tube; g m1 is the transconductance of the first NMOS tube, g d01 is the first-order transconductance coefficient of the first NMOS tube; C is the correction coefficient; j is the imaginary unit; C t =C gs1 +C2, C2 represents the second capacitor; s is the Laplace variable; L1 represents the first inductor; L2 represents the second inductor; M is the mutual inductance generated between the first inductor and the second inductor.

4. The high linearity millimeter wave broadband low noise amplifier according to claim 3, characterized in that: Under the condition that the input impedance and the optimal noise impedance are matched at the same time, the noise coefficient of the input matching network satisfies the following expression: Wherein, NF is the noise factor; R s is the signal source impedance of the input signal; ω T is the characteristic frequency of the first NMOS tube, G m is the input equivalent transconductance; g d0 is the first-order transconductance coefficient of the NMOS tube.

5. The high linearity millimeter wave broadband low noise amplifier according to claim 1, characterized in that: The first-stage amplification network includes: a third inductor, a target NMOS tube, a second bias resistor, a third bias resistor, and a third capacitor; Wherein, the first end of the third inductor, the gate and drain of the target NMOS tube and the first end of the third capacitor are connected to the input end of the first-stage amplification network; the second end of the third inductor is connected to the power supply; The second end of the third capacitor and the first end of the second bias resistor are connected to the output end of the first-stage amplification network; the second end of the second bias resistor is connected to the second bias voltage; A first end of the third bias resistor is connected to the source of the target NMOS transistor, and a second end of the third bias resistor is grounded.

6. The high linearity millimeter wave broadband low noise amplifier according to claim 1, characterized in that: The secondary amplification network includes: a fourth inductor, a fifth inductor, a fourth capacitor and a second NMOS transistor; wherein the fourth inductor and the fifth inductor form a second magnetically coupled resonant cavity; Wherein, the first end of the fourth capacitor and the gate of the second NMOS transistor are connected to the output end of the first-stage amplification network; the source of the second NMOS transistor is grounded; The drain of the second NMOS tube is connected to the first end of the fourth inductor; the second end of the fourth inductor is connected to a power supply; The second end of the fourth capacitor is connected to the first end of the fifth inductor, and the second end of the fifth inductor is grounded.

7. The high linearity millimeter wave broadband low noise amplifier according to claim 6, characterized in that: The output impedance matching network includes: the fourth capacitor, the fifth inductor, the fifth capacitor and the second pad capacitor; Wherein, the first end of the fifth capacitor is connected to the first end of the fifth inductor; The second end of the fifth capacitor and the first end of the second pad capacitor are connected to the output end of the low noise amplifier; the second end of the second pad capacitor is grounded.

8. The high linearity millimeter wave broadband low noise amplifier according to any one of claims 1 to 7, characterized in that: The optimal noise source impedance of the input matching network matches the signal source impedance of the input signal to obtain a minimum noise figure.

9. A radio frequency receiver, characterized in that The radio frequency receiver comprises a high-linearity millimeter-wave broadband low-noise amplifier as claimed in any one of claims 1 to 8.

10. An electronic device, characterized in that The electronic device comprises the radio frequency receiver as claimed in claim 9.

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