Apparatus and method for input recovery of logarithmic transimpedance amplifiers

Abstract

The invention relates to an apparatus and method for input recovery of logarithmic transimpedance amplifiers. The invention discloses an apparatus and method for preventing overshoot of high to low input current transients of a logarithmic transimpedance amplifier. In certain embodiments, an amplifier system includes a logarithmic transimpedance amplifier having an input to receive an input current signal, and a current pulse injection circuit to inject a current pulse into the input of the logarithmic transimpedance amplifier in response to detecting a transition of the input current signal from a high current value to a low current value.

Description

Technical Field

[0001] Embodiments of the present invention relate to electronic systems, and more particularly, to electronic circuits for logarithmic conversion. Background Art

[0002] A logarithmic converter provides an output signal that varies relative to the logarithm of the applied input signal.

[0003] One type of logarithmic detector is an inverse linear logarithmic detector, which uses the inverse linear characteristics of a bipolar transistor to provide a logarithmic conversion. In one example, the collector and base of an NPN bipolar transistor are directly connected to the gate and source of an n-type metal oxide semiconductor (NMOS) transistor, respectively. In addition, an input current is applied to the collector of the NPN bipolar transistor, and a logarithmic voltage is generated at the base of the NPN bipolar transistor.

[0004] In another example of an inverse linear logarithmic detector, the collector and emitter of an NPN bipolar transistor are directly connected to the inverting input and output of an operational amplifier (op-amp), respectively. In addition, the base of the NPN bipolar transistor and the non-inverting input of the op-amp are grounded, and an input current is applied to the collector of the NPN bipolar transistor, causing a logarithmic voltage to be generated at the emitter of the NPN bipolar transistor. By using an op-amp, the collector-to-base voltage of the NPN bipolar transistor can be controlled to a level close to zero.

[0005] In some applications, a second copy of the logarithmic detector is included and driven by a reference current to offset the saturation current of the NPN bipolar transistor by the difference between the pair of logarithmic detectors. Summary of the invention

[0006] The present invention discloses an apparatus and method for preventing overshoot of a high-to-low input current transient of a logarithmic transimpedance amplifier. In certain embodiments, the amplifier system includes a logarithmic transimpedance amplifier having an input terminal for receiving an input current signal, and a current pulse injection circuit for injecting a current pulse into the input terminal of the logarithmic transimpedance amplifier in response to detecting a transition of the input current signal from a high current value to a low current value. By preventing overshoot in this manner, a slow recovery of the logarithmic transimpedance amplifier is avoided.

[0007] In one aspect, an amplifier system includes: a logarithmic transimpedance amplifier having an input configured to receive an input current signal; and a current pulse injection circuit configured to inject a current pulse into the input of the logarithmic transimpedance amplifier in response to detecting a transition of the input current signal from a high current value to a low current value.

[0008] In another aspect, a method for compensating for amplifier input recovery time is provided. The method includes: receiving an input current signal at an input of a logarithmic transimpedance amplifier, detecting a transition of the input current signal from a high current value to a low current value using a current pulse injection circuit; and injecting a current pulse into the input of the logarithmic transimpedance amplifier in response to detecting the transition of the input current signal using the current pulse injection circuit.

[0009] In another aspect, a photocurrent detection system includes: a photodiode configured to generate an input current signal; and a semiconductor die. The semiconductor die includes a logarithmic transimpedance amplifier having an input terminal configured to receive the input current signal. The semiconductor die also includes a current pulse injection circuit configured to inject a current pulse into the input terminal of the logarithmic transimpedance amplifier in response to detecting a transition of the input current signal from a high current value to a low current value. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] Figure 1A is a schematic diagram of one embodiment of a logarithmic current-to-voltage converter that can provide logarithmic conversion in a logarithmic transimpedance amplifier.

[0011] Figure 1B is a schematic diagram of one embodiment of a logarithmic current-to-voltage conversion system that can provide logarithmic conversion in a logarithmic transimpedance amplifier.

[0012] Figure 2 is an example plot of the output voltage versus time of a logarithmic transimpedance amplifier in response to a high-to-low input current transition.

[0013] Figure 3A is a schematic diagram of a logarithmic transimpedance amplifier with active photodiode biasing according to one embodiment.

[0014] Figure 3B yes Figure 3A FIG. 1 is a graph of one embodiment of a photodiode bias voltage versus photodiode current for an active photodiode bias.

[0015] Figure 4 is a schematic diagram of a logarithmic transimpedance amplifier with input current pulse injection according to one embodiment.

[0016] Figure 5A yes Figure 4 Example plot of transient simulation of a logarithmic transimpedance amplifier with various attenuation settings for input current pulse injection.

[0017] Figure 5B yes Figure 4 Figure 2. Example of transient simulation of the pulse stretcher circuit with various amplitude settings for input current pulse injection.

[0018] Figure 6 is an example plot of input voltage versus input current for a logarithmic transimpedance amplifier.

[0019] Figure 7 is a schematic diagram of a logarithmic transimpedance amplifier with active photodiode biasing according to another embodiment.

[0020] Figure 8 is a schematic diagram of a logarithmic transimpedance amplifier with input current pulse injection according to another embodiment. DETAILED DESCRIPTION

[0021] The following detailed description of the embodiments presents various descriptions of specific embodiments of the present invention. However, the present invention can be embodied in many different ways. In this specification, reference is made to the accompanying drawings. It should be understood that the elements shown in the accompanying drawings are not necessarily drawn to scale. In addition, it should be understood that some embodiments may include more elements and / or a subset of the elements shown in the drawings than shown in the drawings. In addition, some embodiments may combine any suitable combination of features from two or more drawings.

[0022] During a high-to-low input current transient applied to a logarithmic transimpedance amplifier, the output may be clipped to a low state for an extended period of time.

[0023] For example, output clipping of a logarithmic transimpedance amplifier can be caused by an active photodiode bias (PDB) circuit that increases the reverse voltage of the photodiode at high input optical powers to prevent the photodiode's series resistance from saturating the photodiode. In addition, a delay in the PDB's response to high-to-low input current transients can cause a negative current to flow through the photodiode's shunt capacitance. The negative current can flow out of the input of the logarithmic transimpedance amplifier, causing the input node to essentially discharge.

[0024] The present invention discloses an apparatus and method for preventing overshoot of a high-to-low input current transient of a logarithmic transimpedance amplifier. In certain embodiments, the amplifier system includes a logarithmic transimpedance amplifier having an input receiving an input current signal, and a current pulse injection circuit that injects a current pulse into the input of the logarithmic transimpedance amplifier in response to detecting a transition of the input current signal from a high current value to a low current value.

[0025] Thus, the current pulse quickly charges the input node capacitance of the amplifier to prevent output clipping.The current pulse injection circuit may be implemented with programmable current pulse strength and / or decay time to help provide the appropriate input current pulse.

[0026] The slow recovery of the logarithmic transimpedance amplifier is avoided by preventing overshoot in response to high-to-low input current transients.

[0027] In certain implementations, the amplitude and / or duration of the input current pulse is set by a control signal received through an interface of the semiconductor die and / or stored in non-volatile memory (NVM).

[0028] To detect the input current transition from high to low, any suitable detection scheme may be used. In some implementations, the logarithmic transimpedance amplifier generates a copy of the input current signal, which is provided as an input to the current pulse injection circuit. For example, the input stage of the logarithmic transimpedance amplifier may include a current mirror that generates the copy as a scaled-down copy of the input current signal. The current pulse injection circuit may use various circuits, such as a DC amplifier, a limiter, a comparator, a filter (e.g., a resistor capacitor or an RC filter), and / or other suitable circuits to generate a pulse that can be provided to a capacitor (e.g., a controllable capacitor) and / or other suitable circuits to generate a current pulse that can be provided to the input of the amplifier.

[0029] The current pulse injected by the input current pulse injection circuit can be shaped according to the needs of a specific application. In some embodiments, the shape of the current pulse decays exponentially over time.

[0030] Such amplifier systems are well suited for a variety of applications, including, for example, optical applications where a photodiode generates an input current signal in response to light from an optical fiber.

[0031] In some embodiments, an active photodiode bias circuit is also included for biasing the cathode of the photodiode with a bias voltage based on the current of the photodiode minus a threshold current value. Such a threshold current value can be set by a control signal, such as a control signal received from an interface of the semiconductor die and / or from the NVM. In some embodiments, the threshold current value is a dead band for active biasing.

[0032] Therefore, overshoot compensation can be combined with active photodiode biasing.

[0033] Figure 1A 1 is a schematic diagram of one embodiment of a logarithmic current-to-voltage converter 105 that can provide logarithmic conversion in a logarithmic transimpedance amplifier. For example, the logarithmic current-to-voltage converter 105 depicts one example of a logarithmic conversion circuit that can be used as part of a logarithmic transimpedance amplifier, for example, as an input stage of a logarithmic transimpedance amplifier circuit. Certain logarithmic transimpedance amplifiers may include other circuits, including but not limited to an output stage for buffering and / or otherwise processing a logarithmic output voltage.

[0034] In the illustrated embodiment, the logarithmic current-to-voltage converter 105 includes a field effect transistor (FET) transistor (NMOS in this example), a first bipolar transistor NPN_LOG (n-type in this example), a second bipolar transistor NPN_LV (n-type in this embodiment), a first DC current source I DC1 , the second DC current source I DC2 , capacitor C and resistor R.

[0035] The logarithmic current-to-voltage converter 105 depicts one example of a circuit for a logarithmic transimpedance amplifier. Although one embodiment of a logarithmic current-to-voltage conversion is shown, the logarithmic transimpedance amplifier may include other types of logarithmic current-to-pressure converters.

[0036] In the illustrated embodiment, the NMOS transistor includes a drain receiving a power supply voltage +Vc and a gate connected to a collector and an input terminal of the first bipolar transistor NPN_LOG. The input terminal receives an input current I IN And with input voltage V IN The NMOS transistor also includes a base connected to the second bipolar transistor NPN_LV and a first DC current source I DC1 In addition, the base of the first bipolar transistor NPN_LOG receives the reference voltage V REF , and the emitter of the first bipolar transistor NPT_LOG is connected to the logarithmic voltage V LOG The emitter of the first bipolar transistor NPN_LOG is also connected to the second DC current source I DC2 The resistor R is connected between the emitter of the second bipolar transistor NPN_LV and the ground, and the capacitor C is connected to the resistor R in parallel.

[0037] like Figure 1A As shown, the input current I received from the input terminal IN is provided to the collector of the first bipolar transistor NPN_LOG. In addition, the logarithmic current-voltage converter 105 converts the input current I IN converted to a logarithmic voltage V provided at the output terminals LOG .

[0038] In the embodiment shown, capacitor C is used to extend the bandwidth of the collector current over the base voltage, while resistor R is used to increase the bandwidth of the input current I IN In some implementations, the capacitor C and / or the resistor R are controllable (eg, by using a programmable capacitor array to control the capacitance value and / or a programmable resistor array to control the resistance value).

[0039] The logarithmic current-to-voltage converter 105 can achieve higher speeds relative to configurations that use an op amp to provide feedback. For example, when an op amp is included in the feedback loop, the additional components introduce additional phase shift, shifting the second-order pole downward in frequency. While high-value compensation capacitors can be added to keep such a feedback loop stable, the high capacitance slows down the circuit.

[0040] Furthermore, compared to an implementation with an operational amplifier in the feedback loop, the logarithmic current-to-voltage converter 105 has a IN For example, when the op amp provides feedback at low input current levels, the bandwidth of the circuit is greatly reduced, causing the loop gain to drop below 0dB at frequencies below the baseband bandwidth of the rest of the circuit. This results in the loop not being able to cancel bias noise sources in a significant way. In this case, the op amp will significantly amplify any noise voltage present on the reference voltage.

[0041] In contrast, Figure 1A Medium reference voltage V REF Any noise on will be amplified much less because the amplification at the base of the first bipolar transistor NPN_LOG (connected as a common base stage) is much lower.

[0042] Figure 1B 1 is a schematic diagram of one embodiment of a logarithmic current-to-voltage conversion system 120 that can provide logarithmic conversion in a logarithmic transimpedance amplifier. For example, the logarithmic current-to-voltage system 120 depicts one example of a circuit that can be included as part of a logarithmic transimpedance amplifier, for example, used as an input stage for logarithmic transimpedance amplification to produce a logarithmic voltage that can be buffered and / or further processed as desired. Although one example embodiment is shown, the logarithmic transimpedance amplifier can be implemented in other ways.

[0043] The logarithmic current-to-voltage conversion system 120 includes a first logarithmic current-to-voltage converter 105a, a second logarithmic current-to-voltage converter 105b, a reference current source I REF and reference voltage source V REF The logarithmic current-to-voltage conversion system 120 is also depicted as having an input current source I IN , which represents a photodiode or other input current source of system 120 .

[0044] like Figure 1B As shown, Figure 1A Multiple instantiations or copies of the logarithmic current-to-voltage converter 105 have been arranged to provide logarithmic current / voltage conversion with enhanced performance. Specifically, the first logarithmic current-to-voltage converter 105a is used as an input channel, while the second logarithmic current-to-voltage converter 105b is used as a reference channel.

[0045] like Figure 1B As shown, the logarithmic voltage V LOG2 is the V of the first logarithmic current-to-voltage converter 105a and the second logarithmic current-to-pressure converter 105b. LOG By using a differential voltage between the input channel and the reference channel, the saturation current of the bipolar transistors (NPN_LOG transistors in converters 105a and 105b) is eliminated.

[0046] Figure 2 is an example plot of the output voltage versus time of a logarithmic transimpedance amplifier in response to a high-to-low input current transition. Figure 2 In FIG. 1 , the output voltage of the logarithmic transimpedance amplifier decreases within time t due to the discharge of the input node voltage of the logarithmic transimpedance amplifier.

[0047] like Figure 2 As shown, when the input current transitions from high to low (from the first or high input current level I H to the second or lower input current level I L ), the output of the logarithmic transimpedance amplifier recovers slowly.

[0048] The slow recovery can stem from several sources. In the first example, the high-to-low transition causes an overload event that disrupts the transimpedance amplifier’s feedback loop. In the second example, a delay in the active photodiode bias (PDB) driver can cause the cathode voltage of the photodiode to drop while the input current is already at I L This can cause a photodiode shunt capacitance to draw current from the input.

[0049] Figure 3A 1 is a schematic diagram of a logarithmic transimpedance amplifier with active photodiode biasing according to one embodiment. In the illustrated embodiment, an integrated circuit (IC) or semiconductor die 150 includes a logarithmic transimpedance amplifier 142, a differential circuit 143 with a dead zone, an amplifier 144, a controllable feedback resistor 145, a register and interface 146, and a reference voltage source V REF .like Figure 3A As shown, IC 150 receives an input current I from photodiode 148 PD , the photodiode 148 responds to the light received from the optical fiber 149. The differential circuit 143 with dead zone, the amplifier 144, the controllable feedback resistor 145 and the reference voltage source V REF Together they operate as an active photodiode bias circuit for photodiode 148 .

[0050] Figure 3AThe embodiment of the present invention depicts an example of active photodiode biasing of a logarithmic transimpedance amplifier. This active optical biasing can be used in conjunction with any input current pulse injection scheme described herein. However, the teachings herein are applicable to other implementations of active biasing and to implementations of input current pulse injection that do not use any active optical biasing. Therefore, other implementations are also possible.

[0051] like Figure 3A As shown, the photodiode 148 provides an input current I to the current input INP of the IC 150. PD Input current I PD is provided to the input terminal of the logarithmic transimpedance amplifier 142. In addition, the logarithmic transimpedance amplifier 142 generates an input current I PD The copy of the input current I is provided to the differential circuit 143 with dead zone. PD The replica of may be generated in any suitable manner, including but not limited to using a current mirror at the input stage of the logarithmic transimpedance amplifier 142 to generate a replica as the input current I PD A scaled-down copy.

[0052] Continue to refer Figure 3A , the logarithmic transimpedance amplifier 142 amplifies the input current I PD To generate a logarithmic output voltage Vlog. In addition, the differential circuit 143 with a dead zone determines the dead zone current I DZ and input current I PD When the input current is less than or equal to the dead-time current I DZ When the input current is greater than the dead-band current I DZ When the output of the differential circuit is based on the input current and the dead-time current I DZ varies with the difference between (e.g., monotonically increases).

[0053] In certain implementations, the output of the difference circuit 143 with dead band corresponds to the output voltage provided to the inverting input of the amplifier 144 .

[0054] Continue to refer Figure 3A , amplifier 144 is based on the reference voltage source V REF The output signal is generated by the difference between the reference voltage (eg, 1.5V) and the output of the differential circuit 143 with dead zone. The output signal of the amplifier 144 is used as the active PDB signal for biasing the cathode of the photodiode 148.

[0055] like Figure 3AAs shown, the controllable feedback resistor 145 is connected between the output and the inverting input of the amplifier 144. The value of the controllable feedback resistor 145 and the dead-time current I DZ The value of may be configured by data received through an interface of IC 150 and stored in a register. For example, registers and interface 146 may receive configuration data (e.g., from nonvolatile memory or NVM 147) that controls the feedback resistor and / or the dead-band current level. By implementing IC 150 in this manner, configurability of active photodiode bias and dead-band is provided.

[0056] For example, for an input current I PD At higher current levels, the cathode voltage of the photodiode is increased (via active PDB) to avoid saturation of the photodiode due to series resistance. The amount of increase can be controlled via registers and interface 145 (e.g., I2C). Active PDB increases the photodiode cathode voltage (V PDB ) and the photodiode anode voltage (V INP ) voltage difference, which helps reduce the low I PD In addition, the dead-time current I DZ Can be controlled by registers and interface 145 .

[0057] Figure 3B yes Figure 3A An example graph of photodiode bias voltage versus photodiode current for an active photodiode bias is shown. Figure 3B As shown, for I PD DZ , active PDB(V PDB ) corresponds to the reference voltage (V REF ). However, as the input current level increases to the dead-time current I DZ Above, V PDB Based on I PD and I DZ The difference between them increases.

[0058] One benefit of using dead time is that for a high-to-low input current transition, the PDB circuit has some time to operate while the input current is below I DZ1 The time point and input current I L The PDB voltage is stabilized between the time points. For DZ1 The input current is converted, and the PDB voltage is a constant voltage V REF , to prevent the PDB circuit from generating negative current to the input terminal.

[0059] Figure 4 ​1 is a schematic diagram of a logarithmic transimpedance amplifier with input current pulse injection according to one embodiment. In the illustrated embodiment, IC 160 includes a logarithmic transimpedance amplifier 142, a DC amplifier and limiter 151, a differential circuit 152 with a threshold, a controllable resistor capacitor (RC) filter 153, a controllable capacitor 154, and a register and interface 146. IC 160 can receive an input current from a photodiode that responds to light received from an optical fiber. The DC amplifier and limiter 151, the differential circuit 152 with a threshold, the controllable RC filter 153, and the controllable capacitor 154 work together as one embodiment of a current pulse injection circuit that injects an input current pulse in response to a high-to-low input current transient to prevent overshoot of the logarithmic transimpedance amplifier.

[0060] although Figure 4 One embodiment of input current pulse injection for a logarithmic transimpedance amplifier is depicted, but the teachings herein are applicable to other implementations of input current pulse injection. Thus, other implementations are possible. In addition, the input current pulse injection scheme herein can be combined with active biasing of a photodiode, such as Figure 3A Photodiode active bias scheme shown.

[0061] In the illustrated embodiment, the input current is depicted as rising from a high current level I H Transition to low current level I L , to indicate the input current transition from high to low.

[0062] like Figure 4 As shown, the input current I PD is provided to the input of the logarithmic transimpedance amplifier 142, which generates an input current I PD A copy of , which is provided to the DC amplifier and limiter 151.

[0063] The DC amplifier and limiter 151 receives a copy of the input current IPD and outputs an amplified current, which is provided to the differential circuit with a threshold 152. The differential circuit with a threshold 152 compares the amplified input current with the threshold. Below the threshold, the output of the differential circuit with a threshold 152 is invalid. However, when the amplified input current is greater than the threshold, the differential circuit with a threshold 152 outputs an output signal, which is provided to the controllable RC filter 153.

[0064] In some implementations, the threshold is selected to be at an intermediate or medium input current level. In configurations that also use an active PDB, the threshold may be selected to be less than the dead-band current I DZ , to prevent the PDB from being active in the absence of pulse broadening from input current pulse injection.

[0065] In this example, in response to a high to low input current transition, the DC amplifier and limiter 151 and the differential circuit 152 with a threshold value operate in combination to produce an output signal corresponding to a step function. The DC amplifier and limiter 151 and the differential circuit 152 with a threshold value depict one example of a circuit suitable for detecting a high to low input current transition. However, other implementations of detecting a high to low input current transition are possible.

[0066] Continue to refer Figure 4 The output of the differential circuit 152 with a threshold is filtered by a controllable RC filter 153 to generate a filtered output signal, which is provided to a controllable capacitor 154. In addition, the controllable capacitor 154 is connected between the output terminal of the controllable RC filter 153 and the input terminal of the logarithmic transimpedance amplifier 142 for injecting an input current pulse in response to the filtered output signal.

[0067] therefore, Figure 4 The input current pulse injection scheme of the present invention is used to inject an input current pulse in response to detecting an input current transition from high to low. In some examples, the input current pulse can correspond to an exponentially decaying current pulse.

[0068] The current pulse injected into the input terminal may be controlled by configuration data received from registers and interface 146. For example, the amplitude of the pulse may be set by the capacitance value Cm of controllable capacitor 154, and the decay time of the pulse may be set by the time constant τ of controllable RC filter 153. In some implementations, such configuration data may be received from NVM 147.

[0069] Figure 5A yes Figure 4 Figure 1 shows an example of a transient simulation of a logarithmic transimpedance amplifier 142 at various attenuation settings for input current pulse injection. The transient simulation depicts an example of the output voltage Vlog of the transimpedance amplifier 142 for various decay time settings set by controlling the time constant τ of the controllable RC filter 153. The transient simulation is performed for a photodiode input current I PD An example simulation of a transition from 1mA to 10nA was performed.

[0070] Figure 5B yes Figure 4 FIG. 1 is an example of a transient simulation of the pulse stretcher circuit under various amplitude settings of the input current pulse injection. The transient simulation depicts an example of the output voltage VLOG of the transimpedance amplifier 142 at various amplitude settings set by controlling the capacitance value Cm of the controllable capacitor 154. The transient simulation is for the photodiode input current I PDAn example simulation of a transition from 1mA to 1nA was performed.

[0071] Figure 6 is an example plot of input voltage versus input current for a logarithmic transimpedance amplifier.

[0072] Logarithmic transimpedance amplifiers cannot properly handle negative input currents because the logarithmic value of a negative number does not exist mathematically. Without compensation, the input transient current overshoot from high to low can result in a very undesirable temporary negative input current.

[0073] For example, in Figure 6 In, V L Corresponding to low input level current I L The balanced voltage at the input node of the logarithmic transimpedance amplifier, while V MIN corresponds to the input node voltage under negative input current. Therefore, for low I L , the recovery time of a logarithmic transimpedance amplifier can be quite long. In addition, V MIN This can be determined by how much negative input current is supplied during the transition period.

[0074] Figure 7 is a schematic diagram of a logarithmic transimpedance amplifier with active photodiode biasing according to another embodiment.

[0075] exist Figure 7 The logarithmic transimpedance amplifier consists of a Figure 1A The logarithmic current-voltage converter 105 is a logarithmic current-voltage converter. For example, the logarithmic current-voltage converter includes an NMOS transistor, a first bipolar transistor NPN_LOG, a second bipolar transistor NPN_LV, a first DC current source I DC1 , the second DC current source I DC2 and resistor Rg, which is configured similarly to Figure 1A .

[0076] like Figure 7 As shown, the bipolar transistor Q0a includes a base and an emitter, which are connected to the base and emitter of the bipolar transistor NPN_LOG, respectively. The bipolar transistor Q0a is smaller (16 times in this example) and generates a current I corresponding to a copy of the input current MONa A copy of the input current is provided to a differential circuit with dead zone using bipolar transistors Q1a, Q2, Q3, Q4, Q5, Q6…Q7, ​​FET transistors M0, M1, M2…M3, resistors MR, R, 2R…2 N R, diode D1 and variable current source I DZ In the embodiment shown, the dead zone is realized by a variable current source I DZ of current control.

[0077] like Figure 7 As shown, bits bN, bN-1, ... b0 (a total of N+1 bits) are used to turn on or off transistors M1, M2, ... M3, respectively, to change the amount of current absorbed, thereby controlling the transimpedance of the active photodiode bias circuit (thereby acting as a function of changing the feedback resistor R T In addition, the output of the differential circuit with dead zone is provided to a circuit with feedback resistor R T The amplifier A1 is implemented as Figure 3A The active photodiode bias signal is generated in this way.

[0078] Figure 8 is a schematic diagram of a logarithmic transimpedance amplifier with input current pulse injection according to another embodiment.

[0079] exist Figure 8 The logarithmic transimpedance amplifier consists of a Figure 1A The logarithmic current-voltage converter 105 is a logarithmic current-voltage converter. For example, the logarithmic current-voltage converter includes an NMOS transistor, a first bipolar transistor NPN_LOG, a second bipolar transistor NPN_LV, a first DC current source I DC1 , the second DC current source I DC2 and resistor Rg, which is configured similarly to Figure 1A .

[0080] like Figure 8 As shown, the bipolar transistor Q0b includes a base and an emitter, which are connected to the base and emitter of the bipolar transistor NPN_LOG, respectively. The bipolar transistor Q0b is smaller (16 times in this example) and generates a current I corresponding to a copy of the input current MONb A copy of the input current is amplified and then provided to a differential circuit with a threshold using bipolar transistors Q1b, Q8, Q9, and Q10, diode D2, current source I OFF and resistor R d Together we can achieve it. Figure 8 In FIG. 1 , the dashed line between the collector of bipolar transistor Q8 and the node connected to the collector of bipolar transistor Q9 indicates that multiple stages may be used to provide current amplification as desired.

[0081] Continue to refer Figure 8 , the output of the differential circuit with a threshold is provided to the resistor R PU and controllable capacitor C N The output of the controllable RC filter is provided to the controllable capacitor C M , to generate a current I injected into the input of the logarithmic transimpedance amplifierCM .

[0082] in conclusion

[0083] The above description may refer to elements or features as being "connected" or "coupled" together. As used herein, unless otherwise expressly stated, "connected" means that one element / feature is directly or indirectly connected to another element or feature, and is not necessarily mechanically connected. Similarly, unless otherwise expressly stated, "coupled" means that one element / feature is directly or indirectly coupled to another element or feature, and is not necessarily mechanically coupled. Therefore, although the various schematic diagrams shown in the figures depict example arrangements of elements and components, in actual embodiments there may be additional intervening elements, devices, features, or components (assuming that the functionality of the depicted circuits is not adversely affected).

[0084] Although certain embodiments have been described, these embodiments are presented only as examples and are not intended to limit the scope of the present disclosure. In fact, the novel devices, methods, and systems described herein may be embodied in various other forms; in addition, various omissions, substitutions, and changes may be made to the forms of the methods and systems described herein without departing from the spirit of the present disclosure. For example, although the disclosed embodiments are presented in a given arrangement, alternative embodiments may perform similar functions using different components and / or circuit topologies, and may delete, move, add, subdivide, combine, and / or modify some elements. Each of these elements may be implemented in a variety of different ways. Any suitable combination of the elements and actions of the various embodiments described above may be combined to provide further embodiments. Therefore, the scope of the present invention is limited only by reference to the appended claims.

[0085] Although the claims set forth herein are filed with the USPTO in a single-dependency format, it should be understood that any claim may depend on any prior claim of the same type unless this is clearly technically infeasible.

Claims

1. An amplifier system, comprising: a logarithmic transimpedance amplifier having an input terminal configured to receive an input current signal; and The current pulse injection circuit is configured to inject a current pulse into the input terminal of the logarithmic transimpedance amplifier in response to detecting a transition of the input current signal from a high current value to a low current value. 2 . The amplifier system of claim 1 , wherein at least one of the amplitude or duration of the current pulse is set by a control signal. 3 . The amplifier system of claim 2 , further comprising a non-volatile memory (NVM) configured to generate the control signal.

4. The amplifier system of claim 1, wherein the shape of the current pulse decays exponentially over time. 5 . The amplifier system of claim 1 , further comprising a photodiode configured to generate the input current signal.

6. The amplifier system of claim 5, further comprising an active photodiode bias circuit configured to bias a cathode of the photodiode with a bias voltage based on a current of the photodiode minus a threshold current value.

7. The amplifier system of claim 6, wherein the threshold current value is set by a control signal. 8 . The amplifier system of claim 6 , further comprising a non-volatile memory (NVM) configured to generate the control signal.

9. The amplifier system of claim 1, wherein the logarithmic transimpedance amplifier is configured to generate a replica of an input current provided to an input of the current pulse injection circuit.

10. A method for compensating an amplifier input recovery time, the method comprising: receiving an input current signal at an input terminal of the logarithmic transimpedance amplifier; Using a current pulse injection circuit to detect a transition of the input current signal from a high current value to a low current value; and In response to detecting a transition in the input current signal using a current pulse injection circuit, a current pulse is injected into an input of the logarithmic transimpedance amplifier.

11. The method of claim 10, further comprising controlling at least one of an amplitude or a duration of the current pulse using a control signal.

12. The method of claim 11, further comprising generating the control signal using a non-volatile memory (NVM). The method of claim 10 , wherein the shape of the current pulse decays exponentially over time.

14. The method of claim 10, further comprising generating the input current signal using a photodiode.

15. The method of claim 14, further comprising biasing a cathode of the photodiode with a bias voltage based on a current of the photodiode minus a threshold current value.

16. The method of claim 15, further comprising setting the threshold current value using a control signal.

17. A photocurrent detection system, comprising: a photodiode configured to generate an input current signal; and a semiconductor die comprising a logarithmic transimpedance amplifier having an input terminal configured to receive the input current signal, and The current pulse injection circuit is configured to inject a current pulse into the input terminal of the logarithmic transimpedance amplifier in response to detecting a transition of the input current signal from a high current value to a low current value.

18. The photocurrent detection system of claim 17, wherein at least one of the amplitude or duration of the current pulse is set by a control signal.

19. The photocurrent detection system of claim 17, wherein the shape of the current pulse decays exponentially over time.

20. The photocurrent sensing system of claim 17, wherein the logarithmic transimpedance amplifier is configured to generate a replica of the input current signal, which is provided to an input of the current pulse injection circuit.

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