Superconducting quantum interference device based on Josephson junction and preparation method thereof

Abstract

According to the superconducting quantum interference device based on the Josephson junction and the preparation method of the superconducting quantum interference device based on the Josephson junction, the manufacturing process of the Josephson junction is improved, and an organic cleaning process is added in the photoresist stripping process, so that the side wall formed by continuous stacking can be removed, the quality of a subsequently deposited film is improved, and the performance of the superconducting quantum interference device is improved. The SQUID output curve is not easy to generate resonance, and the yield of the SQUID batch preparation process is improved; on the basis of a traditional SQUID, each Josephson junction is additionally connected in series or in parallel with one Josephson junction to form the SQUID with four Josephson junctions, so that a larger output voltage modulation depth is obtained, the SQUID has higher sensitivity, lower noise and a larger linear range, a circuit is not prone to losing lock, and the SQUID has the advantages of being simple in structure, low in cost and high in reliability. A lengthy offset line does not need to be added, the problems of magnetic flux crosstalk, poor magnetic flux coherence and the like do not need to be worried about, and the layout structure design is simpler and more convenient.

Description

Technical Field

[0001] The present invention belongs to the field of superconducting quantum interference devices, and in particular relates to a superconducting quantum interference device based on a Josephson junction and a preparation method thereof. Background Art

[0002] Superconducting Quantum Interference Device (SQUID) is an extremely sensitive magnetic flux sensor, which is divided into DC SQUID and RF SQUID. DC SQUID consists of two weakly connected parallel superconducting Josephson junctions and a superconducting ring. Its magnetic field sensitivity can reach the fT level (1fT = 10 -15 T), can measure all physical quantities that can be converted into magnetic flux, such as current, voltage, magnetic field, gravity, heat and other physical quantities. Therefore, it has been widely used in astronomical observation, geophysical exploration, biomagnetic imaging, extremely low field magnetic resonance and other weak magnetic signal detection fields.

[0003] Since the output voltage at both ends of the DC SQUID changes sinusoidally with the change of magnetic flux, and the amplitude of the output voltage is in the μV level, the linear range of the output signal of the DC SQUID itself is small and very weak. In specific applications, a corresponding readout circuit is also required to realize the linear readout of the output voltage at both ends of the DC SQUID. As one of the most common SQUID readout circuits, the working principle of the flux-locked loop (FLL) is to use a negative feedback mechanism to maintain the magnetic flux in the superconducting ring unchanged. Specifically, the external input magnetic flux produces a small voltage change at both ends of the SQUID. The voltage signal is then amplified by the amplifier in the FLL circuit and converted into a current signal through an integrator. The current signal generates a feedback magnetic flux through the feedback coil and is fed back to the superconducting ring. The feedback magnetic flux is opposite to the input magnetic flux, so it can offset the input magnetic flux to keep the total magnetic flux in the superconducting ring unchanged. Within the working range of the amplifier, the FLL circuit can keep the output signal linearly changing with the input flux, but the equivalent flux noise of the amplifier in the FLL circuit will overwhelm the intrinsic flux noise of the SQUID, thus seriously affecting the high sensitivity of the SQUID. In order to reduce the impact of the equivalent flux noise of the amplifier on the SQUID, the flux-to-voltage conversion coefficient of the SQUID must be improved. Traditional methods of increasing the flux-to-voltage transfer coefficient of the SQUID include additional positive feedback (APF) and bootstrap circuit (SBC). Although the additional flux feedback is achieved by connecting a parallel inductor, the SQUID flux-to-voltage transfer coefficient is increased, but at the same time, the linear range and slew rate of the FLL circuit are reduced, which can easily cause the circuit to lose lock, making it impossible to achieve linear output.

[0004] like Figure 1As shown, the paper "Preparation and Test Analysis of Arrays of Serial Superconducting Quantum Interference Devices" in Volume 70, Issue 17 of "Acta Physica Sinica" in 2021 presents a SQUID series array configuration, which connects a number of SQUIDs in series to increase the signal amplification capability of the SQUID. However, there will be flux crosstalk between each SQUID in the array configuration, and the flux pinning effect between each SQUID will also be different, which will make the overall flux coherence of the device worse, and it is also necessary to add lengthy bias lines to the structure to provide bias current to the array configuration, which makes the layout design more complicated, and the electromagnetic environment of each SQUID in the array configuration and the consistency of process preparation are difficult to guarantee.

[0005] In addition, in the process of preparing the submicron junction SQUID, after exposure and development, due to the use of positive photoresist and film stress, the film is easily left with residue in the vertical direction of the edge of the pattern, thereby forming a side wall. The presence of the side wall will cause the subsequently deposited metal film to be disconnected at the high side wall, and will also cause the resistivity and resistance value of the resistor layer to change. The side wall is more likely to produce tip discharge, making the SQUID output curve more prone to resonance, resulting in poor device performance. Summary of the invention

[0006] In view of the shortcomings of the prior art mentioned above, the object of the present invention is to provide a superconducting quantum interference device based on a Josephson junction and a preparation method thereof, so as to solve the problems in the prior art that while improving the flux-voltage conversion coefficient of the SQUID, the linear range and slew rate of the flux locking loop are reduced, thereby causing the circuit to be easily unlocked, the difference in the flux pinning effect of each SQUID in the SQUID series array configuration and the flux crosstalk between each SQUID cause the flux coherence of the SQUID to deteriorate, and the SQUID output curve is prone to resonance and the device performance is deteriorated due to the presence of the graphic edge film side wall in the preparation process.

[0007] To achieve the above-mentioned object and other related objects, the present invention provides a method for preparing a superconducting quantum interference device based on a Josephson junction, comprising the following steps:

[0008] A substrate is provided, and a stacked structure including a first superconducting layer, an insulating material layer, and a second superconducting layer stacked in sequence is formed on a surface of the substrate, wherein the first superconducting layer has a first thickness, the second superconducting layer has a second thickness, and the first thickness is greater than the second thickness;

[0009] Defining a Josephson junction pre-junction region based on the insulating material layer and the second superconducting layer, etching the insulating material layer and the second superconducting layer except the Josephson junction pre-junction region to expose a portion of the first superconducting layer;

[0010] Etching the second superconducting layer on the Josephson junction pre-junction region to form a first superconducting wire on the insulating material layer, and etching the bottom electrode to form a first contact hole penetrating the bottom electrode and exposing the substrate;

[0011] forming a patterned first passivation layer on the surface of the stacked structure, wherein the first passivation layer includes a first opening for exposing the first superconducting wire;

[0012] forming a patterned resistance layer on the bottom electrode, wherein the resistance layer covers the first passivation layer in the first contact hole;

[0013] forming a patterned second passivation layer on the bottom electrode, wherein the second passivation layer covers the first contact hole and the bottom electrode, and the second passivation layer includes a second opening formed therein to expose the resistance layer;

[0014] A third superconducting layer is formed on the first superconducting wire and in the second opening, and the third superconducting layer is etched to form a top electrode and a second superconducting wire. The second superconducting wire crosses the first superconducting wire to form the Josephson junction.

[0015] Optionally, forming a patterned first passivation layer on the surface of the stacked structure comprises the following steps:

[0016] forming a patterned first photoresist layer on the surface of the bottom electrode;

[0017] Growing the first passivation layer in the first contact hole based on the patterned first photoresist layer, wherein the first passivation layer is continuously deposited along a vertical direction on the sidewall of the first photoresist layer to form a sidewall;

[0018] An organic cleaning process is added while stripping the first photoresist layer, and finally a patterned first passivation layer is formed, wherein the first passivation layer covers the substrate in the first contact hole and the side wall of the bottom electrode.

[0019] Optionally, the width of the Josephson junction pre-junction region is greater than the width of the Josephson junction.

[0020] Optionally, the thickness of the first superconducting layer is 100-200 nm; the thickness of the second superconducting layer is 50-100 nm; and the thickness of the third superconducting layer is 300-350 nm.

[0021] Optionally, the first superconducting layer includes at least one of a niobium nitride layer and a niobium layer; the second superconducting layer includes at least one of a niobium nitride layer and a niobium layer; and the third superconducting layer includes at least one of a niobium nitride layer and a niobium layer.

[0022] Optionally, the first passivation layer includes at least one of a silicon dioxide layer and a silicon monoxide layer; and the second passivation layer includes at least one of a silicon dioxide layer and a silicon monoxide layer.

[0023] Optionally, the insulating material layer includes at least one of an aluminum layer, an aluminum oxide layer and an aluminum nitride layer, and the thickness of the insulating material layer is 1 to 5 nm.

[0024] The present invention also provides a superconducting quantum interference device based on a Josephson junction, wherein the superconducting quantum interference device at least comprises:

[0025] substrate;

[0026] A bottom electrode is located on the substrate, and a first contact hole is formed on the surface of the bottom electrode to expose the substrate;

[0027] an insulating material layer, located on the bottom electrode;

[0028] A first superconducting wire is located on the insulating material layer;

[0029] a first passivation layer, the first passivation layer covering the substrate in the first contact hole and the sidewalls of the bottom electrode, the first passivation layer including a first opening formed therein to expose the first superconducting wire;

[0030] a resistance layer, wherein the resistance layer covers the first passivation layer in the first contact hole;

[0031] a second passivation layer, the second passivation layer covering the first contact hole and the bottom electrode, and comprising a second opening formed therein to expose the resistance layer;

[0032] A second superconducting wire is located in the first opening and crosses the first superconducting wire to form the Josephson junction, wherein the Josephson junction includes a first Josephson junction, a second Josephson junction, a third Josephson junction and a fourth Josephson junction with completely identical structures;

[0033] A top electrode is located in the second opening and connected to the resistance layer and the second superconducting wire.

[0034] Optionally, the first Josephson junction is connected in series with the third Josephson junction, the second Josephson junction is connected in series with the fourth Josephson junction, the first Josephson junction and the second Josephson junction are symmetrically distributed, the third Josephson junction and the fourth Josephson junction are symmetrically distributed, and the first Josephson junction, the second Josephson junction, the third Josephson junction and the fourth Josephson junction and the bottom electrode constitute a first superconducting ring.

[0035] Optionally, the first Josephson junction and the second Josephson junction are connected in parallel, the third Josephson junction and the fourth Josephson junction are connected in parallel, the first Josephson junction, the second Josephson junction and the bottom electrode constitute a second superconducting ring, and the third Josephson junction, the fourth Josephson junction and the bottom electrode constitute a third superconducting ring.

[0036] As described above, a superconducting quantum interference device based on a Josephson junction and a preparation method thereof of the present invention improves the manufacturing process of the Josephson junction. After forming the first passivation layer, the resistance layer and the second passivation layer, an organic cleaning process is added during the process of stripping the photoresist layer, so that the side walls formed by continuous accumulation along the vertical direction during the growth of the first passivation layer, the resistance layer and the second passivation layer can be completely removed, thereby improving the quality of the subsequently deposited metal film, making it difficult for the SQUID output curve to resonate, thereby improving the yield of the SQUID batch preparation process; in addition, on the basis of the traditional SQUID with two Josephson junctions, the present invention connects an additional Josephson junction in series in the branch where each Josephson junction is located. , thus forming a SQUID with four Josephson junctions. The four identical Josephson junctions are distributed in two superconducting rings in pairs, which can increase the output voltage of the SQUID and obtain a larger output voltage modulation depth. The presence of the bottom electrode can also reduce the interference of the uniform magnetic field in the environment, improve the anti-interference ability of the SQUID, and make the SQUID have higher sensitivity, lower noise and a larger linear range, so that the circuit is not easy to lose lock. At the same time, there is no need to add lengthy bias lines, and there is no need to worry about problems such as flux crosstalk and poor flux coherence. The area occupied and the design are basically the same as those of the traditional SQUID with two Josephson junctions. Therefore, it is also simpler and more convenient in layout structure design, and has a high industrial utilization value. BRIEF DESCRIPTION OF THE DRAWINGS

[0037] Figure 1 Shown is a SQUID series array configuration in the prior art.

[0038] Figure 2 Shown is an equivalent circuit diagram of a superconducting quantum interference device based on a Josephson junction.

[0039] Figure 3 Shown is another equivalent circuit diagram of a Josephson junction-based superconducting quantum interference device.

[0040] Figure 4 Shown is a process flow chart of a method for preparing a superconducting quantum interference device based on a Josephson junction of the present invention.

[0041] Figure 5It is a schematic diagram of the cross-sectional structure after forming a stacked structure in the method for preparing a superconducting quantum interference device based on a Josephson junction of the present invention.

[0042] Figure 6 It is a schematic diagram of the cross-sectional structure after forming a Josephson junction pre-junction region and a first superconducting wire in the method for preparing a superconducting quantum interference device based on a Josephson junction of the present invention.

[0043] Figure 7 It is a schematic diagram of the cross-sectional structure after forming the bottom electrode and the first contact hole in the method for preparing a superconducting quantum interference device based on a Josephson junction of the present invention.

[0044] Figure 8 It is a schematic diagram showing the cross-sectional structure of the side wall when the first passivation layer is formed in the method for preparing a superconducting quantum interference device based on a Josephson junction of the present invention.

[0045] Fig. 9 It is a schematic diagram of the cross-sectional structure after forming the first passivation layer and the first opening in the method for preparing a superconducting quantum interference device based on a Josephson junction of the present invention.

[0046] Fig.10 It is a schematic diagram of the cross-sectional structure after forming the resistance layer of the preparation method of the superconducting quantum interference device based on the Josephson junction of the present invention.

[0047] Fig.11 It is a schematic diagram of the cross-sectional structure after forming the second passivation layer and the second opening in the method for preparing a superconducting quantum interference device based on a Josephson junction of the present invention.

[0048] Fig.12 It is a schematic diagram of the cross-sectional structure after forming the top electrode and the second superconducting wire in the method for preparing a superconducting quantum interference device based on a Josephson junction of the present invention.

[0049] Description of Figure Numbers

[0050] 10. Substrate; 11. First superconducting layer; 12. Insulating material layer; 13. Second superconducting layer; 14. Laminated structure; 15. Josephson junction pre-junction region; 16. Bottom electrode; 17. First contact hole; 18. First photoresist layer; 19. First superconducting wire; 20. First passivation layer; 21. Sidewall; 22. First opening; 23. Resistor layer; 24. Second passivation layer; 25. Second opening; 26. Top electrode; 27. Second superconducting wire; 28. First Josephson junction; 29. ​​Second Josephson junction; 30. Third Josephson junction; 31. Fourth Josephson junction; S1-S7, steps. DETAILED DESCRIPTION

[0051] The following describes the embodiments of the present invention through specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present invention.

[0052] For example, when describing the embodiments of the present invention in detail, for the sake of convenience, the cross-sectional view showing the device structure will not be partially enlarged according to the general scale, and the schematic view is only an example, which should not limit the scope of protection of the present invention. In addition, in actual production, the three-dimensional space dimensions of length, width and depth should be included.

[0053] For ease of description, spatial relational terms such as "under", "below", "below", "below", "above", "on", etc. may be used herein to describe the relationship between one element or feature shown in the drawings and other elements or features. It will be understood that these spatial relational terms are intended to include other directions of the device in use or operation in addition to the directions depicted in the drawings. In addition, when a layer is referred to as being "between" two layers, it can be the only layer between the two layers, or there can be one or more intervening layers. In addition, "between..." used in the present invention includes both endpoint values.

[0054] In the context of the present application, a structure in which a first feature is described as being "above" a second feature may include embodiments in which the first and second features are formed in direct contact, and may also include embodiments in which additional features are formed between the first and second features, such that the first and second features may not be in direct contact.

[0055] It should be noted that the illustrations provided in this embodiment are only used to illustrate the basic concept of the present invention in a schematic manner, and therefore the illustrations only show components related to the present invention rather than being drawn according to the number, shape and size of components in actual implementation. In actual implementation, the type, quantity and proportion of each component may be changed arbitrarily, and the component layout may also be more complicated.

[0056] Embodiment 1

[0057] This embodiment provides a method for preparing a superconducting quantum interference device based on a Josephson junction, such as Figure 4 FIG. 1 is a process flow chart of a method for preparing a superconducting quantum interference device based on a Josephson junction, comprising the following steps:

[0058] S1: providing a substrate 10, and forming a laminated structure 14 including a first superconducting layer 11, an insulating material layer 12, and a second superconducting layer 13 stacked in sequence on a surface of the substrate 10, wherein the first superconducting layer 11 has a first thickness, the second superconducting layer 13 has a second thickness, and the first thickness is greater than the second thickness;

[0059] S2: defining a Josephson junction pre-junction region 15 based on the insulating material layer 12 and the second superconducting layer 13, etching the insulating material layer 12 and the second superconducting layer 13 except the Josephson junction pre-junction region 15, and exposing a portion of the first superconducting layer 11;

[0060] S3: etching the second superconducting layer 13 on the Josephson junction pre-junction region 15 to form a first superconducting wire 19 on the insulating material layer 12, and etching the first superconducting layer 11 to form a first contact hole 17 penetrating the first superconducting layer 11 and exposing the substrate 10;

[0061] S4: forming a patterned first passivation layer 20 on the surface of the stacked structure 14, wherein the first passivation layer 20 includes a first opening 22 formed therein to expose the first superconducting wire 19;

[0062] S5: forming a patterned resistance layer 23 on the first superconducting layer 11, wherein the resistance layer 23 covers the first passivation layer 20 in the first contact hole 17;

[0063] S6: forming a patterned second passivation layer 24 on the first superconducting layer 11, wherein the second passivation layer 24 covers the first contact hole 17 and the first superconducting layer 11, and the second passivation layer 24 includes a second opening 25 for exposing the resistance layer 23;

[0064] S7: forming a third superconducting layer on the first superconducting wire 19 and in the second opening 25, etching the third superconducting layer to form a top electrode 26 and a second superconducting wire 27, wherein the second superconducting wire 27 crosses the first superconducting wire 19 to form the Josephson junction.

[0065] The following is a further introduction to the preparation method of the Josephson junction-based superconducting quantum interference device with reference to the accompanying drawings, as follows:

[0066] In step S1, see Figure 4 and Figure 5A substrate 10 is provided, and a stacked structure 14 is formed on the surface of the substrate 10, which includes a first superconducting layer 11, an insulating material layer 12 and a second superconducting layer 13 stacked in sequence, wherein the first superconducting layer 11 has a first thickness, the second superconducting layer 13 has a second thickness, and the first thickness is greater than the second thickness.

[0067] As an example, the substrate 10 may include one of a silicon substrate, a magnesium oxide substrate, a sapphire substrate and a silicon carbide substrate, and the substrate 10 may be selected according to the needs. The substrate 10 may be a wafer-level substrate, such as a 6-inch, 8-inch, 12-inch wafer-level substrate, or an irregularly shaped substrate. The morphology and size of the substrate 10 are not excessively limited here.

[0068] As an example, the first superconducting layer 11 may include at least one of a niobium nitride layer and a niobium layer; that is, it may be one of them or a stacked structure 14 consisting of both; the second superconducting layer 13 may include at least one of a niobium nitride layer and a niobium layer, that is, it may be one of them or a stacked structure 14 consisting of both; in addition, the insulating material layer 12 may include at least one of an aluminum layer, an aluminum oxide layer and an aluminum nitride layer, that is, it may be one of them or a stacked structure 14 consisting of two or more.

[0069] In this embodiment, the first superconducting layer 11, the insulating material layer 12 and the second superconducting layer 13 can be grown separately by DC reactive magnetron sputtering, and the proportion of each element in the material is adjusted so that the first superconducting layer 11 and the second superconducting layer 13 have superconducting properties under specific conditions (for example, ultra-low temperature). The materials of the first superconducting layer 11 and the second superconducting layer 13 are both made of the more common NbN, and the material of the insulating material layer 12 is made of aluminum oxide formed by oxidation of aluminum in oxygen, wherein the oxidation time and the oxidation gas pressure determine the thickness of the insulating material layer 12, and also determine the critical current density of the subsequently formed Josephson junction, but the selection of the materials of the first superconducting layer 11, the insulating material layer 12 and the second superconducting layer 13 is not limited thereto.

[0070] In order to meet the needs of subsequent over-etching process, in the stacked structure 14, the first superconducting layer 11 and the second superconducting layer 13 have different film thicknesses, and the second superconducting layer 13 located at the upper layer is thinner than the first superconducting layer 11 located at the lower layer.

[0071] As an example, the thickness of the first superconducting layer 11 is 100-200 nm; the thickness of the second superconducting layer 13 is 50-100 nm, and the thickness of the insulating material layer 12 is 1-5 nm.

[0072] Specifically, in this embodiment, the thickness of the first superconducting layer 11 may be 100-200nm, such as 100nm, 150nm, 200nm, etc., which are not described in detail here; the thickness of the second superconducting layer 13 may be 50-100nm, such as 50nm, 75nm, 100nm, etc., which are not described in detail here; the thickness of the insulating material layer 12 is 1-5nm, such as 1nm, 3nm, 5nm, which are not described in detail here.

[0073] In step S2, see Figure 4 and Figure 6 A Josephson junction pre-junction region 15 is defined based on the insulating material layer 12 and the second superconducting layer 13 , and the insulating material layer 12 and the second superconducting layer 13 except the Josephson junction pre-junction region 15 are etched to expose a portion of the first superconducting layer 11 .

[0074] In this embodiment, the position of the Josephson junction to be prepared later is predefined on the insulating material layer 12 and the second superconducting layer 13. To prevent leakage current, the width of the predefined Josephson junction pre-junction region 15 is greater than the width of the real Josephson junction to be formed later. Then, the insulating material layer 12 and the second superconducting layer 13 except the Josephson junction pre-junction region 15 are etched away by photolithography and etching techniques, thereby exposing a portion of the first superconducting layer 11. Here, the method for etching the second superconducting layer 13 may be reactive ion etching, and the method for etching the insulating material layer 12 may be wet etching technology, but it is not limited thereto. This step is a preliminary preparation for the real Josephson junction to be formed later.

[0075] In step S3, see Figure 4 and Figure 7 , the second superconducting layer 13 on the Josephson junction pre-junction region 15 is etched to form a first superconducting wire 19 on the insulating material layer 12 , and the first superconducting layer 11 is etched to form a first contact hole 17 penetrating the first superconducting layer 11 and exposing the substrate 10 .

[0076] like Figure 7As shown in FIG. 1 , in this embodiment, a patterned first photoresist layer 18 is formed on the surface of the first superconducting layer 11 and the second superconducting layer 13, and the second superconducting layer 13 on the Josephson junction pre-junction region 15 is etched to form a first superconducting wire 19. During the etching process, the second superconducting layer 13 on the Josephson junction pre-junction region 15 and the first superconducting layer 11 outside the Josephson junction pre-junction region 15 will be etched at the same time. However, since the thickness of the first superconducting layer 11 is greater than that of the second superconducting layer 13, the second superconducting layer 13 faces over-etching, and the insulating material layer 12 on the Josephson junction pre-junction region 15 can be used as an etching stop layer to prevent the over-etching from affecting the first superconducting layer 11 under the Josephson junction pre-junction region 15. Figure 7 As shown in b, the first superconducting layer 11 is etched based on the patterned first photoresist layer 18, and a first contact hole 17 is formed on the first superconducting layer 11 outside the Josephson junction pre-junction region 15. The first contact hole 17 penetrates the first superconducting layer 11 and exposes the substrate 10. The remaining part of the first superconducting layer 11 serves as the bottom electrode 16. The shape and size of the bottom electrode 16 can be selected according to actual conditions and are no longer limited here.

[0077] Specifically, the method for forming the patterned first photoresist layer 18 is a process of coating, drying, exposing, and developing the photoresist, which will not be described in detail here.

[0078] In step S4, see Figure 4 , Figure 8 and Fig. 9 A patterned first passivation layer 20 is formed on the surface of the stacked structure 14 , and the first passivation layer 20 includes a first opening 22 formed therein to expose the first superconducting wire 19 .

[0079] As an example, forming a patterned first passivation layer 20 on the surface of the stacked structure 14 includes the following steps: growing the first passivation layer 20 in the first contact hole 17, and continuously stacking the first passivation layer 20 on the side wall of the first photoresist layer 18 along the vertical direction to form a side wall 21; while stripping the first photoresist layer 18, adding an organic cleaning process, and finally forming the patterned first passivation layer 20, the first passivation layer 20 covers the substrate 10 in the first contact hole 17 and the side wall of the bottom electrode 16.

[0080] Specifically, after executing step S3, the patterned first photoresist layer 18 formed on the surface of the first superconducting layer 11 and the second superconducting layer 13 may not be removed first, but the first passivation layer 20 may be grown immediately afterwards. Figure 8As shown, the first passivation layer 20 is continuously deposited in the vertical direction along the side wall of the first photoresist layer 18 in the first contact hole 17 to form a side wall 21. After the growth of the first passivation layer 20 is completed, the first photoresist layer 18 is stripped to re-expose the surface of the first superconducting wire and the surface of the bottom electrode 16.

[0081] For the side wall 21 formed by continuous accumulation along the vertical direction on the side wall of the first photoresist layer 18, it is difficult to be completely removed under the existing ultrasonic cleaning and stripping process. The existence of the side wall 21 will cause the subsequently deposited metal film to be disconnected at the side wall 21, thereby causing tip discharge and device resonance.

[0082] In this embodiment, an organic cleaning process is added while stripping the first photoresist layer 18, specifically as follows: when stripping the first photoresist layer 18, a high-pressure water gun is used to spray an organic solution capable of dissolving the first photoresist layer 18 onto the surface of the high-speed rotating substrate 10, thereby removing the residual side walls 21 of the first photoresist layer 18, and then the organic solution and impurities on the surface of the substrate 10 are cleaned by spraying deionized water, and finally the substrate 10 is rotated at a high speed so that the deionized water is separated from the substrate 10 under the action of centrifugal force to remove the side walls 21. Specifically, the organic solution spraying time can be 30-90s, for example: 30s, 45s, 60s, etc., the rotation speed is set to 3000-6000r / s, and the organic solution can be acetone or isopropanol, etc. Fig. 9 As shown, after the sidewalls 21 formed on the sidewalls of the first photoresist layer 18 are removed, a patterned first passivation layer 20 is formed, and the first passivation layer 20 covers the sidewalls of the substrate 10 and the bottom electrode 16 in the first contact hole 17. At the same time, the upper surface of the first passivation layer 20 is flattened so that the upper surface of the first passivation layer 20 has good flatness, providing a good process platform for the subsequent formation of the resistance layer 23 to improve the quality of the subsequently formed resistance layer 23. At the same time, the first passivation layer 20 can be thinned to obtain the first passivation layer 20 with a suitable thickness. The first passivation layer 20 also includes a first opening 22 formed to expose the first superconducting wire 19.

[0083] Specifically, the method of forming the first passivation layer 20 includes chemical vapor deposition, physical vapor deposition or other suitable methods.

[0084] Specifically, the first passivation layer 20 includes at least one of a silicon dioxide layer and a silicon monoxide layer. The first passivation layer 20 can play a good protective role. According to needs, the first passivation layer 20 can be a single layer or a stack of different materials, and no excessive restrictions are made here.

[0085] In step S5, refer to Figure 4 and Fig.10 , a patterned resistance layer 23 is formed on the first superconducting layer 11 , and the resistance layer 23 covers the first passivation layer 20 in the first contact hole 17 .

[0086] In this embodiment, a resistor layer 23 is formed on the surface of the bottom electrode 16 and the first passivation layer 20, a patterned second photoresist layer (not shown) is formed on the upper surface of the resistor layer 23, and the resistor layer 23 is etched based on the patterned second photoresist layer to obtain the resistor layer 23. Fig.10 As shown, the resistance layer 23 covers the first passivation layer 20 in the first contact hole 17 .

[0087] Specifically, the method of forming the resistance layer 23 includes magnetron sputtering, chemical vapor deposition, physical vapor deposition, atomic layer deposition or other suitable methods.

[0088] Specifically, the method for etching the resistor layer 23 includes dry etching, wet etching or other suitable methods. In this embodiment, in order to obtain the resistor layer 23 with a better sidewall morphology, an organic cleaning process is also required when stripping the second photoresist layer.

[0089] Specifically, the material of the resistor layer 23 includes molybdenum, platinum, nickel-chromium alloy or other suitable thin film resistor materials. In this embodiment, a molybdenum (Mo) thin film layer is used as the resistor layer 23 .

[0090] Specifically, the method for forming the patterned second photoresist layer is consistent with the method for forming the patterned first photoresist layer 18 , and will not be described in detail herein.

[0091] In step S6, refer to Figure 4 and Fig.11 A patterned second passivation layer 24 is formed on the first superconducting layer 11 , wherein the second passivation layer 24 covers the first contact hole 17 and the first superconducting layer 11 , and includes a second opening 25 formed therein to expose the resistance layer 23 .

[0092] Specifically, the method for forming the patterned second passivation layer 24 is the same as the method for forming the patterned first passivation layer 20, and will not be described in detail herein. Fig.11 As shown, the formed second passivation layer 24 covers the first contact hole 17 and the bottom electrode 16, and the second passivation layer 24 includes a second opening 25 for exposing the resistor layer 23. In this embodiment, in order to obtain the second passivation layer 24 with a better sidewall morphology, an organic cleaning process is also required to be added while stripping the photoresist layer.

[0093] In step S7, refer to Figure 4 and Fig.12 A third superconducting layer is formed on the first superconducting wire 19 and in the second opening 25, and the third superconducting layer is etched to form a top electrode 26 and a second superconducting wire 27. The second superconducting wire 27 crosses the first superconducting wire 19 to form the Josephson junction.

[0094] As an example, the third superconducting layer may include at least one of a niobium nitride layer and a niobium layer; that is, it may be a stacked structure 14 consisting of one or both of them.

[0095] As an example, the thickness of the third superconducting layer is 300-350 nm.

[0096] Specifically, in this embodiment, the thickness of the third superconducting layer may be 300-350 nm, such as 300 nm, 325 nm, 350 nm, etc., which are not described in detail here.

[0097] Specifically, the preparation of the third superconducting layer, the selection of the material, etc. may refer to the above description of the first superconducting layer 11 and the second superconducting layer 13 , which will not be elaborated here.

[0098] Specifically, in this embodiment, in order to further reduce the size of the formed Josephson junction, it is preferred that the second superconducting wire 27 is perpendicular to the first superconducting wire 19, but the angle between the second superconducting wire 27 and the first superconducting wire 19 is not limited thereto.

[0099] The method for preparing a superconducting quantum interference device based on a Josephson junction of the present embodiment improves the manufacturing process of the Josephson junction. After forming the first passivation layer 20, the resistance layer 23 and the second passivation layer 24, an organic cleaning process is added during the photoresist stripping process, so that the sidewalls 21 formed by continuous accumulation in the vertical direction along the side walls of the photoresist layer when growing the first passivation layer 20, the resistance layer 23 and the second passivation layer 24 can be completely removed, thereby improving the quality of the subsequently deposited metal film, making it difficult for the SQUID output curve to resonate, thereby improving the yield of the SQUID batch preparation process.

[0100] Embodiment 2

[0101] The present embodiment provides a superconducting quantum interference device based on a Josephson junction, the superconducting quantum interference device at least comprising: a substrate 10; a bottom electrode 16, located on the substrate 10, a first contact hole 17 exposing the substrate 10 is formed on the surface of the bottom electrode 16; an insulating material layer 12, located on the bottom electrode 16; a first superconducting wire 19, located on the insulating material layer 12; a first passivation layer 20, the first passivation layer 20 covers the substrate 10 in the first contact hole 17 and the sidewall of the bottom electrode 16, the first passivation layer 20 includes a first opening 22 exposing the first superconducting wire 19; a resistance layer 23, the resistance layer 23 covers the first superconducting wire 19; on the first passivation layer 20 in the contact hole 17; a second passivation layer 24, the second passivation layer 24 covers the first contact hole 17 and the bottom electrode 16, and the second passivation layer 24 includes a second opening 25 formed to expose the resistance layer 23; a second superconducting wire 27, located in the first opening 22, and crossing with the first superconducting wire 19 to form the Josephson junction, the Josephson junction includes a first Josephson junction 28, a second Josephson junction 29, a third Josephson junction 30 and a fourth Josephson junction 31 with completely identical structures; a top electrode 26, the top electrode 26 is located in the second opening 25 and connected to the resistance layer 23 and the second superconducting wire 27.

[0102] As an example, the first Josephson junction 28 is connected in series with the third Josephson junction 30, the second Josephson junction 29 is connected in series with the fourth Josephson junction 31, the first Josephson junction 28 and the second Josephson junction 29 are symmetrically distributed, the third Josephson junction 30 and the fourth Josephson junction 31 are symmetrically distributed, and the first Josephson junction 28, the second Josephson junction 29, the third Josephson junction 30 and the fourth Josephson junction 31 and the bottom electrode 16 constitute a first superconducting ring.

[0103] Specifically, Figure 2As shown, it is shown as an equivalent circuit diagram of the superconducting quantum interference device based on the Josephson junction in this embodiment. In this embodiment, the first Josephson junction 28, the second Josephson junction 29, the third Josephson junction 30 and the fourth Josephson junction 31 with completely identical structures are symmetrically distributed on both sides of the bottom electrode 16 of the SQUID in pairs, the first Josephson junction 28, the third Josephson junction 30 are connected in series with one bottom electrode 16, the second Josephson junction 29, the fourth Josephson junction 31 are connected in series with another bottom electrode 16, the two bottom electrodes 16 are connected by wires, the first Josephson junction 28, the second Josephson junction 29, the third Josephson junction 30 and the fourth Josephson junction 31 and the two bottom electrodes 16 constitute a first superconducting ring, so that the bias current flows in from the two Josephson junctions on the same side, passes through the bottom electrode 16 of the SQUID, and then flows out from the two Josephson junctions on the other side.

[0104] As an example, the first Josephson junction 28 and the second Josephson junction 29 are connected in parallel, the third Josephson junction 30 and the fourth Josephson junction 31 are connected in parallel, the first Josephson junction 28, the second Josephson junction 29 and the bottom electrode 16 constitute a second superconducting ring, and the third Josephson junction 30, the fourth Josephson junction 31 and the bottom electrode 16 constitute a third superconducting ring.

[0105] In another embodiment, another configuration of a superconducting quantum interference device based on a Josephson junction is proposed. Specifically, Figure 3 As shown, it is another equivalent circuit diagram of the superconducting quantum interference device based on the Josephson junction in this embodiment. In this embodiment, the first Josephson junction 28, the second Josephson junction 29, the third Josephson junction 30 and the fourth Josephson junction 31 with completely identical structures are distributed in two superconducting rings, and the two superconducting rings share the same bottom electrode 16, that is, the first Josephson junction 28 is connected in parallel with the second Josephson junction 29, the third Josephson junction 30 is connected in parallel with the fourth Josephson junction 31, the first Josephson junction 28, the second Josephson junction 29 and the bottom electrode 16 constitute the second superconducting ring, the third Josephson junction 30, the fourth Josephson junction 31 and the bottom electrode 16 constitute the third superconducting ring, and the bias current flows into the two Josephson junctions on the two branches respectively, and then flows out from the other two Josephson junctions of each branch after passing through the bottom electrode 16.

[0106] In order to increase the modulation depth of the output voltage of the SQUID device, a damping resistor needs to be connected in parallel at both ends of the SQUID bottom electrode 16 , and the damping resistor is formed in the resistance layer 23 .

[0107] In summary, the present invention provides a superconducting quantum interference device based on a Josephson junction and a preparation method thereof. By improving the manufacturing process of the Josephson junction, an organic cleaning process is added during the process of stripping the photoresist when forming the first passivation layer, the resistance layer and the second passivation layer, so that the sidewalls formed by continuous accumulation in the vertical direction along the sidewalls of the photoresist layer when growing the first passivation layer, the resistance layer and the second passivation layer can be completely removed, thereby improving the quality of the subsequently deposited metal film, making it difficult for the SQUID output curve to resonate, thereby improving the yield of the SQUID batch preparation process; in addition, on the basis of the traditional SQUID with two Josephson junctions, the present invention connects an additional Josephson junction in series in the branch where each Josephson junction is located, thereby forming a SQUID with four Josephson junctions, and the bottom of the SQUID is connected to the SQUID with four Josephson junctions. A damping resistor is connected in parallel at both ends of the electrode, or four identical Josephson junctions are distributed in two superconducting rings in pairs, so that the two superconducting rings share the same bottom electrode, thereby increasing the output voltage of the SQUID and obtaining a greater output voltage modulation depth without causing hysteresis on the IV curve of the SQUID. The presence of the bottom electrode can also reduce the interference of the uniform magnetic field in the environment, improve the anti-interference ability of the SQUID, and make the SQUID have higher sensitivity, lower noise and a larger linear range, so that the circuit is not easy to lose lock. At the same time, there is no need to add lengthy bias lines, and there is no need to worry about problems such as flux crosstalk and poor flux coherence. The area occupied and the design are basically the same as those of a traditional SQUID with two Josephson junctions, so the layout structure design is also simpler and more convenient, and has a high industrial utilization value.

[0108] The above embodiments are merely illustrative of the principles and effects of the present invention, and are not intended to limit the present invention. Anyone familiar with the art may modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by a person of ordinary skill in the art without departing from the spirit and technical concept disclosed by the present invention shall still be covered by the claims of the present invention.

Claims

1. A method for preparing a superconducting quantum interference device based on a Josephson junction, characterized in that: The following steps are involved: A substrate is provided, and a stacked structure including a first superconducting layer, an insulating material layer, and a second superconducting layer stacked in sequence is formed on a surface of the substrate, wherein the first superconducting layer has a first thickness, the second superconducting layer has a second thickness, and the first thickness is greater than the second thickness; Defining a Josephson junction pre-junction region based on the insulating material layer and the second superconducting layer, etching the insulating material layer and the second superconducting layer except the Josephson junction pre-junction region to expose a portion of the first superconducting layer; Etching the second superconducting layer on the Josephson junction pre-junction region to form a first superconducting wire on the insulating material layer, and etching the bottom electrode to form a first contact hole penetrating the bottom electrode and exposing the substrate; forming a patterned first passivation layer on the surface of the stacked structure, wherein the first passivation layer includes a first opening for exposing the first superconducting wire; forming a patterned resistance layer on the bottom electrode, wherein the resistance layer covers the first passivation layer in the first contact hole; forming a patterned second passivation layer on the bottom electrode, wherein the second passivation layer covers the first contact hole and the bottom electrode, and the second passivation layer includes a second opening formed therein to expose the resistance layer; A third superconducting layer is formed on the first superconducting wire and in the second opening, and the third superconducting layer is etched to form a top electrode and a second superconducting wire. The second superconducting wire crosses the first superconducting wire to form the Josephson junction.

2. The method for preparing a superconducting quantum interference device according to claim 1, characterized in that: Forming a patterned first passivation layer on the surface of the stacked structure comprises the following steps: forming a patterned first photoresist layer on the surface of the bottom electrode; Growing the first passivation layer in the first contact hole based on the patterned first photoresist layer, wherein the first passivation layer is continuously deposited along a vertical direction on the sidewall of the first photoresist layer to form a sidewall; An organic cleaning process is added while stripping the first photoresist layer, and finally a patterned first passivation layer is formed, wherein the first passivation layer covers the substrate in the first contact hole and the side wall of the bottom electrode.

3. The method for preparing a superconducting quantum interference device according to claim 1, characterized in that: The width of the Josephson junction pre-junction region is greater than the width of the Josephson junction.

4. The method for preparing a superconducting quantum interference device according to claim 1, characterized in that: The thickness of the first superconducting layer is 100-200 nm; the thickness of the second superconducting layer is 50-100 nm; and the thickness of the third superconducting layer is 300-350 nm.

5. The method for preparing a superconducting quantum interference device according to claim 1, characterized in that: The first superconducting layer includes at least one of a niobium nitride layer and a niobium layer; the second superconducting layer includes at least one of a niobium nitride layer and a niobium layer; and the third superconducting layer includes at least one of a niobium nitride layer and a niobium layer.

6. The method for preparing a superconducting quantum interference device according to claim 1, characterized in that: The first passivation layer includes at least one of a silicon dioxide layer and a silicon monoxide layer; the second passivation layer includes at least one of a silicon dioxide layer and a silicon monoxide layer.

7. The method for preparing a superconducting quantum interference device according to claim 1, characterized in that: The insulating material layer includes at least one of an aluminum layer, an aluminum oxide layer and an aluminum nitride layer, and the thickness of the insulating material layer is 1 to 5 nm.

8. A superconducting quantum interference device based on a Josephson junction, characterized in that: The superconducting quantum interference device at least comprises: substrate; A bottom electrode is located on the substrate, and a first contact hole is formed on the surface of the bottom electrode to expose the substrate; an insulating material layer, located on the bottom electrode; A first superconducting wire is located on the insulating material layer; a first passivation layer, the first passivation layer covering the substrate in the first contact hole and the sidewalls of the bottom electrode, the first passivation layer including a first opening formed therein to expose the first superconducting wire; a resistance layer, wherein the resistance layer covers the first passivation layer in the first contact hole; a second passivation layer, the second passivation layer covering the first contact hole and the bottom electrode, and comprising a second opening formed therein to expose the resistance layer; A second superconducting wire is located in the first opening and crosses the first superconducting wire to form the Josephson junction, wherein the Josephson junction includes a first Josephson junction, a second Josephson junction, a third Josephson junction and a fourth Josephson junction with completely identical structures; A top electrode is located in the second opening and connected to the resistance layer and the second superconducting wire.

9. The superconducting quantum interference device according to claim 8, characterized in that: The first Josephson junction is connected in series with the third Josephson junction, the second Josephson junction is connected in series with the fourth Josephson junction, the first Josephson junction and the second Josephson junction are symmetrically distributed, the third Josephson junction and the fourth Josephson junction are symmetrically distributed, and the first Josephson junction, the second Josephson junction, the third Josephson junction and the fourth Josephson junction and the bottom electrode constitute a first superconducting ring.

10. The superconducting quantum interference device according to claim 8, characterized in that: The first Josephson junction and the second Josephson junction are connected in parallel, the third Josephson junction and the fourth Josephson junction are connected in parallel, the first Josephson junction, the second Josephson junction and the bottom electrode constitute a second superconducting ring, and the third Josephson junction, the fourth Josephson junction and the bottom electrode constitute a third superconducting ring.

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