Rapid LCR instrument with secondary balance

Abstract

An LCR meter realizes analog balance through a transimpedance amplifier (TIA) and also uses a secondary balance method to improve balance accuracy. To this end, the TIA-based LCR meter applies an inverted voltage equal to the unbalanced voltage to the non-inverted input of the TIA in order to correct analog auto-balancing. And only one-time voltage measurement is needed.

Description

Technical Field

[0001] The present invention relates to an instrument for impedance measurement over a wide frequency range. Background Art

[0002] The main parameters of an LCR meter are the accuracy and speed of the measurement. If the LCR meter is used as part of an impedance analyzer or in production, the speed of the measurement is crucial. Impedance measurement is based on measuring the voltage drop across a range resistor with known impedance and the device under test (DUT) arranged in series with it. The impedance of the DUT is calculated by knowing the current and voltage drop across the DUT.

[0003] In this case, the main cause of the error (see Figure 1) is the leakage current flowing through the leakage impedance located between the midpoint between the DUT and the span resistor to ground. This leakage current is the cause of the unequal currents through the span resistor and the DUT.

[0004] In order to reduce this leakage current, different methods have been adopted.

[0005] One is the guard method, which applies a voltage to the guard through a voltage follower to help reduce the voltage between the shield and the intermediate point in the cable connected to the DUT, which runs from the low potential (LP) terminal of the LCR meter to the DUT. This method is used in the digital impedance meter ESI 251 model, see "A History of Impedance Measurements by Henry P. Hall", page 49.

[0006] Another method is an automatic bridge balance using a transimpedance amplifier (TIA). This method is used in digital impedance meters, type GR 1685-A, see "A History of Impedance Measurements by Henry P. Hall", page 49.

[0007] Both methods have an instant balancing effect, but they have low gain at high frequencies and therefore low common voltage suppression between the intermediate point and the cable shield. In addition, they may have stability problems.

[0008] LCR meters with modem-type auto-balancing bridges have good balance accuracy at high frequencies, such as in the Hewlett Packard 4271A LCR meter, see "A History of Impedance Measurements by Henry P. Hall", p. 49. However, they include slow integrators that require several cycles of the signal frequency for settling time, thus consuming long measurement times at low and medium frequencies. Furthermore, they are expensive. Rayman et al. (2009) in U.S. Pat. No. 7,616,008 B1 proposed a digital version of a modem-type auto-balancing bridge, but it has the same drawbacks as the analog version, namely, slow speed at low and medium frequencies.

[0009] There are some other digital methods, such as in U.S. Patent 10,013,015B2 by Ida et al. (2018), Chinese Patent CN110320410A by Fajie et al. (2019), and the book "A Novel Fast Balance Technique for the Digital AC Bridge" by Zhang et al. (1998). But all of them require at least two voltage measurements and at least two cycles of the signal frequency to achieve balance. Summary of the invention

[0010] A transimpedance amplifier (TIA) provides an analog method for achieving fast balancing at low cost. The TIA has an instant balancing effect at all frequencies. However, the TIA has low gain at high frequencies. Therefore, at high frequencies, a significant residual unbalanced voltage exists in the midpoint between the DUT and the range resistor. The present invention uses a sub-balancing method to eliminate this residual unbalanced voltage. The sub-balancing method includes: measuring the unbalanced voltage and applying a voltage with inverted polarity from an additional digital-to-analog converter (DAC) to the non-inverting input of the TIA. This is a fast, non-iterative method to improve accuracy. An LCR meter using this sub-balancing method can achieve balance with only one voltage measurement at high frequencies and has an instant balancing effect at medium and low frequencies.

[0011] Technical issues

[0012] Some LCR meters use a transimpedance amplifier (TIA) for balancing to reject the current through the leakage impedance. This is a low-cost solution for impedance measurement. However, because the TIAs have low gain at high frequencies, this solution has low accuracy at high frequencies.

[0013] Solution

[0014] The present invention solves the problem of low accuracy of TIA-based LCR meters by measuring the unbalanced voltage at the inverting input of the TIA and applying it to the non-inverting input of the TIA with opposite polarity through an additional voltage source. In this way, the accuracy of setting the output voltage of the TIA - which generates a compensation current through the range resistor to achieve balance - is not limited by the gain of the TIA.

[0015] Advantageous Effects of the Invention

[0016] TIA-based LCR meters have the best measurement time at sub-low and low frequencies. At these frequencies, the measurement time of a TIA-based LCR meter is limited only by one full cycle of the measurement frequency. The present invention extends its high impedance measurement accuracy to a wider frequency range. The hardware architecture further extends the frequency range by calibrating each voltage channel relative to the other voltage channels. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 shows the main causes of inaccuracy in LCR meters.

[0018] FIG. 2 shows a method for measuring leakage impedance.

[0019] Figure 3 A simplified schematic diagram is shown of a first embodiment of the invention.

[0020] Figure 4 An example showing the voltage at the input multiplexer of an LCR meter during one signal cycle.

[0021] Figure 5 The ADC1 input voltage of this first embodiment is shown.

[0022] Figure 6 The ADC1 input voltage for this first embodiment is shown in more detail.

[0023] Figure 7 The gain and phase frequency response of a low-pass anti-aliasing filter is shown.

[0024] Figure 8 A block diagram of this first embodiment of the invention is shown.

[0025] Fig. 9A block diagram showing the low-level processing for this first embodiment.

[0026] Fig.10 A flow chart showing the low-level work process of the processor.

[0027] Reference numerals list

[0028] 1002 first voltage source (VoltSrc1)

[0029] 1004 High Current (HC) Terminals

[0030] 1006 High Potential (HP) Terminal

[0031] 1008 Device Under Test (DUT)

[0032] 1010 Low potential (LP) terminal

[0033] 1012 Midway between the DUT and the range resistor

[0034] 1014 Leakage impedance (Zleak)

[0035] 1016 Low Current (LC) Terminals

[0036] 1018 range resistors, a set of reference resistors (Zrange)

[0037] Voltage on the second terminal of the 1020 range resistor (Vrr)

[0038] 1022 second voltage source (VoltSrc2)

[0039] 3002 Output impedance of the first voltage source (Zout1)

[0040] 3004 series current limiting resistor impedance (Zser_res)

[0041] 3006 Output impedance of the buffer of the first voltage source (Zbuff1)

[0042] 3008 Impedance of the cable wire between the high current terminal and the device under test (Zwire1)

[0043] 3010 Capacitance of the cable between the HP terminal and the DUT (Ccable1)

[0044] 3011 Impedance of the cable between the LC terminal and the device under test (Zwire2)

[0045] 3012 switch for connecting the non-inverting input of the transimpedance amplifier (TIA) to ground or to the second voltage source

[0046] 3014 Transimpedance Amplifier (TIA)

[0047] 3016 Voltage at the output of the second voltage source (Vsb)

[0048] 3018 switch for connecting the second terminal of the range resistor to the output of the TIA or to the output of the second voltage source

[0049] 3020 Output impedance of the second voltage source buffer (Zbuff2)

[0050] 8010 High Potential Voltage Input Buffer

[0051] 8012 Low Voltage Input Buffer

[0052] 8014 Low Current Voltage Input Buffer

[0053] 8016 Range Resistor Voltage Input Buffer

[0054] 8018 Second Voltage Source Voltage Input Buffer

[0055] 8024 First Voltage Source Output Buffer

[0056] 8026 output buffer for second voltage source

[0057] 8028 first low pass filter (LPF1)

[0058] 8030 Input Multiplexer

[0059] Output buffer of 8032 multiplexer

[0060] 8033 Multiplexer Control Interface

[0061] 8034 Second Low Pass Filter (LPF2)

[0062] 8036 first digital-to-analog converter (DAC) (DAC1)

[0063] 8038 first analog-to-digital converter (ADC) (ADC1)

[0064] 8040 Second DAC (DAC2)

[0065] 8042 sends digital signal to the first DAC

[0066] 8044 digital signal from the first ADC

[0067] The digital signal sent from 8046 to the second DAC

[0068] 8048 processor

[0069] 9002 The first set of memory buffers

[0070] 9004 Second memory buffer

[0071] 9006 Direct Fourier Transform (DFT) Box

[0072] 9008 Cosine Multiplier

[0073] 9010 Sine Multiplier

[0074] 9012 Demultiplexer and Accumulator

[0075] 9014 Software Direct Digital Synthesizer (DDS)

[0076] 9016 control and processing core

[0077] 10002 Common Direct Memory Access (DMA) Flowchart

[0078] 10004 Direct Fourier Transform Processing Flowchart for ADC Data

[0079] 10006 DMA data preparation flow chart for DAC and reference buffer DETAILED DESCRIPTION

[0080] Figure 3 is a simplified schematic diagram of the present invention. The present invention uses a transimpedance amplifier (TIA) to set the voltage in the middle point between the device under test (DUT) and the range resistor to be close to zero to minimize leakage current. The TIA has a good instantaneous balancing effect for medium and low frequencies. However, the TIA has low gain at high frequencies, so there is a significant residual unbalanced voltage.

[0081] [Mathematical formula 1] Impedance measurement is based on Ohm's law:

[0082] Zdut=Vdut / Idut

[0083] [Mathematical Formula 2] Ideally, the currents through the DUT and the range resistor are equal:

[0084] Idut=Irange

[0085] But there is some residual unbalanced voltage Vlp in the middle point between the DUT and the range resistor.

[0086] [Mathematical formula 3] Therefore, there is a current through the leakage impedance Zleak:

[0087] Ileak=Vlp / Zleak

[0088] This leakage current introduces errors into the impedance measurement. The present invention eliminates this error in two ways.

[0089] The first way is the sub-balanced method. The sub-balanced method is based on the characteristics of the operational amplifier to have equal amplification for two inputs, namely the inverting input and the non-inverting input. To obtain the same output voltage, the input voltage applied to each input of the operational amplifier is not important. The only difference is the polarity of the input voltage. If the input voltage is applied to the inverting input, it must have the opposite polarity relative to the output voltage. If the input voltage is applied to the non-inverting input, it must have the same polarity relative to the output voltage. Therefore, if the voltage on the inverting input of the TIA in stable mode is measured, and a voltage with the same value but opposite polarity is applied to the non-inverting input of the TIA, the voltage on the inverting input will become close to zero. And the current through the leakage impedance will also become close to zero.

[0090] Applying this secondary balancing voltage changes the current through the DUT, the fixture, and the output impedance of the first voltage source. The new current through the DUT depends on the output impedance of the first voltage source and the parasitic impedance of the fixture. They are constant and can be measured during calibration and saved in memory for use during measurement. Knowing these impedances allows a more accurate calculation of the required secondary balancing voltage. The second voltage source 1022 and switch 3012 provide this secondary balancing voltage. For this operation, only one additional voltage measurement is required.

[0091] The second way is to compensate for the leakage current. If the voltage drop on the leakage impedance is known, the leakage current can be calculated.

[0092] [Mathematical formula 4] and the actual current passing through the DUT can be obtained:

[0093] Idut=Irange-Ileak

[0094] Since the leakage impedance of the fixture used is constant, it can be measured during calibration and saved in memory for use during measurement. Figure 2 shows how to measure this leakage impedance.

[0095] At low and medium frequencies, the leakage impedance is high and the TIA has a small balance error. But achieving sub-balance - even in one step - takes time. In this case, only leakage compensation is necessary. This leakage compensation is especially necessary for infralow frequencies and very high DUT impedances, when the sub-balance alone is not enough to obtain high accuracy in measurements.

[0096] Both subbalancing and leakage compensation are necessary at high frequencies, especially when the cables connected to the fixture are long.

[0097] Example 1

[0098] First embodiment (see Figure 8 ) includes a processor 8048 that provides digital signals 8042 and 8046 to the first voltage source 1002 and the second voltage source 1022. The first embodiment also includes DACs 8036 and 8040, low pass filters 8028 and 8034, and output buffers 8024 and 8026. The processor receives the digital signal 8044 from the ADC 8038 and controls the analog multiplexer 8030.

[0099] The output of the first voltage source 1002 is transmitted through its output impedance 3002 (see Figure 3 ) is connected to the DUT 1008. The output impedance 3002 includes the output impedance 3006 of the buffer 8024, the series resistor 3004, the wire impedance 3008, and the capacitance of the cable 3010 between the DUT 1008 and the HC terminal 1004 and the HP terminal 1006 of the LCR meter.

[0100] One side of the DUT 1008 is connected to the HC terminal 1004 and the HP terminal 1006. The other side of the DUT 1008 is connected to the LP terminal 1010, the LC terminal 1016, and a first terminal of a range resistor 1018.

[0101] The first embodiment includes a TIA 3014, the inverting input of which is connected to the LP terminal 1010. The non-inverting input of the TIA is connected to ground or to the output of a second voltage source through a switch 3012. The first terminal of a range resistor 1018 is connected to the LC terminal 1016. The second terminal of the range resistor 1018 is connected to the output of the TIA or to the output of the second voltage source through a switch 3018. The switch 3018 is necessary for leakage impedance measurement. This measurement is accomplished by applying a voltage from a second voltage source to the second terminal of the range resistor and measuring the voltages at the LP terminal, the HP terminal, and the two terminals of the range resistor.

[0102] 8014. The HP terminal 1006 is connected to an input buffer 8010. The LP terminal 1010 is connected to an input buffer 8012. A first terminal of a range resistor 1018 is connected to an input buffer 8014. A second terminal of the range resistor 1018 is connected to an input buffer 8016. The output of a second voltage source 1022 is connected to an input buffer 8018. The outputs of input buffers 8010, 8012, 8014, 8016, and 8018 are connected to the input of a multiplexer 8030. The output of the multiplexer 8030 is connected to an ADC 8038 through a buffer 8032.

[0103] Operation of the First Embodiment

[0104] In the first embodiment (see FIG. 2, Figure 3 ,and Figure 8 ), the leakage impedance and series impedance are measured during the open / short calibration.

[0105] This first embodiment can also use a protector to reduce the voltage between the intermediate point and the shielding of the cable. In this case, all equations are the same; the only difference is that the leakage impedance is higher.

[0106] Leak Calibration and Compensation

[0107] FIG2 shows a method of measuring leakage impedance.

[0108] The method includes:

[0109] Set the fixture to an open circuit by removing the DUT.

[0110] applying a predetermined voltage across a predetermined impedance of a range resistor;

[0111] Measure the voltage across the open-circuit fixture;

[0112] Eliminating the effect of the open clamp by setting the same voltage at the HP terminal as at the LP terminal and adjusting it in a predetermined number of iterations to obtain the closest values ​​of these voltages to reduce the current through the open clamp;

[0113] Measure the voltage across the leakage impedance and the span resistor;

[0114] Calculate the leakage impedance.

[0115] To set the necessary voltage at the HP terminal, the method in Equations 22 and 23 is used to calculate the value of the input signal to the first voltage source.

[0116] For leakage impedance measurement, switch 3018 must connect the second terminal of the range resistor to the second voltage source 1022.

[0117] [Mathematical formula 5] Leakage impedance:

[0118] Zleak=Vlp*Zrange / (Vlc–Vrr)

[0119] All values ​​are plural.

[0120] When measuring the parameters of the DUT, the leakage impedance is used to calculate the leakage current and compensate for its effect by subtracting the current value through the leakage impedance from the current value through the range resistor (Equations 12 to 14).

[0121] Calibration of series impedance

[0122] Figure 3 A method of measuring the series impedance is shown, including the output impedance of the first voltage source 1002 and the impedance 3011 of the wire between the DUT and the low current terminal. These impedances are necessary to calculate the accurate sub-balance voltage. These impedances are measured for the fixture used. Measuring and calculating the series impedance requires measuring both the open circuit and short circuit states of the circuit. Both sets (open circuit and short circuit) of measured voltages will be saved and used to calculate the series impedance during the calibration process.

[0123] [Mathematical formula 6] The current change of the first voltage source is:

[0124] dI=(Vlc_short–Vrr_short) / Zrange+Vlp_short / Zleak

[0125] [Mathematical Formula 7] The output impedance of the first voltage source:

[0126] Zout1=(Vhp_open–Vhp_short) / dI

[0127] [Mathematical formula 8] The impedance of the wire between the DUT and the LP terminal:

[0128] Zwire2=(Vlp_short–Vlc_short) / dI

[0129] All values ​​are plural.

[0130] Sub-balanced method

[0131] The first embodiment includes a TIA 3014 that performs instantaneous analog auto-balancing, but the TIA has insufficient gain at high frequencies to obtain an auto-balancing voltage that is almost equal to zero.

[0132] [Mathematical Formula 9] The gain of the operational amplifier used as a TIA:

[0133] G_opamp=–Vrr / Vlp

[0134] [Mathematical formula 10] Input voltage

[0135] Vlp=–Vrr / G_opamp

[0136] It depends a lot on the gain G_opamp of the TIA. This voltage is the residual imbalance voltage. But if we apply a voltage equal to this residual imbalance voltage but opposite in polarity to the non-inverting input of the TIA instead of zero voltage, the voltage on the inverting input will become almost equal to zero. This is "simplified sub-balancing".

[0137] [Mathematical formula 11] More correct sub-balance voltage:

[0138] Vsb=(Vrr–Vlp)*(G_opamp+1) / (G_opamp)^2

[0139] This is the "moderate sub-balancing" method. This method takes into account the increase in current through the span resistor after the sub-balancing voltage is applied.

[0140] A more detailed description of "accurate sub-balancing" is provided below.

[0141] First embodiment (see Figure 8 )’s starting conditions are as follows:

[0142] The first voltage source 1002 provides an excitation voltage;

[0143] Switch 3012 connects the non-inverting input of TIA 3014 to ground;

[0144] Switch 3018 connects the second terminal of the range resistor 1018 to the output of the TIA;

[0145] The second voltage source 1022 provides a predetermined voltage Vsb 3016 .

[0146] If no load is present, the voltage of the second voltage source is equal to the electromotive force (EMF).

[0147] After all input voltages are measured, the required sub-balancing voltage is calculated and applied to the non-inverting input of the TIA to obtain a more accurate balance (Equations 12 to 23).

[0148] [Mathematical formula 12] The current passing through the range resistor is:

[0149] Irange=(Vlc–Vrr) / Zrange

[0150] [Mathematical formula 13] The current passing through the leakage impedance is:

[0151] Ileak=–Vlp / Zleak

[0152] [Mathematical formula 14] The current passing through the DUT is:

[0153] Idut=Irange–Ileak

[0154] [Mathematical formula 15] Rough impedance of DUT:

[0155] Zdut=(Vhp–Vlp) / Idut

[0156] [Mathematical formula 16] The gain of the operational amplifier used as TIA:

[0157] G_opamp=–Vrr / Vlp

[0158] [Mathematical formula 17] The electromotive force (EMF) of the first voltage source:

[0159] EMF1=Vhp+Idut*Zout1

[0160] [Mathematical Formula 18] After Vlp = 0, the new current through the DUT is:

[0161] Idut_New=EMF1 / (Zdut+Zout1)

[0162] [Math 19] The new current through the range resistor to achieve accurate balance:

[0163] Irange_New=Idut_New

[0164] [Math 20] The new voltage across the range resistor is:

[0165] Vrr_New=–Irange_New*(Zwire2+Zrange)

[0166] [Mathematical formula 21] The electromotive force (EMF) of the second voltage source when there is no load:

[0167] Vsb_New=Vrr_New / G_opamp

[0168] [Mathematical Formula 22] Correction coefficient for the EMF of the second voltage source:

[0169] CorrCoeff=Vsb_New / Vsb

[0170] [Mathematical Formula 23] New value of digital signal 8046 for the second voltage source:

[0171] S2_New=CorrCoeff*S2

[0172] All values ​​are plural.

[0173] The calculation of the correction coefficient (CorrCoeff) as the relationship between the old and new electromotive forces is an implicit replacement for the explicit calculation of the low pass filter (LPF) frequency response. Figure 7 Examples of high order LPF amplitude and phase frequency responses are shown for an LCR meter with 1 MHz maximum signal frequency and 3 Msps sampling frequency. The calculation of CorrCoeff allows to eliminate the necessity of calibration of LPFs with very steep slopes at high frequencies.

[0174] After applying the new digital signal S2_New 8046 and connecting the non-inverting input of the TIA to the second voltage source, the accurate DUT impedance can be measured. After measuring the voltage under balanced conditions, the calculation of the parameters of the DUT is repeated by using equations 12 to 15.

[0175] Low-level processing

[0176] The first embodiment adopts a structure having one ADC and a five-channel multiplexer to switch voltage channels to achieve lower cost. Figure 4 shows the input voltage, Figure 5 shows the voltage at the ADC input.

[0177] The channels of the multiplexer generate commutation noise, so the noisy time intervals after the switching of the multiplexer need to be excluded in the ADC signal processing. Figure 6 Noisy time intervals and normal time intervals are shown.

[0178] According to the Nyquist theorem, the sampling frequency must be more than twice the signal bandwidth. To measure the vector voltage by direct Fourier transform (DFT), at least one full cycle of the signal frequency is required. Therefore, the minimum vector voltage measurement time is limited to one cycle of the signal frequency and at least three ADC samples for each measured voltage. Therefore, all voltages must be measured simultaneously (see Figure 5 ), and at least three sampling groups must be used. Equations 24 to 28 describe the conditions for averaging low frequencies if the shortest measurement time is required.

[0179] [Mathematical formula 24] Sampling period:

[0180] Tsample=1 / Fsample

[0181] [Mathematical formula 25]Signal period:

[0182] Tsignal=1 / Fsignal

[0183] 0001[Mathematical formula 26] Buffer time interval:

[0184] Tbuffer=Tsample*BufferSize

[0185] [Mathematical formula 27] Sampling group interval:

[0186] Tsmpl_gr=Tbuffer*Nchannels

[0187] [Mathematical formula 28] Shortest measurement time:

[0188] Tmeas_Minimum=Tsignal=M*Tsmpl_gr

[0189] (M≥3)

[0190] All values ​​are plural.

[0191] BufferSize, number of channels (Nchannels), and M are all integers. BufferSize is the size of the direct memory access (DMA) buffer, Nchannels is the number of voltage channels, and M is the number of sampling groups.

[0192] Fig. 9 The signal processing of the first embodiment is shown in more detail. The processor 8048 performs low level processing of the instantaneous digital values ​​of the input and output voltages and high level processing of the digital representations of these voltages to calculate results in the control and processing core 9016.

[0193] Low-level processing includes:

[0194] Direct Digital Synthesizer 9014;

[0195] A first group 9002 and a second group 9004 of memory buffers for storing samples of input and output voltages, and reference values;

[0196] Multipliers 9008 and 9010 for direct Fourier transform (DFT);

[0197] A demultiplexer and accumulator 9012 for separating input voltage samples from different voltage channels and accumulating them in a DFT process;

[0198] An interface for transmitting the digital signals S1 and S2 to the DACs 8042 and 8046;

[0199] Interface for transferring digital signals from ADC 8038 to memories 9002 and 9004.

[0200] To speed up the processing, direct memory access (DMA) is used to transfer data from memory to DAC 8036 and 8040 and ADC 8038 to memory buffers 9002 and 9004.

[0201] Fig.10 The flowchart in FIG. 1 shows the data processing flow. First, the data from the ADC and the reference data filled in the previous DMA cycle are processed. These data are used for DFT. Secondly, the data for the next DMA cycle is prepared. These data will be used for DAC and DFT. The reference data is filled with DAC data to save time during DFT processing.

[0202] This processing is described as being implemented in a processor, but can also be implemented in microcontrollers, DSPs, FPGAs, ASICs, and other hardware.

[0203] Practicality

[0204] The present invention can be used in any industry that requires impedance measurement. The present invention either reduces the production cost of an impedance measuring instrument with the same accuracy and frequency range, or improves the accuracy of the impedance measuring instrument and expands the frequency range.

[0205] List of cited documents

[0206] The list of cited documents is as follows:

[0207] Patent Literature

[0208] US Patents

[0209] Patent No. Type Code Grant Date Patentee

[0210] 10,013,015 B2 2018-07-03 Ida et al.

[0211] 9,910,074 B2 2018-03-06 Lindell et al.

[0212] 7,616,008 B1 2009-11-10 Rayman et al.

[0213] US patent document added by examiner Robert P Olejnikov

[0214] 20210333348 A1 2021-10 Fortney; Houston

[0215] 20200135441 A1 2020-04 Jones; Anthony

[0216] Michael

[0217] 20140348502 A1 2014-11 Miura; Tomoko

[0218] 8547135 B1 2013-10 Yarlagadda; Archana

[0219] 6028309 A 2000-02 Parrish; William J.

[0220] Foreign patent documents

[0221] Foreign Document Country Code Publication Date Patent Owner

[0222] 110320410A CN 2019-10-11 Fajie et al.

[0223] Non-patent literature

[0224] Zhang et al. (A Novel Fast Balance Technique for the Digital ACBridge) (April 1998)

[0225] Henry P. Hall (A History of Impedance Measurements)

[0226] Keysight's E4980A Precision LCR Meter Data Sheet (2021)

[0227] Keysight’s (Impedance Measurement Handbook 6th Ed) (2021).

Claims

1. A sub-balancing method, comprising: An LCR meter is provided, the LCR meter comprising: High Current (HC) Terminals, High Potential (HP) Terminal, Low Potential (LP) terminal, Low Current (LC) Terminals, Fixtures, which are used to connect to the device under test (DUT), a set of reference resistors having first and second terminals, wherein the first terminal is connected to the LC terminal, a first voltage source, an output of which is connected to the HC terminal, A second voltage source having an output, a means for measuring a processor capable of measuring the voltages at the HP terminal, the LP terminal, the LC terminal, the second terminal of the set of reference resistors, and the output of the second voltage source, A transimpedance amplifier (TIA) having an inverting input, a non-inverting input, and an output, wherein The inverting input is connected to the LP terminal, the output of the TIA is connected to the second terminal of the set of reference resistors, a switch connecting the non-inverting input of the TIA to ground or the output of the second voltage source, and processor; attaching the fixture to the DUT; connecting the clamp to the HC terminal, the HP terminal, the LP terminal, and the LC terminal; connecting the non-inverting input of the TIA to the ground via the switch; setting the set of reference resistors to a predetermined impedance; setting the output of the first voltage source to a predetermined voltage at the output of the first voltage source; setting the output of the second voltage source to a predetermined voltage at the output of the second voltage source; measuring voltages at the HP terminal, the LP terminal, the LC terminal, the second terminal of the set of reference resistors, and the output of the second voltage source; calculating a sub-balanced voltage that, when applied to the non-inverting input of the TIA, would produce a zero voltage at the LP terminal; setting the output of the second voltage source to the sub-balanced voltage at the output of the second voltage source; connecting the non-inverting input of the TIA to the output of the second voltage source via the switch; measuring voltages at the HP terminal, the LP terminal, the LC terminal, and the second terminal of the set of reference resistors with the sub-balanced voltage applied to the non-inverting input of the TIA; as well as Calculate the value of the DUT impedance.

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