Silicon wafer measurement analysis method and system and electronic equipment
By automatically combining the alignment and leveling rules and test parameters, multiple sets of measurement data are generated and analyzed, the problem of low manual screening efficiency in silicon wafer indentation measurement is solved, and the optimal measurement data is automatically screened, which improves analysis efficiency and accuracy.
Patent Information
- Application Number
- CN202411943325.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-26
- Publication Date
- 2025-02-28
AI Technical Summary
During the silicon wafer incision measurement process, the data selected at different stages are different, resulting in a variety of test combinations, which require manual screening and low efficiency.
By automatically combining multiple alignment rules with multiple sets of test parameters, multiple sets of measurement data are generated, and the silicon wafer to be measured is used to measure, multiple sets of measurement results are obtained, and these results are then analyzed to automatically screen out the optimal measurement data.
It realizes automatic completion of multiple sets of tests and automatically filters out the optimal measurement data without manual screening, which improves the efficiency and accuracy of measurement data analysis.
Smart Images
Figure CN119535912A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of semiconductor technology, and in particular to a silicon wafer measurement and analysis method, system and electronic equipment. Background Art
[0002] Due to the differences in the photolithography patterns and processes of the silicon wafer itself, different configurations are required for different stages of overlay measurement.
[0003] Among them, the overlay measurement of silicon wafers usually includes: WaferMap stage, Alignment stage, RunParameters stage and Test stage. The WaferMap stage is used to record the status of each chip on the silicon wafer, the Alignment stage is the process of ensuring that the chips or features on the silicon wafer are accurately aligned with the measuring equipment, the RunParameters stage is used to set various parameters to control the measurement process when measuring the silicon wafer, and the Test stage is used to detect or evaluate the chips or specific areas on the silicon wafer based on the data of the above stages.
[0004] During the overlay measurement process, if the data selected at different stages are different, multiple test combinations will appear, and the final screening of the test combination needs to be performed manually, which is inefficient. Summary of the invention
[0005] In view of this, the present application provides a silicon wafer measurement and analysis method, system and electronic equipment, and its specific solutions are as follows:
[0006] A silicon wafer measurement and analysis method, comprising:
[0007] Obtaining a measurement request for the silicon wafer to be measured;
[0008] In response to the measurement request, obtaining a plurality of alignment and leveling rules and a plurality of groups of test parameters for the silicon wafer to be measured;
[0009] Combining each of the plurality of alignment and leveling rules with each of the plurality of test parameter groups to obtain a plurality of measurement data groups;
[0010] Using the multiple sets of measurement data, respectively measure the silicon wafers to be measured to obtain multiple sets of measurement results;
[0011] The multiple groups of measurement results are analyzed to determine the target measurement results.
[0012] Furthermore, the using the multiple groups of measurement data to measure the silicon wafer to be measured respectively to obtain multiple groups of measurement results includes:
[0013] Performing alignment and leveling processing on the silicon wafer to be measured using the alignment and leveling rules in each set of measurement data;
[0014] Each group of the aligned and leveled silicon wafers to be measured is tested according to the test parameters in each group of the measurement data to obtain multiple groups of measurement results.
[0015] Furthermore, the obtaining of a plurality of alignment and leveling rules for the silicon wafer to be measured includes:
[0016] Obtaining silicon wafer parameters and measurement field parameters of the silicon wafer to be measured by a wafer map tool;
[0017] A plurality of alignment and leveling rules are determined based on the silicon wafer parameters and the measurement field parameters of the silicon wafer to be measured.
[0018] Furthermore, the obtaining of multiple test parameters for the silicon wafer to be measured includes:
[0019] A plurality of groups of test parameters corresponding to the silicon wafer to be measured corresponding to each alignment and leveling rule are obtained.
[0020] Furthermore, each set of test parameters includes at least:
[0021] Position information of the area to be measured on the silicon wafer to be measured, the position information being determined based on a wafer map tool and adjusted by an alignment and leveling rule;
[0022] Imaging parameters, imaging parameters were different in different groups of tests;
[0023] Measurement template information, where the measurement template information is determined based at least on the area to be measured on the silicon wafer to be measured.
[0024] Furthermore, analyzing the multiple groups of measurement results to determine the target measurement results includes:
[0025] Analyze the multiple groups of measurement results to determine the operating result indicators of each group of measurement results;
[0026] The operation result indicators of each group of operation results are sorted, and the target measurement results in the multiple groups of measurement results are determined based on the sorting of the operation result indicators.
[0027] Furthermore, analyzing the multiple groups of measurement results includes:
[0028] Visual correlation analysis is performed on the multiple groups of measurement results and the alignment and leveling rules and test parameters corresponding to each group of measurement results.
[0029] A silicon wafer measurement and analysis system, comprising:
[0030] A first obtaining unit, used for obtaining a measurement request for a silicon wafer to be measured;
[0031] A second obtaining unit, configured to obtain, in response to the measurement request, a plurality of alignment and leveling rules and a plurality of groups of test parameters for the silicon wafer to be measured;
[0032] A combining unit, configured to combine each of the plurality of alignment and leveling rules with each of the plurality of test parameter groups to obtain a plurality of measurement data groups;
[0033] A measuring unit, used to measure the silicon wafer to be measured respectively using the multiple sets of measurement data to obtain multiple sets of measurement results;
[0034] The analysis unit is used to analyze the multiple groups of measurement results to determine the target measurement results.
[0035] An electronic device, comprising:
[0036] A processor is used to obtain a measurement request for a silicon wafer to be measured; in response to the measurement request, obtain a plurality of alignment and leveling rules and a plurality of test parameters for the silicon wafer to be measured; combine each of the plurality of alignment and leveling rules with each of the plurality of test parameters to obtain a plurality of measurement data; measure the silicon wafer to be measured respectively using the plurality of measurement data to obtain a plurality of measurement results; analyze the plurality of measurement results to determine a target measurement result;
[0037] The memory is used to store the program required by the processor to execute the above processing process.
[0038] Furthermore, it also includes:
[0039] The display is used to display the analysis process and analysis results of the visual correlation analysis performed by the processor on the multiple groups of measurement results and the alignment and leveling rules and test parameters corresponding to each group of measurement results when the processor analyzes the multiple groups of measurement results.
[0040] It can be seen from the above technical scheme that the silicon wafer measurement and analysis method, system and electronic device disclosed in the present application obtain a measurement request for the silicon wafer to be measured; in response to the measurement request, obtain multiple alignment and leveling rules and multiple groups of test parameters for the silicon wafer to be measured; combine each of the multiple alignment and leveling rules with each of the multiple test parameters to obtain multiple groups of measurement data; use the multiple groups of measurement data to measure the silicon wafer to be measured respectively to obtain multiple groups of measurement results; analyze the multiple groups of measurement results to determine the target measurement results. This scheme combines multiple groups of alignment and leveling rules and multiple groups of test parameters in pairs to obtain multiple groups of measurement data, and uses the multiple groups of measurement data to measure the silicon wafer to be measured respectively to obtain multiple groups of measurement results, and analyzes the multiple groups of measurement results to realize automatic combination and measurement of the measurement data of the silicon wafer to be measured, and automatically selects the optimal measurement data through analysis of the multiple groups of measurement results, without manual screening, thereby improving the efficiency and accuracy of measurement data analysis. BRIEF DESCRIPTION OF THE DRAWINGS
[0041] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the related technologies, the drawings required for use in the embodiments or the related technical descriptions are briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.
[0042] Figure 1 A flow chart of a silicon wafer measurement and analysis method disclosed in an embodiment of the present application;
[0043] Figure 2 A flow chart of a silicon wafer measurement and analysis method disclosed in an embodiment of the present application;
[0044] Figure 3 A schematic diagram of a wafer map WaferMap constructed according to an embodiment of the present application;
[0045] Figure 4 A schematic diagram of a wafer image when an alignment and leveling process is performed according to the alignment and leveling rule with 4 leveling points disclosed in an embodiment of the present application;
[0046] Figure 5 A flow chart of a silicon wafer measurement and analysis method disclosed in an embodiment of the present application;
[0047] Figure 6 A schematic diagram of the structure of a silicon wafer measurement and analysis system disclosed in an embodiment of the present application;
[0048] Figure 7 A schematic diagram of the structure of an electronic device disclosed in an embodiment of the present application. DETAILED DESCRIPTION
[0049] The following describes the embodiments of the present application in conjunction with the drawings in the embodiments of the present application. The terms used in the implementation method section of the present application are only used to explain the specific embodiments of the present application, and are not intended to limit the present application.
[0050] The embodiments of the present application are described below in conjunction with the accompanying drawings. Those skilled in the art will appreciate that, with the development of technology and the emergence of new scenarios, the technical solutions provided in the embodiments of the present application are also applicable to similar technical problems.
[0051] The terms "first", "second", etc. in the specification and claims of the present application and the above-mentioned drawings are used to distinguish similar objects, and need not be used to describe a specific order or sequential order. It should be understood that the terms used in this way can be interchangeable under appropriate circumstances, which is only to describe the distinction mode adopted by the objects of the same attributes when describing in the embodiments of the present application. In addition, the terms "including" and "having" and any of their variations are intended to cover non-exclusive inclusions, so that the process, method, system, product or equipment comprising a series of units need not be limited to those units, but may include other units that are not clearly listed or inherent to these processes, methods, products or equipment.
[0052] This application discloses a silicon wafer measurement determination method, and its flow chart is as follows: Figure 1 As shown, including:
[0053] Step S11, obtaining a measurement request for a silicon wafer to be measured;
[0054] Step S12, in response to the measurement request, obtaining a plurality of alignment and leveling rules and a plurality of test parameter groups for the silicon wafer to be measured;
[0055] Step S13, combining each of the plurality of alignment and leveling rules with each of the plurality of test parameter groups to obtain a plurality of measurement data groups;
[0056] Step S14, using the multiple sets of measurement data to measure the silicon wafers to be measured respectively, to obtain multiple sets of measurement results;
[0057] Step S15: Analyze multiple groups of measurement results to determine target measurement results.
[0058] Due to the differences in the lithography patterns and processes of the silicon wafer itself, different configurations are required for different stages in overlay measurement. Among them, overlay measurement for silicon wafers usually includes: WaferMap stage, Alignment stage, RunParameters stage and Test stage. The WaferMap stage is used to record the status of each chip on the silicon wafer. The Alignment stage is the process of ensuring that the chip or feature on the silicon wafer is accurately aligned with the measuring equipment. The RunParameters stage is used to set various parameters to control the measurement process when measuring the silicon wafer. The Test stage is used to detect or evaluate the chips or specific areas on the silicon wafer based on the data from the above stages.
[0059] Overlay measurement is a key step in the semiconductor manufacturing process. It is a technology used to evaluate and control the alignment accuracy between patterns in each layer of semiconductor equipment manufacturing. In the production of multi-layer integrated circuits, each layer needs to be accurately aligned with other layers to ensure the correct function of the circuit. The purpose of Overlay measurement is to detect and quantify the alignment errors between these layers in order to make necessary adjustments and optimizations. In the Overlay measurement process, under a high-precision microscope, due to different silicon wafer materials, the surface undulations of the wafer, and the small depth of field of the high-power microscope camera, it is necessary to repeatedly debug and verify the imaging of the measurement target in order to measure a relatively ideal measurement result.
[0060] That is, during the overlay measurement process, if the data selected at different stages are different, multiple test combinations will appear, and the final screening of the test combination needs to be performed manually, which is inefficient.
[0061] Based on this, in this solution, multiple alignment and leveling rules and multiple groups of test parameters are automatically combined to determine multiple groups of measurement data, so as to use the multiple groups of measurement data to test the silicon wafers to be measured respectively, so as to determine the target test results based on the test results. The target test parameters and target alignment and leveling rules corresponding to the target test results are the parameters required for measuring the silicon wafers, so as to automatically complete multiple groups of tests and automatically screen out the optimal measurement data, that is, determine the optimal target test parameters and target alignment and leveling rules required for measurement, without the need for manual screening, thereby improving the efficiency and accuracy of determining the measurement method and improving the efficiency of measurement analysis.
[0062] After obtaining the measurement request, the measurement request is analyzed to determine that the measurement request is to measure the silicon wafer to be measured, that is, the silicon wafer to be measured is first determined.
[0063] After determining the silicon wafer to be measured, in response to the measurement request, multiple alignment and leveling rules and multiple groups of test parameters for the silicon wafer to be measured are obtained, and the multiple alignment and leveling rules and multiple groups of test parameters are combined in pairs to obtain all the combinations, each of which includes an alignment and leveling rule and a group of test parameters. After that, the system (i.e., the silicon wafer measurement and analysis system on which the silicon wafer measurement and analysis method disclosed in this embodiment is based) automatically runs all the combinations to obtain the measurement results corresponding to each combination, so as to analyze the multiple groups of measurement results.
[0064] The process of measuring silicon wafers involves the wafer map WaferMap stage, the alignment stage, the run parameter setting RunParameters stage and the test Test stage. In this embodiment, the stages are decoupled from each other to achieve mutual independence, and are rearranged and combined to obtain all combinations.
[0065] For example, one WaferMap can correspond to 2-3 Alignments, and each Alignment can correspond to multiple Tests. After the decoupling of each stage, rearrangement and combination can be performed to obtain a variety of combinations, that is, at least multiple groups of measurement data obtained by the combination of alignment and leveling rules and test parameters. Each group of measurement data is then used to automatically measure the silicon wafer to be measured to obtain multiple groups of measurement results, so as to analyze the multiple groups of measurement results and obtain the optimal measurement result, that is, the target measurement result.
[0066] The silicon wafer measurement and analysis method disclosed in this embodiment obtains a measurement request for a silicon wafer to be measured; in response to the measurement request, obtains a plurality of alignment and leveling rules and a plurality of test parameters for the silicon wafer to be measured; combines each of the plurality of alignment and leveling rules with each of the plurality of test parameters to obtain a plurality of measurement data; uses the plurality of measurement data to measure the silicon wafer to be measured to obtain a plurality of measurement results; and analyzes the plurality of measurement results to determine the target measurement results. This scheme combines a plurality of alignment and leveling rules and a plurality of test parameters in pairs to obtain a plurality of measurement data, and uses the plurality of measurement data to measure the silicon wafer to be measured to obtain a plurality of measurement results, and analyzes the plurality of measurement results to automatically combine and measure the measurement data of the silicon wafer to be measured, and automatically selects the optimal measurement data through the analysis of the plurality of measurement results, without manual selection, thereby improving the efficiency and accuracy of the measurement data analysis.
[0067] This embodiment discloses a silicon wafer measurement and analysis method, and its flow chart is as follows: Figure 2 As shown, including:
[0068] Step S21, obtaining a measurement request for a silicon wafer to be measured;
[0069] Step S22, in response to the measurement request, obtaining a plurality of alignment and leveling rules and a plurality of test parameter groups for the silicon wafer to be measured;
[0070] Step S23, combining each of the plurality of alignment and leveling rules with each of the plurality of test parameter groups to obtain a plurality of measurement data groups;
[0071] Step S24, performing alignment and leveling processing on the silicon wafer to be measured using the alignment and leveling rules in each set of measurement data;
[0072] Step S25, testing each group of aligned and leveled silicon wafers according to the test parameters in each group of measurement data to obtain multiple groups of measurement results;
[0073] Step S26: Analyze multiple groups of measurement results to determine target measurement results.
[0074] After obtaining a measurement request for a silicon wafer to be measured, a plurality of alignment and leveling rules and a plurality of groups of test parameters for the silicon wafer to be measured are obtained, and each of the plurality of alignment and leveling rules is combined with each of the plurality of groups of test parameters to obtain a plurality of groups of measurement data, each group of measurement data including one of the plurality of alignment and leveling rules and a group of test parameters from the plurality of groups of test parameters.
[0075] After obtaining multiple sets of measurement data, each set of measurement data needs to be executed separately, that is, each set of measurement data is used to automatically measure the silicon wafer to be measured to obtain the measurement results.
[0076] Among them, each set of measurement data is used to automatically measure the silicon wafer to be measured, which can be specifically as follows: first, a wafer map WaferMap is constructed for the physical information of the silicon wafer. The wafer map WaferMap defines information such as the size, thickness, measurement field size and distribution of the silicon wafer, that is, the silicon wafer parameters and measurement field parameters of the silicon wafer to be measured are determined through the wafer map WaferMap. The silicon wafer parameters may at least include the size and thickness of the silicon wafer, and the measurement field parameters may at least include the measurement field size and distribution.
[0077] Since the above silicon wafer parameters and measurement field parameters are objective data and do not need to be debugged, the wafer map WaferMap can be used as the basis for this type of silicon wafer. Figure 3 As shown, it is a schematic diagram of the constructed wafer map WaferMap.
[0078] After the wafer map WaferMap is constructed, an alignment and leveling process is performed on the constructed wafer map WaferMap according to an alignment and leveling rule on the silicon wafer to be measured.
[0079] Alignment is an important step in the semiconductor manufacturing process, which involves accurately aligning different pattern layers on the silicon wafer to ensure that each layer of pattern can be accurately stacked together. The existence of leveling points may affect the overall flatness of the wafer and the alignment accuracy of the pattern layer. Therefore, alignment and leveling are required.
[0080] Among them, the alignment and leveling rules are at least related to the number of leveling points. For example, the leveling effect of leveling through 2 leveling points is different from that of leveling through 4 leveling points. Figure 4 As shown, it is a schematic diagram of a wafer image when the alignment and leveling process is performed according to the alignment and leveling rule with the number of leveling points being 4; in addition, the alignment and leveling rule may also be related to the distribution of the leveling points, such as: the wider the distribution range of the leveling points on the silicon wafer, the better the leveling effect.
[0081] Theoretically, the more leveling points there are, the wider their distribution range on the silicon wafer is, and the better the leveling effect is. However, when selecting leveling points, the control axis needs to be moved and collected on the entire silicon wafer, which will affect the yield. Therefore, it is necessary to create multiple alignment and leveling rules and test them separately to select an alignment and leveling solution that takes into account both yield and accuracy.
[0082] Among them, obtaining multiple alignment and leveling rules for the silicon wafer to be measured can be: obtaining silicon wafer parameters and measurement field parameters of the silicon wafer to be measured through a wafer map tool, and determining multiple alignment and leveling rules based on the silicon wafer parameters and measurement field parameters of the silicon wafer to be measured.
[0083] Different wafer parameters and measurement field parameters of silicon wafers to be measured correspond to different alignment and leveling rules. The same wafer parameters and measurement field parameters of silicon wafers to be measured may correspond to multiple alignment and leveling rules, that is, the alignment and leveling rules are determined using data on the wafer map WaferMap. For example, the wafer map WaferMap can provide information about specific chips or areas on the wafer to help the system determine the alignment and leveling rules.
[0084] On the constructed wafer map WaferMap, alignment and leveling processing is performed according to the alignment and leveling rules in the first measurement data to obtain the silicon wafer to be measured after the alignment and leveling processing, and then the silicon wafer to be measured after the alignment and leveling processing is used to perform testing according to the test parameters in the first measurement data to obtain the measurement result for the first measurement data.
[0085] Each set of test parameters at least includes: position information of a region to be measured on the silicon wafer to be measured, imaging parameters and measurement template information.
[0086] The position information of the area to be measured on the silicon wafer to be measured is determined based on the wafer map tool and adjusted by the alignment and leveling rules; the imaging parameters in different groups of test parameters are different; and the measurement template information is determined based on at least the area to be measured on the silicon wafer to be measured.
[0087] After the wafer map WaferMap of the silicon wafer to be measured is constructed, the area to be measured on the WaferMap is determined. At this time, the position information can be directly determined by the wafer map tool. With different alignment and leveling rules, the specific coordinate information of the area to be measured may be different. Therefore, the position information may change with the alignment and leveling rules;
[0088] The imaging is affected by factors such as exposure time, attenuation plate, filter, Na aperture position, focusing height, etc. Therefore, the imaging parameters cannot be determined directly. The imaging parameters are different in different groups of test parameters so that the best imaging parameters can be determined through testing;
[0089] The measurement templates are different according to the shapes of the areas to be measured on different wafers. Therefore, the measurement templates for the areas to be measured can be determined by drawing different regions of interest to determine the measurement template information.
[0090] Multiple variables in a set of measurement data can be encapsulated in a test Test. Since there are multiple sets of measurement data, a test list Test List including multiple Tests can be obtained. Each Test in the test list Test List can be tested in turn to obtain measurement results respectively, or multiple Tests in the test list Test List can be tested at the same time.
[0091] The test parameters may be determined based on the alignment and leveling rules, that is, a plurality of groups of test parameters corresponding to the silicon wafer to be measured corresponding to each alignment and leveling rule are obtained.
[0092] Since the measurement template information can be determined based on the shape of the area to be measured on the wafer image, and the data of the area to be measured on the wafer image may change due to different alignment and leveling rules, different test parameters may correspond to different alignment and leveling rules.
[0093] The silicon wafer measurement and analysis method disclosed in the present embodiment obtains a measurement request for a silicon wafer to be measured; in response to the measurement request, obtains a plurality of alignment and leveling rules and a plurality of test parameters for the silicon wafer to be measured; combines each of the plurality of alignment and leveling rules with each of the plurality of test parameters to obtain a plurality of measurement data; performs alignment and leveling processing on the silicon wafer to be measured using the alignment and leveling rule in each set of measurement data; tests each set of aligned and leveled silicon wafers to be measured according to the test parameters in each set of measurement data to obtain a plurality of measurement results; and analyzes the plurality of measurement results to determine a target measurement result. This solution combines multiple groups of alignment and leveling rules and multiple groups of test parameters in pairs to obtain multiple groups of measurement data, and uses the multiple groups of measurement data to measure the silicon wafers to be measured respectively to obtain multiple groups of measurement results, and analyzes the multiple groups of measurement results to automatically combine and measure the measurement data of the silicon wafers to be measured, and automatically screens out the optimal measurement data through the analysis of the multiple groups of measurement results, without the need for manual screening, thereby improving the efficiency and accuracy of measurement data analysis.
[0094] This embodiment discloses a silicon wafer measurement and analysis method, and its flow chart is as follows: Figure 5 As shown, including:
[0095] Step S51, obtaining a measurement request for a silicon wafer to be measured;
[0096] Step S52, in response to the measurement request, obtaining a plurality of alignment and leveling rules and a plurality of test parameter groups for the silicon wafer to be measured;
[0097] Step S53, combining each of the plurality of alignment and leveling rules with each of the plurality of test parameter groups to obtain a plurality of measurement data groups;
[0098] Step S54, using the multiple sets of measurement data to measure the silicon wafers to be measured respectively, to obtain multiple sets of measurement results;
[0099] Step S55, analyzing the multiple groups of measurement results to determine the operating result index of each group of measurement results;
[0100] Step S56: sort the operation result indicators of each group of operation results, and determine the target measurement results in the multiple groups of measurement results based on the sorting of the operation result indicators.
[0101] After obtaining a measurement request for a silicon wafer to be measured, a plurality of alignment and leveling rules and a plurality of test parameters for the silicon wafer to be measured are obtained, and each of the plurality of alignment and leveling rules is combined with each of the plurality of test parameters to obtain a plurality of measurement data. Afterwards, the silicon wafers to be measured are measured respectively using the plurality of measurement data to obtain a plurality of measurement results.
[0102] After obtaining multiple groups of measurement results, the multiple groups of measurement results need to be analyzed. The analysis of the measurement results can be: determining the operating result index of each group of measurement results, and using the operating result index to select the best measurement result from the multiple groups of measurement results, so as to determine that the measurement data corresponding to the best measurement result is the best measurement data.
[0103] The operation result indicator can be an indicator item directly selected from the measurement results, and only the selected indicator item is used as the basis for judgment to determine the optimal measurement result, that is, to determine the value corresponding to the indicator item from each measurement result, compare the values determined from each measurement result, and select the optimal measurement result based on the comparison result, that is, the target measurement result. The optimal measurement result can be selected based on the comparison result, which can be: determining the minimum value among the values determined from multiple measurement results, and determining the measurement result corresponding to the minimum value as the target measurement result, or, based on the different selections of the indicator item, it can also be: determining the maximum value among the values determined from multiple measurement results, and determining the measurement result corresponding to the maximum value as the target measurement result.
[0104] Alternatively, it may also be: the operation result indicator is an indicator obtained by comprehensively analyzing at least part of the indicators in each measurement result, comprehensively analyzing at least part of the indicators in each measurement result of multiple measurement results, respectively obtaining the operation result indicator corresponding to each measurement result, comparing the operation result indicators corresponding to the measurement results, and determining the target measurement result from the multiple measurement results based on the comparison result.
[0105] Furthermore, when analyzing multiple groups of measurement results, it can be specifically as follows: visual correlation analysis is performed on the multiple groups of measurement results and the alignment and leveling rules and test parameters corresponding to each group of measurement results.
[0106] That is, after obtaining multiple groups of measurement results, the multiple groups of measurement results are displayed, and then visual analysis is performed. During visual analysis, each group of measurement results and the alignment and leveling rules and test parameters corresponding to each group of measurement results are used as analysis parameters, that is, visual correlation analysis is performed between different variables to determine the impact of the alignment and leveling rules and test parameters on the measurement results.
[0107] After the visual correlation analysis, a complete data report can be output, and the data report can be output so that the staff can perform validity analysis on the measurement of the silicon wafer based on the data report.
[0108] The silicon wafer measurement and analysis method disclosed in this embodiment obtains a measurement request for the silicon wafer to be measured; in response to the measurement request, obtains a plurality of alignment and leveling rules and a plurality of test parameters for the silicon wafer to be measured; combines each of the plurality of alignment and leveling rules with each of the plurality of test parameters to obtain a plurality of measurement data; uses the plurality of measurement data to measure the silicon wafer to be measured respectively to obtain a plurality of measurement results; analyzes the plurality of measurement results to determine the operating result index of each measurement result; sorts the operating result index of each operating result, and determines the target measurement result in the plurality of measurement results based on the sorting of the operating result index. After automatically combining and measuring the measurement data of the silicon wafer to be measured, this scheme analyzes the plurality of measurement results, selects the target measurement result from the plurality of measurement results as the optimal measurement result through the operating result index of the measurement results, and does not require manual screening, thereby improving the efficiency and accuracy of the measurement data analysis.
[0109] This embodiment discloses a silicon wafer measurement and analysis system, and its structural schematic diagram is shown in FIG. Figure 6 As shown, including:
[0110] A first obtaining unit 61 , a second obtaining unit 62 , a combining unit 63 , a measuring unit 64 and an analyzing unit 65 .
[0111] The first obtaining unit 61 is used to obtain a measurement request for a silicon wafer to be measured;
[0112] The second obtaining unit 62 is used for obtaining a plurality of alignment and leveling rules and a plurality of test parameters for the silicon wafer to be measured in response to the measurement request;
[0113] The combining unit 63 is used to combine each of the plurality of alignment and leveling rules with each of the plurality of test parameter groups to obtain a plurality of measurement data groups;
[0114] The measuring unit 64 is used to measure the silicon wafers to be measured respectively using the multiple sets of measuring data to obtain multiple sets of measuring results;
[0115] The analysis unit 65 is used to analyze multiple groups of measurement results to determine target measurement results.
[0116] Furthermore, the measuring unit is used to:
[0117] The silicon wafers to be measured are aligned and leveled using the alignment and leveling rules in each set of measurement data; each set of silicon wafers to be measured after the alignment and leveling is tested according to the test parameters in each set of measurement data to obtain multiple sets of measurement results.
[0118] Furthermore, the second obtaining unit is used for:
[0119] The wafer parameters and the measurement field parameters of the silicon wafer to be measured are obtained through the wafer map tool; and a plurality of alignment and leveling rules are determined based on the wafer parameters and the measurement field parameters of the silicon wafer to be measured.
[0120] Furthermore, the second obtaining unit is used for:
[0121] A plurality of groups of test parameters corresponding to the silicon wafer to be measured corresponding to each alignment and leveling rule are obtained.
[0122] Furthermore, each set of test parameters includes at least:
[0123] Position information of the area to be measured on the silicon wafer to be measured, the position information is determined based on the wafer map tool and adjusted by the alignment and leveling rules; imaging parameters, the imaging parameters in different groups of test parameters are different; measurement template information, the measurement template information is determined based on at least the area to be measured on the silicon wafer to be measured.
[0124] Furthermore, the analysis unit is used to:
[0125] Analyze multiple groups of measurement results to determine the operating result indicators of each group of measurement results; sort the operating result indicators of each group of operating results, and determine the target measurement results in the multiple groups of measurement results based on the sorting of the operating result indicators.
[0126] Furthermore, the analysis unit is used to:
[0127] Visual correlation analysis is performed on the multiple groups of measurement results and the alignment and leveling rules and test parameters corresponding to each group of measurement results.
[0128] The silicon wafer measurement and analysis system disclosed in this embodiment is implemented based on the silicon wafer measurement and analysis method disclosed in the above embodiments, which will not be described in detail here.
[0129] The silicon wafer measurement and analysis system disclosed in this embodiment obtains a measurement request for a silicon wafer to be measured; in response to the measurement request, obtains a plurality of alignment and leveling rules and a plurality of test parameters for the silicon wafer to be measured; combines each of the plurality of alignment and leveling rules with each of the plurality of test parameters to obtain a plurality of measurement data; uses the plurality of measurement data to measure the silicon wafer to be measured to obtain a plurality of measurement results; and analyzes the plurality of measurement results to determine the target measurement results. This scheme combines a plurality of alignment and leveling rules and a plurality of test parameters in pairs to obtain a plurality of measurement data, and uses the plurality of measurement data to measure the silicon wafer to be measured to obtain a plurality of measurement results, and analyzes the plurality of measurement results to automatically combine and measure the measurement data of the silicon wafer to be measured, and automatically selects the optimal measurement data through the analysis of the plurality of measurement results, without manual selection, thereby improving the efficiency and accuracy of the measurement data analysis.
[0130] This embodiment discloses an electronic device, and its structural diagram is as follows: Figure 7 As shown, including:
[0131] Processor 71 and memory 72.
[0132] The processor 71 is used to obtain a measurement request for the silicon wafer to be measured; in response to the measurement request, obtain a plurality of alignment and leveling rules and a plurality of test parameters for the silicon wafer to be measured; combine each of the plurality of alignment and leveling rules with each of the plurality of test parameters to obtain a plurality of measurement data; use the plurality of measurement data to measure the silicon wafer to be measured respectively to obtain a plurality of measurement results; analyze the plurality of measurement results to determine the target measurement results;
[0133] The memory 72 is used to store the programs required by the processor to execute the above processing procedures.
[0134] Furthermore, the electronic device disclosed in this embodiment may also include:
[0135] The display is used to display the analysis process and analysis results of the processor's visual correlation analysis of the multiple groups of measurement results and the alignment and leveling rules and test parameters corresponding to each group of measurement results when the processor analyzes the multiple groups of measurement results.
[0136] The silicon wafer measurement and analysis system disclosed in this embodiment is implemented based on the silicon wafer measurement and analysis method disclosed in the above embodiments, which will not be described in detail here.
[0137] The silicon wafer measurement and analysis system disclosed in this embodiment obtains a measurement request for a silicon wafer to be measured; in response to the measurement request, obtains a plurality of alignment and leveling rules and a plurality of test parameters for the silicon wafer to be measured; combines each of the plurality of alignment and leveling rules with each of the plurality of test parameters to obtain a plurality of measurement data; uses the plurality of measurement data to measure the silicon wafer to be measured to obtain a plurality of measurement results; and analyzes the plurality of measurement results to determine the target measurement results. This scheme combines a plurality of alignment and leveling rules and a plurality of test parameters in pairs to obtain a plurality of measurement data, and uses the plurality of measurement data to measure the silicon wafer to be measured to obtain a plurality of measurement results, and analyzes the plurality of measurement results to automatically combine and measure the measurement data of the silicon wafer to be measured, and automatically selects the optimal measurement data through the analysis of the plurality of measurement results, without manual selection, thereby improving the efficiency and accuracy of the measurement data analysis.
[0138] The embodiment of the present application also provides a readable storage medium on which a computer program is stored. The computer program is loaded and executed by a processor to implement the steps of the above-mentioned silicon wafer measurement and analysis method. The specific implementation process can refer to the description of the corresponding part of the above-mentioned embodiment, which will not be repeated in this embodiment.
[0139] The present application also proposes a computer program product or a computer program, which includes a computer instruction, and the computer instruction is stored in a computer-readable storage medium. The processor of the electronic device reads the computer instruction from the computer-readable storage medium, and the processor executes the computer instruction, so that the electronic device executes the method provided in various optional implementations of the silicon wafer measurement and analysis method or the silicon wafer measurement and analysis device. The specific implementation process can refer to the description of the corresponding embodiment above, and will not be repeated.
[0140] It should also be noted that the device embodiments described above are merely schematic, wherein the units described as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units, that is, they may be located in one place, or they may be distributed over multiple network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the scheme of this embodiment. In addition, in the drawings of the device embodiments provided by the present application, the connection relationship between the modules indicates that there is a communication connection between them, which may be specifically implemented as one or more communication buses or signal lines.
[0141] Through the description of the above implementation mode, the technicians in the field can clearly understand that the present application can be implemented by means of software plus necessary general hardware, and of course, it can also be implemented by special hardware including special integrated circuits, special CPUs, special memories, special components, etc. In general, all functions completed by computer programs can be easily implemented by corresponding hardware, and the specific hardware structure used to implement the same function can also be various, such as analog circuits, digital circuits or special circuits. However, for the present application, software program implementation is a better implementation mode in more cases. Based on such an understanding, the technical solution of the present application is essentially or the part that contributes to the prior art can be embodied in the form of a software product, which is stored in a readable storage medium, such as a computer floppy disk, a U disk, a mobile hard disk, a ROM, a RAM, a disk or an optical disk, etc., including a number of instructions to enable a computer device (which can be a personal computer, a training device, or a network device, etc.) to execute the methods described in each embodiment of the present application.
[0142] In the above embodiments, all or part of the embodiments may be implemented by software, hardware, firmware or any combination thereof. When implemented by software, all or part of the embodiments may be implemented in the form of a computer program product.
[0143] The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, the process or function described in the embodiment of the present application is generated in whole or in part. The computer may be a general-purpose computer, a special-purpose computer, a computer network, or other programmable devices. The computer instructions may be stored in a computer-readable storage medium, or transmitted from one computer-readable storage medium to another computer-readable storage medium. For example, the computer instructions may be transmitted from a website site, a computer, a training device, or a data center by wired (e.g., coaxial cable, optical fiber, digital subscriber line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) mode to another website site, computer, training device, or data center. The computer-readable storage medium may be any available medium that a computer can store or a data storage device such as a training device, a data center, etc. that includes one or more available media integrations. The available medium may be a magnetic medium, (e.g., a floppy disk, a hard disk, a tape), an optical medium (e.g., a DVD), or a semiconductor medium (e.g., a solid-state drive (SSD)), etc.
Claims
1. A silicon wafer measurement and analysis method, characterized in that: include: Obtaining a measurement request for the silicon wafer to be measured; In response to the measurement request, obtaining a plurality of alignment and leveling rules and a plurality of groups of test parameters for the silicon wafer to be measured; Combining each of the plurality of alignment and leveling rules with each of the plurality of test parameter groups to obtain a plurality of measurement data groups; Using the multiple sets of measurement data, respectively measure the silicon wafers to be measured to obtain multiple sets of measurement results; The multiple groups of measurement results are analyzed to determine the target measurement results.
2. The method according to claim 1, characterized in that The method of measuring the silicon wafer to be measured by using the multiple sets of measurement data to obtain multiple sets of measurement results includes: Performing alignment and leveling processing on the silicon wafer to be measured using the alignment and leveling rules in each set of measurement data; Each group of the aligned and leveled silicon wafers to be measured is tested according to the test parameters in each group of the measurement data to obtain multiple groups of measurement results.
3. The method according to claim 1, characterized in that The obtaining of a plurality of alignment and leveling rules for the silicon wafer to be measured comprises: Obtaining silicon wafer parameters and measurement field parameters of the silicon wafer to be measured by a wafer map tool; A plurality of alignment and leveling rules are determined based on the silicon wafer parameters and the measurement field parameters of the silicon wafer to be measured.
4. The method according to claim 1, characterized in that: The obtaining of a plurality of test parameters for the silicon wafer to be measured includes: A plurality of groups of test parameters corresponding to the silicon wafer to be measured corresponding to each alignment and leveling rule are obtained.
5. The method according to claim 1, characterized in that Each set of test parameters includes at least: Position information of the area to be measured on the silicon wafer to be measured, the position information being determined based on a wafer map tool and adjusted by an alignment and leveling rule; Imaging parameters, imaging parameters were different in different groups of tests; Measurement template information, where the measurement template information is determined based at least on the area to be measured on the silicon wafer to be measured.
6. The method according to claim 1, characterized in that The analyzing the multiple groups of measurement results to determine the target measurement results includes: Analyze the multiple groups of measurement results to determine the operating result indicators of each group of measurement results; The operation result indicators of each group of operation results are sorted, and the target measurement results in the multiple groups of measurement results are determined based on the sorting of the operation result indicators.
7. The method according to claim 1, characterized in that The analyzing the multiple groups of measurement results includes: Visual correlation analysis is performed on the multiple groups of measurement results and the alignment and leveling rules and test parameters corresponding to each group of measurement results.
8. A silicon wafer measurement and analysis system, characterized in that: include: A first obtaining unit, used for obtaining a measurement request for a silicon wafer to be measured; A second obtaining unit, configured to obtain, in response to the measurement request, a plurality of alignment and leveling rules and a plurality of groups of test parameters for the silicon wafer to be measured; A combining unit, configured to combine each of the plurality of alignment and leveling rules with each of the plurality of test parameter groups to obtain a plurality of measurement data groups; A measuring unit, used to measure the silicon wafer to be measured respectively using the multiple sets of measurement data to obtain multiple sets of measurement results; The analysis unit is used to analyze the multiple groups of measurement results to determine the target measurement results.
9. An electronic device, characterized in that: include: A processor, used for obtaining a measurement request for a silicon wafer to be measured; In response to the measurement request, obtaining a plurality of alignment and leveling rules and a plurality of groups of test parameters for the silicon wafer to be measured; Combining each of the plurality of alignment and leveling rules with each of the plurality of test parameter groups to obtain a plurality of measurement data groups; Using the multiple sets of measurement data, respectively measure the silicon wafers to be measured to obtain multiple sets of measurement results; Analyzing the multiple groups of measurement results to determine target measurement results; The memory is used to store the program required by the processor to execute the above processing process.
10. The electronic device according to claim 9, characterized in that: Also includes: The display is used to display the analysis process and analysis results of the visual correlation analysis performed by the processor on the multiple groups of measurement results and the alignment and leveling rules and test parameters corresponding to each group of measurement results when the processor analyzes the multiple groups of measurement results.