Vehicle chip testing method and device, electronic equipment and storage medium

Abstract

The application discloses a vehicle chip test method and device, electronic equipment and a storage medium. The method comprises the following steps: obtaining a to-be-tested function of a target chip and circuit design information of a target evaluation board; analyzing the circuit design information to obtain port information of the target chip; adjusting the port information based on the to-be-tested function for testing to generate an initial test result; and collecting a plurality of initial test results to obtain a target test result, wherein the target test result is used to determine whether the target chip passes the test. The application solves the technical problem of low efficiency and accuracy of the vehicle chip test method in the related art.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of vehicles, in particular to a vehicle chip testing method and device, electronic equipment and storage medium. BACKGROUND

[0002] In the current testing system of Controller Area Network (CAN) transceiver chips of an automobile, due to the differences in circuit principle design, Printed Circuit Board (PCB) design and test point placement of evaluation boards of chips to be tested from different manufacturers, it is necessary to manually adjust connector, probe or probe head, test input and other device information when testing different functions of the chip to be tested. This not only increases the complexity of the test, but also makes the test results prone to errors introduced by human adjustment. Moreover, the existing test process still mainly relies on manual operation to complete the evaluation of a certain index according to specific steps. This test method lacks standardization and uniformity, and reduces the accuracy of the evaluation results.

[0003] At present, no effective solution has been proposed for the above problems. SUMMARY

[0004] The embodiments of the present application provide a vehicle chip testing method, device, electronic equipment and storage medium, so as to at least solve the technical problem of low efficiency and accuracy of the vehicle chip testing method in the related art.

[0005] According to an embodiment of the present application, a vehicle chip testing method is provided, comprising: obtaining a function to be tested of a target chip and circuit design information of a target evaluation board; analyzing the circuit design information to obtain port information of the target chip; adjusting the port information based on the function to be tested to perform testing, and generating an initial test result; and summarizing a plurality of initial test results to obtain a target test result, wherein the target test result is used to determine whether the target chip passes the test.

[0006] Optionally, the step of adjusting the port information based on the function to be tested to perform testing and generating the initial test result comprises: in response to the function to be tested being a current output function of the target chip, adjusting a first port, a second port and a third port of the target chip to be grounded, and connecting the third port to a first voltage source, wherein the first port is used to send data of the target chip, the second port is used to control a working mode of the target chip, and the third port is used to connect a high-voltage line of the target chip; in response to the first voltage source providing a voltage according to a preset rule, obtaining current information of the third port; and generating the initial test result based on the current information.

[0007] Optionally, the adjusting the port information based on the function to be tested comprises: in response to the function to be tested being a bus bias function of the target chip, adjusting the first port of the target chip to be left floating, the second port to be grounded, the third port to be connected to a first voltage source, and the fourth port to be connected to a second voltage source, wherein the fourth port is used to connect a low voltage line of the target chip, and the second voltage source provides a voltage higher than that of the first voltage source; controlling the second voltage source to increase to a preset voltage threshold value at a first preset voltage step, to obtain output state information of the target chip; and generating the initial test result based on the output state information.

[0008] Optionally, the adjusting the port information based on the function to be tested comprises: in response to the function to be tested being an under-voltage function of the target chip, adjusting the second port of the target chip to be grounded, and connecting a target resistance between the third port and the fourth port of the target chip; determining supply voltage information of the target chip based on a common-mode voltage of the target chip; and generating the initial test result based on the supply voltage information.

[0009] Optionally, the adjusting the port information based on the function to be tested comprises: in response to the function to be tested being a voltage function of the target chip, adjusting the second port of the target chip to be grounded, and connecting a target resistance between the third port and the fourth port of the target chip; adjusting the voltage of the first port of the target chip; determining an input voltage threshold of the target chip based on the voltage of the first port; and generating the initial test result based on the input voltage threshold.

[0010] Optionally, the adjusting the port information based on the function to be tested comprises: in response to the function to be tested being an over-temperature protection function of the target chip, adjusting the first port of the target chip to be left floating, the second port to be grounded, and connecting a target resistance between the third port and the fourth port of the target chip; controlling the temperature of the target chip to increase based on a preset temperature step; in response to a difference between a first level and a second level reaching a preset threshold, obtaining current temperature information, wherein the first level is used to represent an output level of the third port, and the second level is used to represent an output level of the fourth port; and generating the initial test result based on the current temperature information.

[0011] Optionally, the vehicle chip testing method further comprises: controlling the target chip to be in a preset environmental condition, and controlling the supply voltage of the target chip to be a preset voltage.

[0012] Optionally, the aggregating the plurality of initial test results to obtain the target test result comprises: aggregating the plurality of initial test results to obtain an aggregated result; and in response to the aggregated result indicating that the functions to be tested corresponding to the plurality of initial test results all pass the test, determining that the target test result is that the target chip passes the test.

[0013] According to an embodiment of the present application, a vehicle chip testing device is provided, comprising: an obtaining module, configured to obtain a function to be tested of a target chip and circuit design information of a target evaluation board; an analyzing module, configured to analyze the circuit design information to obtain port information of the target chip; a testing module, configured to adjust the port information based on the function to be tested to perform testing, and generate an initial testing result; and a determining module, configured to aggregate a plurality of initial testing results to obtain a target testing result, wherein the target testing result is used to determine whether the target chip passes the testing.

[0014] Optionally, the testing module is further configured to, in response to the function to be tested being a current output function of the target chip, adjust a first port, a second port and a third port of the target chip, wherein the first port is used to send data of the target chip, the second port is used to control a working mode of the target chip, and the third port is used to connect a high-voltage line of the target chip; and the obtaining module is further configured to, in response to the first voltage source providing a voltage according to a preset rule, obtain current information of the third port; and the vehicle chip testing device further comprises a generating module, configured to generate the initial testing result based on the current information.

[0015] Optionally, the testing module is further configured to, in response to the function to be tested being a bus bias function of the target chip, adjust a first port, a second port, a third port and a fourth port of the target chip, wherein the fourth port is used to connect a low-voltage line of the target chip, and a second voltage source provides a voltage higher than a voltage provided by the first voltage source; control the second voltage source to increase to a preset voltage threshold value at a first preset voltage step to obtain output state information of the target chip; and the generating module is further configured to generate the initial testing result based on the output state information.

[0016] Optionally, the testing module is further configured to, in response to the function to be tested being an under-voltage function of the target chip, adjust the second port of the target chip to be grounded, and connect a target resistance between the third port and the fourth port of the target chip; the determining module is further configured to determine supply voltage information of the target chip based on a common-mode voltage of the target chip; and the generating module is further configured to generate the initial testing result based on the supply voltage information.

[0017] Optionally, the testing module is further configured to, in response to the function to be tested being a voltage function of the target chip, adjust the second port of the target chip to be grounded, and connect a target resistance between the third port and the fourth port of the target chip; and adjust a voltage of the first port of the target chip; the determining module is further configured to determine an input voltage threshold of the target chip based on the voltage of the first port; and the generating module is further configured to generate the initial testing result based on the input voltage threshold.

[0018] Optionally, the test module is further configured to: in response to the function to be tested being an over-temperature protection function of the target chip, adjust the target chip to have the first port suspended, the second port grounded, and the target resistance connected between the third port and the fourth port; and control the temperature of the target chip to increase based on a preset temperature step.

[0019] Optionally, the test module is further configured to: control the target chip to be in a preset environment condition, and control the power supply voltage of the target chip to be a preset voltage.

[0020] Optionally, the determination module is further configured to: aggregate the plurality of initial test results to obtain an aggregated result; and in response to the aggregated result indicating that the functions to be tested corresponding to the plurality of initial test results all pass the test, determine the target test result to be that the target chip passes the test.

[0021] According to an embodiment of the present application, an electronic device is provided, comprising: a memory storing an executable program; and a processor configured to execute the program, wherein the program is configured to execute the vehicle chip test method when executed.

[0022] According to an embodiment of the present application, a non-volatile storage medium is provided, the non-volatile storage medium storing a computer program, wherein the computer program is configured to execute the vehicle chip test method when executed.

[0023] According to an embodiment of the present application, a computer program product is provided, comprising a computer program, wherein the computer program is configured to implement the vehicle chip test method when executed by a processor.

[0024] In the embodiments of the present application, the circuit design information of the target evaluation board and the function to be tested of the target chip are obtained, the port information of the target chip is obtained by analyzing the circuit design information, the port information is adjusted based on the function to be tested to perform the test, the initial test result is generated, the plurality of initial test results are aggregated to obtain the target test result, and the purpose of accurately and quickly testing the target chip is achieved, thereby achieving the technical effect of improving the efficiency and accuracy of the target chip test method, and further solving the technical problem of low efficiency and accuracy of the vehicle chip test method in the related art. BRIEF DESCRIPTION OF DRAWINGS

[0025] The accompanying drawings, which are included to provide a further understanding of the present application and are incorporated in and constitute a part of this application, illustrate embodiments of the present application and serve to explain the principles of the present application. In the drawings:

[0026] Figure 1 is a flow chart of a vehicle chip testing method according to one embodiment of the present application;

[0027] Figure 2 is a flow chart of another vehicle chip testing method according to one embodiment of the present application;

[0028] Figure 3 is a schematic diagram of a vehicle chip testing method according to one embodiment of the present application;

[0029] Figure 4 is a structural block diagram of a vehicle chip testing device according to one embodiment of the present application. DETAILED DESCRIPTION

[0030] In order to make the personnel in the art better understand the present application, the technical solutions in the embodiments of the present application will be described clearly and completely below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, but not all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative labor should belong to the scope of protection of the present application.

[0031] It should be noted that the terms "first", "second", and the like in the specification and claims of the present application and the above-mentioned drawings are used to distinguish similar objects, and do not necessarily have to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged under appropriate circumstances, so that the embodiments of the present application described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "include" and "have" and any variations thereof are intended to cover non-exclusive inclusion, for example, a process, method, system, product or device including a series of steps or units does not have to be limited to those steps or units clearly listed, but can include other steps or units not clearly listed or inherent to these processes, methods, products or devices.

[0032] According to the embodiments of the present application, a method embodiment of a vehicle chip testing method is provided. It should be noted that the steps shown in the flow chart of the drawings can be executed in a computer system such as a set of computer executable instructions, and although the logical order is shown in the flow chart, in some cases, the steps shown or described herein can be executed in a different order than that shown herein.

[0033] The method embodiments can be executed in an electronic device comprising a memory and a processor or similar computing device. Taking an example of running on a vehicle terminal, the vehicle terminal can include one or more processors (the processor can include but is not limited to a processing device such as a Central Processing Unit (CPU), a Graphics Processing Unit (GPU), a Digital Signal Processing (DSP) chip, a Micro Controller Unit (MCU), a Field Programmable Gate Array (FPGA), a Neural-network Processor Unit (NPU), a Tensor Processing Unit (TPU), an Artificial Intelligence (AI) type processor, etc.) and a memory for storing data. Optionally, the vehicle terminal can further include a transmission device for communication function, an input / output device, and a display device. Those skilled in the art can understand that the above structural description is only illustrative, and does not limit the structure of the vehicle terminal. For example, the vehicle terminal can include more or less components than the above structural description, or have a different configuration from the above structural description.

[0034] The memory can be used to store computer programs, for example, software programs and modules of application software, such as the computer program corresponding to the vehicle chip testing method in the embodiments of the present application. The processor executes various functions and data processing by running the computer program stored in the memory, that is, implements the vehicle chip testing method described above. The memory can include a high-speed random access memory, and can also include a non-volatile memory, such as one or more magnetic storage devices, flash memories, or other non-volatile solid-state memories. In some examples, the memory can further include a memory remotely arranged with respect to the processor, which can be connected to the mobile terminal through a network. Examples of the above network include but are not limited to the Internet, an intranet, a local area network, a mobile communication network, and a combination thereof.

[0035] The transmission device is configured to receive or transmit data via a network. The network can include, for example, a wireless network provided by a mobile terminal's communication provider. In one example, the transmission device includes a network interface controller (NIC) that can connect to other network devices through a base station to communicate with the Internet. In one example, the transmission device can be a radio frequency (RF) module that is configured to communicate with the Internet via wireless means.

[0036] The display device can be, for example, a touch screen liquid crystal display (LCD) and a touch display (also referred to as a "touch screen" or "touch display screen"). The liquid crystal display can enable a user to interact with a user interface of the mobile terminal. In some embodiments, the mobile terminal has a graphical user interface (GUI) that a user can interact with through finger contacts and / or gestures on the touch-sensitive surface. The human-machine interaction functions can optionally include creating web pages, drawing, word processing, creating electronic documents, playing games, video conferencing, instant messaging, sending / receiving e-mail, call interface, playing digital videos, playing digital music, and / or web browsing, etc. Executable instructions for performing the human-machine interaction functions are configured / stored in one or more computer program products or readable storage media that are executable by the one or more processors.

[0037] Figure 1 is a flow chart of a vehicle chip testing method according to an embodiment of the present application, as shown in Figure 1 The method comprises the following steps:

[0038] In step S10, the to-be-tested function of the target chip and the circuit design information of the target evaluation board are obtained.

[0039] In step S10, the target chip is used to represent the to-be-tested vehicle CAN transceiver chip.

[0040] The circuit design information is used to represent the PCB design file of the target chip evaluation board. The PCB design file contains key data such as all test points and device pin numbers of the target chip, which can identify the to-be-tested points of the target chip.

[0041] In step S12, the circuit design information is parsed to obtain the port information of the target chip.

[0042] Specifically, the PCB design file of the target chip is imported into the evaluation board analysis instrument, after the PCB design file is successfully imported, the evaluation board analysis instrument analyzes it to obtain the port information of the target chip.

[0043] In step S14, the port information is adjusted based on the to-be-tested function for testing to generate an initial test result.

[0044] In step S14, the to-be-tested function includes but is not limited to: absolute output current of the CAN_H port of the target chip, absolute output current of the CAN_L port of the target chip, static receiving input characteristic of the target chip, undervoltage threshold of the VCC port of the target chip, undervoltage threshold of the VIO port of the target chip, input voltage threshold of the TXD port containing the VIO port, input voltage threshold of the TXD port not containing the VIO port, input voltage threshold of the STB port containing the VIO pin, input voltage threshold of the STB port not containing the VIO pin, over-temperature protection function of the target chip, high-level output current of the RXD port, low-level output current of the RXD port, test transmission dominant timeout condition, etc.

[0045] Specifically, the evaluation board analysis instrument inputs the parsed port information into the adaptive fixture and the adjustable probe group, which is used to adjust the connector type, connection position and direction, and the test point and depth of the probe in advance. After the adjustment of the adaptive fixture and the adjustable probe group, the CAN transceiver function performance instrument tests the target chip based on the port information adjusted according to the to-be-tested function to generate an initial test result. The initial test result is synchronized to the result analyzer to generate an analysis report.

[0046] In step S16, a plurality of initial test results are summarized to obtain a target test result, wherein the target test result is used to determine whether the target chip passes the test.

[0047] Specifically, the initial test results of each to-be-tested function are summarized to obtain a target test result; and whether the target chip passes the test is determined according to the target test result.

[0048] Based on the above steps S10 to S16, the circuit design information of the target chip and the to-be-tested function are obtained, the port information of the target chip is obtained by analyzing the circuit design information, the port information is adjusted based on the to-be-tested function for testing to generate an initial test result, and finally a plurality of initial test results are summarized to obtain a target test result, which achieves the purpose of accurately and quickly testing the target chip, thereby realizing the technical effect of improving the efficiency and accuracy of the target chip testing method, and further solving the technical problem of low efficiency and accuracy of the vehicle chip testing method in the related art.

[0049] Optionally, in step S14, the port information is adjusted based on the function to be tested for testing, and generating the initial test result comprises:

[0050] In step S1411, in response to the function to be tested being a current output function of the target chip, the first port, the second port and the third port of the target chip are adjusted to be grounded, and the third port is connected to the first voltage source, wherein the first port is used for transmitting data of the target chip, the second port is used for controlling the working mode of the target chip, and the third port is used for connecting a high voltage line of the target chip.

[0051] In step S1411, the first port is used for representing a TXD port of the target chip. The port is a transmitter data input port, which is responsible for transmitting data from the CAN controller to the CAN physical layer driver, so as to be transmitted to the CAN bus.

[0052] The second port is used for representing an STB port of the target chip. When the port is pulled high or suspended, the target chip is in standby mode.

[0053] The third port is used for representing a CAN_H port of the target chip. The port is a physical layer interface of the CAN bus, which is used for receiving and transmitting high-level signals on the CAN network.

[0054] In step S1412, in response to the first voltage source providing a voltage according to a preset rule, current information of the third port is obtained.

[0055] In step S1412, the first voltage source is used for representing an external voltage source of the CAN transceiver function performance instrument.

[0056] In step S1413, the initial test result is generated based on the current information.

[0057] Specifically, when the to-be-tested function is to test the absolute output current of the CAN_H port of the target chip, the adaptive fixture adjusts the power supply input to 5V, adjusts the TXD and STB ports of the evaluation board to be connected to GND, and the CAN_H port to be connected to the external voltage source of the CAN transceiver function performance instrument. When the first voltage source provides voltage according to the preset rule, the current information passing through the CAN_H port is measured. The maximum absolute output current passing through the CAN_H port is determined according to the current information passing through the CAN_H port. It is compared whether the actually measured maximum absolute output current of the CAN_H port is greater than or equal to the expected maximum absolute output current of the CAN_H port. If the actually measured maximum absolute output current of the CAN_H port is greater than or equal to the expected maximum absolute output current of the CAN_H port, the initial test result indicates that the to-be-tested function passes the test. If the actually measured maximum absolute output current of the CAN_H port is less than the expected maximum absolute output current of the CAN_H port, the initial test result indicates that the to-be-tested function fails the test. For example, the control voltage source starts from -3V and increases to 18V in steps of 1V, and the maximum absolute output current passing through the CAN_H is measured.

[0058] Specifically, when the to-be-tested function is to test the absolute output current of the CAN_H port of the target chip, the adaptive fixture adjusts the power supply input to 5V, adjusts the TXD and STB ports of the evaluation board to be connected to GND, and the CAN_H port to be connected to the external voltage source of the CAN transceiver function performance instrument. When the first voltage source provides voltage according to the preset rule, the current information passing through the CAN_H port is measured. The maximum absolute output current passing through the CAN_H port is determined according to the current information passing through the CAN_H port. It is compared whether the actually measured maximum absolute output current of the CAN_H port is greater than or equal to the expected maximum absolute output current of the CAN_H port. If the actually measured maximum absolute output current of the CAN_H port is greater than or equal to the expected maximum absolute output current of the CAN_H port, the initial test result indicates that the to-be-tested function passes the test. If the actually measured maximum absolute output current of the CAN_H port is less than the expected maximum absolute output current of the CAN_H port, the initial test result indicates that the to-be-tested function fails the test. For example, the control voltage source starts from -3V and increases to 18V in steps of 1V, and the maximum absolute output current passing through the CAN_H is measured.

[0059] Based on the steps S1411 to S1413, in response to the to-be-tested function being a current output function of the target chip, the first port, the second port of the target chip are grounded, and the third port is connected to the first voltage source; in response to the first voltage source providing a voltage according to a preset rule, the current information of the third port is obtained; and based on the current information, the initial test result is generated. By automatically adjusting the port and measuring the current, manual operation is reduced, the test process is accelerated, and the consistency and reliability of the test result are ensured by reducing human errors.

[0060] Optionally, in step S14, the port information is adjusted based on the to-be-tested function for testing to generate the initial test result, including:

[0061] In step S1421, in response to the to-be-tested function being a bus bias function of the target chip, the first port of the target chip is left floating, the second port is grounded, the third port is connected to the first voltage source, and the fourth port is connected to the second voltage source, wherein the fourth port is used to connect a low-voltage line of the target chip, and the second voltage source provides a voltage higher than that of the first voltage source.

[0062] In step S1421, the fourth port is used to represent the CAN_L port of the target chip, which is a physical layer interface of the CAN bus and is used to receive and send low-level signals on the CAN network.

[0063] In step S1422, the second voltage source is controlled to increase by a first preset voltage step to a preset voltage threshold to obtain output state information of the target chip.

[0064] Specifically, the second voltage source is controlled to increase by a first preset voltage step to a preset voltage threshold, and the output state information of the target chip is obtained by monitoring the output state of the RXD port, wherein the main function of the RXD port is to receive data from other CAN nodes. The RXD port works with the TXD (Transmit Data) port to realize data communication on the CAN bus. For example, the RXD port receives data sent by sensors, actuators or other control units, and the data can include vehicle speed, engine state, temperature and other information.

[0065] In step S1423, the initial test result is generated based on the output state information.

[0066] Specifically, when the to-be-tested function is to test the static receiving input characteristic of the target chip, whether the bus bias voltage is effective, the adaptive fixture adjusts the power supply input to 5V, adjusts the TXD and STB ports of the evaluation board to be connected to GND, the TXD port is left floating, and the CAN_H port and the CAN_L port are respectively connected to a voltage source V1 and a voltage source V2, wherein V2 is set to be higher than V1. V2 is controlled to increase to a preset voltage threshold value at a first preset voltage step, and the output state of the RXD port is monitored in the process; an initial test result is generated according to the output state of the RXD port; if the output state of the RXD port in the actual test process conforms to the expected output state of the RXD port, the initial test result indicates that the to-be-tested function passes the test; and if the output state of the RXD port in the actual test process does not conform to the expected output state of the RXD port, the initial test result indicates that the to-be-tested function fails the test.

[0067] For example, V2 is set to be -12V, V1 is set to be V2-3V=-15V, and V2 is increased to V2+0.5V at a step of 0.1V, and the output state of the RXD port is monitored. First, V1 is increased to -14.9V at a step of 0.1V, and the output state of the RXD port is observed. If the output state of the RXD port is high, it indicates that the voltage at this time is in the effective range. Continue to increase the voltage of V1 at a step of 0.1V until V2+0.5V (i.e. -11.5V). In this process, the voltage value of V1 and the corresponding output state of the RXD port need to be recorded in order to analyze the static receiving input characteristic of the CAN bus, including the effective voltage range, the logic 0 and logic 1 level range, etc.

[0068] Based on the above steps S1421 to S1423, in response to the to-be-tested function being the bus bias function of the target chip, the first port of the target chip is left floating, the second port is grounded, the third port is connected to the first voltage source, and the fourth port is connected to the second voltage source; the second voltage source is controlled to increase to a preset voltage threshold value at a first preset voltage step, and output state information of the target chip is obtained; and an initial test result is generated based on the output state information, which reduces manual intervention and accelerates the test speed through automatic voltage control and state monitoring, accurately controls the voltage step and monitors the state of the RXD port, can more accurately evaluate the static receiving input characteristic of the CAN bus, and the adaptive fixture can adjust the port configuration according to the demand of the to-be-tested function, thereby increasing the flexibility of the test.

[0069] Optionally, in step S14, the port information is adjusted based on the to-be-tested function to perform the test, and generating the initial test result comprises:

[0070] In step S1431, in response to the to-be-tested function being an under-voltage function of the target chip, the second port of the target chip is grounded, and a target resistance is connected between the third port and the fourth port.

[0071] Step S1432, determining the supply voltage information of the target chip based on the common mode voltage of the target chip;

[0072] Step S1433, generating the initial test result based on the supply voltage information.

[0073] Specifically, when the to-be-tested function is to test the undervoltage threshold of the VCC port of the target chip, the adaptive fixture adjusts the supply input to 5V, adjusts the STB port of the evaluation board to be connected to GND, adjusts the 60Ω resistor connected between the CAN_H and CAN_L ports, sets the supply input to start decreasing from 5V at a rate of 10mV / s, monitors the common mode voltage output of the CAN bus, and then decreases the common mode voltage of the CAN bus from half of the supply voltage to 0V, and captures the supply voltage of the VCC port of the target chip at this time. If the captured supply voltage of the target chip meets the expected supply voltage of the target chip, the initial test result indicates that the to-be-tested function passes the test; if the captured supply voltage of the target chip does not meet the expected supply voltage of the target chip, the initial test result indicates that the to-be-tested function fails the test.

[0074] Specifically, when the to-be-tested function is to test the undervoltage threshold of the VIO port of the target chip, the adaptive fixture adjusts the supply input to 5V, adjusts the STB port of the evaluation board to be connected to GND, adjusts the 60Ω resistor connected between the CAN_H and CAN_L ports, sets the supply input to start decreasing from 5V at a rate of 10mV / s, monitors the common mode voltage output of the CAN bus, and then adjusts the common mode voltage of the CAN bus to a floating state, and captures the supply voltage of the VIO port at this time. If the captured supply voltage of the VIO port meets the expected supply voltage of the VIO port, the initial test result indicates that the to-be-tested function passes the test; if the captured supply voltage of the VIO port does not meet the expected supply voltage of the VIO port, the initial test result indicates that the to-be-tested function fails the test.

[0075] Based on the above steps S1431 to S1433, in response to the to-be-tested function being the undervoltage function of the target chip, the second port of the target chip is connected to the ground, the third port and the fourth port of the target chip are connected to the target resistance; the supply voltage information of the target chip is determined based on the common mode voltage of the target chip; and the initial test result is generated based on the supply voltage information. The automated test process reduces the possibility of human operation errors, and ensures the accuracy of the test results by precisely controlling the test parameters. This method is suitable for a variety of different test scenarios and has good universality and scalability.

[0076] Optionally, in step S14, the port information is adjusted based on the to-be-tested function for testing, and generating the initial test result comprises:

[0077] Step S1441, in response to the to-be-tested function being a voltage function of the target chip, adjusting the target resistance connected between the second port, the third port and the fourth port of the target chip grounded;

[0078] Step S1442, adjusting the voltage of the first port of the target chip;

[0079] Step S1443, determining the input voltage threshold of the target chip based on the voltage of the first port;

[0080] Step S1444, generating an initial test result based on the input voltage threshold.

[0081] Specifically, when the to-be-tested function is the input voltage threshold of the TXD port containing the VIO port, the adaptive fixture adjusts the power supply input to 5V, adjusts the STB port of the evaluation board to be connected to GND, adjusts the 60Ω resistance connected between the CAN_H and CAN_L ports, and sequentially performs high-level input voltage threshold test, low-level input voltage threshold test and pull-up resistance test. The high-level input voltage threshold test is to input different voltage values to the TXD port, and record the lowest voltage threshold at which the level of the TXD port is considered as high. The low-level input voltage threshold test is to input different voltage values to the TXD port, and record the highest voltage threshold at which the level of the TXD port is considered as low. The pull-up resistance test is to disconnect the original 60Ω resistance and replace it with a known pull-up resistance. The highest voltage threshold and the lowest voltage threshold of the TXD port are tested again to observe whether there is any change, which is to evaluate the influence of the pull-up resistance on the input voltage threshold of the TXD port. Record all the initial test results. If the highest voltage threshold and the lowest voltage threshold of the TXD port in each test meet the expected highest voltage threshold and the lowest voltage threshold of the TXD port, the initial test result indicates that the to-be-tested function passes the test. If the highest voltage threshold and the lowest voltage threshold of the TXD port in each test do not meet the expected highest voltage threshold and the lowest voltage threshold of the TXD port, the initial test result indicates that the to-be-tested function fails the test.

[0082] Specifically, when the function to be tested is the input voltage threshold of the TXD port without the VIO port, the adaptive fixture adjusts the power supply input to 5V, adjusts the STB port of the evaluation board to be connected to GND, the TXD port to be connected to an external voltage source, adjusts the 60Ω external resistance between the CAN_H and CAN_L ports, and sequentially performs high-level input voltage threshold testing, low-level input voltage threshold testing, and pull-up resistance testing. The high-level input voltage threshold testing is: adjusting the external voltage source, gradually increasing the voltage of the TXD port until the high-level threshold value specified in the CAN protocol is reached. The output of the CAN transceiver is observed using an oscilloscope or logic analyzer to ensure that when the threshold value is exceeded, the transceiver can correctly identify it as a high level. The low-level input voltage threshold testing is performed: gradually reduce the voltage of the TXD port until the low-level threshold value is reached. Similarly, the output of the CAN transceiver is observed using an oscilloscope or logic analyzer to ensure that when the threshold value is below, the transceiver can correctly identify it as a low level. The pull-up resistance testing is performed: disconnect the external voltage source and connect the TXD port to the 5V power supply through the internal pull-up resistor. Observe the output of the CAN transceiver to ensure that the TXD port can be stable at a high level without an external voltage source, and record the voltage threshold of the TXD port at this time. Record the voltage value and the response of the CAN transceiver for each test in detail. If the test results of the high-level input voltage threshold testing, the low-level input voltage threshold testing, and the pull-up resistance testing of the TXD port meet the expected voltage thresholds of the high-level input voltage threshold testing, the low-level input voltage threshold testing, and the pull-up resistance testing of the TXD port, the initial test result indicates that the function to be tested passes the test; if the test results of the high-level input voltage threshold testing, the low-level input voltage threshold testing, and the pull-up resistance testing of the TXD port do not meet the expected voltage thresholds of the high-level input voltage threshold testing, the low-level input voltage threshold testing, and the pull-up resistance testing of the TXD port, the initial test result indicates that the function to be tested fails the test.

[0083] Specifically, when the function to be tested is the input voltage threshold of the STB port with VIO pin, the adaptive fixture adjusts the power supply input to 5V, adjusts the evaluation board STB port to be connected to an external voltage source, adjusts the TXD port to be connected to GND, adjusts the external 60Ω resistor between the CAN_H port and the CAN_L port, and sequentially performs high-level input voltage threshold testing, low-level input voltage threshold testing, and pull-up resistor testing. The high-level input voltage threshold testing is to input different voltage values to the STB port, and record the lowest voltage threshold at which the level of the STB port is considered high. The low-level input voltage threshold testing is to input different voltage values to the STB port, and record the highest voltage threshold at which the level of the STB port is considered low. The pull-up resistor testing is to disconnect the original 60Ω resistor and replace it with a known pull-up resistor. The highest voltage threshold and the lowest voltage threshold of the STB port are tested again to observe whether there is any change, which is to evaluate the influence of the pull-up resistor on the input voltage threshold of the STB port. Record all the initial test results. If the highest voltage threshold and the lowest voltage threshold of the STB port in each test meet the expected highest voltage threshold and the lowest voltage threshold of the STB port, the initial test results indicate that the function to be tested passes the test. If the highest voltage threshold and the lowest voltage threshold of the STB port in each test do not meet the expected highest voltage threshold and the lowest voltage threshold of the STB port, the initial test results indicate that the function to be tested fails the test.

[0084] Specifically, when the function to be tested is the input voltage threshold of the STB port without the VIO pin, the adaptive fixture adjusts the power supply input to 5V, adjusts the evaluation board STB port to be connected to an external voltage source, adjusts the TXD port to be suspended, adjusts the CAN_H port and the CAN_L port to be externally connected with a 60Ω resistor, and sequentially performs high-level input voltage threshold testing, low-level input voltage threshold testing, and pull-up resistor testing. The high-level input voltage threshold testing is: adjusting the external voltage source, gradually increasing the voltage of the STB port until the high-level threshold value specified in the CAN protocol is reached. The output of the CAN transceiver is observed using an oscilloscope or logic analyzer to ensure that the transceiver can correctly identify it as a high level above the threshold. The low-level input voltage threshold testing is: gradually reducing the voltage of the STB port until the low-level threshold value is reached. Similarly, the output of the CAN transceiver is observed using an oscilloscope or logic analyzer to ensure that the transceiver can correctly identify it as a low level below the threshold. The pull-up resistor testing is: disconnecting the external voltage source and allowing the STB port to be connected to the 5V power supply through the internal pull-up resistor. The output of the CAN transceiver is observed to ensure that the STB port can be stable at a high level without an external voltage source, and the voltage threshold of the STB port at this time is recorded. The voltage value and the response of the CAN transceiver of each test are recorded in detail. If the test results of the high-level input voltage threshold testing, the low-level input voltage threshold testing, and the pull-up resistor testing of the STB port meet the expected voltage thresholds of the high-level input voltage threshold testing, the low-level input voltage threshold testing, and the pull-up resistor testing of the STB port, the initial test result indicates that the function to be tested passes the test; if the test results of the high-level input voltage threshold testing, the low-level input voltage threshold testing, and the pull-up resistor testing of the STB port do not meet the expected voltage thresholds of the high-level input voltage threshold testing, the low-level input voltage threshold testing, and the pull-up resistor testing of the STB port, the initial test result indicates that the function to be tested fails the test.

[0085] Based on the steps S1441 to S1444, in response to the function to be tested being a voltage function of the target chip, the target resistance is connected between the second port, the third port, and the fourth port of the target chip; the voltage of the first port of the target chip is adjusted; the input voltage threshold of the target chip is determined based on the voltage of the first port; and the initial test result is generated based on the input voltage threshold, which standardizes the overall test process of the target chip and enables automatic and full-coverage testing of various indicator parameters of the chip, thereby avoiding the problem of insufficient test result coverage caused by targeted manual testing at the present stage.

[0086] Optionally, in step S14, the port information is adjusted based on the function to be tested for testing, and generating the initial test result comprises:

[0087] In step S1451, in response to the to-be-tested function being the over-temperature protection function of the target chip, the first port of the target chip is left unconnected, the second port is grounded, and a target resistance is connected between the third port and the fourth port.

[0088] In step S1452, the temperature of the target chip is increased based on a preset temperature step.

[0089] In step S1453, in response to a difference between a first level and a second level reaching a preset threshold, current temperature information is obtained, where the first level is used to represent an output level of the third port, and the second level is used to represent an output level of the fourth port.

[0090] In step S1454, an initial test result is generated based on the current temperature information.

[0091] Specifically, when the to-be-tested function is the over-temperature protection function of the target chip, the temperature and humidity of the CAN transceiver function performance comprehensive tester are adjusted to 23℃±5℃ and 30~60%, respectively. The adaptive fixture adjusts the power supply input to 5V and monitors the current of the link, adjusts the TXD port of the evaluation board to be unconnected, the STB port to be connected to GND, and a 60Ω resistance to be externally connected between the CAN_H and CAN_L ports. The test environment temperature is increased at a step of 1℃ / min, and in this process, the level change of the CAN bus needs to be monitored. When the voltage difference between the CAN_H port and the CAN_L port reaches a preset threshold, the temperature information of the circuit in this process is obtained. For example, when the voltage difference between the CAN_H port and the CAN_L port increases from 0V to 2.5V, the temperature information of the circuit in this process is obtained. If the temperature information of the circuit in this process meets the expected temperature information of the circuit, the initial test result indicates that the to-be-tested function passes the test; if the temperature information of the circuit in this process does not meet the expected temperature information of the circuit, the initial test result indicates that the to-be-tested function fails the test.

[0092] Based on the above steps S1451 to S1453, in response to the to-be-tested function being the over-temperature protection function of the target chip, the first port of the target chip is left unconnected, the second port is grounded, and a target resistance is connected between the third port and the fourth port; the temperature of the target chip is increased based on a preset temperature step; in response to a difference between a first level and a second level reaching a preset threshold, current temperature information is obtained, where the first level is used to represent an output level of the third port, and the second level is used to represent an output level of the fourth port; and an initial test result is generated based on the current temperature information, which can adaptively adjust the test module for different chip manufacturer evaluation board differences, PCB design differences, connector selection differences, and test point placement differences, etc., to maximize the avoidance of test result errors caused by human factors and environmental factors and to improve the test efficiency.

[0093] Optionally, the vehicle chip testing method further comprises:

[0094] Step S17, controlling the target chip to be in a preset environmental condition, and

[0095] Step S18, controlling the power supply voltage of the target chip to be a preset voltage.

[0096] Specifically, the temperature and humidity values in the CAN transceiver function performance comprehensive tester are adjusted, and the target chip is controlled to be in a preset condition. For example, the temperature is 23℃±5℃, and the humidity is 30~60%. In addition, the self-adaptive clamp adjusts the power supply input to 5V.

[0097] Based on the above steps S17 to S18, the target chip is controlled to be in a preset environmental condition, and the power supply voltage of the target chip is controlled to be a preset voltage, the chip overall test process is standardized, and the accuracy of the target chip test is improved.

[0098] Optionally, in step S16, the plurality of initial test results are summarized to obtain the target test result, which comprises:

[0099] Step S161, the plurality of initial test results are summarized to obtain a summary result;

[0100] Step S162, in response to the summary result indicating that the plurality of initial test results corresponding to the to-be-tested functions all pass the test, determining that the target test result is that the target chip passes the test.

[0101] Specifically, the initial test results corresponding to each to-be-tested function are summarized to obtain a summary result. When the summary result indicates that the plurality of initial test results corresponding to the to-be-tested functions all pass the test, it is determined that the target test result is that the target chip passes the test.

[0102] Based on the above steps S161 to S162, the plurality of initial test results are summarized to obtain a summary result. In response to the summary result indicating that the plurality of initial test results corresponding to the to-be-tested functions all pass the test, it is determined that the target test result is that the target chip passes the test. The initial test results are automatically analyzed to generate a standardized test report and attach an evaluation result, so that chip evaluation can be efficiently carried out, and better cope with future numerous brand and product batch testing.

[0103] Specifically, when the function to be tested is the high level output current of the RXD port, the adaptive fixture adjusts the power supply input to 5V, adjusts the STB port of the evaluation board to connect to GND, adjusts the TXD port to be suspended, adjusts the CAN_H port and the CAN_L port to be externally connected with a 60Ω resistor, adjusts the RXD port of the evaluation board to be connected to an external voltage source and to be able to monitor the link current, sets the voltage value of the external voltage source of the RXD port to be lower than the power supply voltage, and acquires the output current of the STB port. For example, the voltage value of the external voltage source of the RXD port is set to be the power supply voltage-0.4V, and the output current of the STB port is acquired. If the output current of the STB port in the process conforms to the expected output current of the STB port, the initial test result indicates that the function to be tested passes the test; if the output current of the STB port in the process does not conform to the expected output current of the STB port, the initial test result indicates that the function to be tested fails the test.

[0104] Specifically, when the function to be tested is the low level output current of the RXD port, the adaptive fixture adjusts the power supply input to 5V, adjusts the STB port of the evaluation board to connect to GND, adjusts the TXD port to be suspended, adjusts the CAN_H port to be connected to the power supply voltage, adjusts the RXD port of the evaluation board to be connected to an external voltage source and to be able to monitor the link current, sets the voltage value of the external voltage source of the RXD port to be a preset voltage value, and acquires the output current of the STB port. For example, the voltage value of the external voltage source of the RXD port is set to be 0.4V, and the output current of the STB port is acquired. If the output current of the STB port in the process conforms to the expected output current of the STB port, the initial test result indicates that the function to be tested passes the test; if the output current of the STB port in the process does not conform to the expected output current of the STB port, the initial test result indicates that the function to be tested fails the test.

[0105] Specifically, when the function to be tested is the test of transmission dominant timeout, the adaptive fixture adjusts the power supply input to 5V, adjusts the STB port of the evaluation board to connect to GND, adjusts the TXD port to connect to a signal generator, adjusts the CAN_L port to connect to an internal and external voltage source of the instrument, adjusts the CAN_H and CAN_L ports to be externally connected with a 60Ω resistor, which helps to simulate the characteristic impedance of the CAN bus, controls the signal generator to input a square wave with an amplitude of 5V and a period of 20ms to the TXD port, and captures the dominant timeout tdom. In the square wave sent by the signal generator, it is observed whether the evaluation board can correctly detect the dominant level within the tdom time and continue to send signals. If the evaluation board can correctly handle the dominant timeout, it will be able to continue to send the remaining data or remote frames after the tdom time.

[0106] Figure 2 is a flowchart of still another vehicle chip test method according to an embodiment of the present application, as Figure 2As shown, the method comprises the following steps:

[0107] In step S201, circuit design information of a target chip and a function to be tested are acquired.

[0108] In step S202, the circuit design information is parsed to obtain port information of the target chip.

[0109] In step S203, the port information is adjusted based on the function to be tested for testing, and an initial test result is generated.

[0110] In step S204, a plurality of initial test results are summarized to obtain a summary result.

[0111] In step S205, in response to the summary result indicating that the functions to be tested corresponding to the plurality of initial test results all pass the test, it is determined that the target test result is that the target chip passes the test.

[0112] Based on the above steps S201 to S205, by acquiring the circuit design information of the target chip and the function to be tested, the port information of the target chip is obtained by parsing the circuit design information, and the initial test result is generated by adjusting the port information based on the function to be tested for testing. Finally, the target test result is obtained by summarizing a plurality of initial test results, which achieves the purpose of accurately and quickly testing the target chip, thereby realizing the technical effect of improving the efficiency and accuracy of the target chip testing method, and further solving the technical problem of low efficiency and accuracy of the vehicle chip testing method in the related art.

[0113] Figure 3 is a schematic diagram of a vehicle chip testing method according to an embodiment of the present application, as Figure 3 As shown, the CAN transceiver chip testing system is composed of the following parts: a chip evaluation board under test import analyzer, an adaptive fixture, an adjustable probe set, a CAN transceiver function performance comprehensive tester, and a test result analyzer. The vehicle chip testing method is applied to the system, and the method comprises:

[0114] 1. The PCB design file of the CAN chip evaluation board under test is imported into the evaluation board analyzer. The PCB design file needs to contain all test points, device pin numbers, and other key data for identifying and positioning the test points, and the PCB file can be parsed and recognized by the instrument.

[0115] 2. After the evaluation board PCB file is successfully imported, the analyzer analyzes and inputs the results to the adaptive fixture and the adjustable probe set, so as to adjust the connector type, connection position and direction, and the test point and depth of the probe in advance.

[0116] 3. Set the evaluation board working condition, and execute the CAN transceiver function and performance comprehensive test process by using the CAN transceiver function and performance comprehensive tester:

[0117] (1) Adjust the temperature and humidity in the instrument to 23℃±5℃ and 30~60%, respectively;

[0118] (2) Test the absolute output current of the CAN_H port;

[0119] (3) Test the absolute output current of the CAN_L port;

[0120] (4) Test the transmission dominant timeout;

[0121] (5) Test the static receiving input characteristics with the bus bias voltage effective;

[0122] (6) Test the static receiving input characteristics with the bus bias voltage ineffective;

[0123] (7) Test the undervoltage threshold of the VCC port;

[0124] (8) Test the undervoltage threshold of the VIO port;

[0125] (9) Test the input voltage threshold of the TXD port when the VIO port is included;

[0126] (10) Test the input voltage threshold of the TXD port when the VIO port is not included;

[0127] (11) Test the input voltage threshold of the STB port when the VIO port is included;

[0128] (12) Test the input voltage threshold of the STB port when the VIO port is not included;

[0129] (13) Test the high-level output current of the RXD port;

[0130] (4) Test the low-level output current of the RXD port;

[0131] (15) Increase the test environment temperature at 1℃ / min, and test the over-temperature protection function and threshold;

[0132] (16) Restore the test environment temperature to room temperature, and complete the parameter index test.

[0133] 4. Synchronize the test results to the result analyzer, and complete the analysis report generation.

[0134] Based on the above steps, the test module can be adaptively adjusted for different chip manufacturers, PCB design differences, connector selection differences and test point placement differences, etc., to maximize the avoidance of test result errors caused by human factors and environmental factors and to improve test efficiency; The chip overall test process is standardized, so that all chip index parameters can realize automatic and full-coverage testing, avoiding the problem of insufficient test result coverage caused by targeted manual testing at the present stage; The initial test result is automatically analyzed, a standardized test report is generated, and the evaluation result is attached, so that the chip evaluation can be efficiently carried out, and the future mass brand and product batch testing can be better responded.

[0135] Through the description of the above embodiments, those skilled in the art can clearly understand that the method according to the above embodiments can be realized by means of software and necessary general hardware platform, and of course it can also be realized by hardware, but in many cases the former is a better embodiment. Based on such understanding, the technical solutions of the present application can be embodied in the form of a software product, which is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk) and includes a plurality of instructions for causing a terminal device (which can be a mobile phone, computer, server, or network device) to execute the method described in each embodiment of the present application.

[0136] In the embodiments of the present application, a vehicle chip testing device is also provided, which is used to implement the above embodiments and preferred embodiments, and will not be described again. As used below, the term "module" can be a combination of software and / or hardware that implements a predetermined function. Although the devices described in the following embodiments are preferably implemented in software, hardware or a combination of software and hardware is also possible and is contemplated.

[0137] Figure 4 is a structural block diagram of a vehicle chip testing device according to an embodiment of the present application. As shown in Figure 4 , the device includes:

[0138] The acquisition module 401 is configured to acquire circuit design information of a target chip and a to-be-tested function, wherein the target chip is used to represent a to-be-tested chip.

[0139] The analysis module 402 is configured to analyze the circuit design information to obtain port information of the target chip.

[0140] The test module 403 is configured to adjust the port information based on the to-be-tested function to perform testing and generate an initial test result.

[0141] The determining module 404 is configured to aggregate the plurality of initial test results to obtain a target test result, where the target test result is used to determine whether the target chip passes the test.

[0142] Optionally, the test module 403 is further configured to, in response to the to-be-tested function being a current output function of the target chip, ground the first port, the second port, and connect the third port to the first voltage source, where the first port is used to send data of the target chip, the second port is used to control an operating mode of the target chip, and the third port is used to connect a high-voltage line of the target chip; the obtaining module 401 is further configured to, in response to the first voltage source providing a voltage according to a preset rule, obtain current information of the third port; and the vehicle chip testing device further includes a generating module 405 configured to generate an initial test result based on the current information.

[0143] Optionally, the test module 403 is further configured to, in response to the to-be-tested function being a bus bias function of the target chip, leave the first port unconnected, ground the second port, connect the third port to the first voltage source, and connect the fourth port to the second voltage source, where the fourth port is used to connect a low-voltage line of the target chip, and the second voltage source provides a voltage higher than that of the first voltage source; control the second voltage source to increase to a preset voltage threshold value at a first preset voltage step to obtain output state information of the target chip; and the generating module 405 is further configured to generate an initial test result based on the output state information.

[0144] Optionally, the test module 403 is further configured to, in response to the to-be-tested function being an under-voltage function of the target chip, ground the second port of the target chip and connect the third port and the fourth port with a target resistor; the determining module 404 is further configured to determine supply voltage information of the target chip based on a common-mode voltage of the target chip; and the generating module 405 is further configured to generate an initial test result based on the supply voltage information.

[0145] Optionally, the test module 403 is further configured to, in response to the to-be-tested function being a voltage function of the target chip, ground the second port of the target chip and connect the third port and the fourth port with a target resistor; and adjust a voltage of the first port of the target chip; the determining module 404 is further configured to determine an input voltage threshold of the target chip based on the voltage of the third port; and the generating module 405 is further configured to generate an initial test result based on the input voltage threshold.

[0146] Optionally, the test module 403 is further configured to, in response to the function to be tested being an over-temperature protection function of the target chip, adjust the target chip to have the first port suspended, the second port grounded, and the target resistance connected between the third port and the fourth port; and control the temperature of the target chip to increase based on a preset temperature step.

[0147] Optionally, the test module 403 is further configured to control the target chip to be in a preset environment condition, and control the power supply voltage of the target chip to be a preset voltage.

[0148] Optionally, the determination module 404 is further configured to aggregate the plurality of initial test results to obtain an aggregated result, and determine that the target test result is that the target chip passes the test, in response to the aggregated result indicating that the functions to be tested corresponding to the plurality of initial test results all pass the test.

[0149] It should be noted that the above modules can be implemented by software or hardware, and for the latter, the following implementation manners can be used, but are not limited thereto: the above modules are located in the same processor; or the above modules are located in different processors in any combination.

[0150] According to an embodiment of the present application, an electronic device is provided, which comprises a memory storing an executable program, and a processor configured to execute the program, wherein the program is configured to execute the vehicle chip test method described above when executed.

[0151] Optionally, in the present embodiment, the processor can be configured to execute the following steps by using the computer program:

[0152] Step S1, obtaining circuit design information of a target chip and a function to be tested;

[0153] Step S2, parsing the circuit design information to obtain port information of the target chip;

[0154] Step S3, adjusting the port information based on the function to be tested to perform a test, and generating an initial test result;

[0155] Step S4, aggregating a plurality of initial test results to obtain a target test result, wherein the target test result is used to determine whether the target chip passes the test.

[0156] According to one of the embodiments of the present application, a non-volatile storage medium is provided, and the non-volatile storage medium stores a computer program. The computer program is configured to execute the vehicle chip testing method described above when executed.

[0157] Optionally, in the embodiment, the storage medium is configured to store a computer program for executing the following steps:

[0158] Step S1, obtaining circuit design information of a target chip and a function to be tested;

[0159] Step S2, parsing the circuit design information to obtain port information of the target chip;

[0160] Step S3, adjusting the port information based on the function to be tested to perform testing, and generating an initial testing result;

[0161] Step S4, summarizing a plurality of initial testing results to obtain a target testing result, wherein the target testing result is used to determine whether the target chip passes the testing.

[0162] Optionally, in the embodiment, the storage medium can include, but is not limited to, a U disk, a read-only memory (ROM), a random access memory (RAM), a mobile hard disk, a magnetic disk or an optical disk, and various storage media that can store computer programs.

[0163] According to one of the embodiments of the present application, a computer program product is provided, and the computer program product includes a computer program. The computer program is executed by a processor to implement the vehicle chip testing method described above.

[0164] Optionally, in the embodiment, the computer program product can be configured to execute the following steps:

[0165] Step S1, obtaining circuit design information of a target chip and a function to be tested;

[0166] Step S2, parsing the circuit design information to obtain port information of the target chip;

[0167] Step S3, adjusting the port information based on the function to be tested to perform testing, and generating an initial testing result;

[0168] Step S4, summarizing a plurality of initial testing results to obtain a target testing result, wherein the target testing result is used to determine whether the target chip passes the testing.

[0169] Optionally, the specific examples in the embodiment can refer to the examples described in the above embodiments and optional implementation manners, and the embodiment will not be described here again.

[0170] The above-mentioned embodiment numbers of the present application are only for description, and do not represent the advantages and disadvantages of the embodiments.

[0171] In the above-mentioned embodiments of the present application, the description of each embodiment has its own focus, and the parts not described in detail in a certain embodiment can be referred to the relevant description of other embodiments.

[0172] In several embodiments provided in the present application, it should be understood that the disclosed technical contents can be implemented by other ways. Among them, the above-mentioned device embodiments are only schematic, for example, the division of the units can be a logical function division, and actual implementation can have another division way, for example, a plurality of units or components can be combined or integrated into another system, or some features can be ignored or not executed. In addition, the coupling or direct coupling or communication connection between the units or modules shown or discussed can be indirect coupling or communication connection through some interfaces, units or modules, which can be electrical or other forms.

[0173] The units described as separate components can or can not be physically separated, and the components shown as units can or can not be physical units, that is, they can be located in one place, or they can be distributed to multiple units. Part or all of the units can be selected according to actual needs to achieve the purpose of the embodiment scheme.

[0174] In addition, each functional unit in each embodiment of the present application can be integrated in one processing unit, or each unit can exist physically, or two or more units can be integrated in one unit. The above-mentioned integrated unit can be realized in the form of hardware or in the form of software functional unit.

[0175] The integrated unit, if realized in the form of software functional unit and sold or used as an independent product, can be stored in a computer readable storage medium. Based on such understanding, the technical solutions of the present application or the essential part or all or part of the technical solutions that make contributions to the prior art can be embodied in the form of software product, which is stored in a storage medium and includes a plurality of instructions for making a computer device (which can be a personal computer, a server or a network device, etc.) execute all or part of the steps of the method described in each embodiment of the present application. The above-mentioned storage medium includes: U disk, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), mobile hard disk, magnetic disk or optical disk and various program code storage media.

[0176] The above merely describes the preferred embodiments of the present application, and it should be pointed out that, for those skilled in the art, several improvements and refinements can be made without departing from the principles of the present application, and these improvements and refinements should also be considered as falling within the protection scope of the present application.

Claims

1. A vehicle chip testing method, characterized by, The method comprises the following steps: acquiring a to-be-tested function of a target chip and circuit design information of a target evaluation board, wherein the circuit design information at least comprises all test points and device bit numbers of the target chip; analyzing the circuit design information to obtain port information of the target chip; inputting the port information into an adaptive fixture and an adjustable probe group to adjust the type, connection position and direction of a connector, and the test point and depth of probe; in response to the adjustment of the adaptive fixture and the adjustable probe group being completed, adjusting the port information based on the to-be-tested function to perform testing, and generating an initial test result; summarizing a plurality of initial test results to obtain a target test result, wherein the target test result is used to determine whether the target chip passes the test; wherein adjusting the port information based on the to-be-tested function to perform testing and generating an initial test result comprises: in response to the to-be-tested function being a bus bias function of the target chip, adjusting a first port of the target chip to be suspended, a second port to be grounded, a third port to be connected to a first voltage source, and a fourth port to be connected to a second voltage source, wherein the fourth port is used to connect a low-voltage line of the target chip, and the voltage provided by the second voltage source is higher than the voltage provided by the first voltage source; controlling the second voltage source to increase to a preset voltage threshold value at a first preset voltage step, and obtaining output state information of the target chip; and generating the initial test result based on the output state information; adjusting the port information based on the to-be-tested function to perform testing and generating an initial test result further comprises: in response to the to-be-tested function being an over-temperature protection function of the target chip, adjusting a first port of the target chip to be suspended, a second port to be grounded, and a target resistance connected between a third port and a fourth port; controlling the temperature of the target chip to increase based on a preset temperature step; in response to a difference between a first level and a second level reaching a preset threshold value, obtaining current temperature information, wherein the first level is used to represent the output level of the third port, and the second level is used to represent the output level of the fourth port; and generating the initial test result based on the current temperature information.

2. The vehicle chip testing method according to claim 1, characterized by, adjusting the port information based on the to-be-tested function to perform testing and generating an initial test result comprises: in response to the to-be-tested function being a current output function of the target chip, adjusting a first port of the target chip, a second port to be grounded, and a third port connected to a first voltage source, wherein the first port is used to send data of the target chip, the second port is used to control the working mode of the target chip, and the third port is used to connect a high-voltage line of the target chip; in response to the first voltage source providing voltage according to a preset rule, obtaining current information of the third port; generating the initial test result based on the current information.

3. The vehicle chip testing method according to claim 1, characterized by, adjusting the port information based on the to-be-tested function to perform testing and generating an initial test result comprises: In response to the undervoltage function of the target chip being the function to be tested, the target resistor connected between the second port ground, the third port and the fourth port of the target chip is adjusted; The power supply voltage information of the target chip is determined based on the common-mode voltage of the target chip; The initial test results are generated based on the power supply voltage information.

4. The vehicle chip testing method according to claim 1, characterized by, Based on the function to be tested, the port information is adjusted to conduct the test, and the initial test results are generated, including: In response to the fact that the function to be tested is the voltage function of the target chip, the target resistor connected between the second port ground, the third port and the fourth port of the target chip is adjusted; Adjust the voltage at the first port of the target chip; The input voltage threshold of the target chip is determined based on the voltage at the first port; The initial test results are generated based on the input voltage threshold.

5. The vehicle chip testing method according to claim 1, characterized by, The method further includes: The target chip is controlled to be in a preset environmental condition, and, The power supply voltage of the target chip is controlled to a preset voltage.

6. The vehicle chip testing method according to claim 1, characterized by, The target test results are obtained by summarizing the results of multiple initial tests, including: The initial test results are summarized to obtain a summary result. In response to the summary result indicating that the functions to be tested corresponding to multiple initial test results have passed the test, the target test result is determined to be that the target chip has passed the test.

7. A vehicle chip testing device, characterized by include: The acquisition module is used to acquire the test functions of the target chip and the circuit design information of the target evaluation board, wherein the circuit design information includes at least all test points and device reference numbers of the target chip; The parsing module is used to parse the circuit design information to obtain the port information of the target chip; The device is also used to input the port information to the adaptive fixture and adjustable probe group to adjust the plug selection, connection position and direction, and the test point and depth of the probe. The testing module is used to adjust the port information based on the function under test in response to the completion of the adjustment of the adaptive fixture and adjustable probe group, so as to perform the test and generate initial test results. A determining module is used to summarize multiple initial test results to obtain a target test result, wherein the target test result is used to determine whether the target chip passes the test; The test module is further configured to, in response to the bus bias function of the target chip being the function to be tested, adjust the first port of the target chip to be floating, the second port to be grounded, the third port to be connected to the first voltage source, and the fourth port to be connected to the second voltage source, wherein the fourth port is used to connect to the low voltage line of the target chip, and the voltage provided by the second voltage source is higher than the voltage provided by the first voltage source; control the second voltage source to increase to a preset voltage threshold by a first preset voltage step size to obtain the output status information of the target chip; and generate the initial test result based on the output status information. The test module is further configured to, in response to the function to be tested being an over-temperature protection function of the target chip, adjust a first port of the target chip to be left open, a second port of the target chip to be grounded, a third port of the target chip to be connected with a target resistance, and a fourth port of the target chip; control the temperature of the target chip to increase based on a preset temperature step; in response to a difference between a first level and a second level reaching a preset threshold, obtain current temperature information, where the first level is used to represent an output level of the third port, and the second level is used to represent an output level of the fourth port; and generate the initial test result based on the current temperature information.

8. An electronic device, comprising: The computer program is stored in the storage medium and is configured to, when executed, implement the vehicle chip test method according to any one of claims 1 to 6. The computer program is stored in the storage medium and is configured to, when executed, implement the vehicle chip test method according to any one of claims 1 to 6. The computer program is stored in the storage medium and is configured to, when executed, implement the vehicle chip test method according to any one of claims 1 to 6.

9. A non-volatile storage medium, comprising: ​ 10. A computer program product, characterised in that, ​

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