Voltage selection device

Abstract

A voltage selection apparatus includes a control circuit and a selection circuit. The control circuit is used for adjusting the level of a control node according to a power enable signal, a first supply voltage and a second supply voltage. When the first supply voltage is powered on and the second supply voltage is not powered on, the control circuit adjusts a level of the control node to a first level, and when the second supply voltage is powered on, the control circuit adjusts the level of the control node to a second level different from the first level. The selection circuit is configured to output one of the first supply voltage and the second supply voltage, which has a higher level, as an output voltage according to a level of the control node and the second supply voltage.

Description

Technical Field

[0001] The present disclosure relates to a voltage selection device, and more particularly to a voltage selection device that allows system operation to proceed without interruption. Background Art

[0002] In some applications, electronic devices can operate in high voltage mode and low voltage mode, thereby reducing power consumption in low voltage mode. In order to switch between high voltage mode and low voltage mode, the electronic device usually has a voltage selection circuit to select the supply voltage with the highest level for operation. However, in the current technology, the voltage selection circuit usually requires the use of an additional comparator, resulting in additional power consumption. In addition, some systems need to interrupt the original operation during the switching process between high voltage mode and low voltage mode to avoid errors in circuit operation. As a result, these systems cannot continuously perform the original operation. Summary of the invention

[0003] In some embodiments, one of the purposes of the present disclosure is (but not limited to) to provide a voltage selection device that allows system operation to proceed without interruption, so as to improve the deficiencies of the prior art.

[0004] In some embodiments, a voltage selection device includes a control circuit and a selection circuit. The control circuit is used to adjust the level of the control node according to a power enable signal, a first supply voltage, and a second supply voltage. When the first supply voltage is powered on and the second supply voltage is not powered on, the control circuit adjusts the level of the control node to a first level, and when the second supply voltage is powered on, the control circuit adjusts the level of the control node to a second level different from the first level. The selection circuit is used to output the higher level of the first supply voltage and the second supply voltage as an output voltage according to the level of the control node and the second supply voltage.

[0005] The features, examples and effects of the present disclosure are described in detail below with reference to the drawings for preferred embodiments. BRIEF DESCRIPTION OF THE DRAWINGS

[0006] Figure 1 is a schematic diagram of an integrated circuit according to some embodiments of the present disclosure;

[0007] Figure 2 According to some embodiments of the present disclosure Figure 1 A schematic diagram of a voltage selection device in;

[0008] Figure 3A According to some embodiments of the present disclosure Figure 2 A schematic diagram of a voltage selection device operating in a first situation;

[0009] Figure 3BAccording to some embodiments of the present disclosure Figure 2 A schematic diagram of a voltage selection device operating in a second situation; and

[0010] Figure 3C According to some embodiments of the present disclosure Figure 2 Schematic diagram of the voltage selection device operating in the third situation. DETAILED DESCRIPTION

[0011] All words used herein have their usual meanings. The definitions of the above words in commonly used dictionaries, including the use of any of the words discussed herein in the content of this disclosure, are merely illustrative and should not limit the scope and meaning of this disclosure. Similarly, this disclosure is not limited to the various embodiments shown in this specification.

[0012] As used herein, "coupled" or "connected" may refer to two or more components making physical or electrical contact directly or indirectly, or two or more components operating or acting on each other. As used herein, the term "circuit" may refer to a device that is composed of at least one transistor and / or at least one active and passive component connected in a certain manner to process signals.

[0013] As used herein, the term "and / or" includes any combination of one or more of the listed associated items. In this article, the words first, second, and third are used to describe and distinguish each component. Therefore, the first component in this article can also be referred to as the second component without departing from the original intention of the present disclosure. For ease of understanding, similar components in each figure will be designated with the same reference numerals.

[0014] Figure 1 1 is a schematic diagram of an integrated circuit 100 drawn according to some embodiments of the present disclosure. In some embodiments, the integrated circuit 100 may be various chips that can operate in a high voltage mode or a low voltage mode. For example, the integrated circuit 100 may include a low-dropout regulator circuit 110, a voltage selection device 120, a control logic circuit 130, and a clock generation circuit 140. The low-dropout regulator circuit 110 can generate a driving voltage VD according to a supply voltage VDD1 and a supply voltage VDD2, wherein the low-dropout regulator circuit 110 includes a P-type transistor P1 and a P-type transistor P2. The P-type transistor P1 is selectively turned on according to an enable signal EN1 to transmit the supply voltage VDD1 to other circuits in the low-dropout regulator circuit 110 (for example, Figure 1The N-type transistors, other resistors and / or amplifier circuits in the low-dropout regulator circuit 110 are used to generate the driving voltage VD. The P-type transistor P2 is selectively turned on according to the enable signal EN2 to transmit the supply voltage VDD2 to other circuit components in the low-dropout regulator circuit 110 to generate the driving voltage VD. The bases of both the P-type transistors P1 and P2 receive the output voltage VO from the voltage selection device 120.

[0015] The voltage selection device 120 selectively outputs the one of the supply voltage VDD1 and the supply voltage VDD2 that currently has a higher level as the output voltage VO according to the power enable signal PEN, the supply voltage VDD1, and the supply voltage VDD2. In detail, if both the supply voltage VDD1 and the supply voltage VDD2 have been powered on (i.e., the power supply that provides the supply voltage VDD1 and the supply voltage VDD2 can be in a stable state to generate the supply voltage VDD1 and the supply voltage VDD2 with a default target level), the supply voltage VDD1 is lower than the supply voltage VDD2. For example, the default target level of the supply voltage VDD1 may be, but not limited to, 1.35 volts, and the default target level of the supply voltage VDD2 may be, but not limited to, 1.5 volts. Therefore, under the condition that both the supply voltage VDD1 and the supply voltage VDD2 have been powered on, the current level of the supply voltage VDD1 (e.g., 1.35 volts) is lower than the current level of the supply voltage VDD2 (e.g., 1.5 volts). When the supply voltage VDD1 is powered on and the supply voltage VDD2 is not powered on (at this time, the supply voltage VDD2 may be 0 volts or has not yet stabilized at the default target level), the integrated circuit 100 operates in a low voltage mode. Under this condition, the voltage selection device 120 outputs the supply voltage VDD1 as the output voltage VO. Alternatively, when the supply voltage VDD2 is powered on, the integrated circuit 100 operates in a high voltage mode. Under this condition, the voltage selection device 120 outputs the supply voltage VDD2 as the output voltage VO. Through the above operation, during the power-on process of the supply voltage VDD1 and the supply voltage VDD2, the voltage selection device 120 can select the one of the supply voltage VDD1 and the supply voltage VDD2 that currently has a higher level as the output voltage VO, so as to provide the correct base bias voltage for the P-type transistor P1 and the P-type transistor P2. The detailed setting method of the voltage selection device 120 will be referred to later. Figure 2 illustrate.

[0016] The control logic circuit 130 is powered by the output voltage VO and outputs an enable signal EN1 or an enable signal EN2 according to the level of the output voltage VO. For example, when the level of the output voltage VO is the same as the level of the supply voltage VDD1, it means that the supply voltage VDD1 has been powered on and the supply voltage VDD2 has not been powered on. Under this condition, the control logic circuit 130 outputs an enable signal EN1 with a default logic value (in this case, a logic value of 0). In response to this enable signal EN1, the P-type transistor P1 is turned on to transmit the supply voltage VDD1 to other circuit components in the low-dropout regulator circuit 110, so that the low-dropout regulator circuit 110 can continuously generate the driving voltage VD. Alternatively, when the level of the output voltage VO is the same as the level of the supply voltage VDD2, it means that the supply voltage VDD2 has been powered on. Under this condition, the control logic circuit 130 outputs an enable signal EN2 with a default logic value (in this case, a logic value of 0). In response to the enable signal EN2, the P-type transistor P2 is turned on to transmit the supply voltage VDD2 to other circuit components in the low-dropout regulator circuit 110, so that the low-dropout regulator circuit 110 can continuously generate the driving voltage VD. In some embodiments, the control logic circuit 130 can be implemented by a digital logic circuit having the function of determining the level of the output voltage VO.

[0017] The clock generation circuit 140 is powered by the driving voltage VD to generate the clock signal CLK. By providing the voltage selection device 120, it can be ensured that the low voltage dropout regulator circuit 110 will not make errors in the switching process between the supply voltage VDD1 and the supply voltage VDD2 (i.e., the process of switching from one of the high voltage mode and the low voltage mode to the other of the high voltage mode and the low voltage mode), thereby continuously providing the driving voltage VD with a suitable level. In this way, the clock generation circuit 140 can continuously generate the clock signal CLK during the above-mentioned voltage switching process to continuously provide a usable reference timing to other circuits in the system (not shown). In some embodiments, the clock generation circuit 140 may include, but is not limited to, a phase-locked loop circuit.

[0018] Figure 1 Only clock generation is used as an example to illustrate an application of the voltage selection device 120, but the disclosure is not limited thereto. Various applications that can utilize the voltage selection device 120 to operate in high voltage mode and low voltage mode are all within the scope of the disclosure.

[0019] Figure 2 According to some embodiments of the present disclosure Figure 1Schematic diagram of the voltage selection device 120 in FIG. In some embodiments, the voltage selection device 120 includes a control circuit 220 and a selection circuit 240. The control circuit 220 is used to adjust the level of the control node NC according to the power enable signal PEN, the supply voltage VDD1 and the supply voltage VDD2. For example, when the supply voltage VDD1 is powered on and the supply voltage VDD2 is not powered on, the control circuit 220 may adjust the control node NC to a first level. Alternatively, when the supply voltage VDD2 is powered on, regardless of whether the supply voltage VDD1 is powered on, the control circuit 220 may adjust the control node NC to a second level, wherein the second level is different from the first level. For example, the second level may be lower than the first level.

[0020] In detail, the control circuit 220 includes a transistor N1, a transistor P3, a transistor N2, and a resistor R. The first end (e.g., drain) and the control end (e.g., gate) of the transistor N1 receive the supply voltage VDD1, and the second end (e.g., source) of the transistor N1 is coupled to the control node NC. The first end (e.g., source) of the transistor P3 receives the supply voltage VDD1, the second end (e.g., drain) of the transistor P3 is coupled to the control node NC, and the control end (e.g., gate) of the transistor P3 receives the supply voltage VDD2. The resistor R is coupled to the control node NC. The first end of the transistor N2 is coupled to the control node NC via the resistor R, the second end of the transistor N2 is coupled to the ground, and the control end of the transistor N2 receives the power enable signal PEN. By the above configuration, the transistor N1 can be selectively turned on according to the supply voltage VDD1 to adjust the level of the control node NC. The transistor P3 can be selectively turned on according to the supply voltage VDD1 and the supply voltage VDD2 to adjust the level of the control node NC. Similarly, transistor N2 can be selectively turned on according to the power enable signal PEN to adjust the level of the control node NC. In some embodiments, when at least one of the supply voltage VDD1 and / or the supply voltage VDD2 is powered on, the power enable signal PEN has a high level to turn on transistor N2. In the above-mentioned configuration, transistor N1 and transistor N2 have the same conductivity type, and transistor N1 and transistor P3 have different types. For example, each of transistor N1 and transistor N2 is an N-type transistor, and transistor P3 is a P-type transistor, but the present disclosure is not limited thereto. The detailed operation of the control circuit 220 will be referred to later. FIG. 3A to FIG. 3C illustrate.

[0021] The selection circuit 240 is used to output the higher level of the supply voltage VDD1 and the supply voltage VDD2 as the output voltage VO according to the level of the control node NC and the supply voltage VDD2. In some embodiments, the selection circuit 240 can determine whether to output the supply voltage VDD1 as the output voltage VO according to the supply voltage VDD2, and determine whether to output the supply voltage VDD2 as the output voltage VO according to the level of the control node NC. In detail, the selection circuit 240 includes a transistor P4 and a transistor P5. The first end of the transistor P4 receives the supply voltage VDD1, the second end of the transistor P4 generates the output voltage VO, and the control end of the transistor P4 receives the supply voltage VDD2. The first end of the transistor P5 is coupled to the second end of the transistor P4 and is used to output the output voltage VO, the second end of the transistor P5 receives the supply voltage VDD2, and the control end of the transistor P5 is coupled to the control node NC. By the above configuration, transistor P4 can be selectively turned on according to supply voltage VDD2 to output supply voltage VDD1 as output voltage VO, and transistor P5 can be selectively turned on according to the level of control node NC to output supply voltage VDD2 as output voltage VO. In the above configuration, transistor P4 and transistor P5 have the same conductivity type. For example, each of transistor P4 and transistor P5 is a P-type transistor, but the present disclosure is not limited thereto. The detailed operation of selection circuit 240 will be referred to later. FIG. 3A to FIG. 3C illustrate.

[0022] Figure 3A According to some embodiments of the present disclosure Figure 2 The voltage selection device 120 is a schematic diagram of the operation in the first situation. Figure 3A In the first scenario shown, both the supply voltage VDD1 and the supply voltage VDD2 have been powered on. Under this condition, the power enable signal PEN is a logic value 1, so that the transistor N2 is turned on. On the other hand, in response to the powered supply voltage VDD1 and the supply voltage VDD2, the transistor N1 is turned on and the transistor P3 is not turned on (indicated by the dotted symbol X). In some embodiments, the resistance value of the resistor R is set to a lower resistance value so that the transistor N1 and the transistor P2 can pull the level of the control node NC down to a low level (for example, the aforementioned second level). In response to the level of this control node NC and the powered supply voltage VDD2, the transistor P5 is turned on and the supply voltage VDD2 is output as the output voltage VO. In addition, in response to the powered supply voltage VDD1 and the supply voltage VDD2, the transistor P4 is not turned on.

[0023] Figure 3B According to some embodiments of the present disclosure Figure 2 The voltage selection device 120 is a schematic diagram of operating in the second situation. Figure 3BIn the second scenario shown, the supply voltage VDD1 is not powered on (e.g., 0 volts) and only the supply voltage VDD2 is powered on. Under this condition, the power enable signal PEN is a logic value 1, so that the transistor N2 is turned on. In response to the unpowered supply voltage VDD1 and the powered supply voltage VDD2, the transistor N1 and the transistor P3 are not turned on. Under this condition, the level of the control node NC will be pulled down to a low level (e.g., equal to or lower than the aforementioned second level) via the transistor N2. In response to the level of this control node NC and the powered supply voltage VDD2, the transistor P5 is turned on and the supply voltage VDD2 is output as the output voltage VO. In addition, in response to the supply voltage VDD2 and the unpowered supply voltage VDD1, the transistor P4 is not turned on.

[0024] Figure 3C According to some embodiments of the present disclosure Figure 2 The voltage selection device 120 is a schematic diagram of operating in the third situation. Figure 3C In the third scenario shown, the supply voltage VDD2 is not powered on (e.g., 0 volts) and only the supply voltage VDD1 is powered on. Under this condition, the power enable signal PEN is a logic value 1, so that the transistor N2 is turned on. In response to the unpowered supply voltage VDD2 and the powered supply voltage VDD1, the transistor N1 and the transistor P3 are turned on. In other words, the transistor N1, the transistor N2 and the transistor P3 are all turned on under this condition, so that the level of the control node NC can be pulled up to a high level (e.g., the first level mentioned above) through the transistor P3. In response to the level of this control node NC and the unpowered supply voltage VDD2, the transistor P5 is not turned on. In addition, in response to the supply voltage VDD1 and the unpowered supply voltage VDD2, the transistor P4 is turned on and the supply voltage VDD2 is output as the output voltage VO.

[0025] like FIG. 3A to FIG. 3C As shown, in various voltage switching situations, the voltage selection device 120 can select the one with a higher level between the supply voltage VDD1 and / or the supply voltage VDD2 when at least one of the supply voltage VDD1 and / or the supply voltage VDD2 is powered on, and output the one with a higher level as the output voltage VO. Through the above operation, the correct base bias can be continuously provided to the low-dropout regulator circuit 110 during the instantaneous process of voltage switching, so that the clock generation circuit 140 can continuously output the clock signal CLK. In this way, the digital circuit system that uses the clock signal CLK for operation can continue to work without interruption during the voltage switching process.

[0026] In summary, the voltage selection device provided in some embodiments of the present disclosure can automatically select a voltage with a higher level according to the power-on status of multiple supply voltages to continuously provide the correct base bias voltage, thereby avoiding interruption of the system during the switching process of the supply voltage.

[0027] Although the embodiments of the present disclosure are described above, these embodiments are not intended to limit the present disclosure. Ordinary technicians in the technical field may make changes to the technical features of the present disclosure based on the explicit or implicit content of the present disclosure. All these changes may fall within the scope of patent protection sought by the present disclosure. In other words, the scope of patent protection of the present disclosure shall be based on the scope of the patent application defined in this specification.

[0028]

Explanation of symbols

[0029] 100: Integrated Circuits

[0030] 110: Low dropout voltage regulator circuit

[0031] 120: Voltage selection device

[0032] 130: Control logic circuit

[0033] 140: Clock generation circuit

[0034] 220: Control circuit

[0035] 240: Select Circuit

[0036] CLK: Clock signal

[0037] EN1, EN2: Enable signal

[0038] N1, N2, P1~P5: transistors

[0039] NC: Control Node

[0040] PEN: Power enable signal

[0041] R: Resistor

[0042] VD: driving voltage

[0043] VDD1, VDD2: supply voltage

[0044] VO: Output voltage

Claims

1. A voltage selection device, comprising: a control circuit for adjusting a level of a control node according to a power enable signal, a first supply voltage, and a second supply voltage, wherein when the first supply voltage is powered on and the second supply voltage is not powered on, the control circuit adjusts the level of the control node to a first level, and when the second supply voltage is powered on, the control circuit adjusts the level of the control node to a second level different from the first level; as well as The selection circuit is used for outputting one of the first supply voltage and the second supply voltage with a higher level as an output voltage according to the level of the control node and the second supply voltage.

2. The voltage selection device as claimed in claim 1, wherein the control circuit comprises: a first transistor, configured to selectively turn on according to the first supply voltage to adjust the level of the control node; a second transistor, configured to selectively turn on according to the first supply voltage and the second supply voltage to adjust the level of the control node; a resistor coupled to the control node; as well as The third transistor is coupled between the resistor and the ground and is used for selectively conducting according to the power enable signal. 3 . The voltage selection device as claimed in claim 2 , wherein the first terminal and the control terminal of the first transistor receive the first supply voltage, and the second terminal of the first transistor is coupled to the control node. 4 . The voltage selection device as claimed in claim 2 , wherein a first terminal of the second transistor receives the first supply voltage, a second terminal of the second transistor is coupled to the control node, and a control terminal of the second transistor receives the second supply voltage.

5. The voltage selection device as claimed in claim 2, wherein the first transistor and the second transistor have different conductivity types.

6. The voltage selection device as described in claim 2, wherein when the first supply voltage and the second supply voltage are both powered on, the second transistor is not turned on and the first transistor and the third transistor are turned on to pull down the level of the control node so that the selection circuit outputs the second supply voltage as the output voltage, wherein the first supply voltage is lower than the second supply voltage.

7. The voltage selection device as claimed in claim 2, wherein when the second supply voltage is powered on, the first transistor and the second transistor are not turned on and the third transistor is turned on to pull down the level of the control node, so that the selection circuit outputs the second supply voltage as the output voltage.

8. The voltage selection device as claimed in claim 2, wherein when the first supply voltage is powered on and the second supply voltage is not powered on, the first transistor, the second transistor and the third transistor are turned on to pull up the level of the control node, so that the selection circuit outputs the first supply voltage as the output voltage.

9. The voltage selection device as claimed in claim 1, wherein the selection circuit is used to determine whether to output the first supply voltage as the output voltage according to the second supply voltage, and to determine whether to output the second supply voltage as the output voltage according to the level of the control node.

10. The voltage selection device as claimed in claim 1, wherein the selection circuit comprises: a first transistor, configured to be selectively turned on according to the second supply voltage to output the first supply voltage as the output voltage; as well as The second transistor is used for selectively turning on according to the level of the control node to output the second supply voltage as the output voltage.

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