Accurate calibration method for radio frequency matcher circuit model

Abstract

The invention belongs to the field of radio frequency matchers, and particularly relates to an accurate calibration method of a radio frequency matcher circuit model. The method comprises the following steps: firstly, establishing an actual equivalent circuit model on the basis of a theoretical radio frequency matcher circuit; based on the model, the parasitic inductance in the circuit is quantized by sequentially calibrating the input interconnection line parasitic inductance L2, the equivalent series inductance LESL1, the fixed inductance L1, the output interconnection line parasitic inductance L3 and the equivalent series inductance LESL2, and the quantized circuit model enables the impedance detector in the radio frequency matcher to accurately detect the real-time impedance. And the design difficulty of the impedance detector of the radio frequency matcher is reduced.

Description

Technical Field

[0001] The invention relates to a circuit model calibration method, in particular to an accurate calibration method for a radio frequency matching circuit model. Background Art

[0002] RF Power Matcher, also known as RF Load Matcher or RF Matching Network, is a device used to match the impedance between RF power supply and load. Its main function is to ensure that the RF power supply can effectively transfer energy to the load to provide maximum power transmission and system efficiency.

[0003] The RF power matcher changes the impedance matching between the power supply and the load to achieve optimal energy transmission by adjusting its internal electrical components, such as inductors, capacitors, and transformers. Its working principle is based on the concept of impedance matching, and the parameters of the matching network are adjusted according to the impedance characteristics of the power supply and load to enable it to achieve optimal power transmission and reflection loss.

[0004] The matching algorithm and accurate modeling of the circuit model in the RF power matcher are the core technologies of the RF matcher. The accuracy of the algorithm and model is crucial to the matching speed, matching accuracy, and service life of the capacitor of the RF matcher. Only an accurate circuit model combined with a suitable algorithm can achieve fast and accurate matching.

[0005] In the prior art, the inductance after tuning the capacitor is usually equivalent to the cavity load, and the capacitance to be adjusted is calculated and adjusted using a theoretical circuit model. Although this method can eventually achieve a matching effect, the error in the circuit model leads to inaccurate calculation of the capacitance, which cannot reduce the number of adjustments and prolongs the tuning time. The capacitance adjustment process may experience back-and-forth oscillations, which affects the service life of the capacitor. Summary of the invention

[0006] The purpose of the present invention is to solve the technical problems that the existing calibration method, due to the error of the circuit model, leads to inaccurate calculation of capacitance, cannot reduce the number of adjustments, prolongs the tuning time, and the capacitance adjustment process may have back-and-forth oscillation behavior, which affects the service life of the capacitor, and to provide a precise calibration method for the RF matcher circuit model.

[0007] To achieve the above purpose, the technical solution adopted by the present invention is:

[0008] A precise calibration method for a radio frequency matching circuit model comprises the following steps:

[0009] Step 1: Establish a practical equivalent circuit model based on the theoretical RF matching circuit;

[0010] The actual equivalent circuit model includes the input interconnect parasitic inductance L in series. 2 , equivalent series inductance L ESL2 , tuning capacitor C 2 , fixed inductance L 1 and the output interconnect parasitic inductance L 3 , and the equivalent series inductance L connected in series ESL1 and tuning capacitor C 1 ; Equivalent series inductance L ESL1 One end is connected to the parasitic inductance L of the input interconnection line 2 With the equivalent series inductance L ESL2 Between, the tuning capacitor C 1 One end of the ground;

[0011] Step 2: Calibrate the input interconnect parasitic inductance L 2 ;

[0012] Step 2.1: Input interconnect parasitic inductance L 2 One end of the power meter is connected to the output interconnect parasitic inductance L 3 One end is connected to the load Z L ;

[0013] Step 2.2: Measure the parasitic inductance L of the input interconnection line using a power meter 2 The impedance at one end is denoted by Z 1 ;

[0014] Step 2.3: Adjust the tuning capacitor C 1 The capacitance after adjustment is recorded as C 1 ′, the parasitic inductance L of the input interconnection line is measured by a power meter 2 The impedance at one end is denoted by Z 1 ′;

[0015] Step 2.4: Based on impedance Z 1 and impedance Z 1 ′, calculate the parasitic inductance L of the input interconnection line 2 The value of the input interconnect parasitic inductance L 2 Calibration of

[0016] Step 3: Based on the tuning capacitor C 1 Calculate the equivalent series inductance L by adjusting the capacitance value before and after adjustment ESL1 , to achieve the equivalent series inductance L ESL1 Calibration of

[0017] Step 4: Calibrate the fixed inductor L 1and the output interconnect parasitic inductance L 3 ;

[0018] Step 4.1: Input interconnect parasitic inductance L 2 One end is connected to the load Z L , the parasitic inductance L of the output interconnection line 3 One end of the power meter is connected;

[0019] Step 4.2: Measure the parasitic inductance L of the output interconnection line using a power meter 3 The impedance at one end is denoted by Z P ;

[0020] Step 4.3: Adjust the tuning capacitor C twice 2 The capacitance values ​​after the two adjustments are recorded as C 2 ′ and C 2 ", and at the same time measure the corresponding output interconnect parasitic inductance L by a power meter 3 The impedance at one end is denoted as Z′ P and Z" P ;

[0021] Step 4.4: Based on impedance Z P , impedance Z′ P and Z" P , calculate the fixed inductance L 1 and the output interconnect parasitic inductance L 3 The combination of values ​​​​to achieve a fixed inductance L 1 and the output interconnect parasitic inductance L 3 Calibration of

[0022] Step 5: Based on the tuning capacitor C 2 The capacitance value before adjustment and the capacitance value after two adjustments are used to calculate the equivalent series inductance L ESL2 , to achieve the equivalent series inductance L ESL2 The calibration of the RF matching circuit model is finally completed.

[0023] Furthermore, in step 2.1 and step 4.1, the load Z L The resistance is 50Ω;

[0024] definition:

[0025] In step 2.2, the impedance Z 1 The expression of Z is: 1 =a+bj;

[0026] In step 2.3, the impedance Z 1 The expression of ′ is: 1 ′=c+dj;

[0027] In step 4.1, the impedance ZP The expression of Z is: p =e+fj;

[0028] In step 4.2, the impedance Z′ P and Z" P The expressions of Z′ are: P =g+hj,Z" P = k + lj;

[0029] Then, in step 2.4, the following formula is used to calculate the parasitic inductance L of the input interconnection line: 2 The value of:

[0030]

[0031] In step 3, the calibration equivalent series inductance L is calculated using the following formula: ESL1 :

[0032] L ESL1 =pC 1 +q;

[0033] In step 4.4, the fixed inductance L is calculated using the following formula: 1 and the output interconnect parasitic inductance L 3 The combined value of:

[0034]

[0035] In step 5, the calibration equivalent series inductance L is calculated using the following formula: ESL2 :

[0036] L ESL2 =sC 2 +t;

[0037] Where: L 1 For a fixed inductor L 1 Inductance value; L 2 is the parasitic inductance of the input interconnection line L 2 Inductance value; L 3 is the parasitic inductance of the output interconnection line L 3 Inductance value; C 1 is the tuning capacitor C 1 Capacitance value; C 2 is the tuning capacitor C 2 Capacitance value; L ESL1 is the equivalent series inductance L ESL1 Inductance value; L ESL2 is the equivalent series inductance L ESL2 The inductance value; ω is the angular frequency; a and b are the impedance Z 1 The real and imaginary parts of the impedance Z 1′; e and f are the impedance Z P The real and imaginary parts of the impedance Z′ are g and h, respectively. P The real and imaginary parts of the impedance Z" P The real and imaginary parts of

[0038]

[0039]

[0040] The present invention quantifies the parasitic inductance in the circuit by combining step-by-step circuit analysis with standard instrument measurement, achieving the following effects:

[0041] 1. The circuit model is more accurate and the value of each component is quantified;

[0042] 2. The quantized circuit model enables the impedance detector in the RF matching device to accurately detect the real-time impedance, which reduces the design difficulty of the impedance detector of the RF matching device;

[0043] 3. Strong portability. This method can be applied to model calibration in most of the tuning circuits of this type.

[0044] 4. Under the accurate circuit model, an efficient and fast matching algorithm can be used to match the capacitors in one step, reducing the matching time and increasing the service life of the capacitors. BRIEF DESCRIPTION OF THE DRAWINGS

[0045] Figure 1 It is a theoretical circuit model diagram of the existing RF matching device;

[0046] Figure 2 is a diagram of an actual circuit model in an embodiment of the present invention;

[0047] Figure 3 is a diagram of an actual equivalent circuit model in an embodiment of the present invention;

[0048] Figure 4 is a first calibration circuit diagram in an embodiment of the present invention;

[0049] Figure 5 is a second calibration circuit diagram in an embodiment of the present invention. DETAILED DESCRIPTION

[0050] To make the purpose, advantages and features of the present invention clearer, the following is a further detailed description of a precise calibration method of a radio frequency matching circuit model proposed by the present invention in conjunction with the accompanying drawings and specific embodiments. The advantages and features of the present invention will be clearer according to the following specific implementation methods.

[0051] like Figure 1As shown in the figure, it is the theoretical circuit model of a general RF matching device, which consists of two adjustable vacuum capacitors C 1 , C 2 and a fixed inductor L 1 Composition. Since the RF matcher is used between the RF power supply and process chamber of semiconductor equipment such as etcher, PVD, CVD, etc., it plays a real-time matching role to make the power of the RF power supply output to the process chamber stably, so as to achieve the purpose of high-quality completion of semiconductor processes such as etching, degumming, and coating. Since the impedance characteristics of the process chamber will change with factors such as the gas pressure, plasma concentration, and gas ignition in the chamber, the role of the matcher is to adjust in real time to stabilize the output impedance of the power supply at 50Ω and reduce the reflection of the input power.

[0052] However, the actual situation is that the capacitor elements, inductor elements, and the interconnection lines between the impedance detection device and the elements cause these devices to introduce additional parasitic inductance and equivalent series inductance (ESL). If these additional factors are not considered, the adjustment amount fed back to the tuning capacitor by the impedance detection device will be inaccurate, causing the matching effect of the matcher to deteriorate or even fail to match.

[0053] To solve the above problem, this embodiment adopts a precise calibration method of the RF matching circuit model, which is specifically as follows:

[0054] like Figure 2 As shown in the figure, a new practical model is created based on the theoretical RF matching circuit, where L 2 , L 3 They are the parasitic inductance of the input interconnection line and the parasitic inductance of the output interconnection line. They are always in series in the circuit and their values ​​do not change. Therefore, only L needs to be calibrated. 2 +L 3 That's it; L ESL1 and L ESL2 They are the equivalent series inductance on the tuning capacitor. Generally, the value of the equivalent series inductance changes linearly with the capacitance value.

[0055] like Figure 3 As shown, an actual equivalent circuit model is established based on the actual model.

[0056] The actual equivalent circuit model includes the input interconnect parasitic inductance L in series. 2 , equivalent series inductance L ESL2 , tuning capacitor C 2 , fixed inductance L 1 and the output interconnect parasitic inductance L 3 , and the equivalent series inductance L connected in series ESL1 and tuning capacitor C 1 ; Equivalent series inductance L ESL1One end is connected to the parasitic inductance L of the input interconnection line 2 With the equivalent series inductance L ESL2 Between, the tuning capacitor C 1 One end is grounded.

[0057] Due to C 1 With L ESL1 Connect in series, and make it equivalent to C e1 ,but:

[0058]

[0059] like Figure 4 As shown, the parasitic inductance L of the input interconnection line 2 One end of the power meter is connected to the output interconnect parasitic inductance L 3 One end is connected to the load Z L .

[0060] Assume that at time 1, the parasitic inductance L of the input interconnection line is measured by a power meter. 2 The impedance at one end is denoted by Z 1 , Z 1 =a+b·j, then

[0061] Z 2 =a+(b-ωL)·jFormula 2

[0062] Admittance

[0063]

[0064] Fixed C 2 Do not move, set

[0065]

[0066] but

[0067] Y 2 =m+(n+ωC e1 )·j type 5

[0068] Generally, the equivalent series inductance L ESL1 It changes linearly with the capacitance value, so we set

[0069] L ESL1 =pC 1 +q formula 6

[0070] but

[0071] but

[0072]

[0073] but

[0074]

[0075] The required unknown is L 2 , p, q.

[0076] Adjust the tuning capacitor C 1 The capacitance after adjustment is recorded as C 1 ′, the parasitic inductance L of the input interconnection line is measured by a power meter 2 The impedance at one end is denoted by Z 1 ′,Z 1 ′=c+djFormula 11

[0077] but

[0078]

[0079] Due to C 1 Changes only change Y 2 The imaginary part of

[0080]

[0081] Solved

[0082]

[0083] According to equation 9 and equation 15, let

[0084] but

[0085]

[0086] Solved

[0087] p and q also contain n as an unknown quantity.

[0088] According to the above formula 6, based on the tuning capacitor C 1 The capacitance value before and after adjustment can be used to calculate the calibrated equivalent series inductance L ESL1 , to calibrate the equivalent series inductance L ESL1 calibration.

[0089] Next, calibrate the fixed inductance L 1 , output interconnect parasitic inductance L 3 and equivalent series inductance L ESL2 .

[0090] like Figure 5 As shown, the parasitic inductance L of the input interconnection line 2 One end is connected to the load Z L , the parasitic inductance L of the output interconnection line 3 Connect one end of the power meter to the power meter.

[0091] Measure the output interconnect parasitic inductance L using a power meter 3 The impedance at one end is denoted by Z P ,

[0092] Z P =e+f·j;

[0093] set up

[0094] L ESL2 =sC 2 +t type 18

[0095]

[0096] Adjust C 2 The capacitance after adjustment is C 2 ',remember

[0097] Z′ P =g+hj formula 20

[0098] Then there is

[0099]

[0100] Combining equation 18 and equation 21, we can get

[0101]

[0102] Adjust C again 2 The capacitance after adjustment is C″ 2 ,remember

[0103] Z" P =k+lj Formula 23

[0104] The same will happen

[0105]

[0106] By combining equation 22 and equation 24, we can immediately get s and t.

[0107]

[0108] Solved

[0109] Combining equation 4, equation 19, equation 22, equation 24, and equation 26, we get

[0110]

[0111] At this point, all unknown parameters have been solved.

[0112] Where: L 1For a fixed inductor L 1 Inductance value; L 2 is the parasitic inductance of the input interconnection line L 2 Inductance value; L 3 is the parasitic inductance of the output interconnection line L 3 Inductance value; C 1 is the tuning capacitor C 1 Capacitance value; C 2 is the tuning capacitor C 2 Capacitance value; L ESL1 is the equivalent series inductance L ESL1 Inductance value; L ESL2 is the equivalent series inductance L ESL2 The inductance value; ω is the angular frequency; a and b are the impedance Z 1 The real and imaginary parts of the impedance Z 1 ′; e and f are the impedance Z P The real and imaginary parts of the impedance Z′ are g and h, respectively. P The real and imaginary parts of the impedance Z" P The real and imaginary parts of .

[0113] According to the above formula 18, based on the tuning capacitor C 2 The capacitance value before adjustment and the capacitance value after two adjustments are used to calculate the calibration equivalent series inductance L. ESL2 , to calibrate the equivalent series inductance L ESL2 The calibration of the RF matching circuit model is finally completed.

[0114] After the parasitic inductance and equivalent series inductance are accurately calculated, the matching algorithm can accurately calculate the matching capacitance C according to the load changes during the operation of the matching device. 1 and C 2 The adjustment amount can reduce the number of matching iterations and increase the service life of the vacuum capacitor.

Claims

1. A method for accurately calibrating a radio frequency matching circuit model, characterized in that: The following steps are involved: Step 1: Establish a practical equivalent circuit model based on the theoretical RF matching circuit; The actual equivalent circuit model includes an input interconnection line parasitic inductance L2, an equivalent series inductance L ESL2 , tuning capacitor C2, fixed inductor L1 and output interconnect parasitic inductance L3, and the equivalent series inductor L connected in series in sequence ESL1 and tuning capacitor C1; the equivalent series inductor L ESL1 One end is connected to the input interconnect parasitic inductance L2 and the equivalent series inductance L ESL2 One end of the tuning capacitor C1 is grounded; Step 2, calibrating the parasitic inductance L2 of the input interconnection line; Step 2.

1. Connect a power meter to one end of the parasitic inductance L2 of the input interconnection line, and connect a load Z to one end of the parasitic inductance L3 of the output interconnection line. L ; Step 2.2, measure the impedance at one end of the parasitic inductance L2 of the input interconnection line by a power meter, denoted as Z1; Step 2.3, adjust the capacitance of the tuning capacitor C1, the adjusted capacitance is recorded as C'1, and measure the impedance of one end of the parasitic inductance L2 of the input interconnection line by a power meter, recorded as Z'1; Step 2.4, based on the impedance Z1 and the impedance Z'1, the value of the parasitic inductance L2 of the input interconnection line is calculated to achieve calibration of the parasitic inductance L2 of the input interconnection line; Step 3: Calculate the equivalent series inductance L based on the capacitance value of the tuning capacitor C1 before and after adjustment. ESL1 , to achieve the equivalent series inductance L ESL1 Calibration of Step 4, calibrating the fixed inductor L1 and the output interconnect parasitic inductor L3; Step 4.

1. Connect the load Z at one end of the parasitic inductance L2 of the input interconnection line. L , connect a power meter to one end of the parasitic inductance L3 of the output interconnection line; Step 4.2: Use a power meter to measure the impedance at one end of the parasitic inductance L3 of the output interconnection line, denoted as Z P ; Step 4.3: Adjust the capacitance of the tuning capacitor C2 twice, and record the capacitance after the two adjustments as C'2 and C"2 respectively. At the same time, measure the impedance of the corresponding output interconnect parasitic inductance L3 at one end by the power meter, and record it as Z' P and Z" P ; Step 4.4: Based on impedance Z p , impedance Z' P and Z" P , calculating the combined value of the fixed inductor L1 and the parasitic inductor L3 of the output interconnection line, and realizing the calibration of the fixed inductor L1 and the parasitic inductor L3 of the output interconnection line; Step 5: Calculate the equivalent series inductance L based on the capacitance of the tuning capacitor C2 before adjustment and after two adjustments. ESL2 , to achieve the equivalent series inductance L ESL2 The calibration of the RF matching circuit model is finally completed.

2. The method for accurately calibrating a radio frequency matching circuit model according to claim 1, characterized in that: In step 2.1 and step 4.1, the load Z L The resistance is 50Ω; definition: In step 2.2, the expression of impedance Z1 is: Z1 = a + bj; In step 2.3, the expression of impedance Z'1 is: Z'1 = c + dj; In step 4.1, the impedance Z P The expression of Z is: p =e+fj; In step 4.2, the impedance Z' P and Z" P The expressions are: Z' P =g+hj,Z" P = k + lj; Then, in step 2.4, the value of the parasitic inductance L2 of the input interconnection line is calculated using the following formula: In step 3, the calibration equivalent series inductance L is calculated using the following formula: ESL1 : In step 4.4, the combined value of the fixed inductance L1 and the output interconnect parasitic inductance L3 is calculated using the following formula: In step 5, the calibration equivalent series inductance L is calculated using the following formula: ESL2 : L ESL2 =sC2+t; Where: L1 is the inductance of the fixed inductor L1; L2 is the inductance of the input interconnect parasitic inductor L2; L3 is the inductance of the output interconnect parasitic inductor L3; C1 is the capacitance of the tuning capacitor C1; C2 is the capacitance of the tuning capacitor C2; L ESL1 is the equivalent series inductance L ESL1 Inductance value; L ESL2 is the equivalent series inductance L ESL2 The inductance value; ω is the angular frequency; a and b are the real and imaginary parts of the impedance Z1; c and d are the real and imaginary parts of the impedance Z'1; e and f are the real and imaginary parts of the impedance Z P The real and imaginary parts of the impedance Z' P The real and imaginary parts of the impedance Z" P The real and imaginary parts of .

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