Display driving circuit and driving method thereof

Abstract

The invention discloses a display driving circuit and a driving method thereof, the display driving circuit comprises M multiplexers, each multiplexer comprises N output channels, each output channel is provided with a corresponding control switch, and the N output channels of at least one multiplexer are connected with pixels of the same color; the X output channels can be independently controlled, and when the output signals of the X output channels of the multiplexer are the same, the control switches corresponding to the X output channels are kept in a conducting state; wherein M is greater than or equal to 1 and is an integer; n > = 2 and N is an integer; n > = X > = 2, and X is an integer. The display driving circuit is arranged and driven in such a manner, so that the switching frequency of the MUX can be greatly reduced, the power consumption of the display module is greatly reduced, and the technical effect of saving power is achieved.

Description

Technical Field

[0001] The present invention relates to the field of display driving, and in particular to a display driving circuit and a driving method thereof. Background Art

[0002] Common display devices such as televisions, mobile phones, computers, cameras, wearable devices, etc. usually use display screens, such as liquid crystal displays (LCDs), organic electroluminescent displays (OLEDs), etc. The display screen is provided with pixels arranged in an array, and image display can be realized by controlling multiple pixels of the display screen through a driver IC.

[0003] However, considering the routing, cost, IC conduction requirements, etc., the commonly used multiplexer (MUX) design, from MUX1:3 and its variant MUX2:6, to MUX1:2 or MUX1:6 / 1:9 / 1:12..., MUX, multiplexing is becoming more and more complex, occupying a relatively large area of ​​data drive, and because the MUX function is to share the output of a channel in time-sharing, each row needs to open / close (one switch) for each individual MUX, resulting in power consumption. In the prior art, the MUX output of the original RGBRGB (RGB corresponds to red, green, and blue sub-pixels respectively) requires 6 switches. In order to save power and reduce power consumption, some researchers set the output sequence of RGBRGB to RGBBGR in order to improve power consumption. Through this timing setting, the switch can be kept on when the same B is output, that is, 6 switches are reduced to 5 times, but this power reduction can only save 16.6% of power.

[0004] Some researchers have also reduced the switching times of the multiplexed control switch based on the signal properties of RGB. Figure 1a As shown in FIG. 1 , it is a schematic diagram of the arrangement of a multiplexer (MUX1:3) on an existing liquid crystal display panel. Figure 1b, which is a schematic diagram of the arrangement of a multiplexer (MUX2:6) on an existing liquid crystal display panel. Among them, the three output channels of the multiplexer MUX are connected to the RGB sub-pixels respectively, and the positive (P_CH) and negative polarity signals (N_CH) are output by multiplexing the signal of the multiplexer MUX, wherein each multiplexer is controlled by the control signals EN_R, EN_G, and EN_B to enable the switch of the corresponding output channel. In this case, in the prior art, in order to save power consumption, it is set that when all channels are the same, all switches are kept turned on. That is, in MUX1:3, when the voltages of R1(- / +) / G1(- / +) / B1(- / +) and R2(- / +) / G2(- / +) / B2(- / +) are the same, the control signals EN_R, EN_G, and EN_B can be controlled to keep the switches (MUX_R / G / B) of the corresponding channels turned on, which can reduce the number of switch switching times to save power consumption. Also, in MUX2:6, if the voltages of R1(+) / G2(+) / B1(+) and R2(-) / G1(-) / B2(-) are the same, the control signals EN_R, EN_G, and EN_B are controlled to keep MUX_R / G / B turned on to save power. However, since the switches of each MUX are controlled by the control signals EN_R, EN_G, and EN_B, the probability that the voltages of R1(- / +) / G1(- / +) / B1(- / +) and R2(- / +) / G2(- / +) / B2(- / +) are the same, or that the voltages of R1(+) / G2(+) / B1(+) and R2(-) / G1(-) / B2(-) are the same is extremely small, and the degree of power consumption reduction is quite limited.

[0005] Attached Figure 2 The figure shows a schematic diagram of the arrangement of the multiplexers (MUX1:2) on the existing OLED display panel, wherein each multiplexer is controlled by the control signals EN_1 and EN_2 to enable the switch of the corresponding output channel. In this case, in order to save power consumption, in the prior art, it is set that the voltages of all channels are the same, that is, the voltages of the channels corresponding to R1 / G1 / B2 / G2 / R3 / G3 / B4 / G4 are the same, and all switches are kept turned on. However, the probability that the voltages of the channels corresponding to R1 / G1 / B2 / G2 / R3 / G3 / B4 / G4 are the same is extremely low, and the degree of power saving is also quite limited.

[0006] As panels gradually move towards higher resolutions and higher refresh rates, the need to further reduce power consumption becomes more urgent. Summary of the invention

[0007] Based on the above technical problems, the present invention proposes a display driving circuit and a driving method thereof, by connecting N output channels of at least one multiplexer to sub-pixels of the same color, when the output signals of X output channels of the multiplexer are the same, the X output channels can be independently controlled, and the control switches corresponding to the X output channels are kept in an on state; so as to reduce the number of switching times of the MUX, reduce the power consumption of the LCM, and achieve the technical effect of power saving. Wherein, N≥2, N is an integer; N≥X≥2, X is an integer.

[0008] On the one hand, an embodiment of the present invention provides a driving method for a display driving circuit, wherein the display driving circuit includes M multiplexers, each of the multiplexers includes N output channels, and each of the output channels is provided with a corresponding control switch, characterized in that the N output channels of at least one of the multiplexers are connected to sub-pixels of the same color; when the output signals of X output channels of the multiplexer are the same, the control switches corresponding to the X output channels are kept in an on state; wherein M≥1, M is an integer; N≥2, N is an integer; N≥X≥2, X is an integer.

[0009] Optionally, the multiple output channels of the M multiplexers are controlled by the same enable signal group, which includes enable signals corresponding to the multiple channels that are independent of each other; or, the multiple output channels of at least two multiplexers are controlled by different enable signal groups, which include enable signals corresponding to the multiple output channels that are independent of each other.

[0010] Optionally, the N output channels of at least one of the multiplexers are all connected to red sub-pixels; or, the N output channels of at least one of the multiplexers are all connected to green sub-pixels; or, the N output channels of at least one of the multiplexers are all connected to blue sub-pixels.

[0011] Optionally, there are a first multiplexer and a second multiplexer among the M multiplexers, and each of the multiplexers includes three output channels; the three output channels of the first multiplexer are respectively connected to the first red sub-pixel R1, the second green sub-pixel G2, and the first blue sub-pixel B1; the three output channels of the second multiplexer are respectively connected to the second red sub-pixel R2, the first green sub-pixel G1, and the second blue sub-pixel B2; wherein the three output channels of the first multiplexer and the second multiplexer are respectively independently controlled to be turned on and off by EN_R1, EN_G2, EN_B1, EN_R2, EN_G1, and EN_B2.

[0012] Optionally, the first red sub-pixel R1, the first green sub-pixel G1, and the first blue sub-pixel B1 constitute a pixel unit, or the second red sub-pixel R2, the second green sub-pixel G2, and the second blue sub-pixel B2 constitute a pixel unit.

[0013] Optionally, there is a first multiplexer and a second multiplexer among the M multiplexers, and each of the multiplexers includes two output channels; the two output channels of the first multiplexer are respectively connected to a first red sub-pixel R1 and a first blue sub-pixel B2; the two output channels of the second multiplexer are respectively connected to a first green sub-pixel G1 and a second green sub-pixel G2; wherein, the two output channels of the first multiplexer and the second multiplexer are respectively controlled to be turned on and off by EN_1 and EN_2; or the two output channels of the first multiplexer and the second multiplexer are respectively controlled to be turned on and off by EN_1, EN_2, EN_3, and EN_4 independently.

[0014] Optionally, the first red sub-pixel R1 and the first green sub-pixel G1 form a pixel unit, and the first blue sub-pixel B2 and the second green sub-pixel G2 form a pixel unit.

[0015] Optionally, there are a first multiplexer, a second multiplexer, a third multiplexer, and a fourth multiplexer among the M multiplexers, and each of the multiplexers includes two output channels; the two output channels of the first multiplexer are respectively connected to a first red sub-pixel R1 and a second red sub-pixel R3; the two output channels of the second multiplexer are respectively connected to a first green sub-pixel G1 and a second green sub-pixel G2; the two output channels of the third multiplexer are respectively connected to a first blue sub-pixel B2 and a second blue sub-pixel B4; the two output channels of the fourth multiplexer are respectively connected to a third green sub-pixel G3 and a fourth green sub-pixel G4; wherein, the first multiplexer includes two output channels, each of which includes two output channels; the first multiplexer includes two output channels, each of which includes two output channels; the second multiplexer includes two output channels, each of which includes two output channels; the second multiplexer includes two output channels, each of which includes two output channels; The two output channels of each of the first multiplexer, the second multiplexer, the third multiplexer, and the fourth multiplexer are uniformly controlled to be turned on and off by EN_1 and EN_2; or the two output channels of each of the first multiplexer, the second multiplexer, the third multiplexer, and the fourth multiplexer are independently controlled to be turned on and off by EN_1, EN_2, EN_3, EN_4, EN_5, EN_6, EN_3, and EN_4; or the two output channels of each of the first multiplexer, the second multiplexer, the third multiplexer, and the fourth multiplexer are independently controlled to be turned on and off by EN_1, EN_2, EN_3, EN_4, EN_5, EN_6, EN_7, and EN_8.

[0016] Optionally, the first red sub-pixel R1 and the first green sub-pixel G1 constitute a pixel unit; the first blue sub-pixel B2 and the second green sub-pixel G2 constitute a pixel unit; the second red sub-pixel R3 and the third green sub-pixel G3 constitute a pixel unit; the second blue sub-pixel B4 and the fourth green sub-pixel G4 constitute a pixel unit.

[0017] Optionally, the display driving circuit includes a determination unit, and the determination unit is used to determine whether the output signals of the multiple output channels of the multiplexer are the same.

[0018] Optionally, there are one or more decision units; when the decision units and the multiplexers cannot correspond one-to-one, at least two of the multiplexers share one decision unit.

[0019] Optionally, the decision unit is also used to control the on and off of control switches on multiple output channels.

[0020] Optionally, the display driving circuit further includes a timing control circuit, and the plurality of control switches of the multiplexer are controlled to be turned on and off by a timing signal of the timing control circuit.

[0021] Optionally, the output signal is a voltage signal.

[0022] In a second aspect, an embodiment of the present invention provides a display driving circuit having a corresponding structure and applicable to the method mentioned in any of the aforementioned embodiments.

[0023] Compared with the prior art, the technical solution of the present invention has the following beneficial effects: the present invention proposes a display driving circuit and a driving method thereof, by connecting N output channels of at least one multiplexer to pixels of the same color, and when the output signals of X output channels of the multiplexer are the same, the X output channels can be individually controlled and the control switches corresponding to the X output channels can be kept in an on state; thereby reducing the number of switching times of the MUX switch, reducing the power consumption of the display module, and achieving the technical effect of power saving. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] The accompanying drawings of the present invention constitute a part of this specification and are used to further understand the present invention. The drawings illustrate embodiments of the present invention and together with the description are used to explain the principle of the present invention.

[0025] Figure 1a-1b The present invention is a driving circuit structure of an existing liquid crystal display.

[0026] Figure 2 The present invention is a display driving circuit structure of an existing OLED display.

[0027] Figure 3a-3b is an example of a multiplexer according to an embodiment.

[0028] Figure 4 This is an embodiment of a driving circuit structure.

[0029] Figure 5a-5d This is another embodiment of a driving circuit structure.

[0030] Figure 6 for Figure 5b The driving circuit structure shown here relates to an example of a display device. DETAILED DESCRIPTION

[0031] The following detailed descriptions are all illustrative and are intended to provide further explanation of the present invention. Unless otherwise specified, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which the present invention belongs.

[0032] It should be noted that the terms used herein are only for describing specific embodiments and are not intended to limit exemplary embodiments according to the present invention.

[0033] like Figure 3a FIG. 1 is a schematic diagram of a multiplexer of a display driving circuit provided by the present invention, which includes a plurality of multiplexers MUX1, ..., MUX2, ..., MUX3, ..., MUX4, ..., MUX5, ..., MUX6, ..., MUX7, ..., MUX8, ..., MUX9, ..., MUX10, ..., MUX11, ..., MUX12, ..., MUX13, ..., MUX14, ..., MUX15, ... M , M≥1, M is an integer, each multiplexer includes multiple output channels 1, 2, ..., N-1, N, N≥2, N is an integer. Figure 3b As shown in FIG. 1 , a schematic diagram of a single multiplexer is shown, in which each output channel is provided with a control switch S, namely, S1, S2, …, S N-1 , S N The multiplexer MUX on the display panel is used to distribute pixel voltage signals to the data lines, and the data lines transmit the voltage signals to specific pixels on the display screen for display. The pixels on the display panel include sub-pixels of the three primary colors of red (R), green (G), and blue (B), but are not limited thereto. Sub-pixels of colors such as white (W) and yellow (Y) may also be added to improve the display effect.

[0034] Different pixel arrangements and different output settings will lead to different routing, cost, power consumption, etc. In order to minimize power consumption while keeping routing and cost under control, the driving method of the display driving circuit of the present invention monitors the output channel of each multiplexer. When the same output voltage signal exists in multiple output channels of the multiplexer, the control switch corresponding to the output channel with the same output voltage signal is kept in the on state. For example, Figure 3bIn the diagram, when there are X output channels with the same output signals among the N output channels of the multiplexer, the control switches S corresponding to the X output channels with the same output signals are kept in the on state, wherein N≥X≥2, and X is an integer, so that the number of switch switching can be further reduced to save power consumption; at the same time, in order to further reduce the number of switch switching to save power consumption, the present invention also connects all output channels of at least one multiplexer to sub-pixels of the same color, and the probability that the voltage signals corresponding to the sub-pixels of the same color are the same is greater, thereby increasing the probability that the output channel switches in the multiplexer remain on, thereby further reducing the number of switch switching to reduce the power consumption of the display module, and all output channels of the multiplexer are connected to sub-pixels of the same color, which can make it easier to determine whether there is an identical output voltage signal in the output channels.

[0035] In a specific embodiment, multiple output channels of multiple multiplexers are controlled by the same enable signal group, which includes independent enable signals corresponding to multiple channels, namely, enable control signals EN_1, EN_2, ..., EN_ N-1 , EN_ N One-to-one control switches S1, S2, ..., S N-1 , S N The multiplexer enables the control signals EN_1, EN_2,…, EN_ N-1 , EN_ N They may be the same or different from each other. For example, multiple multiplexers are not independently controlled from each other, that is, the control switches of some or all multiplexers are controlled by enabling control signals EN_1, EN_2, ..., EN_ N-1 , EN_ N One-to-one control; but preferably, at least two multiplexers are independently controlled from each other. When independently controlled, each optionally connected sub-pixel category in the multiple multiplexers is freer, and it is not necessary to satisfy that all multiplexers have the same output voltage signal before the corresponding switch is kept turned on, thereby further reducing the number of switch switching in the multiple multiplexers and further reducing power consumption.

[0036] like Figure 4As shown in FIG. 1 , a specific embodiment of a preferred display driving circuit of the present invention is applicable to driving a display panel such as a liquid crystal display, wherein there is a first multiplexer 1 and a second multiplexer 2 in the M multiplexers, and each of the multiplexers includes three output channels; the three output channels of the first multiplexer are respectively connected to the first red sub-pixel R1, the second green sub-pixel G2, and the first blue sub-pixel B1; the three output channels of the second multiplexer are respectively connected to the second red sub-pixel R2, the first green sub-pixel G1, and the second blue sub-pixel B2; wherein the three output channels of the first multiplexer and the second multiplexer are respectively represented by EN_R1, EN_G2, EN_B1, EN_R2, EN_G1, EN_B2 (or represented by EN_1, EN_2, EN_3, EN_4, EN_5 ,EN_6) independently control the shutdown and conduction, and the output channels of the first multiplexer and the second multiplexer can be independently controlled, which can increase the probability that the voltage signals in the output channels of the first multiplexer and the second multiplexer are the same. For example, when the voltage signals of R1 / G2 / B1 and / or R2 / G1 / B2 are the same, the power saving mode can be turned on. The power saving mode keeps the control switch corresponding to the corresponding output channel of the MUX in the on state. The power saving degree that can be achieved by the circuit structure and the corresponding driving method of this embodiment is far greater than that of the existing attached Figure 1b The circuit structure and the corresponding driving method shown can achieve a power saving degree.

[0037] In an optional embodiment, the first red sub-pixel R1, the first green sub-pixel G1, and the first blue sub-pixel B1 constitute a pixel unit, and the second red sub-pixel R2, the second green sub-pixel G2, and the second blue sub-pixel B2 constitute a pixel unit. Corresponding to this pixel unit, the lines connecting the multiplexer MUX and the sub-pixels and the lines of the control signals EN_R1, EN_G2, EN_B1, EN_R2, EN_G1, EN_B2 are not too complicated, thereby taking into account the requirements of reducing power consumption, simplifying wiring, and improving display performance.

[0038] The following is combined with Figure 5a-5d A driving circuit suitable for display panels such as OLED is described in detail.

[0039] like Figure 5aAs shown, a preferred specific embodiment of the preferred display driving circuit of the present invention is shown, wherein the M multiplexers include a first multiplexer 1 and a second multiplexer 2, and each of the multiplexers includes two output channels; the two output channels of the first multiplexer are respectively connected to a first red sub-pixel R1 and a first blue sub-pixel B2; the two output channels of the second multiplexer are respectively connected to a first green sub-pixel G1 and a second green sub-pixel G2; wherein, the two output channels of the first multiplexer and the second multiplexer are respectively controlled by EN_1 and EN_2; wherein, by connecting the output channels of some multiplexers to sub-pixels of the same color, for the part of the multiplexers, the probability of the voltage signals of the output channels being the same can be increased, thereby increasing the probability of the switches of the corresponding output channels being turned on to avoid switching, and the number of switching times can be reduced, thereby reducing the power consumption of the display driver. In this embodiment, when driving, for example, if the voltage signal G1=G2=G3=G4 and R1=B2 and R3=B4, the switch of the corresponding channel can be kept turned on to avoid switching, so as to reduce the number of switching times, thereby reducing the power consumption of the display drive. Among them, R3, G3, B4, G4 are pixels arranged in the same manner as R1, G1, B2, G2, and the control method of the multiplexer connected to the two is also the same.

[0040] Preferably, Figure 5b As shown, the two output channels of the first multiplexer 1 and the second multiplexer 2 are controlled independently by EN_1, EN_2, EN_3, and EN_4. The power consumption of the display module can be further reduced by connecting the output channels of some multiplexers to sub-pixels of the same color and setting EN_1, EN_2, EN_3, and EN_4 to be independently controlled. For example, for the second multiplexer 2, all of which are connected to green sub-pixels, the probability that the voltage signals of the two output channels of the second multiplexer 2 are the same is much greater than the probability that the voltage signals of the two output channels of the other multiplexers are the same. Since it can be independently controlled, it can keep the switch of the corresponding channel turned on to avoid switching when any of the voltage signals G1=G2=G3=G4, or R1=B2, or R3=B4 occurs. Compared with the case of non-independent control, independent control can further increase the probability of avoiding the occurrence of switching, thereby further reducing the number of switching times, thereby further reducing the power consumption of the display driver.

[0041] Optional, such as Figure 5a-5bAs shown, the first red sub-pixel R1 and the first green sub-pixel G1 form a pixel unit; the first blue sub-pixel B2 and the second green sub-pixel G2 form a pixel unit; the second red sub-pixel R3 and the third green sub-pixel G3 form a pixel unit; the second blue sub-pixel B4 and the fourth green sub-pixel G4 form a pixel unit. Figure 5a-5b Schematically shows a third multiplexer 3 and a fourth multiplexer 4, which are respectively the same as the first multiplexer 1 and the second multiplexer 2 in structure and signal control in the corresponding embodiments.

[0042] Preferably, the colors of the sub-pixels connected to the output channels of the multiplexers are set to be the same, such as Figure 5c As shown, there are at least one first multiplexer 1, a second multiplexer 2, a third multiplexer 3, and a fourth multiplexer 4 in the M multiplexers, and each of the multiplexers includes two output channels; the two output channels of the first multiplexer 1 are respectively connected to a first red sub-pixel R1 and a second red sub-pixel R3; the two output channels of the second multiplexer 2 are respectively connected to a first green sub-pixel G1 and a second green sub-pixel G2; the two output channels of the third multiplexer 3 are respectively connected to a first blue sub-pixel B2 and a second blue sub-pixel B3. The second multiplexer 4 is connected to a third green sub-pixel G3 and a fourth green sub-pixel G4; the two output channels of the first multiplexer, the second multiplexer, the third multiplexer and the fourth multiplexer are connected to a third green sub-pixel G3 and a fourth green sub-pixel G4 respectively; wherein the two output channels of the first multiplexer, the second multiplexer, the third multiplexer and the fourth multiplexer are controlled by the EN_1 and EN_2 control signals; in the present embodiment, when driving, for example, if the voltage signal G1=G2=G3=G4, and R1=R3, and B2=B4, the switch of the corresponding channel can be kept turned on to avoid switching, so as to reduce the number of switching times, thereby reducing the power consumption of the display drive; relative to the attached Figure 5a In the embodiment, the voltage signal satisfies G1=G2=G3=G4, and R1=R3, and the probability of B2=B4 is much greater than the probability of the voltage signal G1=G2=G3=G4, R1=B2, and R3=B4. Therefore, in the low power consumption application scenario, the attached Figure 5c The embodiment is preferred.

[0043] Further preferably, Figure 5dAs shown, the two output channels of the first multiplexer 1, the second multiplexer 2, the third multiplexer 3, and the fourth multiplexer 4 are independently controlled by EN_1, EN_2, EN_3, EN_4, EN_5, EN_6, EN_3, and EN_4. In this embodiment, by connecting the output channels of multiple multiplexers to sub-pixels of the same color, the probability of avoiding switch switching on the output channels can be further increased. When driving, when the voltage signal has any of the conditions G1=G2=G3=G4, or R1=R3, or B2=B4, the power saving mode can be triggered, that is, the control switch of the corresponding output channel is kept in the on state. Figure 5c In this embodiment, the probability of G1=G2=G3=G4, or R1=R3, or B2=B4 occurring is much greater than the probability of G1=G2=G3=G4, R1=R3, and B2=B4 occurring. Therefore, this embodiment is a preferred embodiment in terms of power saving. In this embodiment, unified control signals EN_3 and EN_4 are set for G1, G2, G3, and G4, which can take into account the needs of saving space on the display panel, simplifying circuit wiring, and saving power consumption, and avoid too many wiring lines in the limited display panel layout resulting in too low a display panel yield.

[0044] In addition, the two output channels of the first multiplexer 1, the second multiplexer 2, the third multiplexer 3, and the fourth multiplexer 4 are independently controlled by EN_1, EN_2, EN_3, EN_4, EN_5, EN_6, EN_7, and EN_8, which can further improve the probability of reducing the number of switching times of the control switch. When driving, when the voltage signal has any of the conditions G1=G2, G3=G4, R1=R3, or B2=B4, the power saving mode can be triggered, that is, the control switch of the corresponding output channel is kept in the on state. The probability that the voltage signal has G1=G2, G3=G4, R1=R3, or B2=B4 can be further greater than the probability that G1=G2=G3=G4, R1=R3, or B2=B4 occurs to a certain extent. Therefore, this embodiment is an optional embodiment in terms of power saving.

[0045] Optional, as attached Figure 5c-5d As shown, the first red sub-pixel R1 and the first green sub-pixel G1 constitute a pixel unit; the first blue sub-pixel B2 and the second green sub-pixel G2 constitute a pixel unit; the second red sub-pixel R3 and the third green sub-pixel G3 constitute a pixel unit; the second blue sub-pixel B4 and the fourth green sub-pixel G4 constitute a pixel unit.

[0046] In addition, in the attached Figure 4-5dIn the illustrated driving circuit, the driving corresponding to the RGB and RGBG arrangements is the best embodiment preferred by the inventor, and the power saving capability, circuit yield, panel frame size and other advantages shown by these special embodiments are particularly prominent. However, the present invention is not limited to these embodiments, and other pixel arrangements, such as RGBW, RGBY, etc., are also applicable to the ideas of the present invention, which also belong to the scope of the present invention, that is, part or all of the output channels of the multiplexer are set to connect sub-pixels of the same color, and consider setting the control switches of the output channels of the part or all of the multiplexers to be appropriately independent, so that when the output signals of the output channels of the multiplexers are the same, the switches of the corresponding channels are kept in the on state to reduce the number of switch switching to reduce power consumption, while ensuring the electrical performance of the circuit and the small frame size advantage of the display panel. In short, as long as the pixel arrangement is to set the pixels connected by the multiplexer to be the same to help reduce the number of switch switching, it is within the scope of the present invention.

[0047] The preferred embodiment of the multiplexer of the present invention is only an example. In a specific display device, the multiplexer can be repeatedly arranged into multiple groups according to actual conditions to meet the voltage driving requirements of a large number of data lines and sub-pixels on the display panel. At the same time, the sub-pixels can also be repeatedly arranged to meet the display requirements. Figure 6 As shown, the attached Figure 5b A specific display device schematic diagram is shown, RGBG is arranged repeatedly as a pixel block P, and the first and second multiplexers MUX correspond to the RB pixel unit and the GG pixel unit respectively. Figure 6 Only with Figure 5b As an illustrative example of a display device, the display devices corresponding to other embodiments are not described in detail.

[0048] In a preferred embodiment, the display driving circuit implementing the driving method also includes a judgment unit, which is used to monitor whether the output signals of the N output channels of the multiplexer are the same and give a judgment result. The judgment unit is arranged in a data driver IC connected to the display panel to make the wiring space on the display panel abundant and avoid electrical errors, while facilitating the narrow frame of the display panel.

[0049] In a preferred embodiment, based on the size of the data driver IC and the complexity of the circuit, the decision unit can be one or more; when the decision unit and the multiplexer cannot correspond one to one, at least two multiplexers share one decision unit. Among them, the decision unit is set as one, which is conducive to reducing the chip size of the data driver IC, and the decision unit is set separately as multiple, which is conducive to reducing the complexity of the decision unit circuit and improving the accuracy of circuit operation. Those skilled in the art can appropriately set the number of decision units according to actual conditions, and this embodiment is not limited to this.

[0050] In a preferred embodiment, the decision result output by the decision unit can be directly or indirectly used as the enable signal of the control switch, that is, EN_1, EN_2, ..., EN_ N-1 , EN_ N The enable signal is used to control the on and off of the control switches on the output channels one by one.

[0051] In a preferred embodiment, the multiple control switches S of the multiplexer MUX of the display driving circuit directly obtain the enable signals EN_1, EN_2, ..., EN_3 for controlling the multiple control switches S to turn on and off through the timing signals output by the timing controller in the data driving IC. N-1 , EN_ N .

[0052] The basic concepts have been described above. Obviously, for those skilled in the art, the above detailed disclosure is only for example and does not constitute a limitation of the present invention. Although not explicitly stated herein, those skilled in the art may make various modifications, improvements and corrections to the present invention. Such modifications, improvements and corrections are suggested in the present invention, so such modifications, improvements and corrections still belong to the spirit and scope of the exemplary embodiments of the present invention.

[0053] It should be understood that the embodiments described in the present invention are only used to illustrate the principles of the embodiments of the present invention. Other variations may also fall within the scope of the present invention. Therefore, as examples and not limitations, alternative configurations of the embodiments of the present invention may be considered consistent with the teachings of the present invention. Accordingly, the embodiments of the present invention are not limited to the embodiments explicitly introduced and described in the present invention.

Claims

1. A method for driving a display driving circuit, wherein the display driving circuit comprises M multiplexers, each of the multiplexers comprises N output channels, and each of the output channels is provided with a corresponding control switch, characterized in that: The N output channels of at least one of the multiplexers are connected to sub-pixels of the same color; When the output signals of the X output channels of the multiplexer are the same, keeping the control switches corresponding to the X output channels in an on state; Among them, M≥1, M is an integer; N≥2, N is an integer; N≥X≥2, X is an integer.

2. The driving method of a display driving circuit according to claim 1, characterized in that: The multiple output channels of the M multiplexers are controlled by the same enable signal group, and the enable signal group includes independent enable signals corresponding to the multiple channels; Alternatively, the multiple output channels of at least two multiplexers are controlled by different enable signal groups, and the enable signal group includes independent enable signals corresponding to the multiple output channels.

3. The driving method of a display driving circuit according to claim 1, characterized in that: The N output channels of at least one of the multiplexers are all connected to red sub-pixels; or, the N output channels of at least one of the multiplexers are all connected to green sub-pixels; or, the N output channels of at least one of the multiplexers are all connected to blue sub-pixels.

4. The driving method of a display driving circuit according to claim 3, characterized in that: The M multiplexers include a first multiplexer and a second multiplexer, and each of the multiplexers includes three output channels; The three output channels of the first multiplexer are respectively connected to the first red sub-pixel R1, the second green sub-pixel G2, and the first blue sub-pixel B1; The three output channels of the second multiplexer are respectively connected to the second red sub-pixel R2, the first green sub-pixel G1, and the second blue sub-pixel B2; The three output channels of the first multiplexer and the second multiplexer are respectively controlled to be turned off and on by EN_R1, EN_G2, EN_B1, EN_R2, EN_G1, and EN_B2 independently.

5. The driving method of a display driving circuit according to claim 4, characterized in that: The first red sub-pixel R1 , the first green sub-pixel G1 , and the first blue sub-pixel B1 form a pixel unit, or the second red sub-pixel R2 , the second green sub-pixel G2 , and the second blue sub-pixel B2 form a pixel unit.

6. The driving method of a display driving circuit according to claim 3, characterized in that: The M multiplexers include a first multiplexer and a second multiplexer, and each of the multiplexers includes two output channels; The two output channels of the first multiplexer are respectively connected to a first red sub-pixel R1 and a first blue sub-pixel B2; The two output channels of the second multiplexer are respectively connected to a first green sub-pixel G1 and a second green sub-pixel G2; Wherein, the two output channels of the first multiplexer and the second multiplexer are respectively controlled to be turned off and on by EN_1 and EN_2; Or the two output channels of the first multiplexer and the second multiplexer are respectively controlled to be turned off and on by EN_1, EN_2, EN_3, and EN_4 independently.

7. The driving method of a display driving circuit according to claim 6, characterized in that: The first red sub-pixel R1 and the first green sub-pixel G1 form a pixel unit, and the first blue sub-pixel B2 and the second green sub-pixel G2 form a pixel unit.

8. The driving method of a display driving circuit according to claim 3, characterized in that: The M multiplexers include a first multiplexer, a second multiplexer, a third multiplexer, and a fourth multiplexer, and each of the multiplexers includes two output channels; The two output channels of the first multiplexer are respectively connected to a first red sub-pixel R1 and a second red sub-pixel R3; The two output channels of the second multiplexer are respectively connected to a first green sub-pixel G1 and a second green sub-pixel G2; The two output channels of the third multiplexer are respectively connected to a first blue sub-pixel B2 and a second blue sub-pixel B4; The two output channels of the fourth multiplexer are respectively connected to a third green sub-pixel G3 and a fourth green sub-pixel G4; The two output channels of the first multiplexer, the second multiplexer, the third multiplexer and the fourth multiplexer are controlled to be turned off and on by EN_1 and EN_2; Or the two output channels of the first multiplexer, the second multiplexer, the third multiplexer, and the fourth multiplexer are respectively independently controlled to be turned off and on by EN_1, EN_2, EN_3, EN_4, EN_5, EN_6, EN_3, and EN_4; Or the two output channels of the first multiplexer, the second multiplexer, the third multiplexer, and the fourth multiplexer are respectively independently controlled to be turned off and on by EN_1, EN_2, EN_3, EN_4, EN_5, EN_6, EN_7, and EN_8.

9. The driving method of a display driving circuit according to claim 8, characterized in that: The first red sub-pixel R1 and the first green sub-pixel G1 constitute a pixel unit; the first blue sub-pixel B2 and the second green sub-pixel G2 constitute a pixel unit; the second red sub-pixel R3 and the third green sub-pixel G3 constitute a pixel unit; the second blue sub-pixel B4 and the fourth green sub-pixel G4 constitute a pixel unit.

10. The driving method of a display driving circuit according to claim 1, characterized in that: The display driving circuit comprises a determination unit, and the determination unit is used to determine whether output signals of a plurality of output channels of the multiplexer are the same.

11. The driving method of a display driving circuit according to claim 10, characterized in that: There are one or more decision units; when the decision units and the multiplexers cannot correspond one to one, at least two of the multiplexers share one decision unit.

12. The driving method of a display driving circuit according to claim 10, characterized in that: The decision unit is also used to control the on and off of control switches on multiple output channels.

13. The driving method of a display driving circuit according to claim 1, characterized in that: The display driving circuit further includes a timing control circuit, and the plurality of control switches of the multiplexer are controlled to be turned on and off by a timing signal of the timing control circuit.

14. The driving method of a display driving circuit according to claim 1, characterized in that: The output signal is a voltage signal.

15. A display driving circuit, applied to the method according to any one of claims 1 to 14.

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