Chip packaging structure and packaging method

Abstract

The invention relates to a chip packaging structure and a packaging method, and belongs to the technical field of chip packaging. The chip packaging structure comprises a substrate; the chip is welded on the substrate by using a flip-chip process; the chip is packaged on the substrate through the covering film, the covering film is provided with a plurality of through openings, and the plurality of openings are formed in the peripheral side of the chip; and the plastic packaging material is used for packaging the covering film and the chip on the substrate, and the opening is filled with the plastic packaging material, so that the plastic packaging material is connected with the substrate. The invention further provides a chip packaging method for forming the chip packaging structure. According to the chip packaging structure and the packaging method, the functions of film covering, film breaking and plastic packaging are integrated, the product reliability is improved, and manpower and material resource consumption caused by product failure is reduced.

Description

Technical Field

[0001] The present application relates to the field of chip packaging technology, and in particular to a chip packaging structure and a packaging method. Background Art

[0002] For products with normal film packaging, there is no direct contact between the plastic packaging material and the substrate due to the film barrier. The film is a thermoplastic material, which will deform to a certain extent after being stressed or heated and has no supporting force. When affected by external force or heated, the welding position of the weakest part of the plastic packaging products such as filters will be subject to external force or internal stress, causing cracks or even fractures at the welding point of the product, and the chip function will fail. This failure cannot monitor abnormal hidden dangers during chip manufacturing and testing, and the sustainability of the function cannot be guaranteed. The failure of the product will not be discovered until the chip is circulated to the terminal board or during use, causing the terminal product to be scrapped, which will cause great economic losses. Summary of the invention

[0003] To this end, the present application proposes a chip packaging structure and a packaging method, which integrate the functions of coating, film breaking, and plastic sealing, improve product reliability, and reduce the consumption of manpower and material resources caused by product failure.

[0004] The chip packaging structure of some embodiments of the present application includes: a substrate; a chip, which is soldered to the substrate using a flip-chip process; a coating, which encapsulates the chip on the substrate, and the coating is provided with a plurality of openings passing through the coating, and the plurality of openings are arranged on the peripheral side of the chip; a molding compound, which encapsulates the coating and the chip on the substrate, and the molding compound fills the openings to connect the molding compound to the substrate.

[0005] Optionally, the substrate is provided with a dividing line, the chip packaging structure is configured to be cut along the dividing line to form a single chip, and the opening is provided on the dividing line.

[0006] Optionally, the single chip has a square structure, and the opening is arranged on a side surface of the chip.

[0007] Optionally, the minimum distance between the edge of the opening and the chip is A, satisfying: A≥75um; or, the thickness of the coating is D, the length of the opening is L, and the width is W, satisfying: 20um≤D≤50um, L*W≥350um*350um.

[0008] Optionally, the chip is a filter.

[0009] Optionally, the surface of the substrate is recessed to form a notch, the notch corresponds to the position of the opening, and the molding compound fills the notch from the opening; or, the surface of the substrate is recessed to form a notch, the notch corresponds to the position of the opening, the chip packaging structure also includes a reinforcement pin, the end of the reinforcement pin passes through the opening and is inserted into the notch, and the molding compound seals at least a portion of the head of the reinforcement pin.

[0010] The chip packaging method of some embodiments of the present application is used to form the chip packaging structure of some embodiments of the present application, including:

[0011] The chip is soldered to the substrate using a flip chip process;

[0012] Encapsulating the chip on the substrate using a covering film;

[0013] The film is broken at a position on the peripheral side of the chip covered with the film to form an opening;

[0014] The opening is sealed with a plastic sealing compound, and the plastic sealing compound is connected to the substrate through the opening.

[0015] Optionally, after “the use of plastic encapsulation material to encapsulate the opening”, it also includes: the substrate is provided with a dividing line, the opening is arranged on the dividing line, the chip packaging structure is cut along the dividing line to form a single chip, and the plastic encapsulation material filled in one opening is respectively located on the two single chips formed by the division.

[0016] Optionally, the coating is broken by a laser sintering process to form an opening.

[0017] Optionally, the film is broken on four sides of the chip to form openings.

[0018] Compared with the prior art, this solution has the following beneficial effects:

[0019] Since the film may deform after being stressed, this deformation may squeeze the chip, causing the solder bumps to break and the product to fail. The plastic encapsulation compound is a hard material. While encapsulating the chip from the upper side of the film, it also connects to the substrate at the opening of the film, forming a rigid connection here, thereby supporting the film and reducing the degree of deformation of the film, thereby solving the problem of product failure caused by solder bumps breaking when the chip is stressed during use, and improving the chip packaging quality.

[0020] Additional aspects and advantages of the present application will be given in part in the description below, and in part will become apparent from the description below, or will be learned through the practice of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the embodiments will be briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present application and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without paying creative work.

[0022] Figure 1 A cross-sectional view of a first form of chip packaging structure provided in an embodiment of the present application;

[0023] Figure 2 A schematic diagram of a dividing line of a first form of a chip packaging structure provided in an embodiment of the present application;

[0024] Figure 3 A cross-sectional view of a single chip formed by cutting the first form of chip packaging structure provided in an embodiment of the present application;

[0025] Figure 4 A schematic diagram of a single chip formed by cutting the first form of chip packaging structure provided in an embodiment of the present application;

[0026] Figure 5 A schematic diagram of a dividing line of a second form of a chip packaging structure provided in an embodiment of the present application;

[0027] Figure 6 A schematic diagram of a single chip formed by cutting the second form of chip packaging structure provided in an embodiment of the present application;

[0028] Figure 7 A cross-sectional view of a third type of chip packaging structure provided in an embodiment of the present application;

[0029] Figure 8 A cross-sectional view of the fourth type of chip packaging structure provided in an embodiment of the present application.

[0030] icon:

[0031] 100-chip packaging structure; 1-substrate; 11-dividing line; 12-notch; 2-chip; 21-side; 22-corner; 3-film; 31-film edge; 32-opening; 4-plastic; 41-plastic film; 42-filling body; 5-soldering bump; 6-reinforcement nail; 61-head; 62-end; 200-single chip. DETAILED DESCRIPTION

[0032] In order to make the purpose, technical solution and advantages of the embodiments of the present application clearer, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, rather than all the embodiments. The components of the embodiments of the present application described and shown in the drawings here can be arranged and designed in various different configurations.

[0033] Therefore, the following detailed description of the embodiments of the present application provided in the accompanying drawings is not intended to limit the scope of the present application for which protection is sought, but merely represents selected embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in the field without creative work are within the scope of protection of the present application.

[0034] like Figure 1 As shown, the chip packaging structure 100 of some embodiments of the present application includes a substrate 1, a chip 2, a coating 3 and a molding compound 4. The chip 2 is soldered to the substrate 1 using a flip-chip process. The coating 3 encapsulates the chip 2 on the substrate 1. The coating 3 is provided with a plurality of openings 32 passing through. The plurality of openings 32 are arranged on the peripheral side of the chip 2. The molding compound 4 encapsulates the coating 3 and the chip 2 on the substrate 1. The molding compound 4 fills the openings 32 to connect the molding compound 4 to the substrate 1.

[0035] The chip 2 is connected to the substrate 1 circuit through the welding bumps 5. The plastic packaging material 42 includes a plastic packaging film 41 and a filling body 42. The plastic packaging film 41 encapsulates the cover film 3 and the chip 2 on the substrate 1. The filling body 42 fills the opening 32. The bottom side of the filling body 42 is directly rigidly connected to the substrate 1.

[0036] Since the film 3 may be deformed after being stressed, such deformation may squeeze the chip 2, causing the solder bump 5 to break, resulting in product failure. The plastic encapsulation material 4 is a hard material. While the plastic encapsulation material 4 encapsulates the chip 2 from the upper side of the film 3, it is also connected to the substrate 1 at the opening 32 of the film 3, forming a rigid connection there, thereby supporting the film 3 and reducing the deformation of the film 3, thereby solving the problem of product failure caused by the breakage of the solder bump 5 when the chip is stressed during use, and improving the chip packaging quality.

[0037] The chip 2 can be a filter or a switch flip chip.

[0038] like Figure 2 and Figure 3As shown, the substrate 1 is provided with a dividing line 11, and the chip package structure 100 is configured to be cut along the dividing line 11 to form a single chip 200, and the opening 32 is arranged on the dividing line 11. The chip package structure 100 is cut along the dividing line 11 to form a single chip 200, and the filling body 42 is cut in half and is located at the edge of two adjacent single chips 200, and at the same time, it plays a role in improving the packaging quality of the two adjacent single chips 200.

[0039] The single chip 200 has a square structure, and the opening 32 is arranged on the side 21 of the chip 2. The dividing lines 11 are arranged in a grid shape, and a plurality of single chips 200 with a square structure are formed after cutting along the dividing lines 11. Each single chip 200 has a chip 2 in the middle, and the single chip 200 with a square structure has four side surfaces 21, and each side surface 21 is provided with an opening 32. Compared with the scheme in which the opening 32 is arranged at the four corners 22 of the chip 2, the opening 32 is arranged on the four side surfaces 21 of the chip 2, and the film edge 31 of the covering film 3 is flatly attached to the side surface 21 of the chip 2. After the opening 32 is arranged, the packaging of the chip 2 by the covering film 3 will not be damaged, causing product failure.

[0040] like Figure 5 and Figure 6 As shown, in other embodiments, openings may be further provided at the four corners 22 of the chip 2 to increase the connection strength between the covering film 3 and the substrate 1 .

[0041] like Figure 4 As shown, the minimum distance between the edge of the opening 32 and the chip 2 is A, which satisfies: A ≥ 75um. When using the injection molding process for plastic encapsulation, a certain injection pressure needs to be provided. Limiting A to the above range can prevent the film 3 from breaking at the opening 32 and the injection material 4 from entering the interior of the film 3, causing product failure.

[0042] The thickness of the coating 3 is D, the length of the opening 32 is L, and the width is W, which satisfies:

[0043] 20um≤D≤50um, L*W≥350um*350um.

[0044] The shape of the opening 32 can be square, circular, oval, etc.

[0045] After the substrate 1 is cut to form a single chip 2, the piling width is 100um, and the size range of the opening 32 is limited to the above range. The filling body 42 has sufficient connection strength with the substrate 1, so as to have sufficient supporting force and adhesion force, which can package the chip 2 while reducing the risk of breakage of the solder bump 5 of the chip 2.

[0046] like Figure 7As shown, in some embodiments of the present application, the surface of the substrate 1 is recessed to form a notch 12 , the notch 12 corresponds to the position of the opening 32 , and the molding compound 4 fills the notch 12 from the opening 32 .

[0047] This arrangement can further improve the connection strength between the coating 3 and the substrate 1 and reduce the possibility of the coating 3 being detached.

[0048] like Figure 8 As shown, in other embodiments of the present application, the surface of the substrate 1 is recessed to form a notch 12, and the notch 12 corresponds to the position of the opening 32. The chip packaging structure 100 also includes a reinforcing nail 6, and the end 62 of the reinforcing nail 6 passes through the opening 32 and is inserted into the notch 12, and the plastic encapsulation material 4 encapsulates at least a portion of the head 61 of the reinforcing nail 6.

[0049] The plastic encapsulation material 4 can completely encapsulate the reinforcing nail 6, or the head 61 can partially leak out of the upper surface of the plastic encapsulation material 4. The structural strength of the reinforcing nail 6 is greater than the structural strength of the plastic encapsulation material 4, and a barb structure is formed. After the plastic encapsulation material 4 completes the plastic encapsulation, the reinforcing nail 6 can reduce the risk of the plastic encapsulation material 4, the covering film 3 and the substrate 1 being separated.

[0050] Furthermore, the notch 12 may be a threaded blind hole, and the end 62 of the reinforcing nail 6 is threadedly matched with the notch 12 , so that the reinforcing nail 6 and the base plate 1 are easy to assemble.

[0051] Furthermore, the reinforcing nail 6 may also be an L-shaped structure, with one end vertically inserted into the notch 12 and the other end bent and extended, thereby simplifying the structure and reducing the risk of separation of the molding compound 4, the coating 3 and the substrate 1.

[0052] The chip packaging method of some embodiments of the present application is used to form the chip packaging structure 100 of the embodiments of the present application, which integrates the functions of coating, film breaking, and plastic sealing, improves product reliability, and reduces the consumption of manpower and material resources caused by product failure.

[0053] The chip packaging method comprises:

[0054] The chip 2 is soldered to the substrate 1 by using a flip chip process;

[0055] The chip 2 is packaged on the substrate 1 using the covering film 3;

[0056] The film 3 is broken at a position on the peripheral side of the chip 2 to form an opening 32;

[0057] The opening 32 is sealed with a plastic sealing material 4 , and the plastic sealing material 4 is connected to the substrate 1 through the opening 32 .

[0058] In the above packaging method, since only the membrane breaking process is added and no new material is introduced, the material cost is not increased, the cost of materials is saved, and the product cost and complexity are reduced.

[0059] In some embodiments of the present application, after the opening 32 is sealed with a plastic sealing material 4, it also includes: the substrate 1 is provided with a dividing line 11, the opening 32 is arranged on the dividing line 11, and the chip packaging structure 100 is cut along the dividing line 11 to form a single chip 200, and the plastic sealing material 4 filled with one opening 32 is respectively located on the two single chips 200 formed by the separation.

[0060] Through the above method, the filling body 42 of one opening 32 is used to provide strength support for two single chips 200 , which can reduce the number of openings 32 and simplify the packaging process.

[0061] In some embodiments of the present application, the coating 32 is broken by laser sintering to form the opening 32. The above method not only has high film breaking accuracy, but also can accurately control the sintering depth to ensure that the deepest part will not burn through the top metal of the substrate 1.

[0062] As a preferred embodiment, the laser breaks the film 3 perpendicular to the surface of the substrate 1 and burns through the film 3 along the thickness direction to form an opening 32, which not only improves the film breaking accuracy, but also can maximize the connection strength between the film 3 and the substrate 1 after the plastic packaging material 4 fills the opening 32.

[0063] In some embodiments of the present application, the film is broken at the four sides 21 of the chip 2 to form openings 32. Compared with the solution in which the openings 32 are arranged at the four corners of the chip 2, the openings 32 are arranged at the four sides 21 of the chip 2, and the film edge 31 of the covering film 3 is flatly attached to the side 21 of the chip 2. After the openings 32 are arranged, the packaging of the chip 2 by the covering film 3 will not be damaged, causing product failure.

[0064] In some embodiments of the present application, based on the implementation form of "the substrate 1 is provided with a notch 12, and the reinforcing nail 6 is inserted into the notch 12", the film 3 is first broken to form an opening 32, the reinforcing nail 6 is inserted into the notch 12, and then the opening 32 is sealed with a plastic sealing material 4.

[0065] It should be noted that, in the absence of conflict, the features in the embodiments of this application may be combined with each other.

[0066] The above description is only the preferred embodiment of the present application and is not intended to limit the present application. For those skilled in the art, the present application may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included in the protection scope of the present application.

Claims

1. A chip packaging structure, characterized in that: include: substrate; The chip is soldered to the substrate using a flip chip process; A covering film is used to package the chip on the substrate, wherein the covering film is provided with a plurality of openings passing therethrough, and the plurality of openings are arranged on the peripheral side of the chip; A molding compound is used to package the cover film and the chip on the substrate, and the molding compound fills the opening so that the molding compound is connected to the substrate.

2. The chip packaging structure according to claim 1, characterized in that: The substrate is provided with a dividing line, the chip packaging structure is configured to be cut along the dividing line to form a single chip, and the opening is arranged on the dividing line.

3. The chip packaging structure according to claim 2, characterized in that: The single chip has a square structure, and the opening is arranged on a side surface of the chip.

4. The chip packaging structure according to claim 1, characterized in that: The minimum distance between the edge of the opening and the chip is A, satisfying: A ≥ 75 um; or The thickness of the coating is D, the length of the opening is L, and the width is W, which satisfies: 20um≤D≤50um, L*W≥350um*350um.

5. The chip packaging structure according to claim 1, characterized in that: The chip is a filter.

6. The chip packaging structure according to claim 1, characterized in that: The surface of the substrate is sunken to form a notch, the notch corresponds to the position of the opening, and the molding compound fills the notch from the opening; or The surface of the substrate is recessed to form a notch, and the notch corresponds to the position of the opening. The chip packaging structure also includes a reinforcing nail, and the end of the reinforcing nail passes through the opening and is inserted into the notch. The plastic encapsulation material encapsulates at least part of the head of the reinforcing nail.

7. A chip packaging method, used for forming the chip packaging structure according to any one of claims 1 to 6, characterized in that: include: The chip is soldered to the substrate using a flip chip process; The chip is packaged on the substrate using a covering film; The film is broken at a position on the peripheral side of the chip covered with the film to form an opening; The opening is sealed with a plastic sealing compound, and the plastic sealing compound is connected to the substrate through the opening.

8. The chip packaging method according to claim 7, characterized in that: After "the opening is sealed with a plastic sealing material", the method further includes: The substrate is provided with a dividing line, the opening is arranged on the dividing line, the chip packaging structure is cut along the dividing line to form a single chip, and the plastic encapsulation material filled in one opening is respectively located on the two single chips formed by the division.

9. The chip packaging method according to claim 7, characterized in that: The coating is broken by a laser sintering process to form an opening.

10. The chip packaging method according to claim 7, characterized in that: The membrane is broken on the four sides of the chip to form openings.

Images