Transient optimization control method, device and equipment for three-active full-bridge converter and medium

Abstract

The invention discloses a transient optimization control method, a transient optimization control device and transient optimization control equipment for a three-active full-bridge converter, and a medium. The method comprises the following steps of: inputting direct-current voltage of each port into a three-active full-bridge converter circuit model to determine and output alternating-current voltage of each port; determining three dual-active full-bridge converter circuit models according to the AC voltage of each port and the model; converting the three models into four circuit sub-models, and determining and outputting each square wave voltage signal according to the four circuit sub-models; when the direct-current voltage of each port is transiently changed, returning to execute the circuit model according to the changed direct-current voltage of each port and the three-active full-bridge converter until each phase-shift square-wave voltage signal is output according to the changed four circuit sub-models; and according to a volt-second balance principle, carrying out fast transient optimization conversion processing on a reference period square wave voltage signal before the low level pulse width of each phase shift square wave voltage signal so as to output a reference period correction square wave voltage signal, thereby determining a transient conduction time sequence of each port bridge arm switch tube according to the reference period correction square wave voltage signal.

Description

Technical Field

[0001] Embodiments of the present invention relate to the technical field of converters, and in particular to a method, device, equipment and medium for transient optimization control of a triple active full-bridge converter. Background Art

[0002] In recent years, with the rapid development of renewable energy and energy storage technology, multi-port converters (MPCs) are widely considered to be one of the promising solutions. In the MPC family of multi-winding transformer coupling, the three-active bridge converter is a typical topology, and its design is inspired by the two-port topology of the dual active bridge (DAB) converter. The use of a three-level active bridge converter instead of multiple independent converters helps to integrate energy, energy storage and loads with multiple voltage levels in a single power level, thereby reducing the conversion stage and improving the overall conversion efficiency. In addition, the three-active bridge converter can also meet the bidirectional flow of power between all ports, and provide comprehensive electrical isolation between each port, with higher control flexibility.

[0003] During the operation of the three-active bridge converter, due to the variability of energy transmission at each port, such as the sudden change in the size or direction of the transmission power between the ports, the non-sudden change of the inductor current at the moment of this sudden change will cause the generation of DC bias current, thereby affecting the working efficiency of the converter and even causing damage to the converter structure. The existing optimization control strategy for DC bias current suppression is basically aimed at the dual active bridge (DAB) converter. According to the time domain analysis, the relationship between the two steady-state cycles before and after the transient change is determined, the transient optimization strategy is found, and then the control equation is listed to optimize the transient cycle. Due to the strong multi-winding coupling characteristics of the three-active bridge converter, relying on the transient optimization strategy of the traditional dual active bridge (DAB) converter will cause the amount of calculation to increase significantly, resulting in poor DC bias current suppression effect and other problems. Summary of the invention

[0004] The present invention provides a transient optimization control method, device, equipment and medium for a three-active full-bridge converter, which simplifies the complexity of the optimization analysis algorithm and has a fast optimization control speed, thereby quickly and well compensating for the DC bias current caused by the phase shift generated by each phase-shifted square wave voltage signal output by each circuit sub-model when the voltage of each port changes transiently.

[0005] To achieve the above objectives, in a first aspect, an embodiment of the present invention provides a transient optimization control method for a triple active full-bridge converter, the method comprising:

[0006] Inputting the DC voltage of each port into the three-active full-bridge converter circuit model to determine the output AC voltage of each port;

[0007] Determining three dual-active full-bridge converter circuit models according to the AC voltages of each port and the three active full-bridge converter circuit models;

[0008] Converting each of the dual-active full-bridge converter circuit models into four circuit sub-models, and determining output square wave voltage signals according to each of the four circuit sub-models;

[0009] When the DC voltages at each port change transiently, return to execute the circuit model according to the DC voltages at each port after the change and the three-active full-bridge converter, ... until each phase-shifted square wave voltage signal is output according to the four circuit sub-models after the change;

[0010] According to the volt-second balance principle, a fast transient optimization conversion process is performed on the previous reference period square wave voltage signal of the low level pulse width of each phase-shifted square wave voltage signal to output a reference period corrected square wave voltage signal;

[0011] The transient conduction timing of the bridge arm switch tubes of each port is determined according to the reference period corrected square wave voltage signal.

[0012] Optionally, the method further includes:

[0013] Determine the phase shift direction and phase shift angle according to the phase shift square wave voltage signal;

[0014] Determine, according to the phase shift direction and the phase shift angle, whether the phase-shifted square wave voltage signal is a right-phase-shifted square wave voltage signal or a left-phase-shifted square wave voltage signal;

[0015] According to the volt-second balance principle, a fast transient optimization conversion process is performed on the previous reference period square wave voltage signal of the low level pulse width of each phase-shifted square wave voltage signal to output a reference period corrected square wave voltage signal; including:

[0016] If the phase-shifted square wave voltage signal is a right-phase-shifted square wave voltage signal, according to the volt-second balance principle, a fast transient optimization conversion process is performed on the previous reference cycle square wave voltage signal of the low-level pulse width of each right-phase-shifted square wave voltage signal to output a first reference cycle corrected square wave voltage signal;

[0017] If the phase-shifted square wave voltage signal is a left-phase-shifted square wave voltage signal, according to the volt-second balance principle, a fast transient optimization conversion process is performed on the previous reference cycle square wave voltage signal of the low-level pulse width of each left-phase-shifted square wave voltage signal to output a second reference cycle corrected square wave voltage signal.

[0018] Optionally, according to the volt-second balance principle, a fast transient optimization conversion process is performed on the previous reference cycle square wave voltage signal of the low level pulse width of each right-shifted square wave voltage signal to output a first reference cycle corrected square wave voltage signal, including:

[0019] According to the volt-second balance principle, the high-level pulse width length is increased in the square wave voltage signal in the first half cycle of the high-level pulse width of each right-shifted square wave voltage signal so that the high-level pulse width length in the first reference cycle is the same as the low-level pulse width length; wherein the first reference cycle is the sum of the reference square wave signal cycle and the phase shift angle corresponding to the right shift in the phase shift direction; the reference square wave signal is the square wave voltage signal output by any of the circuit sub-models in a steady state;

[0020] In the first reference period, a first reference period corrected square wave voltage signal is determined according to the high level pulse width length and the low level pulse width length; wherein the duty cycle of the first reference period corrected square wave voltage signal is not 50%.

[0021] Optionally, according to the volt-second balance principle, a fast transient optimization conversion process is performed on the previous reference cycle square wave voltage signal of the low level pulse width of each left-shifted square wave voltage signal to output a second reference cycle corrected square wave voltage signal, including:

[0022] According to the volt-second balance principle, the high-level pulse width of each left-phase-shifted square wave voltage signal is shortened so that the high-level pulse width length is the same as the low-level pulse width length in the second reference period; wherein the second reference period is the sum of the reference square wave signal period and the phase shift angle corresponding to the left shift in the phase shift direction; the reference square wave signal is the square wave voltage signal output by any of the circuit sub-models in a steady state;

[0023] In the second reference period, a second reference period corrected square wave voltage signal is determined according to the high level pulse width and the low level pulse width; wherein the duty cycle of the second reference period corrected square wave voltage signal is not 50%.

[0024] Optionally, according to the volt-second balance principle, the high-level pulse width length is increased in the square wave voltage signal in the first half cycle of the high-level pulse width of each right-shifted square wave voltage signal so that the high-level pulse width length in the first reference cycle is the same as the low-level pulse width length, specifically:

[0025]

[0026] W 1 +W 2 =T hs (2)

[0027] Among them, W 1 To increase the high level pulse width; W 2 is the low level pulse width length in the first half cycle of the square wave voltage signal; T hs is the reference square wave signal period; 2T hs +δ is the first reference period.

[0028] Optionally, according to the volt-second balance principle, the high level pulse width of each left-shifted square wave voltage signal is shortened so that the high level pulse width length is the same as the low level pulse width length in the second reference period, specifically:

[0029]

[0030] W 1 +W 2 =T hs (2)

[0031] Among them, T hs -|δ|+W 1 To shorten the high level pulse width after the high level pulse width of each left-shifted square wave voltage signal; 2 is the length of the low level pulse width in the first half cycle of the high level pulse width of each left-shifted square wave voltage signal; 2T hs -δ is the second reference period.

[0032] Optionally, the method further includes:

[0033] Input the DC voltage of each port into the three-active full-bridge converter circuit model to determine the steady-state timing of the bridge arm switch tube of each port;

[0034] When the DC voltage of each port changes transiently, the phase shift timing of the switch tube of each port bridge arm is determined according to the DC voltage of each port after the change and the circuit model of the three-active full-bridge converter.

[0035] According to the steady-state timing of the bridge arm switch tubes of each port, the transient timing of the bridge arm switch tubes of each port, and the phase shift timing of the bridge arm switch tubes of each port, a complete working timing of the three-active full-bridge converter is formed;

[0036] The complete working sequence of the three-active full-bridge converter is input into the simulation model to output the result.

[0037] In a second aspect, an embodiment of the present invention further provides a three-active full-bridge converter transient optimization control device, which is applied to the three-active full-bridge converter transient optimization control method described in the first aspect above, and the three-active full-bridge converter transient optimization control device includes:

[0038] The AC voltage determination module of each port is used to input the DC voltage of each port into the three-active full-bridge converter circuit model to determine the output AC voltage of each port;

[0039] A circuit model building module, used for determining three dual-active full-bridge converter circuit models according to the AC voltages of each port and the three active full-bridge converter circuit models;

[0040] A steady-state square wave voltage signal output module, used for converting each of the dual-active full-bridge converter circuit models into four circuit sub-models, and determining and outputting a square wave voltage signal according to each of the four circuit sub-models;

[0041] A transient square wave voltage signal output module is used for returning to execute the circuit model according to the changed voltage of each port and the three-active full-bridge converter when the DC voltage of each port changes transiently, ... until it is determined that the four circuit sub-models after the change output each phase-shifted square wave voltage signal;

[0042] An optimization module, for performing fast transient optimization conversion processing on the previous reference period square wave voltage signal of the low level pulse width of each phase-shifted square wave voltage signal according to the volt-second balance principle to output a reference period corrected square wave voltage signal;

[0043] The timing output module is used to determine the transient conduction timing of the bridge arm switch tubes of each port according to the reference period corrected square wave voltage signal.

[0044] In a third aspect, an embodiment of the present invention further provides an electronic device, the electronic device comprising:

[0045] at least one processor; and

[0046] a memory communicatively connected to the at least one processor; wherein,

[0047] The memory stores a computer program executable by the at least one processor, and the computer program is executed by the at least one processor so that the at least one processor can execute the transient optimization control method of the three-active full-bridge converter described in the first aspect.

[0048] In a fourth aspect, an embodiment of the present invention further provides a computer-readable storage medium, wherein the computer-readable storage medium stores computer instructions, and the computer instructions are used to enable a processor to implement the transient optimization control method of the three-active full-bridge converter described in the first aspect when executed.

[0049] In an embodiment of the present invention, the DC voltage of each port is input into a three-active full-bridge converter circuit model to determine the output AC voltage of each port; three dual-active full-bridge converter circuit models are determined according to the AC voltage of each port and the three-active full-bridge converter circuit model; each of the dual-active full-bridge converter circuit models is converted into four circuit sub-models, and each square wave voltage signal is output according to the four circuit sub-models; when the DC voltage of each port changes transiently, the execution is returned to the DC voltage of each port after the change and the three-active full-bridge converter circuit model, ... until each phase-shifted square wave voltage signal is output according to the four circuit sub-models after the change; and the low voltage of each phase-shifted square wave voltage signal is adjusted according to the volt-second balance principle. The square wave voltage signal of the previous reference cycle with a flat pulse width is subjected to fast transient optimization conversion processing to output a reference cycle corrected square wave voltage signal; the transient conduction timing of the bridge arm switch tube of each port is determined according to the reference cycle corrected square wave voltage signal, so that the multiple dual-active converters after the three-active full-bridge converter are decoupled, and each dual-active converter is converted into four circuit sub-models, and then the low-level pulse width of the previous reference cycle square wave voltage signal output by each circuit sub-model is optimized and controlled, which simplifies the complexity of the optimization analysis algorithm and has a fast optimization control speed, thereby quickly and better compensating for the DC bias current caused by the phase shift generated by each phase-shifted square wave voltage signal output by the four circuit sub-models when the voltage of each port changes transiently. BRIEF DESCRIPTION OF THE DRAWINGS

[0050] Figure 1 It is a flow chart of a transient optimization control method of a triple active full-bridge converter provided by an embodiment of the present invention;

[0051] Figure 2 It is a structural schematic diagram of a three-active full-bridge converter circuit model provided by an embodiment of the present invention;

[0052] Figure 3 1 is a schematic diagram of the structure of three dual-active full-bridge converter circuit models provided by an embodiment of the present invention;

[0053] Figure 4 The dual active full-bridge converter circuit model (1) provided in the embodiment of the present invention is converted into four circuit sub-model diagrams;

[0054] Figure 5 is a steady-state square wave voltage signal waveform diagram provided by an embodiment of the present invention;

[0055] Figure 6 It is a flow chart of another transient optimization control method of a triple active full-bridge converter provided by an embodiment of the present invention;

[0056] Figure 7It is a waveform diagram of a phase-shifted square wave voltage signal generated after a steady-state square wave voltage signal provided by an embodiment of the present invention;

[0057] Figure 8 It is a structural schematic diagram of a transient optimization control device for a triple active full-bridge converter provided by an embodiment of the present invention;

[0058] Fig. 9 It is a structural schematic diagram of an electronic device provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0059] The present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. It is to be understood that the specific embodiments described herein are only used to explain the present invention, rather than to limit the present invention. It should also be noted that, for ease of description, only parts related to the present invention, rather than all structures, are shown in the accompanying drawings.

[0060] Figure 1 1 is a flow chart of a transient optimization control method for a three-active full-bridge converter provided by an embodiment of the present invention; this embodiment can be applied to optimize the control of the DC bias current generated by the transient change of the port power of the three-active full-bridge converter or the transient change of the port energy transmission direction. The method can be executed by a transient optimization control device for a three-active full-bridge converter, such as Figure 1 As shown, the method specifically comprises the following steps:

[0061] S110, inputting the DC voltage of each port into the three-active full-bridge converter circuit model to determine the output AC voltage of each port.

[0062] Among them, the three-active full-bridge converter circuit model is established according to the three-active full-bridge converter circuit structure; Figure 2 is a schematic diagram of a structure of a three-active full-bridge converter circuit model provided by an embodiment of the present invention; Figure 2 As shown, the three-active full-bridge converter circuit model includes three ports Port1, Port2 and Port3, each port includes an H-bridge circuit, two filter capacitors and a filter inductor; the H-bridge circuit is composed of an upper and lower bridge arm composed of four crystal switch tubes; a transformer is set between each port to allow bidirectional power flow and provide comprehensive electrical isolation. The DC voltage of each port can be input into the three-active full-bridge converter circuit model to determine the AC voltage of each port; specifically, the first port input voltage V1, the second port target output voltage V2 and the third port target output voltage V3 can be input into the three-active full-bridge converter circuit model to output the first port output AC voltage V AB , the second port input AC voltage V CD 、The third port inputs AC voltage V EF ; It can also output the first port output AC current iL1 , the second port input AC current i L ' 2 、The third port inputs AC current i L ' 3 Of course, it is understandable that the first port Port1 can also be used as the second port Port2, or the third port Port3, the second port Port2 can also be used as the second port Port2, or the third port Port3, and the third port Port3 can also be used as the second port Port2, or the first port Port1, and there is no specific limitation on this.

[0063] S120, determining three dual-active full-bridge converter circuit models according to the AC voltage of each port and the three active full-bridge converter circuit models;

[0064] Specifically, Figure 3 is a schematic diagram of the structure of three dual-active full-bridge converter circuit models provided by an embodiment of the present invention; Figure 3 As shown, according to the AC voltage of each port (V AB 、V CD 、V EF ) and the three active full-bridge converter circuit models determine the three dual-active full-bridge converter circuit models (1)(2)(3), specifically: using the superposition principle, according to the output AC voltage (V AB ), the second port input AC voltage (V CD ) and three active full-bridge converter circuit models to establish a first dual-active full-bridge converter circuit model (1); output AC voltage (V AB ), the third port input AC voltage (V EF ) and the three active full-bridge converter circuit models to establish a second dual-active full-bridge converter circuit model (2); outputting an AC voltage (V CD ), the third port input AC voltage (V EF ) and three active full-bridge converter circuit models to establish a third dual-active full-bridge converter circuit model (3). In this way, the complex three-active full-bridge converter circuit model is transformed into three simple dual-active full-bridge converter circuit models; each dual-active full-bridge converter circuit model includes two ports, and energy conversion is achieved between the ports.

[0065] S130, converting each dual active full-bridge converter circuit model into four circuit sub-models, and determining to output each steady-state square wave voltage signal according to each circuit sub-model.

[0066] Here, the conversion of the dual active full-bridge converter circuit model (1) into four circuit sub-models is used as an example for explanation; Figure 4The dual active full-bridge converter circuit model (1) provided in the embodiment of the present invention is converted into four circuit sub-model diagrams; Figure 4 As shown, by using the superposition principle, the dual active full-bridge converter circuit model (1) can be converted into four circuit sub-models; the four circuit sub-models are to convert the first port output AC voltage (V AB ), the second port input AC voltage (V CD ) after being split; the four circuit sub-models also represent the voltages of the four bridge arms of port Port1 and port Port2 respectively; according to the four circuit sub-models, four steady-state square wave voltage signals can be determined to be output, and each steady-state square wave voltage signal is a square wave signal with a duty cycle of 50%. Figure 5 is a steady-state square wave voltage signal waveform diagram provided by an embodiment of the present invention; Figure 5 As shown, here the first port outputs an AC voltage V AB For example, the first port outputs an AC voltage V AB After splitting, the two steady-state square wave voltage signals V AO And the steady-state square wave voltage signal V BO , whose trajectories are consistent with the driving signals of the bridge arm switch tubes S1, S4 (or S2, S3). The period of the steady-state square wave voltage signal is 2Ths.

[0067] S140, when the DC voltages at each port change transiently, return to execute according to the changed DC voltages at each port and the three-active full-bridge converter circuit model, ... until each phase-shifted square wave voltage signal is output according to each changed circuit sub-model.

[0068] Among them, when the DC voltage of each port changes transiently (such as when the voltage of any port increases or decreases, or when the voltage direction changes suddenly), return to execute the steps in S110-S130, that is, determine the changed AC voltage of each port according to the changed voltage of each port and the three-active full-bridge converter circuit model; determine three dual-active full-bridge converter circuit models according to the changed AC voltage of each port and the three-active full-bridge converter circuit model; convert each dual-active full-bridge converter circuit model into four circuit sub-models, and determine the output of each phase-shifted square wave voltage signal according to each circuit sub-model; that is, when the DC voltage of each port changes transiently, a phase-shifted square wave voltage signal will be generated after the steady-state square wave voltage signal, and the phase-shifted square wave voltage signal is a square wave voltage signal that has a certain phase shift relative to the steady-state square wave voltage signal. When the phase-shifted square wave voltage signal has a phase shift relative to the steady-state square wave voltage signal, a certain DC bias current will be generated.

[0069] S150, according to the volt-second balance principle, a fast transient optimization conversion process is performed on the previous reference period square wave voltage signal of the low level pulse width of each phase-shifted square wave voltage signal to output a reference period corrected square wave voltage signal.

[0070] Among them, it can be seen from the volt-second balance law that if the system is to be kept stable during the transient process, the magnetic flux of the converter within one cycle is 0, that is, the integral of the voltage over time is 0. Figure 4 In the example, taking the bridge arm where point A is located, its magnetic flux can be expressed as follows:

[0071]

[0072] When the phase-shifted square wave voltage signal is phase-shifted relative to the steady-state square wave voltage signal, a certain DC bias current is generated. According to the volt-second balance principle, this embodiment performs a fast transient optimization conversion process on the reference cycle square wave voltage signal before the low-level pulse width of each phase-shifted square wave voltage signal, and the magnetic flux of the reference cycle corrected square wave voltage signal after the conversion process is 0 in the reference cycle, thereby achieving the purpose of optimizing the DC current bias.

[0073] S160, determining the transient conduction timing of the bridge arm switch tubes of each port according to the reference period corrected square wave voltage signal.

[0074] Among them, the trajectory of the reference period corrected square wave voltage signal is consistent with the transient conduction timing of the bridge arm switch tubes of each port; the reference period corrected square wave voltage signal can uniquely determine the transient conduction timing of the bridge arm switch tubes of each port, so that by decoupling the three active full-bridge converters and then converting the multiple dual-active full-bridge converters, each dual-active full-bridge converter is converted into multiple circuit sub-models, and then the square wave signal of the previous cycle of the phase-shifted square wave voltage signal output by each circuit sub-model is optimized and controlled, the complexity of the optimization analysis algorithm is simplified, and the optimization control speed is fast, thereby quickly and better compensating for the DC bias current caused by the phase shift generated by the phase-shifted square wave voltage signals output by the four circuit sub-models when the voltage of each port changes transiently.

[0075] Optionally, based on the above embodiment, the above method is further optimized. Figure 6 is a flow chart of a transient optimization control method for a triple active full-bridge converter provided by an embodiment of the present invention; Figure 6 As shown, the method specifically comprises the following steps:

[0076] S210, inputting the DC voltage of each port into the three-active full-bridge converter circuit model to determine the output AC voltage of each port.

[0077] S220, determining three dual-active full-bridge converter circuit models according to the AC voltages of each port and the three-active full-bridge converter circuit models.

[0078] S230, converting each dual active full-bridge converter circuit model into four circuit sub-models, and determining to output a square wave voltage signal according to each of the four circuit sub-models.

[0079] S240, when the DC voltages at each port change transiently, return to execute according to the DC voltages at each port after the change and the three-active full-bridge converter circuit model, ... until each phase-shifted square wave voltage signal is output according to the four circuit sub-models after the change.

[0080] S250. Determine the phase shift direction and the phase shift angle according to the phase shift square wave voltage signal, and determine whether the phase shift square wave voltage signal is a right phase shift square wave voltage signal or a left phase shift square wave voltage signal according to the phase shift direction and the phase shift angle; if the phase shift square wave voltage signal is a right phase shift square wave voltage signal, execute S260; if the phase shift square wave voltage signal is a left phase shift square wave voltage signal, execute S261.

[0081] in, Figure 7 is a waveform diagram of a phase-shifted square wave voltage signal generated after a steady-state square wave voltage signal provided by an embodiment of the present invention; Figure 7 As shown, here the steady-state square wave voltage signal is V AO For example, when the DC voltage of each port changes transiently during the (K+2)T period, a phase-shifted square wave voltage signal P is generated after the steady-state square wave voltage signal, that is, the phase-shifted square wave voltage signal P generates a certain phase shift relative to the steady-state square wave voltage signal; the phase shift direction and phase shift angle can be determined according to the phase-shifted square wave voltage signal P; specifically, refer to Figure 7 V AO δ>0 waveform, when the rising edge of the phase-shifted square wave voltage signal P in the range of (K+2)T moves backward relative to the rising edge of the steady-state square wave voltage signal in the range of KT, the phase-shifted square wave voltage signal P generates a right phase shift δ relative to the steady-state square wave voltage signal, and the phase-shifted square wave voltage signal P is a right phase-shifted square wave voltage signal;

[0082] Reference Figure 7 V AO δ<0 waveform, when the falling edge of the phase-shifted square wave voltage signal P moves forward relative to the falling edge of the steady-state square wave voltage signal, the phase-shifted square wave voltage signal P produces a left phase shift of -δ relative to the steady-state square wave voltage signal, and the phase-shifted square wave voltage signal P is a left phase-shifted square wave voltage signal.

[0083] S260, according to the volt-second balance principle, perform fast transient optimization conversion processing on the previous reference cycle square wave voltage signal of the low level pulse width of each right-shifted square wave voltage signal to output a first reference cycle corrected square wave voltage signal;

[0084] According to the volt-second balance principle, a fast transient optimization conversion process is performed on the previous reference cycle square wave voltage signal of the low level pulse width of each right-shifted square wave voltage signal P to output a first reference cycle corrected square wave voltage signal, including:

[0085] 1), reference Figure 7 V AO δ>0 waveform, according to the volt-second balance principle, the high-level pulse width length W is increased in the first half cycle of the high-level pulse width of each right-shifted square wave voltage signal P 1 So that the high level pulse width length and the low level pulse width length in the first reference period are the same; wherein the first reference period is the reference square wave signal period 2T hs (Refer to the square wave signal period 2T hs The reference square wave signal is the square wave voltage signal output by any circuit sub-model in steady state (see Figure 7 Reference waveform in );

[0086] Specifically, the voltage in the first reference cycle satisfies:

[0087]

[0088] W 1 +W 2 =T hs (2)

[0089] Among them, W 1 To increase the high level pulse width; W 2 is the low level pulse width length in the first half cycle of the square wave voltage signal; 2T hs is the reference square wave signal period; 2T hs +δ is the first reference period.

[0090] From formulas (1) and (2), we can get:

[0091] 2) In the first reference cycle 2T hs +δ, determine the first reference period corrected square wave voltage signal according to the high level pulse width length and the low level pulse width length (see Figure 7 ); wherein, the duty cycle of the first reference period corrected square wave voltage signal is not 50%.

[0092] This embodiment ensures the magnetic flux balance of the first reference period corrected square wave voltage signal between the right-shifted square wave voltage signal P and the steady-state square wave voltage signal, thereby achieving the effect of suppressing the DC bias current. 1 With W 2 In the half period T of the reference square wave signal hs Optimized control is accomplished, which also improves the speed of suppressing the DC bias current caused by the right-shifted phase.

[0093] S261. According to the volt-second balance principle, a fast transient optimization conversion process is performed on the previous reference cycle square wave voltage signal of the low level pulse width of each left-shifted square wave voltage signal to output a second reference cycle corrected square wave voltage signal.

[0094] According to the volt-second balance principle, a fast transient optimization conversion process is performed on the previous reference cycle square wave voltage signal of the low level pulse width of each left-shifted square wave voltage signal P to output a second reference cycle corrected square wave voltage signal, including:

[0095] 1)Reference Figure 7 V AO δ<0 waveform, according to the volt-second balance principle, shorten the high-level pulse width of each left-shifted square wave voltage signal so that the high-level pulse width length is the same as the low-level pulse width length in the second reference period; wherein the second reference period is the reference square wave signal period 2T hs The phase shift direction is the sum of the phase shift angle -δ corresponding to the left shift; the reference square wave signal is the square wave voltage signal output by any circuit sub-model in the steady state;

[0096] Specifically, the voltage in the second reference period satisfies:

[0097]

[0098] W 1 +W 2 =T hs (2)

[0099] Among them, T hs -|δ|+W 1 To shorten the high level pulse width after the high level pulse width of each left-shifted square wave voltage signal; W 2 is the length of the low level pulse width in the first half cycle of the high level pulse width of each left-shifted square wave voltage signal; 2T hs -δ is the second reference period.

[0100] From formula (3) and (2), we can get:

[0101] 2) In the second reference period 2T hs -δ, the second reference period corrected square wave voltage signal is determined according to the high level pulse width length and the low level pulse width length (see Figure 7 The signal in the red frame in FIG); wherein the duty cycle of the second reference period corrected square wave voltage signal is not 50%;

[0102] This embodiment ensures the magnetic flux balance of the second reference period corrected square wave voltage signal between the left-shifted square wave voltage signal P and the steady-state square wave voltage signal, thereby achieving the effect of suppressing the DC bias current. 1 With W2 In the half period T of the reference square wave signal hs Optimized control is accomplished, which also improves the speed of suppressing the DC bias current caused by the left-shifted phase.

[0103] S270 , determining the transient conduction timing of the bridge arm switch tubes of each port according to the first reference period corrected square wave voltage signal and the second reference period corrected square wave voltage signal respectively.

[0104] Among them, in order to verify the reliability of the transient conduction timing of the bridge arm switch tubes of each port, the DC voltage of each port can be input into the three-active full-bridge converter circuit model to determine the steady-state timing of the bridge arm switch tubes of each port; when the DC voltage of each port changes transiently, the phase shift timing of the bridge arm switch tubes of each port is determined according to the changed DC voltage of each port and the three-active full-bridge converter circuit model, and the complete working timing of the three-active full-bridge converter is constructed according to the steady-state timing of the bridge arm switch tubes of each port, the transient timing of the bridge arm switch tubes of each port and the phase shift timing of the bridge arm switch tubes of each port. In this way, the complete working timing of the three-active full-bridge converter is simulated, and the reliability of the transient conduction timing of the bridge arm switch tubes of each port can be verified well according to the simulation results.

[0105] Based on the above embodiments, this embodiment further identifies and judges different types of phase-shifted square wave voltage signals, and according to the volt-second balance principle, performs specific rapid transient optimization conversion processing on the previous reference cycle square wave voltage signals of the low-level pulse width of different types of phase-shifted square wave voltage signals, that is, by controlling the magnetic flux of the transient period, different reference cycle corrected square wave voltage signals are output, thereby quickly and better compensating for the DC bias current caused by the phase shift generated by each phase-shifted square wave voltage signal output by the four circuit sub-models when the voltage of each port changes transiently.

[0106] An embodiment of the present invention also provides a three-active full-bridge converter transient optimization control device; the device can execute a three-active full-bridge converter transient optimization control method provided by any embodiment of the present invention, and has corresponding functional modules and beneficial effects of the execution method. Figure 8 is a schematic diagram of a structure of a transient optimization control device for a triple active full-bridge converter provided by an embodiment of the present invention; Figure 8 As shown, the device comprises:

[0107] The AC voltage determination module 100 of each port is used to input the DC voltage of each port into the three-active full-bridge converter circuit model to determine the AC voltage of each port;

[0108] A circuit model building module 200 is used to determine three dual-active full-bridge converter circuit models according to the AC voltage of each port and the circuit model of the three active full-bridge converters;

[0109] The steady-state square wave voltage signal output module 300 is used to convert each dual-active full-bridge converter circuit model into four circuit sub-models, and determine and output each reference square wave voltage signal according to each circuit sub-model;

[0110] The transient square wave voltage signal output module 400 is used to return to execute the output of each real-time phase-shifted square wave voltage signal according to each port voltage after the change and the three-active full-bridge converter circuit model when the DC voltage of each port changes transiently... until it is determined that each circuit sub-model after the change outputs each real-time phase-shifted square wave voltage signal;

[0111] The optimization module 500 is used to perform fast transient optimization conversion processing on the previous reference period square wave voltage signal of the low level pulse width of each phase-shifted square wave voltage signal according to the volt-second balance principle to output a reference period corrected square wave voltage signal;

[0112] The timing output module 600 is used to determine the transient conduction timing of the bridge arm switch tubes of each port according to the reference period corrected square wave voltage signal.

[0113] An embodiment of the present invention further provides an electronic device, Fig. 9 It is a structural schematic diagram of an electronic device provided by an embodiment of the present invention. The electronic device is intended to represent various forms of digital computers, such as embedded computers, desktop computers, workbenches, personal digital assistants, servers, blade servers, mainframe computers, and other suitable computers. The electronic device can also represent various forms of mobile devices, such as personal digital processing, cellular phones, smart phones, wearable devices (such as helmets, glasses, watches, etc.) and other similar computing devices. The components shown herein, their connections and relationships, and their functions are merely examples and are not intended to limit the implementation of the present invention described and / or required herein.

[0114] like Fig. 9 As shown, the electronic device 01 includes at least one processor 11, and a memory connected to the at least one processor 11, such as a read-only memory (ROM) 12, a random access memory (RAM) 13, etc., wherein the memory stores a computer program that can be executed by at least one processor, and the processor 11 can perform various appropriate actions and processes according to the computer program stored in the read-only memory (ROM) 12 or the computer program loaded from the storage unit 18 to the random access memory (RAM) 13. In the RAM 13, various programs and data required for the operation of the electronic device 100 can also be stored. The processor 11, the ROM 12, and the RAM 13 are connected to each other through a bus 14. An input / output (I / O) interface 15 is also connected to the bus 14.

[0115] A number of components in the electronic device 01 are connected to the I / O interface 15, including: an input unit 16, such as a keyboard, a mouse, etc.; an output unit 17, such as various types of displays, speakers, etc.; a storage unit 18, such as a disk, an optical disk, etc.; and a communication unit 19, such as a network card, a modem, a wireless communication transceiver, etc. The communication unit 19 allows the electronic device 100 to exchange information / data with other devices through a computer network such as the Internet and / or various telecommunication networks.

[0116] The processor 11 may be a variety of general and / or special processing components with processing and computing capabilities. Some examples of the processor 11 include, but are not limited to, a central processing unit (CPU), a graphics processing unit (GPU), various dedicated artificial intelligence (AI) computing chips, various processors running machine learning model algorithms, a digital signal processor (DSP), and any appropriate processor, controller, microcontroller, etc. The processor 11 executes the various methods and processes described above, such as a transient optimization control method for a three-active full-bridge converter.

[0117] In some embodiments, a three-active full-bridge converter transient optimization control method can be implemented as a computer program, which is tangibly contained in a computer-readable storage medium, such as a storage unit 18. In some embodiments, part or all of the computer program can be loaded and / or installed on the electronic device 01 via the ROM 12 and / or the communication unit 19. When the computer program is loaded into the RAM 13 and executed by the processor 11, one or more steps of the three-active full-bridge converter transient optimization control method described above can be executed. Alternatively, in other embodiments, the processor 11 can be configured to execute a three-active full-bridge converter transient optimization control method by any other appropriate means (for example, by means of firmware).

[0118] Various implementations of the systems and techniques described above herein can be implemented in digital electronic circuit systems, integrated circuit systems, field programmable gate arrays (FPGAs), application specific integrated circuits (ASICs), application specific standard products (ASSPs), systems on chips (SOCs), load programmable logic devices (CPLDs), computer hardware, firmware, software, and / or combinations thereof. These various implementations can include: being implemented in one or more computer programs that can be executed and / or interpreted on a programmable system including at least one programmable processor, which can be a special purpose or general purpose programmable processor that can receive data and instructions from a storage system, at least one input device, and at least one output device, and transmit data and instructions to the storage system, the at least one input device, and the at least one output device.

[0119] Computer programs for implementing the methods of the present invention may be written in any combination of one or more programming languages. These computer programs may be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing device, so that when the computer program is executed by the processor, the functions / operations specified in the flow chart and / or block diagram are implemented. The computer program may be executed entirely on the machine, partially on the machine, partially on the machine and partially on a remote machine as a stand-alone software package, or entirely on a remote machine or server.

[0120] In the context of the present invention, a computer-readable storage medium may be a tangible medium that may contain or store a computer program for use by or in combination with an instruction execution system, device or equipment. A computer-readable storage medium may include, but is not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, devices or equipment, or any suitable combination of the foregoing. Alternatively, a computer-readable storage medium may be a machine-readable signal medium. A more specific example of a machine-readable storage medium may include an electrical connection based on one or more lines, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.

[0121] To provide interaction with a user, the systems and techniques described herein may be implemented on an electronic device having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to the user; and a keyboard and a pointing device (e.g., a mouse or trackball) through which the user can provide input to the electronic device. Other types of devices may also be used to provide interaction with the user; for example, the feedback provided to the user may be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user may be received in any form (including acoustic input, voice input, or tactile input).

[0122] The systems and techniques described herein may be implemented in a computing system that includes backend components (e.g., as a data server), or a computing system that includes middleware components (e.g., an application server), or a computing system that includes frontend components (e.g., a user computer with a graphical user interface or a web browser through which a user can interact with implementations of the systems and techniques described herein), or a computing system that includes any combination of such backend components, middleware components, or frontend components. The components of the system may be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include: a local area network (LAN), a wide area network (WAN), a blockchain network, and the Internet.

[0123] A computing system may include a client and a server. The client and the server are generally remote from each other and usually interact through a communication network. The client and server relationship is generated by computer programs running on the corresponding computers and having a client-server relationship with each other. The server may be a cloud server, also known as a cloud computing server or cloud host, which is a host product in the cloud computing service system to solve the defects of difficult management and weak business scalability in traditional physical hosts and VPS services.

[0124] It should be understood that the various forms of processes shown above can be used to reorder, add or delete steps. For example, the steps described in the present invention can be executed in parallel, sequentially or in different orders, as long as the desired results of the technical solution of the present invention can be achieved, and this document does not limit this.

[0125] The above specific implementations do not constitute a limitation on the protection scope of the present invention. It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and substitutions can be made according to design requirements and other factors. Any modification, equivalent substitution and improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

[0126] Note that the above are only preferred embodiments of the present invention and the technical principles used. Those skilled in the art will understand that the present invention is not limited to the specific embodiments described herein, and that various obvious changes, readjustments and substitutions can be made by those skilled in the art without departing from the scope of protection of the present invention. Therefore, although the present invention has been described in more detail through the above embodiments, the present invention is not limited to the above embodiments, and may include more other equivalent embodiments without departing from the concept of the present invention, and the scope of the present invention is determined by the scope of the appended claims.

Claims

1. A transient optimization control method for a triple active full-bridge converter, characterized in that: include: Inputting the DC voltage of each port into the three-active full-bridge converter circuit model to determine the output AC voltage of each port; Determining three dual-active full-bridge converter circuit models according to the AC voltages of each port and the three active full-bridge converter circuit models; Converting each of the dual active full-bridge converter circuit models into four circuit sub-models, and determining output square wave voltage signals according to each of the four circuit sub-models; When the DC voltages at each port change transiently, returning to execute according to the DC voltages at each port after the change and the three-active full-bridge converter circuit model, ... until each phase-shifted square wave voltage signal is output according to the four circuit sub-models after the change; According to the volt-second balance principle, a fast transient optimization conversion process is performed on the previous reference period square wave voltage signal of the low level pulse width of each phase-shifted square wave voltage signal to output a reference period corrected square wave voltage signal; The transient conduction timing of the bridge arm switch tubes of each port is determined according to the reference period corrected square wave voltage signal.

2. The transient optimization control method of the triple active full-bridge converter according to claim 1 is characterized in that: Also includes: Determine the phase shift direction and phase shift angle according to the phase shift square wave voltage signal; Determining whether the phase-shifted square wave voltage signal is a right-phase-shifted square wave voltage signal or a left-phase-shifted square wave voltage signal according to the phase-shifted direction and the phase-shifted angle; According to the volt-second balance principle, a fast transient optimization conversion process is performed on the previous reference period square wave voltage signal of the low level pulse width of each phase-shifted square wave voltage signal to output a reference period corrected square wave voltage signal; including: If the phase-shifted square wave voltage signal is the right-phase-shifted square wave voltage signal, according to the volt-second balance principle, a fast transient optimization conversion process is performed on the previous reference cycle square wave voltage signal of the low-level pulse width of each right-phase-shifted square wave voltage signal to output a first reference cycle corrected square wave voltage signal; If the phase-shifted square wave voltage signal is the left-phase-shifted square wave voltage signal, according to the volt-second balance principle, the previous reference cycle square wave voltage signal of the low-level pulse width of each left-phase-shifted square wave voltage signal is subjected to fast transient optimization conversion processing to output a second reference cycle corrected square wave voltage signal.

3. The transient optimization control method of the triple active full-bridge converter according to claim 2 is characterized in that: According to the volt-second balance principle, a fast transient optimization conversion process is performed on the previous reference cycle square wave voltage signal of the low level pulse width of each right-shifted square wave voltage signal to output a first reference cycle corrected square wave voltage signal, including: According to the volt-second balance principle, the high-level pulse width length is increased in the square wave voltage signal in the first half cycle of the high-level pulse width of each right-shifted square wave voltage signal so that the high-level pulse width length in the first reference cycle is the same as the low-level pulse width length; wherein the first reference cycle is the sum of the reference square wave signal cycle and the phase shift angle corresponding to the right shift in the phase shift direction; the reference square wave signal is the square wave voltage signal output by any of the circuit sub-models in a steady state; In the first reference period, a first reference period corrected square wave voltage signal is determined according to the high level pulse width length and the low level pulse width length; wherein the duty cycle of the first reference period corrected square wave voltage signal is not 50%.

4. The transient optimization control method of the triple active full-bridge converter according to claim 2 is characterized in that: According to the volt-second balance principle, a fast transient optimization conversion process is performed on the previous reference cycle square wave voltage signal of the low level pulse width of each left-shifted square wave voltage signal to output a second reference cycle corrected square wave voltage signal, including: According to the volt-second balance principle, the high-level pulse width of each left-phase-shifted square wave voltage signal is shortened so that the high-level pulse width length is the same as the low-level pulse width length in the second reference period; wherein the second reference period is the sum of the reference square wave signal period and the phase shift angle corresponding to the left shift in the phase shift direction; the reference square wave signal is the square wave voltage signal output by any of the circuit sub-models in a steady state; In the second reference period, a second reference period corrected square wave voltage signal is determined according to the high level pulse width and the low level pulse width; wherein the duty cycle of the second reference period corrected square wave voltage signal is not 50%.

5. The transient optimization control method of the triple active full-bridge converter according to claim 3 is characterized in that: According to the volt-second balance principle, the high-level pulse width length is increased in the first half-cycle square wave voltage signal of the high-level pulse width of each right-shifted square wave voltage signal so that the high-level pulse width length in the first reference cycle is the same as the low-level pulse width length, specifically: W1+W2=T hs (2) Wherein, W1 is the length of the increased high-level pulse width; W2 is the length of the low-level pulse width in the first half-cycle square wave voltage signal; T hs is the reference square wave signal period; 2T hs +δ is the first reference period.

6. The transient optimization control method of triple active full-bridge converter according to claim 4, characterized in that: According to the volt-second balance principle, the high-level pulse width of each left-shifted square wave voltage signal is shortened so that the high-level pulse width length is the same as the low-level pulse width length in the second reference period, specifically: W1+W2=T hs (2) Among them, T hs -|δ|+W1 is the high-level pulse width after shortening the high-level pulse width of each left-shifted square wave voltage signal; W2 is the low-level pulse width length of the square wave voltage signal in the first half cycle of the high-level pulse width of each left-shifted square wave voltage signal; 2T hs -δ is the second reference period.

7. The transient optimization control method of a triple active full-bridge converter according to claim 1, characterized in that: Also includes: Input the DC voltage of each port into the three-active full-bridge converter circuit model to determine the steady-state timing of the bridge arm switch tube of each port; When the DC voltage of each port changes transiently, the phase shift timing of the switch tube of each port bridge arm is determined according to the changed DC voltage of each port and the circuit model of the three-active full-bridge converter. The complete working timing of the three-active full-bridge converter is formed according to the steady-state timing of the bridge arm switch tubes of each port, the transient timing of the bridge arm switch tubes of each port, and the phase shift timing of the bridge arm switch tubes of each port; The complete working sequence of the three-active full-bridge converter is input into the simulation model to output the result.

8. A transient optimization control device for a triple active full-bridge converter, characterized in that: The transient optimization control method for a triple-active full-bridge converter according to any one of claims 1 to 7 is applied, wherein the transient optimization control device for a triple-active full-bridge converter comprises: The AC voltage determination module of each port is used to input the DC voltage of each port into the three-active full-bridge converter circuit model to determine the output AC voltage of each port; A circuit model building module, used for determining three dual-active full-bridge converter circuit models according to the AC voltages of each port and the three active full-bridge converter circuit models; A steady-state square wave voltage signal output module, used for converting each of the dual-active full-bridge converter circuit models into four circuit sub-models, and determining and outputting a square wave voltage signal according to each of the four circuit sub-models; A transient square wave voltage signal output module is used for returning to execute the circuit model according to the changed voltage of each port and the three-active full-bridge converter when the DC voltage of each port changes transiently, ... until it is determined that the four circuit sub-models after the change output each phase-shifted square wave voltage signal; An optimization module, for performing fast transient optimization conversion processing on the previous reference period square wave voltage signal of the low level pulse width of each phase-shifted square wave voltage signal according to the volt-second balance principle to output a reference period corrected square wave voltage signal; The timing output module is used to determine the transient conduction timing of the bridge arm switch tubes of each port according to the reference period corrected square wave voltage signal.

9. An electronic device, characterized in that: The electronic device comprises: at least one processor; and a memory communicatively connected to the at least one processor; wherein, The memory stores a computer program executable by the at least one processor, and the computer program is executed by the at least one processor so that the at least one processor can execute the transient optimization control method for a three-active full-bridge converter according to any one of claims 1 to 7.

10. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores computer instructions, and the computer instructions are used to enable a processor to implement the transient optimization control method for a three-active full-bridge converter according to any one of claims 1 to 7 when executed.

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