A method and system for realizing four-level energy storage converter capacitor voltage balance under low modulation ratio condition

Abstract

The application discloses a method for realizing capacitor voltage balance of a four-level energy storage converter under a low modulation ratio condition. ref The method transforms a space vector diagram of the four-level energy storage converter under an alpha-beta coordinate system to a g-h coordinate system under a low modulation ratio to obtain the latest three vector of a synthesized reference voltage vector V ref and duty cycles of actions of the three vectors, thereby simplifying a sector judgment process and reducing a calculation process of the duty cycles of the actions of the basic voltage vectors; then, according to a small triangle where the reference voltage vector V ref is located and the duty cycles of the actions of the three vectors of the synthesized reference voltage vector V ref , a five-segment and seven-segment modulation synthesis mode is adopted to obtain a switch sequence corresponding to each small sector; finally, the switch sequence corresponding to the small sector is evaluated through a target function, and a comparison operation is used to select the switch sequence when a minimum value of the target function as an optimal switch sequence. The capacitor voltage balance of the four-level energy storage converter is realized. The application can solve the technical problem that the existing auxiliary circuit balance method has poor practicability.

Description

Technical Field

[0001] This invention belongs to the field of power electronics technology, and more specifically, relates to a method and system for achieving capacitor voltage balance in a four-level energy storage converter under low modulation ratio conditions. Background Technology

[0002] Among currently used multilevel topologies, the three-level NPC type energy storage converter is the most widely used in motor drives, high-voltage energy storage for new energy sources, and wind power generation due to its simple structure and fewer components. However, limitations imposed by the voltage withstand levels of power electronic devices and the topology of the energy storage converter restrict its application in medium- and high-voltage high-power applications above 3.3kV. To improve the output voltage level, a higher number of voltage levels must be adopted. However, as the number of voltage levels increases, the complexity of the energy storage converter's structure and system control increases exponentially. Therefore, the four-level diode-clamped converter (4L-DCC) is a highly competitive topology with broad application prospects. In research on multilevel energy storage converters, DC bus capacitor voltage balance is a necessary condition for the stable operation of the entire energy storage converter system. Unlike the three-level NPC energy storage converter, which only requires controlling one capacitor voltage balance when the DC bus voltage is stable, the three bus capacitor voltages of the four-level energy storage converter are strongly coupled, increasing the control difficulty.

[0003] The methods currently used to achieve DC-side capacitor voltage balance in four-level diode-clamped energy storage converters can be categorized as follows:

[0004] (1) External auxiliary circuit balancing method: This method adds hardware circuits, mainly including auxiliary circuit balancing method and independent power supply balancing method. Auxiliary circuit balancing method adds active or passive circuits, while independent DC source balancing method connects a DC voltage source in parallel to each voltage divider capacitor on the DC side to achieve DC side capacitor voltage balance;

[0005] (2) Carrier overlapping pulse wideband modulation (PWM) method, which selects multiple triangular carriers with the same frequency, phase and different amplitude, compares them with the modulation wave, and generates different PWM waveforms based on the comparison results to control the wave generation sequence of the switching transistor. In capacitor voltage equalization control, this method generally uses zero-sequence voltage injection to change the value of the reference voltage, so as to minimize the fluctuation of the midpoint voltage.

[0006] (3) Virtual Space Vector Pulse Width Modulation (SVPWM) method. The basic idea is to keep the amount of midpoint charge generated by each virtual vector during the switching cycle at 0, so that the midpoint potential will not shift in steady state and the oscillation of the midpoint potential is avoided. The advantage of this method is to maintain the stability of the midpoint potential.

[0007] (4) Specific harmonic elimination method: It constructs a nonlinear transcendental equation system, calculates the optimal solution of the equation system as the switching angle and stores it. When needed, it is retrieved by looking up a table. Compared with other PWM modulation methods, SHEPWM can achieve a low switching frequency while greatly reducing the low-order harmonics of the output waveform.

[0008] However, the methods mentioned above for achieving DC-side capacitor voltage balance in four-level diode-clamped energy storage converters all have some significant drawbacks:

[0009] First, the method of adding auxiliary circuits to achieve four-level capacitor voltage balance will increase the cost and size of the energy storage converter, resulting in poor practicality of this method.

[0010] Secondly, the process of solving the zero-sequence voltage using the carrier overlap PWM method requires complex mathematical calculations, resulting in a large amount of computation. Furthermore, the local levels of the output line voltages overlap with each other, which means that this method can only effectively balance the neutral point voltage under specific power factors and appropriate modulation.

[0011] Third, in the virtual SVPWM method, the switching transistor jumps multiple times during the switching cycle, causing the local level of the output line voltage to cross each other, increasing the switching loss and the complexity of the modulation strategy.

[0012] Fourth, the calculation process for determining the switching angle using the specific harmonic elimination method is very complex, and it is theoretically difficult to provide the optimal capacitor voltage balance control effect, resulting in insufficient flexibility in actual operation. Summary of the Invention

[0013] To address the aforementioned deficiencies or improvement needs of existing technologies, this invention provides a method and system for capacitor voltage balancing in a 4L-DCC at low modulation ratios. The purpose is to solve the following problems: First, existing external auxiliary circuit balancing methods increase the cost and size of the energy storage converter, leading to poor practicality. Second, existing carrier-layered PWM methods require complex mathematical calculations to solve the zero-sequence voltage, resulting in high computational load and local voltage level overlap at the output line, limiting effective neutral point voltage balancing to specific power factors and appropriate modulation indices. Third, existing virtual SVPWM methods suffer from multiple switching cycles within the switching period, leading to local voltage level overlap at the output line, increased switching losses, and increased modulation strategy complexity. Fourth, existing specific harmonic elimination methods involve complex calculations for determining the switching angle, making it theoretically difficult to achieve optimal capacitor voltage balancing control, resulting in inflexible practical operation.

[0014] To achieve the above objectives, according to one aspect of the present invention, a method for achieving capacitor voltage balance in a four-level energy storage converter under low modulation ratio conditions is provided, comprising the following steps:

[0015] (1) Obtain the reference voltage vector V of the four-level energy storage converter ref Calculate the reference voltage vector V ref The corresponding modulation index m is determined, and it is determined whether the modulation index m is greater than the preset reference modulation ratio. If so, the process ends; otherwise, proceed to step (2).

[0016] (2) The reference voltage vector V obtained in step (1) ref The process is performed to obtain the spatial voltage vector distribution map of the basic voltage vector in the gh coordinate system.

[0017] (3) The spatial voltage vector distribution map in the gh coordinate system obtained in step (2) is divided into sectors to obtain the reference voltage vector V. ref The small sector in the space voltage vector diagram.

[0018] (4) Based on the reference voltage vector V obtained in step (3) ref Obtain the composite reference voltage vector V from the sector located in the space voltage vector diagram in the gh coordinate system. ref The three most recent vectors.

[0019] (5) The synthesized reference voltage vector V obtained in step (4) ref The three most recent vectors are subjected to volt-second balance calculations to obtain the duty cycle of the three vectors.

[0020] (6) Based on the reference voltage vector V obtained in step (3) ref The small sector in the space voltage vector diagram and the synthesized reference voltage vector V obtained in step (5) ref The duty cycle of the three vectors is used to obtain the switching sequence corresponding to each small sector.

[0021] (7) Based on the duty cycles of the three vector actions obtained in step (5), obtain the average current of the first cycle corresponding to each large sector in the space voltage vector diagram. Second-cycle average current

[0022] (8) Based on the switching sequence corresponding to each small sector obtained in step (6) and the first-cycle average current i of the large sector to which the small sector belongs in the space voltage vector diagram obtained in step (7), N1 Second-cycle average current Obtain the average value of the midpoint current during the first cycle of each switching sequence within this small sector. Average current at midpoint of the second cycle

[0023] (9) The average value of the midpoint current during the first cycle of each switching sequence in the small sector obtained in step (8). Average current at midpoint of the second cycle Obtain the optimal switching sequence to achieve capacitor voltage balance in a four-level energy storage converter.

[0024] Preferably, the modulation index m corresponding to the reference voltage vector in step (1) is calculated using the following formula:

[0025]

[0026] U dc This is the DC bus voltage of the four-level energy storage converter.

[0027] Step (2) includes the following steps:

[0028] (2-1) Obtain the reference voltage vector V obtained in step (1) ref Coordinates in the α-β coordinate system (V) α V β ) and coordinates in the gh coordinate system (V g V h Coordinate transformation formula between ( )

[0029] (2-2) Obtain the four-level space vector diagram of the four-level energy storage converter, based on the reference voltage vector V obtained in step (2-1). refThe corresponding coordinate transformation formula is used, and the basic space vectors in the four-level space vector diagram are successively subjected to coordinate transformation and normalization to obtain the space voltage vector distribution diagram of the basic voltage vector in the gh coordinate system.

[0030] Preferably, step (2-1) uses the following formula:

[0031]

[0032] Where V a V b V c Reference voltage vector V ref The three-phase voltage, V α V β Reference voltage vector V ref The α-axis component and β-axis component in the α-β coordinate system, V g V h Reference voltage vector V ref The g-axis components and h-axis components in the gh coordinate system.

[0033] Step (2-2) specifically involves first obtaining the four-level spatial vector diagram of the four-level energy storage converter, then performing coordinate transformation on all the basic spatial vectors in the four-level spatial vector diagram to obtain the spatial vector diagram in the gh coordinate system, and finally normalizing the spatial vector diagram in the gh coordinate system to obtain the spatial voltage vector distribution diagram of the basic voltage vector in the gh coordinate system.

[0034] Preferably, step (3) includes the following sub-steps:

[0035] (3-1) Obtain the reference voltage vector V ref x-coordinate V g and the vertical axis V h ;

[0036] (3-2) Initialize the reference voltage vector V ref The sector number n = 0 in the space voltage vector diagram;

[0037] (3-3) Determine V g +V h If the value is less than 1, set n = 1 and end the process; otherwise, proceed to step (3-4).

[0038] (3-4) Determine V g If the value is greater than 1, set n = 2 and the process ends; otherwise, proceed to step (3-5).

[0039] (3-5) Determine V hIf the value is greater than 1, set n = 4 and the process ends; otherwise, set n = 3 and proceed to step (3-6).

[0040] (3-6) Output reference voltage vector V ref The sector number n in the space voltage vector diagram is used as the reference voltage vector V. ref The small sector in the space voltage vector diagram.

[0041] The four-level space vector diagram in the gh coordinate system is divided into six large sectors, each of which is further divided into four smaller sectors. The second to sixth large sectors are obtained by rotating the first large sector.

[0042] Preferably, step (4) specifically involves:

[0043] First, the obtained reference voltage vector V ref coordinates (V) g V h Perform rounding up and rounding down respectively to obtain the distance reference voltage vector V. ref The four most recent voltage vectors.

[0044] Specifically, the coordinates of the four voltage vectors are as follows:

[0045]

[0046] The subscript U indicates that the voltage vector is rounded up, and the subscript L indicates that it is rounded down.

[0047] Then, based on the four rounded voltage vectors V obtained... UL V LU V UU V LL The parallelogram formed obtains the vector V on its diagonal. UL and V LU ;

[0048] Finally, based on the parallelogram, a third vector is obtained, which is related to the vector V on the diagonal. UL and V LU Together they form the reference voltage vector V ref The three most recent vectors.

[0049] Specifically, the selection of the third vector is based on the expression The value is determined by the calculation result. When the value of the calculation result is greater than zero, V will be... UU Used as a third vector; when the calculated value is less than or equal to zero, V LL Used as a third vector;

[0050] Step (5) specifically involves:

[0051] First, based on the reference voltage vector V obtained in step (4) ref The duty cycle of the basic voltage vector is obtained from the three most recent vectors;

[0052] Specifically, this step uses the following formula:

[0053]

[0054] Where V1, V2, and V3 represent the basic voltage vectors, and V1 = V UL V2 = V UL V3 = V UU / V LL d1, d2, and d3 are the duty cycles of the basic voltage vectors V1, V2, and V3, respectively.

[0055] Then, based on the duty cycles of the obtained basic voltage vectors V1, V2, and V3, the three most recent vectors V are obtained. UL V LU V LL The duty cycle of the action;

[0056] Specifically, this step uses the following formula:

[0057]

[0058] Where d UL d LU d LL These are the three most recent vectors V. UL V LU V LL The duty cycle of the action, V LLg and V LLh These are the basic voltage vectors V LL Projection onto the g-axis and h-axis.

[0059] Subsequently, based on the three most recent vectors V... UL V LU V LL The duty cycle of the action is used to obtain the three most recent vectors V. UL V LU V UU The duty cycle of the action;

[0060] Specifically, this step uses the following formula:

[0061]

[0062] Where d UL d LU d UUThese are the three most recent vectors V. UL V LU V UU The duty cycle of the action, V UUg and V UUh These are the basic voltage vectors V UU Projection onto the g-axis and h-axis.

[0063] Preferably, step (6) specifically involves:

[0064] First, sort the multiple basic voltage vectors corresponding to the triangle vertices of the small sector obtained in step (3) in the spatial voltage vector diagram in ascending order to obtain the sorted basic voltage vectors corresponding to the small sector.

[0065] Subsequently, for the sorted basic voltage vectors corresponding to this small sector, the first, second, and third basic voltage vectors are extracted, and the duty cycles of these three basic voltage vectors are set to be equal to the composite reference voltage vector V obtained in step (5). ref The duty cycles of the three basic voltage vectors are determined, and then the second, third, and fourth basic voltage vectors are extracted and their duty cycles are set to be equal to the combined reference voltage vector V obtained in step (5). ref The duty cycles of the three vector actions, ..., and so on, until all sorted basic voltage vectors have been processed; or

[0066] For the sorted basic voltage vectors corresponding to this small sector, the first, second, third, and fourth basic voltage vectors are extracted, and the duty cycles of the first and fourth basic voltage vectors are set to be equal to the composite reference voltage vector V obtained in step (5). ref The duty cycles of the three vector actions are set to half the duty cycle of the corresponding position of the vector action. The duty cycles of the second and third basic voltage vector actions are set to be equal to the combined reference voltage vector V obtained in step (5). ref The duty cycles of the other two corresponding positions of the three vectors are taken out, and then the second, third, fourth, and fifth basic voltage vectors are taken out, and the above process is repeated... and so on, until all sorted basic voltage vectors are processed.

[0067] Finally, a switch sequence table is constructed based on the basic voltage vector extracted each time and the duty cycle of the obtained basic voltage vector. The switch sequence table includes a serial number and a corresponding five-segment basic voltage vector synthesis sequence. The serial number refers to the serial number i of the basic voltage vector extracted above. The corresponding five-segment basic voltage vector synthesis sequence includes the i-th basic voltage vector extracted in the i-th time, the (i+1)-th basic voltage vector, the (i+2)-th basic voltage vector, the (i+1)-th basic voltage vector, and the i-th basic voltage vector.

[0068] The switch sequence list also includes a serial number and the corresponding seven-segment basic voltage vector synthesis sequence. The serial number refers to the serial number i of the basic voltage vector extracted above. The corresponding seven-segment basic voltage vector synthesis sequence includes the i-th basic voltage vector extracted in the i-th time, the (i+1)-th basic voltage vector, the (i+2)-th basic voltage vector, the (i+3)-th basic voltage vector, the (i+2)-th basic voltage vector, the (i+1)-th basic voltage vector, and the i-th basic voltage vector.

[0069] Preferably, the characteristic is that the average current of the first cycle corresponding to each large sector is... Second-cycle average current The following formula is used:

[0070]

[0071] Matrix D is obtained through the following steps:

[0072] (a) For the space voltage vector diagram (e.g.) Figure 2 The basic voltage vector in each large sector (as shown) is processed using a four-level equivalent circuit to obtain the relationship table corresponding to that large sector (see Table 2 below, taking large sector I as an example). This relationship table reflects the relationship between the midpoint current and the output phase current corresponding to each basic voltage vector in that large sector. N1 and i N2 Let i represent the two midpoint currents on the DC side of the four-level equivalent circuit when the basic voltage vector is applied. a i b , and i c These represent the first, second, and third output phase currents of the four-level equivalent circuit, respectively.

[0073] (b) Construct an empty 2x3 matrix D for each large sector, where the elements in the 1st row and 1st column, 2nd column, and 3rd column are respectively the elements in the relation table corresponding to that large sector obtained in step (a). N1 with i a i b i cThe relationship; the elements in the 2nd row, 1st column, 2nd column, and 3rd column are respectively the i in the relationship table corresponding to the large sector obtained in step (a). N2 with i a i b i c Relationship;

[0074] For each large sector, the corresponding matrix S is:

[0075]

[0076] The values ​​of intermediate parameters S1, S2, S3, S4, S5, and S6 are related to the reference voltage vector V. ref Related to the sector it is located in, reference voltage vector V ref When located in large sector I, S1 = 1, and all others are 0; reference voltage vector V ref When located in large sector II, S2 = 1, and all others are 0; ..., and so on.

[0077] Preferably, step (8) specifically involves:

[0078] First, obtain matrix D based on all the basic voltage vectors corresponding to the first number in the switch sequence corresponding to the small sector in step (6) and the duty cycle of the vector action;

[0079] Then, according to the reference voltage vector V ref Obtain matrix S for the given sector;

[0080] Subsequently, the obtained matrices D and S are substituted into the first-cycle average current obtained in step (7). Second-cycle average current In this process, the average value of the midpoint current during the first cycle when the switch sequence corresponding to the first sequence number is activated is obtained. Average current at midpoint of the second cycle

[0081] Finally, for the remaining sequence numbers in the switch sequence corresponding to the small sector obtained in step (6), the above process is repeated until all sequence numbers have been traversed, thereby obtaining the average value of the midpoint current in the first cycle when each switch sequence in the small sector is in operation. Average current at midpoint of the second cycle

[0082] Preferably, step (9) specifically involves:

[0083] First, based on the average value of the midpoint current during the first cycle of each switching sequence within the small sector... Average current at midpoint of the second cycle Obtain the P value corresponding to each switch sequence within this small sector:

[0084]

[0085] Where Δv Ci The voltage of the i-th capacitor on the DC side of the four-level energy storage converter is related to U. dc The deviation value is / 3, and i∈[1,2].

[0086] Finally, the minimum value is selected from all the P values ​​corresponding to the switch sequences within the small sector, and the switch sequence corresponding to the minimum value is output as the optimal switch sequence for achieving capacitor voltage balance of the four-level energy storage converter.

[0087] According to another aspect of the present invention, a method for achieving capacitor voltage balance in a four-level energy storage converter under low modulation ratio conditions is provided, comprising:

[0088] The first module is used to obtain the reference voltage vector V of the four-level energy storage converter. ref Calculate the reference voltage vector V ref The corresponding modulation index m is determined, and it is determined whether the modulation index m is greater than the preset reference modulation ratio. If so, the process ends; otherwise, the process proceeds to the second module.

[0089] The second module is used to process the reference voltage vector V obtained from the first module. ref The process is performed to obtain the spatial voltage vector distribution map of the basic voltage vector in the gh coordinate system.

[0090] The third module is used to perform sector division processing on the spatial voltage vector distribution map in the gh coordinate system obtained by the second module, so as to obtain the reference voltage vector V. ref The small sector in the space voltage vector diagram.

[0091] The fourth module is used to determine the reference voltage vector V obtained from the third module. ref Obtain the composite reference voltage vector V from the sector located in the space voltage vector diagram in the gh coordinate system. ref The three most recent vectors.

[0092] The fifth module is used to process the synthesized reference voltage vector V obtained by the fourth module. ref The three most recent vectors are subjected to volt-second balance calculations to obtain the duty cycle of the three vectors.

[0093] The sixth module is used to obtain the reference voltage vector V from the third module. ref The small sector in the space voltage vector diagram, and the composite reference voltage vector V obtained from the fifth module. refThe duty cycle of the three vectors is used to obtain the switching sequence corresponding to each small sector.

[0094] The seventh module is used to obtain the average current of the first cycle corresponding to each large sector in the space voltage vector diagram based on the duty cycles of the three vector actions obtained from the fifth module. Second-cycle average current

[0095] The eighth module is used to determine the average current of the first cycle of the large sector to which the small sector belongs in the space voltage vector diagram obtained from the sixth module, based on the switching sequence corresponding to each small sector. Second-cycle average current Obtain the average value of the midpoint current during the first cycle of each switching sequence within this small sector. Average current at midpoint of the second cycle

[0096] The ninth module is used to calculate the average midpoint current during the first cycle of each switching sequence within the small sector obtained from the eighth module. Average current at midpoint of the second cycle Obtain the optimal switching sequence to achieve capacitor voltage balance in a four-level energy storage converter.

[0097] In summary, compared with the prior art, the above-described technical solutions conceived by this invention can achieve the following beneficial effects:

[0098] (1) Since the present invention adopts steps (1) to (9), it uses the SVPWM software algorithm based on the objective function, thus solving the technical problem that the existing external auxiliary circuit balancing method increases the cost and volume of the energy storage converter due to the increased voltage of the four-level capacitor, resulting in poor practicality of the method.

[0099] (2) Since the present invention employs steps (1) to (9), it transforms the spatial vector diagram of the four-level energy storage converter in the α-β coordinate system to the gh coordinate system at a low modulation ratio, thereby obtaining the synthesized reference voltage vector V. ref The three most recent vectors and their duty cycles are used to simplify the sector judgment process, reduce the calculation process of the duty cycle of the basic voltage vector, and establish an objective function to optimize the switching sequence. The optimal switching sequence is selected to achieve midpoint voltage balance. Therefore, it can solve the technical problem that the existing carrier overlap PWM method requires complex mathematical calculations to solve the zero-sequence voltage, has a large amount of calculation, and the local level of the output line voltage crosses each other, which means that the method can only effectively balance the midpoint voltage under a specific power factor and a suitable modulation.

[0100] (3) Since the present invention employs steps (5) to (9), it is based on the reference voltage vector V ref The small triangle in which it is located, and the composite reference voltage vector V ref The duty cycles of the three vector actions are combined using a five-segment and a seven-segment modulation synthesis method to obtain the switching sequence corresponding to each small sector. Therefore, it can solve the technical problems of existing virtual SVPWM methods, such as the switching transistors switching multiple times within the switching cycle, causing the local level of the output line voltage to cross each other, increasing switching losses, and increasing the complexity of the modulation strategy.

[0101] (4) Since the present invention adopts steps (5) to (9), it evaluates the switching sequence in the small sector through the objective function and uses comparison operation to select the switching sequence with the minimum value of the objective function as the optimal switching sequence for output, thereby realizing the capacitor voltage balance of the four-level energy storage converter. Therefore, it can solve the technical problem that the calculation process of solving the switching angle in the existing specific harmonic elimination method is very complicated, and it is difficult to give the best capacitor voltage balance control effect in theory, resulting in its inflexible operation. Attached Figure Description

[0102] Figure 1 This is a topology diagram of the diode-clamped four-level energy storage converter of the present invention;

[0103] Figure 2 This is a spatial vector diagram of the diode-clamped four-level energy storage converter of the present invention;

[0104] Figure 3 This is a schematic diagram of the process of the diode-clamped four-level energy storage converter of the present invention in the low modulation ratio capacitor voltage balancing method;

[0105] Figure 4 This is a spatial vector diagram of the diode-clamped four-level energy storage converter of the present invention in the gh coordinate system;

[0106] Figure 5 This is a vector diagram of triangles 1 to 4 in sector I of the diode-clamped four-level energy storage converter of the present invention;

[0107] Figure 6 This is a waveform diagram of the output line voltage of the diode-clamped four-level energy storage converter of the present invention under different modulation ratios;

[0108] Figure 7 This is a waveform diagram of the capacitor voltage of the diode-clamped four-level energy storage converter of the present invention under different modulation ratios;

[0109] Figure 8 This is a waveform diagram of the output line voltage of the diode-clamped four-level energy storage converter of the present invention at different base frequencies;

[0110] Figure 9This is a waveform diagram of the capacitor voltage of the diode-clamped four-level energy storage converter of the present invention at different base frequencies;

[0111] Figure 10 This is a comparison chart of the switching counts of different methods for the diode-clamped four-level energy storage converter of the present invention;

[0112] Figure 11 This is a comparison chart of the output line voltage THD values ​​of different methods of the diode-clamped four-level energy storage converter of the present invention;

[0113] Figure 12 This is a comparison chart of capacitor voltage ripple amplitude for different methods of the diode-clamped four-level energy storage converter of the present invention. Detailed Implementation

[0114] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the invention. Furthermore, the technical features involved in the various embodiments of this invention described below can be combined with each other as long as they do not conflict with each other.

[0115] The basic idea of ​​this invention is to first transform the spatial vector diagram of the four-level energy storage converter in the α-β coordinate system to the gh coordinate system at a low modulation ratio, thereby obtaining the synthesized reference voltage vector V. ref The most recent three vectors and their duty cycles are used to simplify the sector determination process and reduce the calculation of the duty cycle of the basic voltage vector; then, based on the reference voltage vector V... ref The small triangle in which it is located, and the composite reference voltage vector V ref The duty cycles of the three vector actions are synthesized using a five-segment and a seven-segment modulation method to obtain the switching sequence corresponding to each small sector. Finally, the switching sequence corresponding to the small sector is evaluated by the objective function, and a comparison operation is used to select the switching sequence with the minimum objective function as the optimal switching sequence for output, thereby achieving capacitor voltage balance of the four-level energy storage converter.

[0116] The topology of a diode-clamped four-level energy storage converter is as follows: Figure 1 As shown, each phase arm of this topology consists of 6 power switches S. x1 ~S x6 It consists of 6 clamping diodes, of which S x1 and S x4 S x2 and S x5 S x3 and S x6 Complementary drive signals, i xThe output current is (x = a, b, c), the output terminal is a three-phase symmetrical load, n is the load midpoint, and the DC side capacitors C1, C2, and C3 convert the DC bus voltage U dc It was divided into 4 levels (U dc 2U dc / 3、U dc / 3、0).

[0117] Taking phase A arm as an example, S a1 S a2 S a3 When turned on, the output voltage is U dc S a2 S a3 S a4 The output voltage is 2U when it is turned on. dc / 3,S a3 S a4 S a5 When turned on, the output voltage is U dc / 3,S a4 S a5 S a6 When on, the output voltage is 0. Each phase arm of the bridge will generate four output voltages, represented by 3, 2, 1, and 0 respectively. The three-phase 4L-DCC can generate a total of four... 3 =64 space voltage vectors, the space vector distribution is as follows Figure 2 As shown, it contains 4 zero vectors, 18 small vectors, 12 short medium vectors, 12 long medium vectors, and 18 large vectors.

[0118] like Figure 3 As shown, this invention discloses a method for achieving capacitor voltage balance in a four-level energy storage converter under low modulation ratio conditions, comprising the following steps:

[0119] (1) Obtain the reference voltage vector V of the four-level energy storage converter ref Calculate the reference voltage vector V ref The corresponding modulation index m is determined, and it is determined whether the modulation index m is greater than the preset reference modulation ratio. If so, the process ends; otherwise, proceed to step (2).

[0120] Specifically, the preset reference modulation ratio in this step is between 0 and 1, preferably 0.55.

[0121] More specifically, the modulation index m corresponding to the reference voltage vector in this step is calculated using the following formula:

[0122]

[0123] U dc This is the DC bus voltage of the four-level energy storage converter.

[0124] (2) The reference voltage vector V obtained in step (1) ref The process is performed to obtain the spatial voltage vector distribution map of the basic voltage vector in the gh coordinate system.

[0125] Specifically, step (2) includes the following steps:

[0126] (2-1) Obtain the reference voltage vector V obtained in step (1) ref Coordinates in the α-β coordinate system (V) α V β ) and coordinates in the gh coordinate system (V g V h Coordinate transformation formula between ( )

[0127] Specifically, this step uses the following formula:

[0128]

[0129] Where V a V b V c Reference voltage vector V ref The three-phase voltage, V α V β Reference voltage vector V ref The α-axis component and β-axis component in the α-β coordinate system, V g V h Reference voltage vector V ref The g-axis components and h-axis components in the gh coordinate system.

[0130] (2-2) Obtain the four-level space vector diagram of the four-level energy storage converter, based on the reference voltage vector V obtained in step (2-1). ref The corresponding coordinate transformation formula is used, and the basic space vectors in the four-level space vector diagram are successively subjected to coordinate transformation and normalization to obtain the space voltage vector distribution diagram of the basic voltage vector in the gh coordinate system.

[0131] Specifically, this step first involves obtaining the four-level space vector diagram of the four-level energy storage converter (e.g., ...). Figure 2 (As shown), then perform coordinate transformation on all the basic space vectors in the four-level space vector diagram to obtain the space vector diagram in the gh coordinate system. Finally, normalize the space vector diagram in the gh coordinate system to obtain the space voltage vector distribution map of the basic voltage vectors in the gh coordinate system (as shown). Figure 4 (As shown).

[0132] (3) The spatial voltage vector distribution map in the gh coordinate system obtained in step (2) is divided into sectors to obtain the reference voltage vector V. ref The small sector in the space voltage vector diagram.

[0133] Step (3) includes the following sub-steps:

[0134] (3-1) Obtain the reference voltage vector V ref x-coordinate V g and the vertical axis V h ;

[0135] (3-2) Initialize the reference voltage vector V ref The sector number n = 0 in the space voltage vector diagram;

[0136] (3-3) Determine V g +V h If the value is less than 1, set n = 1 and end the process; otherwise, proceed to step (3-4).

[0137] (3-4) Determine V g If the value is greater than 1, set n = 2 and the process ends; otherwise, proceed to step (3-5).

[0138] (3-5) Determine V h If the value is greater than 1, set n = 4 and the process ends; otherwise, set n = 3 and proceed to step (3-6).

[0139] (3-6) Output reference voltage vector V ref The sector number n in the space voltage vector diagram is used as the reference voltage vector V. ref The small sector in the space voltage vector diagram.

[0140] Specifically, the four-level space vector diagram in the gh coordinate system is divided into six large sectors, I to VI. Each large sector is further divided into 1 to 4 small sectors. Large sectors II to VI can be obtained by rotating large sector I.

[0141] (4) Based on the reference voltage vector V obtained in step (3) ref Obtain the composite reference voltage vector V from the sector located in the space voltage vector diagram in the gh coordinate system. ref The three most recent vectors.

[0142] Specifically, this step involves first processing the obtained reference voltage vector V. ref coordinates (V) g V h Perform rounding up and rounding down respectively to obtain the distance reference voltage vector V. refThe four most recent voltage vectors.

[0143] Specifically, the coordinates of the four voltage vectors in this step are as follows:

[0144]

[0145] The subscript U indicates that the voltage vector is rounded up, and the subscript L indicates that it is rounded down.

[0146] Then, based on the four rounded voltage vectors V obtained... UL V LU V UU V LL The parallelogram formed obtains the vector V on its diagonal. UL and V LU ;

[0147] Finally, based on the parallelogram, a third vector is obtained, which is related to the vector V on the diagonal. UL and V LU Together they form the reference voltage vector V ref The three most recent vectors.

[0148] Specifically, the selection of the third vector is based on the expression The value is determined by the calculation result. When the value of the calculation result is greater than zero, V will be... UU Used as a third vector; when the calculated value is less than or equal to zero, V LL Used as a third vector.

[0149] (5) The synthesized reference voltage vector V obtained in step (4) ref The three most recent vectors are subjected to volt-second balance calculations to obtain the duty cycle of the three vectors.

[0150] Specifically, this step involves first determining the reference voltage vector V obtained in step (4). ref The duty cycle of the basic voltage vector is obtained from the three most recent vectors;

[0151] Specifically, this step uses the following formula:

[0152]

[0153] Where V1, V2, and V3 represent the basic voltage vectors, and V1 = V UL V2 = V UL V3 = V UU / V LL d1, d2, and d3 are the duty cycles of the basic voltage vectors V1, V2, and V3, respectively.

[0154] Then, based on the duty cycles of the obtained basic voltage vectors V1, V2, and V3, the three most recent vectors V are obtained. UL V LU V LL The duty cycle of the action;

[0155] Specifically, this step uses the following formula:

[0156]

[0157] Where d UL d LU d LL These are the three most recent vectors V. UL V LU V LL The duty cycle of the action, V LLg and V LLh These are the basic voltage vectors V LL Projection onto the g-axis and h-axis.

[0158] Subsequently, based on the three most recent vectors V... UL V LU V LL The duty cycle of the action is used to obtain the three most recent vectors V. UL V LU V UU The duty cycle of the action;

[0159] Specifically, this step uses the following formula:

[0160]

[0161] Where d UL d LU d UU These are the three most recent vectors V. UL V LU V UU The duty cycle of the action, V UUg and V UUh These are the basic voltage vectors V UU Projection onto the g-axis and h-axis.

[0162] The advantage of steps (2) to (5) above is that by using the reference voltage vector V ref After transforming from the α-β coordinate system to the gh coordinate system, and following per-unit transformation and small-sector judgment, the reference voltage vector V is clearly defined. ref The three most recent vectors, while using the reference voltage vector V ref The duty cycle of the three vectors can be obtained from the decimal part of the coordinates, which greatly simplifies the calculation process and speeds up the operation.

[0163] (6) Based on the reference voltage vector V obtained in step (3) ref The small sector in the space voltage vector diagram and the synthesized reference voltage vector V obtained in step (5) ref The duty cycle of the three vectors is used to obtain the switching sequence corresponding to each small sector.

[0164] Specifically, this step involves first sorting the multiple basic voltage vectors corresponding to the vertices of the triangles in the spatial voltage vector diagram where the small sector obtained in step (3) is located in ascending order, so as to obtain the sorted basic voltage vectors corresponding to the small sector (e.g., for the small sector). Figure 5 For sector 1 in the middle, the sorted basic voltage vector is 000-100-110-111-211-221-222-322-332-333);

[0165] Subsequently, for the sorted basic voltage vectors corresponding to this small sector, the first, second, and third basic voltage vectors are extracted, and the duty cycles of these three basic voltage vectors are set to be equal to the composite reference voltage vector V obtained in step (5). ref The duty cycles of the three basic voltage vectors are determined, and then the second, third, and fourth basic voltage vectors are extracted and their duty cycles are set to be equal to the combined reference voltage vector V obtained in step (5). ref The duty cycles of the three vector actions, ..., and so on, until all sorted basic voltage vectors have been processed;

[0166] As an alternative implementation, the above process can also be as follows: for the sorted basic voltage vectors corresponding to the small sector, extract the first, second, third, and fourth basic voltage vectors, and set the duty cycle of the first and fourth basic voltage vectors to be equal to the synthetic reference voltage vector V obtained in step (5). ref The duty cycles of the three vector actions are set to half the duty cycle of the corresponding position of the vector action. The duty cycles of the second and third basic voltage vector actions are set to be equal to the combined reference voltage vector V obtained in step (5). ref The duty cycles of the other two corresponding positions of the three vectors are taken out, and then the second, third, fourth, and fifth basic voltage vectors are taken out, and the above process is repeated... and so on, until all sorted basic voltage vectors are processed.

[0167] Finally, a switch sequence table is constructed based on the basic voltage vector extracted each time and the duty cycle of the obtained basic voltage vector;

[0168] Specifically, the switch sequence table (Table 1 below) includes a serial number and the corresponding five-segment basic voltage vector synthesis sequence. The serial number refers to the serial number i of the basic voltage vector extracted above (for example, if the first, second, and third basic voltage vectors are extracted, the serial number is 1; if the second, third, and fourth basic voltage vectors are extracted, the serial number is 2). The corresponding five-segment basic voltage vector synthesis sequence includes the i-th basic voltage vector extracted in the i-th time, the (i+1)-th basic voltage vector, the (i+2)-th basic voltage vector, the (i+1)-th basic voltage vector, and the i-th basic voltage vector.

[0169] The switch sequence list (Table 1 below) also includes the serial number and the corresponding seven-segment basic voltage vector synthesis sequence. The serial number refers to the serial number i of the basic voltage vector extracted above (for example, if the first, second, third, and fourth basic voltage vectors are extracted, the serial number is 1; if the second, third, fourth, and fifth basic voltage vectors are extracted, the serial number is 2). The corresponding seven-segment basic voltage vector synthesis sequence includes the i-th basic voltage vector extracted in the i-th time, the (i+1)-th basic voltage vector, the (i+2)-th basic voltage vector, the (i+3)-th basic voltage vector, the (i+2)-th basic voltage vector, the (i+1)-th basic voltage vector, and the i-th basic voltage vector.

[0170] Similarly, the switch sequences corresponding to other small sectors 2, 3, and 4 can be derived.

[0171] Table 1

[0172]

[0173] The advantage of this step is that by using a five-segment or seven-segment basic voltage vector synthesis sequence, the number of switching operations and the harmonic content of the output voltage can be reduced.

[0174] (7) Based on the duty cycles of the three vector actions obtained in step (5), obtain the average current of the first cycle corresponding to each large sector in the space voltage vector diagram. Second-cycle average current

[0175] Specifically, the average current of the first cycle corresponding to each large sector Second-cycle average current The following formula is used:

[0176]

[0177] Matrix D is obtained through the following steps:

[0178] (a) For the space voltage vector diagram (e.g.) Figure 2The basic voltage vector in each large sector (as shown) is processed using a four-level equivalent circuit to obtain the relationship table corresponding to that large sector (see Table 2 below, taking large sector I as an example). This relationship table reflects the relationship between the midpoint current and the output phase current corresponding to each basic voltage vector in that large sector. N1 and i N2 Let i represent the two midpoint currents on the DC side of the four-level equivalent circuit when the basic voltage vector is applied. a i b , and i c These represent the first, second, and third output phase currents of the four-level equivalent circuit, respectively.

[0179] Table 2

[0180]

[0181] (b) Construct an empty 2x3 matrix D for each large sector, where the elements in the 1st row and 1st column, 2nd column, and 3rd column are respectively the elements in the relation table corresponding to that large sector obtained in step (a). N1 with i a i b i c The relationship; the elements in the 2nd row, 1st column, 2nd column, and 3rd column are respectively the i in the relationship table corresponding to the large sector obtained in step (a). N2 with i a i b i c Relationship;

[0182] For each large sector in this invention example, the corresponding matrix D is:

[0183]

[0184] For each large sector in this invention example, the corresponding matrix S is:

[0185]

[0186] The values ​​of S1, S2, S3, S4, S5, and S6 are related to the reference voltage vector V. ref Related to the sector it is located in, reference voltage vector V ref When located in large sector I, S1 = 1, and all others are 0; reference voltage vector V ref When located in large sector II, S2 = 1, and all others are 0; ..., and so on.

[0187] The advantage of this step is that, after the large sector rotation transformation, only the relevant parameters of the first large sector need to be calculated to obtain the average current of the first cycle for each large sector. Second-cycle average current It greatly simplifies the calculation process.

[0188] (8) Based on the switching sequence corresponding to each small sector obtained in step (6) and the average current of the first cycle corresponding to the large sector to which the small sector belongs in the space voltage vector diagram obtained in step (7), Second-cycle average current Obtain the average value of the midpoint current during the first cycle of each switching sequence within this small sector. Average current at midpoint of the second cycle

[0189] Specifically, this step involves obtaining matrix D based on all the basic voltage vectors corresponding to the first number in the switch sequence corresponding to the small sector in step (6) and the duty cycle of the vector action.

[0190] Then, according to the reference voltage vector V ref Obtain matrix S for the given sector;

[0191] Subsequently, the obtained matrices D and S are substituted into the first-cycle average current obtained in step (7). Second-cycle average current In this process, the average value i1 of the midpoint current in the first cycle and the average value i1 of the midpoint current in the second cycle are obtained when the switch sequence corresponding to the first sequence number is activated.

[0192] Finally, for the remaining serial numbers in the switch sequence corresponding to the small sector obtained in step (6), the above process is repeated until all serial numbers have been traversed, so as to obtain the average value of the midpoint current i1 in the first cycle and the average value of the midpoint current i2 in the second cycle when each switch sequence in the small sector is in operation.

[0193] (9) The average value of the midpoint current during the first cycle of each switching sequence in the small sector obtained in step (8). Average current at midpoint of the second cycle Obtain the optimal switching sequence to achieve capacitor voltage balance in a four-level energy storage converter.

[0194] Specifically, this step involves first determining the average value of the midpoint current during the first cycle of each switching sequence within the small sector. Average current at midpoint of the second cycle Obtain the P value corresponding to each switch sequence within this small sector;

[0195] Specifically, the above process uses the following formula:

[0196]

[0197] Where Δv Ci The voltage of the i-th capacitor on the DC side of the four-level energy storage converter is related to U. dc The deviation value is / 3, and i∈[1,2].

[0198] Finally, the minimum value is selected from all the P values ​​corresponding to the switching sequences within the small sector (at which point the capacitor voltage balancing capability of the four-level energy storage converter is optimal), and the switching sequence corresponding to the minimum value is output as the optimal switching sequence for achieving capacitor voltage balancing of the four-level energy storage converter.

[0199] The advantage of this step is that the objective function-based approach is simple and efficient in implementation, and the optimal switching sequence can be output simply by comparison operations.

[0200] Simulation results

[0201] The effectiveness and superiority of the method of the present invention can be verified by performing Matlab / Simulink software simulation on the optimal switching sequence for achieving capacitor voltage balance of the four-level energy storage converter obtained in step (9) above.

[0202] Specifically, the simulation parameters for 4L-DCC are shown in Table 3.

[0203] Table 3

[0204]

[0205]

[0206] first, Figure 6 and Figure 7 The simulation waveforms of the line voltage, phase current, and capacitor voltage output of the energy storage converter are shown when the modulation ratio m is changed. When the modulation ratio m is 0.2 and 0.5, the output voltage of the energy storage converter is a standard three-level PWM waveform and a five-level PWM waveform, the output current waveform is also close to a sine wave, the capacitor voltage can be stabilized at about 1600V, and the ripple amplitude is within 40V.

[0207] Then, Figure 8 and Figure 9 To simulate the output line voltage, phase current, and capacitor voltage of the energy storage converter when the base frequency is changed, different operating frequencies were set to f = 5Hz, f = 25Hz, and f = 50Hz. The output voltage waveforms were all standard five-level stepped waves. When the operating frequency increased from 5Hz to 50Hz, the capacitor voltage could still be stabilized at around 1600V, and the ripple amplitude was within 40V, which was almost unaffected by the change in base frequency.

[0208] Finally, to further verify the superiority of the proposed algorithm, it is compared and analyzed with Carrier-Overlapped PWM (COPWM) and Virtual Space Vector PWM (VSVPWM). Figure 10 When the modulation ratios m are 0.2 and 0.5 respectively, the three methods have different power switching transistor S within 1 second. a1 S a2 S a3 The number of switching transitions and the average number of transitions show that the average number of switching transitions of the proposed algorithm is much lower than that of COPWM and VSVPWM methods. Figure 11 The proposed algorithm reduces the THD of the output line voltage by approximately 15% compared to COPWM and VSVPWM methods, and has higher output line voltage waveform quality as the modulation ratio m gradually increases. Figure 12 The capacitance voltage ripple amplitude of the three methods was evaluated, and it can be seen that the proposed algorithm can also control the capacitance voltage ripple amplitude well.

[0209] Those skilled in the art will readily understand that the above description is merely a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. A method for realizing the capacitor voltage balance of four-level energy storage converter under low modulation ratio condition, characterized in that, The method comprises the following steps: (1) Obtain the reference voltage vector V of the four-level energy storage converter ref , calculate the modulation index m corresponding to the reference voltage vector V ref , and determine whether the modulation index m is greater than the preset reference modulation ratio. If yes, the process ends; otherwise, go to step (2); in step (1), the modulation index m corresponding to the reference voltage vector is calculated by the following formula: wherein U dc is the DC bus voltage of the four-level energy storage converter; (2) the reference voltage vector V ref The processing is performed to obtain a spatial voltage vector distribution diagram of the basic voltage vector in the g-h coordinate system; (3) sector division processing is performed on the spatial voltage vector distribution map in the g-h coordinate system obtained in step (2) to obtain reference voltage vectors V ref the small sector in which the spatial voltage vector map is located; (4) obtaining a synthesized reference voltage vector V ref the sector in which the synthesized reference voltage vector V ref is located in the space voltage vector diagram in the g-h coordinate system; step (4) is specifically, First, the coordinates (V g , V h ) of the acquired reference voltage vector V ref are subjected to upward rounding and downward rounding, respectively, to obtain four voltage vectors closest to the reference voltage vector V ref ; Specifically, the coordinates of the four voltage vectors are respectively: Wherein subscript U represents the voltage vector rounding up, and subscript L represents rounding down; Then, the four integral voltage vectors V UL , V LU , V UU , and V LL obtained are used to form a parallelogram to obtain the vectors V UL and V LU on the diagonals. Finally, a third vector is further obtained according to the parallelogram, which, together with the vectors V UL and V LU , constitutes the nearest three vectors of the reference voltage vector V ref . In particular, the third vector is chosen according to the result of the calculation of the expression ; when the value of the result of the calculation is greater than zero, V UU is used as the third vector; when the value of the result of the calculation is less than or equal to zero, V LL is used as the third vector; (5) A voltage-second balance calculation process is performed on the last three vectors of the synthesized reference voltage vector V ref obtained in step (4) to obtain the duty ratio of the three vectors; specifically, the following formula is used: where d UL , d LU , d UU are the duty cycles of the last three vectors V UL , V LU , V UU , respectively, and V UUg and V UUh are the projections of the fundamental voltage vector V UU on the g-axis and h-axis, respectively; (6) the reference voltage vector V obtained according to step (3) ref the small sector in which the voltage vector V is located in the space voltage vector diagram, and the duty ratio of the three vectors of the resultant reference voltage vector V obtained in step (5), to obtain a switching sequence corresponding to each small sector; ref the small sector in which the voltage vector V is located in the space voltage vector diagram, and the duty ratio of the three vectors of the resultant reference voltage vector V obtained in step (5), to obtain a switching sequence corresponding to each small sector; (7) Obtain the first period average current corresponding to each large sector in the space voltage vector diagram according to the duty ratio of the action of the three vectors obtained in step (5) and the second period average current (8) the first period average current corresponding to the big sector to which the small sector belongs in the space voltage vector diagram acquired in step (7) and the second period average current acquire the first period midpoint current average value when each switching sequence in the small sector acts and the second period midpoint current average value (9) the average value of the midpoint current in the first cycle when each switching sequence in the small sector obtained according to step (8) acts and the average value of the midpoint current in the second cycle obtaining the optimal switching sequence for realizing the capacitor voltage balance of the four-level energy storage converter.

2. The method of claim 1, wherein the four-level energy storage converter capacitor voltage balancing under low modulation ratio conditions is realized, and the method comprises the following steps: Step (2) comprises the following steps: (2-1) The reference voltage vector V ref The coordinate transformation formula between the coordinates (V α ,V β ) in the α-β coordinate system and the coordinates (V g ,V h ) in the g-h coordinate system; (2-2) Obtain the four-level space vector diagram of the four-level energy storage converter, and perform coordinate transformation and normalization processing on the basic space vectors in the four-level space vector diagram obtained in step (2-1) according to the corresponding coordinate transformation formula, so as to obtain the space voltage vector distribution diagram of the basic voltage vectors in the g-h coordinate system. ref The corresponding coordinate transformation formula, and the basic space vectors in the four-level space vector diagram are sequentially subjected to coordinate transformation and normalization processing, so as to obtain the space voltage vector distribution diagram of the basic voltage vectors in the g-h coordinate system.

3. The method of claim 2, wherein the four-level energy storage converter capacitor voltage balancing under low modulation ratio conditions is realized, and the method comprises the following steps: Step (2-1) is to use the following formula: wherein V a , V b , V c are the three-phase voltages of the reference voltage vector V ref , V α , V β are the α-axis component and the β-axis component of the reference voltage vector V ref in the α-β coordinate system, V g , V h are the g-axis component and the h-axis component of the reference voltage vector V ref in the g-h coordinate system; Step (2-2) is specifically to first obtain a four-level energy storage converter four-level space vector diagram, then perform coordinate transformation on all basic space vectors in the four-level space vector diagram to obtain a space vector diagram in the g-h coordinate system, and finally perform normalization processing on the space vector diagram in the g-h coordinate system to obtain a space voltage vector distribution diagram of the basic voltage vector in the g-h coordinate system.

4. The method for realizing the capacitor voltage balance of four-level energy storage converter under low modulation ratio condition according to claim 3, characterized in that, Step (3) comprises the following sub-steps: (3-1) Obtain the reference voltage vector V ref The abscissa V g and the ordinate V h ; (3-2) Initialization of the reference voltage vector V ref The sequence number n of the sector in which the space voltage vector diagram is located = 0; (3-3) judging V g +V h whether it is less than 1, if so, setting n = 1, and then the process ends, otherwise, going to step (3-4); (3-4) Determine V g whether it is greater than 1, if so set n = 2, then the process ends, otherwise go to step (3-5); (3-5) judge V h whether it is greater than 1, if so, set n = 4, then the process ends, otherwise set n = 3, then turn into step (3-6); (3-6) outputting the reference voltage vector V ref the order number n of the small sector in which the reference voltage vector V ref the small sector in which the reference voltage vector V Wherein the four-level space vector diagram in the g-h coordinate system is divided into six large sectors, each large sector is divided into four small sectors, and the second to sixth large sectors are obtained by rotating the first large sector.

5. The method of claim 4, wherein the four-level energy storage converter capacitor voltage balancing under low modulation ratio conditions is realized, and the method comprises the following steps: Step (5) is specifically to First, the reference voltage vector V ref is obtained according to step (4) and the duty ratio of the last three vector acquisition basic voltage vectors acting on the reference voltage vector V ref is obtained. Specifically, this step is to use the following formula: wherein V1, V2, V3 represent basic voltage vectors, and have V1 = V UL , V2 = V UL , V3 = V UU / V LL , d1, d2, d3 are duty ratios of the basic voltage vectors V1, V2, V3, respectively. Then, duty ratios of the basic voltage vectors V1, V2, V3 are obtained based on the obtained duty ratios of the basic voltage vectors V1, V2, V3 UL , V LU , V LL application; Specifically, this step is to use the following formula: where d UL , d LU , d LL are the duty cycles of the last three vectors V UL , V LU , V LL , respectively, and V LLg and V LLh are the projections of the fundamental voltage vector V LL on the g-axis and h-axis, respectively; Subsequently, the duty cycle of the action of the last three vectors V UL , V LU , V LL is obtained. UL , V LU , V UU .

6. The method for realizing the capacitor voltage balance of four-level energy storage converter under low modulation ratio condition according to claim 5, characterized in that, Step (6) is specifically to Firstly, the multiple basic voltage vectors corresponding to the triangle vertices of the small sector obtained in step (3) in the space voltage vector diagram are sorted in ascending order to obtain the sorted basic voltage vectors corresponding to the small sector; Subsequently, the first, second and third basic voltage vectors are taken out in terms of the ordered basic voltage vectors corresponding to the small sector, and the duty cycles of the actions of the three basic voltage vectors are set to be equal to the duty cycles of the actions of the three vectors of the resultant reference voltage vector V ref obtained in step (5), then the second, third and fourth basic voltage vectors are taken out, and the duty cycles of the actions of the three basic voltage vectors are set to be equal to the duty cycles of the actions of the three vectors of the resultant reference voltage vector V ref obtained in step (5), and so on until all the ordered basic voltage vectors are processed; or For the sorted basic voltage vectors corresponding to the small sector, the first, second, third and fourth basic voltage vectors are taken out, and the duty cycles of the first and fourth basic voltage vectors are set to be equal to half of the duty cycles of the three vectors corresponding to the positions in the three vector duty cycles of the synthesized reference voltage vector V ref obtained in step (5), and the duty cycles of the second and third basic voltage vectors are set to be equal to the duty cycles of the other two vectors corresponding to the positions in the three vector duty cycles of the synthesized reference voltage vector V ref obtained in step (5), then the second, third, fourth and fifth basic voltage vectors are taken out, and the above process is repeated, and so on, until all the sorted basic voltage vectors are processed. Finally, a switch sequence list is constructed according to each time the basic voltage vector is taken out and the duty cycle of the obtained basic voltage vector, wherein the switch sequence list comprises a serial number and a corresponding five-segment basic voltage vector synthesis sequence, wherein the serial number refers to the serial number i of the basic voltage vector taken out, and the corresponding five-segment basic voltage vector synthesis sequence comprises the i-th basic voltage vector taken out the i+1-th basic voltage vector, the i+2-th basic voltage vector, the i+1-th basic voltage vector, and the i-th basic voltage vector. The switch sequence list also comprises a serial number and a corresponding seven-segment basic voltage vector synthesis sequence, wherein the serial number refers to the serial number i of the basic voltage vector taken out, and the corresponding seven-segment basic voltage vector synthesis sequence comprises the i-th basic voltage vector taken out the i+1-th basic voltage vector, the i+2-th basic voltage vector, the i+3-th basic voltage vector, the i+2-th basic voltage vector, the i+1-th basic voltage vector, and the i-th basic voltage vector.

7. The method for realizing the capacitor voltage balance of four-level energy storage converter under low modulation ratio condition according to claim 6, characterized in that, the first period average current corresponding to each large sector and the second period average current are calculated using the following equations: Wherein the matrix D is established by the following steps: (a) performing four-level equivalent circuit processing on each basic voltage vector in each large sector in the space voltage vector diagram to obtain a relationship table corresponding to the large sector, the relationship table embodying the relationship between the midpoint current and the output phase current corresponding to each basic voltage vector in the large sector, i N1 and i N2 respectively represent two midpoint currents of the four-level equivalent circuit DC side when the basic voltage vector acts, a i b i c respectively represent the first, second and third output phase currents of the four-level equivalent circuit; (b) constructing an empty 2-row 3-column matrix D for each large sector, wherein the elements of the first row first column, second column, third column are respectively the relations i N1 and i a , i b , i c of the corresponding relation table of the large sector obtained in step (a); the elements of the second row first column, second column, third column are respectively the relations i N2 and i a , i b , i c of the corresponding relation table of the large sector obtained in step (a); For each large sector, the corresponding matrix S is: where the values of the intermediate parameters S1, S2, S3, S4, S5, S6 depend on the sector in which the reference voltage vector V ref ref is located ref S1=1 and the others are 0 when the reference voltage vector V ref ref is located in sector I; S2=1 and the others are 0 when the reference voltage vector V ref ref is located in sector II; and so on.

8. The method for realizing the capacitor voltage balance of four-level energy storage converter under low modulation ratio condition according to claim 7, characterized in that, Step (8) is specifically to Firstly, according to all the basic voltage vectors corresponding to the first serial number in the switch sequence of the small sector in step (6) and the duty cycle of the vector action, the matrix D is obtained; Then, the reference voltage vector V ref is obtained from the matrix S Thereafter, the acquired matrix D and the matrix S are substituted into the first periodic average current and the second periodic average current acquired in step (7) to obtain the first periodic midpoint current average value and the second periodic midpoint current average value Finally, for the remaining serial numbers in the switch sequence corresponding to the small sector obtained in step (6), repeat the above process until all serial numbers are traversed, thereby obtaining the average value of the midpoint current in the first period when each switch sequence in the small sector acts and the average value of the midpoint current in the second period 9. The method for realizing the capacitor voltage balance of four-level energy storage converter under low modulation ratio condition according to claim 8, characterized in that, Step (9) is specifically to First, according to the acquired first cycle midpoint current average value of each switch sequence in the small sector and the second cycle midpoint current average value acquire the P value corresponding to each switch sequence in the small sector: wherein Δv Ci is the deviation of the voltage of the i-th capacitor of the DC side of the four-level energy storage converter from U dc / 3, and i ∈ [1, 2]. Finally, the minimum value is selected from the P values corresponding to all switch sequences in the small sector, and the switch sequence corresponding to the minimum value is output as the optimal switch sequence for realizing the capacitor voltage balance of the four-level energy storage converter.

10. A system for achieving the capacitor voltage balance of four-level energy storage converter under low modulation ratio condition based on the method of any one of claims 1 to 9, characterized in that, Comprises: The first module is used to obtain the reference voltage vector V of the four-level energy storage converter. ref Calculate the reference voltage vector V ref The corresponding modulation index m is determined, and it is determined whether the modulation index m is greater than the preset reference modulation ratio. If so, the process ends; otherwise, the process proceeds to the second module. A second module is configured to process the reference voltage vector V ref obtained by the first module to obtain a spatial voltage vector distribution diagram of the basic voltage vector in the g-h coordinate system. The third module is configured to perform sector division processing on the space voltage vector distribution diagram in the g-h coordinate system obtained by the second module to obtain a reference voltage vector V ref The small sector in which the space voltage vector diagram is located; a fourth module for obtaining a resultant reference voltage vector V ref the sector in which the space voltage vector diagram lies in the g-h coordinate system ref the last three vectors of the resultant reference voltage vector V a fifth module for performing a volt-second balancing calculation process on the last three vectors of the synthesized reference voltage vector V ref obtained by the fourth module to obtain a duty cycle of the three vectors; A sixth module is configured to obtain a reference voltage vector V ref in the small sector in which the space voltage vector diagram is located, and duty cycles of the three vectors of the resultant reference voltage vector V ref obtained by the fifth module, to obtain a switching sequence corresponding to each small sector. a seventh module configured to obtain a first period average current corresponding to each large sector in the space voltage vector diagram according to the duty cycle of the three vector actions obtained by the fifth module and a second period average current an eighth module configured to acquire, according to each small sector corresponding switch sequence acquired by the sixth module, the first period average current corresponding to the large sector to which the small sector belongs in the space voltage vector diagram acquired by the seventh module and the second period average current acquire the first period midpoint current average value when each switch sequence in the small sector acts and the second period midpoint current average value The ninth module is configured to acquire the average value of the midpoint current in the first period when each switching sequence in the small sector is in action according to the small sector acquired by the eighth module and the average value of the midpoint current in the second period The optimal switching sequence for realizing the capacitor voltage balance of the four-level energy storage converter is acquired.

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