GaN power device with multiple bias signal controlling multiple columns of islands

Abstract

The application belongs to the technical field of power semiconductors, and particularly relates to a GaN power device with multiple bias signals controlling multiple islands. The application increases multiple islands on the surface of an AlGaN barrier layer on the basis of a PGaN gate enhancement GaN HEMT device structure, and controls the multiple islands by a bias circuit. The normal turn-on and turn-off of the device are the same as those of the PGaN gate enhancement GaN HEMT, and due to the existence of P islands, the depletion region can be effectively expanded, thereby improving the device voltage resistance, so that the application has an improvement in voltage resistance compared with the conventional PGaN gate enhancement GaN HEMT device. The bias circuit is controlled by the dynamic change of the density or concentration of traps, electrons and holes, the multiple islands controlled by digitalized bias can inject carriers into the device, and the dynamic compensation of charges in the working of the device is realized through controllable carrier injection and trap capture, thereby achieving the effect of inhibiting dynamic on-resistance degradation.

Description

TECHNICAL FIELD

[0001] The application belongs to the technical field of power semiconductors, and particularly relates to a GaN power device with multiple bias signals controlling multiple islands. BACKGROUND

[0002] With the increasing demand for high efficiency, energy saving, intelligent and miniaturization of power electronic systems, the development of a new generation of high efficiency and high speed power semiconductor technology has become the focus of the industry. As a third-generation semiconductor material that has gradually emerged in the past two decades, gallium nitride has shown its potential in the power semiconductor market due to its wide bandgap, high electron mobility and high critical breakdown field. GaN high electron mobility transistor (GaN HEMT) as an important application form of GaN material has gradually penetrated into industrial and telecommunication power supply applications including data communication, base station, uninterruptible power supply (UPS) and industrial laser radar.

[0003] GaN HEMT has shown great application potential in power electronic systems due to its excellent high frequency, high power density and high temperature working capacity. However, although GaN HEMT has many advantages, the degradation of its on-resistance in practical application has become a key factor restricting the further improvement of its performance. Dynamic on-resistance degradation mainly manifests in the decrease of saturation current and maximum transconductance, the increase of threshold voltage and on-resistance after the device is subjected to strong electric field impact, which seriously affects the performance and reliability of the device. Suppressing the degradation of the on-resistance of GaN HEMT device is of great significance to improve the performance, prolong the service life, and improve the stability and reliability of the system. Especially in high-voltage and high-power power electronic systems, the excellent high-voltage resistance and extremely fast switching speed of GaN HEMT can significantly improve the system efficiency, but the dynamic on-resistance degradation seriously limits its performance. Suppressing the degradation of the on-resistance of GaN HEMT device is the key to improving the performance of the device and promoting the development of GaN power semiconductor technology. By deeply studying the causes and mechanisms of current collapse, combined with advanced device design and packaging technology, GaN HEMT devices with higher performance and reliability can be developed to provide strong support for the efficient, intelligent and miniaturization development of power electronic systems. Therefore, developing GaN HEMT devices that can effectively suppress the degradation of on-resistance is of great significance to promote the further development of GaN power semiconductor technology. SUMMARY

[0004] In view of the above problems, the application provides a GaN power device with multiple-island and multiple-bias signal control, which introduces a multiple-island structure between the gate and the drain, and is composed of P islands formed by metal / P-GaN Schottky junction and S islands formed by metal / AlGaN Schottky junction. The P islands and the S islands are controlled by independent bias circuits, and the injection and extraction paths of unbalanced charges are provided and self-balanced charges are introduced. With the support of the bias circuits, the device can realize self-balancing of charges under multiple-bias conditions and inhibit the degradation of dynamic on-resistance.

[0005] Here, the multiple-island is defined as shown in the accompanying drawings. Figure 2 As shown in the accompanying drawings, the multiple-island is composed of P islands or S islands with the same X and Y coordinates and different Z coordinates, and multiple islands with different X coordinates form the multiple-island. The islands forming each island can be only P islands, only N islands, or both N islands and P islands. When the bias circuit is applied to the multiple-island, each island is taken as a unit, the P islands are controlled by the bias circuit 1, and the S islands are controlled by the bias circuit 2.

[0006] The technical scheme adopted by the application is as follows.

[0007] The application provides a GaN power device with multiple-island and multiple-bias signal control, which includes a substrate layer 1, a nucleation layer 2, a GaN Buffer layer 3 and a non-intentionally doped GaN channel layer 4 which are sequentially stacked from bottom to top. The GaN channel layer 4 has a drain 7 and a source 8 at both ends of the upper surface, and an AlGaN barrier layer 5 with a thickness smaller than that of the drain 7 and the source 8 is arranged on the upper surface of the GaN channel layer 4 between the drain 7 and the source 8. A P-type GaN material layer 6 is arranged on the upper surface of the AlGaN barrier layer 5 close to the source 8, and a gate metal 9 is arranged on the P-type GaN material layer 6. A passivation layer 10 is arranged on the upper surface of the AlGaN barrier layer 5 between the P-type GaN material layer 6 and the source 8, and a multiple-island is arranged on the upper surface of the AlGaN barrier layer 5 between the P-type GaN material layer 6 and the drain 7. Each column of the multiple-island is composed of multiple islands arranged at intervals in the longitudinal direction of the device, and the islands include S islands composed of a first metal 12 and P islands composed of a P-type GaN layer 11 and a second metal 13. All the P islands are controlled by one bias circuit, and the S islands are controlled by another bias circuit. The multiple-island, the islands and the P-type GaN material layer 6 are isolated by the passivation layer 10.

[0008] Further, the multiple-island is two columns, and the islands close to the gate metal 9 are all P islands, and the islands close to the drain 7 are all S islands.

[0009] Further, the multiple-island is two columns, and each column of the multiple-island is composed of P islands and S islands arranged at intervals.

[0010] Further, the P islands and the S islands present regular or symmetrical geometric shapes in a top view.

[0011] Further, the substrate layer 1 is made of silicon carbide, sapphire or Al2O3; the passivation layer 10 is made of silicon nitride or silicon dioxide.

[0012] The beneficial effect of the present application is that, compared with the conventional GaN HEMT device, the device can release electrons or holes to the inside of the device through the bias circuit on the multiple islands, thereby balancing the electron traps or hole traps on the surface and inside of the device through the effect of the charges, reducing the influence of the traps on the electrical performance of the device, and inhibiting the on-resistance degradation of the device during use. BRIEF DESCRIPTION OF DRAWINGS

[0013] Figure 1 is a structural schematic diagram of the GaN power device of the present application.

[0014] Figure 2 is a 3D structural schematic diagram of the GaN power device of the present application.

[0015] Figure 3 is a principle diagram of inhibiting on-resistance degradation of the GaN power device of the present application.

[0016] Figure 4 is a first island shape schematic diagram of the GaN power device of the present application.

[0017] Figure 5 is a second island shape schematic diagram of the GaN power device of the present application.

[0018] Figure 6 is a third island shape schematic diagram of the GaN power device of the present application.

[0019] Figure 7 is a fourth island shape schematic diagram of the GaN power device of the present application.

[0020] Figure 8 is a fifth island shape schematic diagram of the GaN power device of the present application.

[0021] Figure 9 is a comparison schematic diagram of the GaN power device of the present application and the conventional P-type GaN gate enhancement GaN HEMT drain current and dynamic on-resistance curve. DETAILED DESCRIPTION

[0022] The technical solutions of the present application will be described in detail below.

[0023] As Figure 2As shown, the structure of the application includes from bottom to top substrate layer 1, nucleation layer 2, GaN Buffer layer 3, unintentionally doped GaN channel layer 4, AlGaN barrier layer 5, wherein the unintentionally doped GaN channel layer 4 and the AlGaN barrier layer 5 form a heterojunction structure, there is a gate P-type GaN material layer 6 above the AlGaN barrier layer, the gate P-type GaN material layer is connected with the gate metal 9 to form a Schottky contact, realizing an enhancement device; there are metal 7 and metal 8 at both ends of the AlGaN barrier layer, which are the drain and the source respectively, and both are in ohmic contact with the semiconductor material. A plurality of islands are introduced between the drain and the gate, including P islands composed of P-type GaN layer and metal 13, and S islands composed of metal 12, ohmic contact is formed between the metal 13 and the P-type GaN layer 11, and Schottky contact is formed between the metal 12 and the underlying AlGaN barrier layer. The AlGaN barrier layer 5 is covered by a passivation layer 10, and each island of the plurality of islands is isolated by the passivation layer 10.

[0024] The working principle of the GaN power device with multiple bias signal control of multiple islands of the application is described below.

[0025] The normal working principle of the GaN power device with multiple bias signal control of multiple islands of the application is as follows:

[0026] The GaN power device with multiple bias signal control of multiple islands of the application has the same working principle as the traditional pGaN enhancement GaN HEMT device in the forward conduction state, that is, a positive bias higher than the threshold voltage is applied to the gate, the gate is in the open state, the two-dimensional electron gas under the gate is restored, a bias is applied between the drain and the source, and a current is formed between the drain and the source. Due to the existence of multiple islands, the 2DEG under the island will be depleted, so the drain-source current passes between the islands, which is also the reason why the islands are not continuous. In the case of voltage resistance, no bias is applied to the gate, the 2DEG under the gate is depleted, the channel layer 2DEG is discontinuous, and the device is in a voltage resistance state. With the increase of the drain-source voltage, the device undergoes normal punch-through, and a certain bias is applied to the P island, which is beneficial to the depletion of the 2DEG under the P island and helps to expand the depletion region, thereby improving the voltage resistance. Compared with the traditional PGaN gate GaN HEMT device, the GaN power device with multiple bias signal control of multiple islands has a certain improvement in voltage resistance.

[0027] As Figure 3 shown, the working principle of the GaN power device with multiple bias signal control of multiple islands of the application and the principle of suppressing dynamic on-resistance degradation are as follows:

[0028] The bias circuit is controlled by the dynamic change of the density or concentration of the traps and the electrons and holes, the bias circuit output signal is applied on the P island and the S island, under the action of the signal, the P island and the S island inject carriers into the device, the charge dynamic compensation in the device working is realized through the controllable carrier injection and trap capture, so that the effect of inhibiting the degradation of the dynamic on-resistance is achieved. The simulation results are shown in Figure 9 Figure 9 (a) is the drain current comparison of the device of the application and the traditional PGaN gate GaN HEMT device, Figure 9 (b) is the dynamic on-resistance comparison of the device of the application and the traditional PGaN gate GaN HEMT device, and the structure device can effectively inhibit the degradation of the on-resistance.

[0029] The multi-bias signal control multi-island GaN power device of the application can have the following variations:

[0030] 1. A multi-bias signal control multi-island GaN power device with two columns of square islands arranged in a non-interlaced manner, as shown in Figure 4

[0031] 2. A multi-bias signal control multi-island GaN power device with two columns of square islands arranged in an interlaced manner, as shown in Figure 5

[0032] 3. A multi-bias signal control multi-island GaN power device with two columns of triangular islands arranged in an interlaced manner, as shown in Figure 6

[0033] 4. A multi-bias signal control multi-island GaN power device with two columns of circular islands arranged in an interlaced manner, as shown in Figure 7

[0034] 5. A multi-bias signal control multi-island GaN power device with three columns of square islands arranged in an interlaced manner, as shown in Figure 8

[0035] It should be noted that only some variations are introduced above, there are numerous variations regarding the number, shape and arrangement of the islands, the number, shape, arrangement and position of the islands are not limited to the above several kinds, the above described structure and the drawings should not be understood as a limitation of the application.​​​​​​

Claims

1. A GaN power device with multiple bias signals controlling multiple islands, characterized in that, The structure includes a substrate layer (1), a nucleation layer (2), a GaN buffer layer (3), and an unintentionally doped GaN channel layer (4) stacked sequentially from bottom to top. A drain (7) and a source (8) are located at opposite ends of the upper surface of the GaN channel layer (4). An AlGaN barrier layer (5) is located on the upper surface of the GaN channel layer (4) between the drain (7) and the source (8), and the thickness of the AlGaN barrier layer (5) is less than the thickness of the drain (7) and the source (8). A P-type GaN material layer (6) is located on the upper surface of the AlGaN barrier layer (5) near the source (8), and a gate metal (9) is located on the P-type GaN material layer (6). The AlGaN barrier layer (6) is located between the P-type GaN material layer (6) and the source (8). The upper surface of the barrier layer (5) has a passivation layer (10). The upper surface of the AlGaN barrier layer (5) between the P-type GaN material layer (6) and the drain (7) has multiple rows of islands arranged along the transverse direction of the device. Each row of islands is composed of multiple islands spaced apart along the longitudinal direction of the device. The islands include S islands composed of the first metal (12) and P islands composed of the P-type GaN layer (11) and the second metal (13). All P islands are controlled by one bias circuit, and the S islands are controlled by another bias circuit. The passivation layer (10) isolates the islands from each other, the islands from each other, the islands from the P-type GaN material layer (6), and the islands from the drain (7).

2. The GaN power device with multi-bias signal control of multiple islands according to claim 1, characterized in that, The islands are arranged in two rows. The islands on the side closer to the gate metal (9) are all P islands, and the islands on the side closer to the drain (7) are all S islands.

3. The GaN power device with multi-bias signal control of multiple islands according to claim 1, characterized in that, The islands are arranged in two columns, each column consisting of alternating P islands and S islands.

4. A GaN power device with multi-bias signal control of multiple islands according to claim 1, characterized in that, P-island and S-island appear as regular or symmetrical geometric shapes in a top view.

5. A GaN power device with multi-bias signal control of multiple islands according to claim 1, characterized in that, The substrate (1) is made of silicon carbide, sapphire or Al2O3; the passivation layer (10) is made of silicon nitride or silicon dioxide.

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