Zero line breakage detection circuit and detection method for acquisition terminal

Abstract

The invention relates to the technical field of electric energy meter data testing, in particular to a zero line breakage detection circuit and detection method for an acquisition terminal. The detection circuit comprises an AC sampling module MK1, four current transformers CT1-CT4, a relay K1, resistors R1-R4, a diode D1, an NPN triode Q1 and a processor N1. The circuit collects three-phase voltage and zero line voltage and current through the MK1, preliminarily judges whether the zero line current is larger than a preset threshold value I0 or not, further calculates the absolute value of the three-phase voltage vector sum, compares the absolute value with a threshold value U0, changes the load state of the circuit through the relay K1, and then performs re-judgment so as to accurately judge whether the zero line is broken or not. The method comprises the steps of initial sampling, current preliminary judgment, voltage vector sum preliminary judgment, relay action and re-judgment preparation, voltage vector sum re-judgment and detection ending and responding. The zero line breaking fault can be accurately detected, misjudgment is avoided, and the detection accuracy and reliability are improved.

Description

Technical Field

[0001] The present invention relates to the technical field of electric energy meter data testing, and in particular to a zero line break detection circuit and a detection method for a collection terminal. Background Art

[0002] With the increase in the types of data acquisition terminals for electric energy meters and the improvement of data acquisition process and processing requirements, the on-site meter reading environment has become increasingly complex. Traditional test methods are difficult to simulate the complex meter environment on site, such as carrier meter networking failure, abnormal data item response, etc. The actual environment is difficult to build and fixed, and cannot meet the test requirements of various types and a large number of electric energy meters required for testing, as well as the requirements of simulating various abnormal situations.

[0003] In the existing test methods, if a small number of simple electric energy meters are used for testing, the test of the electric energy meter data acquisition terminal can be barely achieved manually, but the efficiency is low. When simulating the field environment and conducting stress testing, the test requirements are complex and require a lot of human resources and time. In addition, the test cases cannot be converted into automation, resulting in a lot of repetitive work for testers. The existing test methods cannot flexibly configure test scenarios, such as changing meter types, meter reply data values, abnormal responses, etc. These test requirements are difficult to achieve in the actual environment and cannot be completed by simple test tools or methods, which limits the effectiveness and reliability of the test. In addition, due to the complexity and variability of the field environment, the existing automated test methods are greatly limited in practical applications. Automated test tools often cannot adapt to complex field environments, resulting in inaccurate test results or inability to complete test tasks.

[0004] In view of the above problems, a neutral line break detection circuit and detection method for the acquisition terminal are designed to solve the above problems. The on-site meter reading environment is simulated in a virtual way to achieve flexible configuration of test scenarios, improve test efficiency, reduce repetitive work, and promote the application of automated testing in the test of electric energy meter data acquisition terminals, which has important practical significance. Summary of the invention

[0005] In order to solve the problems existing in the background technology, the present invention provides a neutral line disconnection detection circuit for an acquisition terminal, which comprises:

[0006] AC sampling module MK1, current transformer CT1, current transformer CT2, current transformer CT3, current transformer CT4, relay K1, resistor R1, resistor R2, diode D1, NPN transistor Q1, processor N1, resistor R3, resistor R4;

[0007] MK1 has a first voltage input terminal, a second voltage input terminal, a third voltage input terminal, a fourth voltage input terminal, a first current input terminal, a second current input terminal, a third current input terminal, a fourth current input terminal, and an output terminal;

[0008] The first voltage input terminal is connected to the A line of the three-phase voltage, the second voltage input terminal is connected to the B line of the three-phase voltage, the third voltage input terminal is connected to the C line of the three-phase voltage, the fourth voltage input terminal is connected to the N line of the three-phase voltage, the first current input terminal is connected to the secondary side of CT1, the second current input terminal is connected to the secondary side of CT2, the third current input terminal is connected to the secondary side of CT3, the fourth current input terminal is connected to the secondary side of CT4, and the output terminal is connected to N1;

[0009] The primary side of CT1 is line A, and the secondary side is connected to the first current input port of MK1;

[0010] The primary side of CT2 is line B, and the secondary side is connected to the second current input port of MK1;

[0011] The primary side of CT3 is C line, and the secondary side is connected to the third current input port of MK1;

[0012] The primary side of CT4 is the N line, and the secondary side is connected to the fourth current input port of MK1;

[0013] Relay K1 has a first port, a second port, a third port NC, a fourth port COM, and a fifth port NO. The first port is connected to the power supply VCC, the second port is connected to the collector of Q1, NC is connected to R1, COM is connected to R2, and NO is suspended.

[0014] One end of R1 is connected to the third port NC of K1, and the other end is connected to the C phase of the three-phase voltage;

[0015] One end of R2 is connected to the fourth port COM of K1, and the other end is connected to the neutral line of the three-phase voltage;

[0016] D1 anode is connected to Q1 collector, and cathode is connected to power supply VCC;

[0017] The collector of Q1 is connected to the anode of D1 and the second port of K1, the base is connected to R3, and the emitter is grounded;

[0018] N1 has an input port and an output port, the input port is connected to the output port of MK1, and the output port is connected to R3 and R4;

[0019] One end of R3 is connected to the output port of N1, and the other end is connected to the base of Q1;

[0020] One end of R4 is connected to the output port of N1, and the other end is grounded.

[0021] In the preferred solution, the resistance of R1 is 150kΩ, the resistance of R2 is 150kΩ, the resistance of R3 is 10kΩ, and the resistance of R4 is 10kΩ;

[0022] Preferably, when Q1 is turned on, NC and COM of K1 are in a disconnected state, and NO and COM are in a turned-on state; when Q1 is turned off, NC and COM of K1 are in a turned-on state, and NO and COM are in a turned-off state; when the output terminal of U1 outputs a logic high level, Q1 is in a saturated state, and the collector and emitter are turned on; when U1 outputs a logic low level or does not output, Q1 is in a turned-off state, and the collector and emitter are turned off.

[0023] A detection method based on a zero line disconnection detection circuit for an acquisition terminal comprises the following steps:

[0024] S1, initialization sampling: start the AC sampling module MK1, start collecting the three-phase voltage A phase, B phase, C phase and neutral line voltage, and at the same time, the current transformers CT1, CT2, CT3, CT4 measure the current of A phase, B phase, C phase and neutral line respectively; obtain real-time voltage and current data;

[0025] S2, preliminary current judgment: processor N1 or U1 receives the three-phase voltage and four-wire current values ​​reported by MK1; judges whether the neutral current IN is greater than the preset threshold value I0; the judgment logic is:

[0026] If IN>I0, it is determined that the neutral line connection is normal and the detection process ends;

[0027] If IN≤I0, then proceed to the next step of voltage vector sum judgment;

[0028] S3, preliminary judgment of voltage vector sum: when the neutral line current is lower than the threshold, the processor N1 or U1 calculates the absolute value of the three-phase voltage vector sum; sets a voltage vector sum threshold U0; the judgment logic is:

[0029] If the absolute value of the three-phase voltage vector sum is less than U0, it is determined that the neutral line connection is normal and the detection process ends;

[0030] If the absolute value of the three-phase voltage vector sum is greater than or equal to U0, the next step is relay action and re-judgment;

[0031] S4, relay action and re-judgment preparation: processor N1 or U1 outputs a logic high level signal; NPN transistor Q1 is turned on after receiving the high level signal, and a path is formed between the collector and the emitter; the NC of relay K1 is disconnected from the COM port, and the NO is connected to the COM port. At this time, the load system composed of R1, R2, and K1 is connected to the circuit; by changing the circuit load state, observe the voltage change;

[0032] S5, voltage vector sum re-judgment: After the load system is connected, the processor N1 or U1 calculates the absolute value of the three-phase voltage vector sum again; the judgment logic is:

[0033] If the absolute value of the three-phase voltage vector sum is still greater than or equal to U0 at this time, it is determined that a neutral line break fault has occurred;

[0034] If the absolute value of the three-phase voltage vector sum is less than U0, return to step 2 to re-perform preliminary current judgment to avoid misjudgment;

[0035] S6. End of detection and response: According to the final judgment result, if it is determined to be a neutral line disconnection fault, the processor N1 or U1 will output a corresponding fault signal or perform other fault processing operations; if it is determined that the neutral line connection is normal, the current state is maintained or the detection process is ended.

[0036] Preferably, I0=7.5 mA.

[0037] Preferably, U0=80V.

[0038] The beneficial effects achieved by the present invention are:

[0039] The present invention is designed to preliminarily judge whether the neutral line is broken by judging whether the neutral line current is greater than a preset threshold value I0. When the neutral line current is lower than the threshold, the absolute value of the three-phase voltage vector sum is calculated and compared with the preset threshold value U0 for further judgment. If it is preliminarily judged that the neutral line may be broken, the circuit load state is changed by relay action, and the three-phase voltage vector sum is calculated again for re-judgment to avoid misjudgment. The present invention connects a controlled normal small load between the phase lines. When the neutral line may be broken, the circuit load state is changed to observe the voltage change, thereby more accurately judging whether the neutral line is broken.

[0040] Through the above-mentioned multi-level judgment mechanism, combined with the preliminary judgment of current, the preliminary judgment of voltage vector and relay action and re-judgment, the present invention can more accurately judge whether the neutral line is broken, and effectively avoid the false alarm or missed alarm that may be caused by a single judgment method.

[0041] The detection circuit and method of the present invention are not only applicable to load conditions, but also to no-load or low-load conditions, and can cope with complex and changeable environments on site, thereby improving the reliability and applicability of detection. Through the integration of a virtualized test platform, the present invention can simulate an on-site meter reading environment, reduce the demand for actual electric energy meters, and reduce testing costs. At the same time, the application of automated testing also improves testing efficiency and reduces repetitive work.

[0042] The detection circuit of the present invention has extremely low power consumption, little impact on the grid load, and can be tested without power outage, reducing the impact on grid operation. The invention provides a new idea and method for testing the data acquisition terminal of the electric energy meter, promotes the application of automated testing in this field, and helps to improve the testing level and efficiency of the entire industry. BRIEF DESCRIPTION OF THE DRAWINGS

[0043] Figure 1 It is a schematic diagram of a neutral line break detection circuit of the present invention.

[0044] Figure 2 It is a flow chart of the neutral line break detection method of the present invention. DETAILED DESCRIPTION

[0045] The technical solution of the present invention will be clearly and completely described below in conjunction with the accompanying drawings in the present invention. In addition, the forms of the various structures recorded in the following embodiments are merely illustrative, and the present invention is not limited to the various structures recorded in the following embodiments. All other embodiments obtained by ordinary technicians in this field without making creative work belong to the scope of protection of the present invention.

[0046] Reference Figure 1 - Figure 2 , a zero line break detection circuit for a collection terminal includes an AC sampling module MK1, a current transformer CT1, a current transformer CT2, a current transformer CT3, a current transformer CT4, a relay K1, a resistor R1, a resistor R2, a diode D1, an NPN transistor Q1, a processor U1, a resistor R3, and a resistor R4;

[0047] The MK1 has a first voltage input terminal, a second voltage input terminal, a third voltage input terminal, a fourth voltage input terminal, a first current input terminal, a second current input terminal, a third current input terminal, a fourth current input terminal, and an output terminal, wherein the first voltage input terminal is connected to the A phase of the three-phase voltage, the second voltage input terminal is connected to the B phase of the three-phase voltage, the third voltage input terminal is connected to the C phase of the three-phase voltage, the fourth voltage input terminal is connected to the N line of the three-phase voltage, the first current input terminal is connected to the secondary side of CT1, the second current input terminal is connected to the secondary side of CT2, the third current input terminal is connected to the secondary side of CT3, the fourth current input terminal is connected to the secondary side of CT4, and the output terminal is connected to U1;

[0048] The primary side of CT1 is line A, and the secondary side is connected to the first current input port of MK1;

[0049] The primary side of CT2 is line B, and the secondary side is connected to the second current input port of MK1;

[0050] The primary side of CT3 is C line, and the secondary side is connected to the third current input port of MK1;

[0051] The primary side of CT4 is N line, and the secondary side is connected to the fourth current input port of MK1;

[0052] The relay K1 has a first port, a second port, a third port NC, a fourth port COM, and a fifth port NO. The first port is connected to the power supply VCC, the second port is connected to the collector of Q1, NC is connected to R1, COM is connected to R2, and NO is suspended.

[0053] One end of R1 is connected to the third port NC of K1, and the other end is connected to the C phase of the three-phase voltage;

[0054] One end of R2 is connected to the fourth port COM of K1, and the other end is connected to the neutral line of the three-phase voltage;

[0055] The anode of D1 is connected to the collector of Q1, and the cathode is connected to the power supply VCC;

[0056] The collector of Q1 is connected to the anode of D1 and the second port of K1, the base is connected to R3, and the emitter is grounded;

[0057] The U1 has an input port and an output port, the input port is connected to the output port of MK1, and the output port is connected to R3 and R4;

[0058] One end of R3 is connected to the output port of U1, and the other end is connected to the base of Q1;

[0059] One end of R4 is connected to the output port of U1, and the other end is grounded.

[0060] When Q1 is turned on, NC and COM of K1 are in the disconnected state, and NO and COM are in the turned-on state. When Q1 is turned off, NC and COM of K1 are in the turned-on state, and NO and COM are in the turned-off state.

[0061] When the output terminal of U1 outputs a logic high level, Q1 is in a saturated state, and the collector and emitter are turned on. When U1 outputs a logic low level or does not output, Q1 is in a cut-off state, and the collector and emitter are turned off.

[0062] MK1 can sample and calculate the input three-phase voltage values ​​and the currents on the four lines A, B, C, and N, and send the calculation results to U1 for analysis. It can be replaced by other modules or discrete devices with similar functions.

[0063] The resistor R1 can also be connected to the A phase or the B phase of the three-phase voltage.

[0064] The present invention provides a zero line disconnection detection method for an acquisition terminal, MK1 acquires three-phase voltage and four-line current values ​​and reports them to U1, U1 determines whether there is current in N line, when the current of N line is higher than a set threshold value I0, it is determined that the zero line connection is normal; when the current of N line is lower than the set threshold value I0, at this time, the load system composed of R1, R2, and K1 plays a major role in the three-phase voltage balance, U1 calculates the three-phase voltage vector sum, if the vector sum absolute value is less than the set threshold value V0, it is determined that the zero line connection is normal; if the three-phase voltage vector sum absolute value is greater than the set threshold value V0, the output end of U1 outputs logic high, Q1 is turned on, NC of K1 is disconnected from COM, at this time U1 calculates the three-phase voltage vector sum again, if the vector sum absolute value is less than V0, it is determined that a zero line disconnection fault occurs.

[0065] The specific steps are as follows:

[0066] S1. Initialize sampling

[0067] The AC sampling module MK1 is started to collect the three-phase voltages of phase A, phase B, phase C and neutral line voltage. At the same time, the current transformers CT1, CT2, CT3, and CT4 measure the currents of phase A, phase B, phase C and neutral line respectively.

[0068] Obtain real-time voltage and current data to provide basic data for subsequent judgment.

[0069] S2. Preliminary judgment of current

[0070] Processor N1 receives the three-phase voltage and four-wire current values ​​reported by MK1.

[0071] Judgment logic: judge whether the neutral line current IN is greater than a preset threshold value I0 (eg, I0=7.5 mA).

[0072] If IN>I0, it is determined that the neutral line connection is normal and the detection process ends.

[0073] If IN≤I0, proceed to the next step of voltage vector sum judgment.

[0074] S3. Voltage vector and preliminary judgment

[0075] When the neutral current is lower than the threshold, the processor N1 calculates the absolute value of the three-phase voltage vector sum.

[0076] Judgment logic: set a threshold value U0 of the voltage vector sum (eg, U0 = 80V).

[0077] If the absolute value of the three-phase voltage vector sum is less than U0, it is determined that the neutral line connection is normal and the detection process ends.

[0078] If the absolute value of the three-phase voltage vector sum is greater than or equal to U0, the next step is relay action and re-judgment.

[0079] S4. Relay action and re-judgment preparation

[0080] The processor N1 outputs a logic high level signal.

[0081] Circuit changes: NPN transistor Q1 is turned on after receiving a high-level signal, and a path is formed between the collector and the emitter. The NC of relay K1 is disconnected from the COM port, and the NO is connected to the COM port. At this time, the load system composed of R1, R2, and K1 is connected to the circuit.

[0082] By changing the circuit load state, observe the voltage changes.

[0083] S5. Voltage vector and re-judgment

[0084] After the load system is connected, the processor N1 calculates the absolute value of the three-phase voltage vector sum again.

[0085] Judgment logic:

[0086] If the absolute value of the three-phase voltage vector sum is still greater than or equal to U0 at this time, it is determined that a neutral line break fault has occurred.

[0087] If the absolute value of the three-phase voltage vector sum is less than U0, the process returns to step S2 to perform a preliminary current judgment again to avoid misjudgment.

[0088] S6. End of detection and response

[0089] According to the final judgment result, the processor N1 will perform corresponding operations.

[0090] Judgment logic:

[0091] If it is determined to be a neutral line disconnection fault, the processor N1 will output a corresponding fault signal or perform other fault processing operations.

[0092] If it is determined that the neutral line connection is normal, the current state is maintained or the detection process ends.

[0093] Through the above steps, the present invention can realize accurate detection of neutral line disconnection faults, while avoiding misjudgment that may be caused by a single judgment method, thereby improving the accuracy and reliability of detection.

[0094] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention should be included in the protection scope of the present invention.

Claims

1. A zero line disconnection detection circuit for a collection terminal, characterized in that: It includes: AC sampling module MK1, current transformer CT1, current transformer CT2, current transformer CT3, current transformer CT4, relay K1, resistor R1, resistor R2, diode D1, NPN transistor Q1, processor N1, resistor R3, resistor R4; MK1 has a first voltage input terminal, a second voltage input terminal, a third voltage input terminal, a fourth voltage input terminal, a first current input terminal, a second current input terminal, a third current input terminal, a fourth current input terminal, and an output terminal; The first voltage input terminal is connected to the A line of the three-phase voltage, the second voltage input terminal is connected to the B line of the three-phase voltage, the third voltage input terminal is connected to the C line of the three-phase voltage, the fourth voltage input terminal is connected to the N line of the three-phase voltage, the first current input terminal is connected to the secondary side of CT1, the second current input terminal is connected to the secondary side of CT2, the third current input terminal is connected to the secondary side of CT3, the fourth current input terminal is connected to the secondary side of CT4, and the output terminal is connected to N1; The primary side of CT1 is line A, and the secondary side is connected to the first current input port of MK1; The primary side of CT2 is line B, and the secondary side is connected to the second current input port of MK1; The primary side of CT3 is C line, and the secondary side is connected to the third current input port of MK1; The primary side of CT4 is the N line, and the secondary side is connected to the fourth current input port of MK1; Relay K1 has a first port, a second port, a third port NC, a fourth port COM, and a fifth port NO. The first port is connected to the power supply VCC, the second port is connected to the collector of Q1, NC is connected to R1, COM is connected to R2, and NO is suspended. One end of R1 is connected to the third port NC of K1, and the other end is connected to the C phase of the three-phase voltage; One end of R2 is connected to the fourth port COM of K1, and the other end is connected to the neutral line of the three-phase voltage; D1 anode is connected to Q1 collector, and cathode is connected to power supply VCC; The collector of Q1 is connected to the anode of D1 and the second port of K1, the base is connected to R3, and the emitter is grounded; N1 has an input port and an output port, the input port is connected to the output port of MK1, and the output port is connected to R3 and R4; One end of R3 is connected to the output port of N1, and the other end is connected to the base of Q1; One end of R4 is connected to the output port of N1, and the other end is grounded.

2. A zero line disconnection detection circuit for a data acquisition terminal according to claim 1, characterized in that: The resistance value of R1 is 150kΩ, the resistance value of R2 is 150kΩ, the resistance value of R3 is 10kΩ, and the resistance value of R4 is 10kΩ.

3. A zero line disconnection detection circuit for a data acquisition terminal according to claim 1, characterized in that: When Q1 is turned on, NC and COM of K1 are in the disconnected state, and NO and COM are in the turned-on state. When Q1 is turned off, NC and COM of K1 are in the turned-on state, and NO and COM are in the turned-off state. When the output terminal of U1 outputs a logic high level, Q1 is in a saturated state, and the collector and emitter are turned on. When U1 outputs a logic low level or does not output, Q1 is in a turned-off state, and the collector and emitter are turned off.

4. A detection method using the neutral line disconnection detection circuit for a collection terminal as claimed in claim 1, characterized in that: The steps include: S1, initialization sampling: start the AC sampling module MK1, start collecting the three-phase voltage A phase, B phase, C phase and neutral line voltage, and at the same time, the current transformers CT1, CT2, CT3, CT4 measure the current of A phase, B phase, C phase and neutral line respectively; obtain real-time voltage and current data; S2, preliminary current judgment: processor N1 or U1 receives the three-phase voltage and four-wire current values ​​reported by MK1; judges whether the neutral current IN is greater than the preset threshold value I0; the judgment logic is: If IN>I0, it is determined that the neutral line connection is normal and the detection process ends; If IN≤I0, then proceed to the next step of voltage vector sum judgment; S3, preliminary judgment of voltage vector sum: when the neutral line current is lower than the threshold, the processor N1 or U1 calculates the absolute value of the three-phase voltage vector sum; sets a voltage vector sum threshold U0; the judgment logic is: If the absolute value of the three-phase voltage vector sum is less than U0, it is determined that the neutral line connection is normal and the detection process ends; If the absolute value of the three-phase voltage vector sum is greater than or equal to U0, the next step is relay action and re-judgment; S4, relay action and re-judgment preparation: processor N1 or U1 outputs a logic high level signal; NPN transistor Q1 is turned on after receiving the high level signal, and a path is formed between the collector and the emitter; the NC of relay K1 is disconnected from the COM port, and the NO is connected to the COM port. At this time, the load system composed of R1, R2, and K1 is connected to the circuit; by changing the circuit load state, observe the voltage change; S5, voltage vector sum re-judgment: After the load system is connected, the processor N1 or U1 calculates the absolute value of the three-phase voltage vector sum again; the judgment logic is: If the absolute value of the three-phase voltage vector sum is still greater than or equal to U0 at this time, it is determined that a neutral line break fault has occurred; If the absolute value of the three-phase voltage vector sum is less than U0, return to step 2 to re-perform preliminary current judgment to avoid misjudgment; S6. End of detection and response: According to the final judgment result, if it is determined to be a neutral line break fault, the processor N1 or U1 will output a corresponding fault signal or perform other fault processing operations; If it is determined that the neutral line connection is normal, the current state is maintained or the detection process ends.

5. The detection method according to claim 3, characterized in that: I0=7.5mA.

6. The detection method according to claim 3, characterized in that: U0=80V.

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