Matching and laminating method for silicon-based OLED (Organic Light Emitting Diode) product

Abstract

The invention discloses a matching and laminating method for a silicon-based OLED (Organic Light Emitting Diode) product. The matching and laminating method comprises the following steps of: a primary sorting step: sorting a wafer and a color film CF which are subjected to the same level judgment into a same front open type wafer transfer box Foup; an intelligent matching step: carrying out weight calculation on the overlapped graph of the Wafer Map and the CF Map, and matching an optimal CF through Fop matching and Slot layer matching by taking the Wafer as a reference; and a secondary sorting step: according to the Slot of the Wafer in the Fop, adjusting the Slot of the matched CF in the Fop to ensure that the Slot of the Wafer and the Slot of the CF in the Fop are consistent, and obtaining the matching information of the Wafer and the CF. The method has the advantages that matching between the wafer and the color film CF in silicon-based OLED production is achieved in an intelligent matching mode, matching is more accurate and reliable, the attaching yield can be increased, and production efficiency is improved.

Description

Technical Field

[0001] The present invention relates to the field of silicon-based OLED displays, and in particular to a silicon-based OLED product matching and bonding method based on an intelligent matching algorithm. Background Art

[0002] Silicon-based OLED is a special OLED (organic light-emitting diode) technology that combines CMOS (complementary metal oxide semiconductor) technology and OLED technology. Silicon-based OLED uses single-crystal silicon as the active driving backplane to produce active organic light-emitting diode display devices. Silicon-based OLED has a wide range of applications in the fields of AR and VR head-mounted displays due to its advantages such as high resolution, fast response time and high contrast. AR, VR, MR and other products produced by silicon-based OLED are all called silicon-based OLED products.

[0003] The production of silicon-based OLED products involves the matching and bonding between wafers and color films. During the production process, the pre-matched wafers and color films are bonded to complete the bonding production. The bonding of wafers and color films is crucial. If the matching is inaccurate or there are problems with the matching, the silicon-based OLED products obtained after bonding are unqualified bonding products, resulting in low yield of silicon-based OLED production, affecting production efficiency and cost.

[0004] Achieving reliable and accurate matching between silicon-based OLED wafer and color film CF is a prerequisite for bonding and an important means to improve the production yield of silicon-based OLED. The existing technology has no reliable matching solution in the field of silicon-based OLED. Summary of the invention

[0005] The purpose of the present invention is to overcome the shortcomings of the prior art and provide a silicon-based OLED product matching and bonding method and system. By adopting an intelligent matching method, the matching between the wafer Wafer and the color film CF in the production of silicon-based OLED is achieved. The matching is more accurate and reliable, which can improve the bonding yield and improve production efficiency.

[0006] In order to achieve the above object, the technical solution adopted by the present invention is: a method for matching and bonding silicon-based OLED products, comprising the following steps:

[0007] One-time sorting step: sort the wafers and color films CF of the same grade into the same front-opening wafer transfer box Foup;

[0008] Smart matching steps: weight calculation is performed on the overlay of Wafer Map and CF Map, and the best CF is matched through Foup matching and Slot layer matching based on Wafer.

[0009] Secondary sorting step: According to the slot of the wafer in the Foup, adjust the slot of the matching CF in the Foup to ensure that the slots of the wafer and CF in the Foup are consistent, and obtain the matching information of the wafer and CF.

[0010] The method further comprises a bonding step: after the secondary sorting is completed, the wafer and CF information arrive at the bonding station, and the bonding equipment bonds the wafer and CF according to the matching result.

[0011] The first sorting step refers to the presence of wafers or CFs of different grades in Foup1. Wafers or CFs of grades A, B, and C are screened out and stored in Foup2, Foup3, and Foup4 respectively, which includes:

[0012] Step 1: Sorting task generation. When Foup1 arrives at a sorting station, a sorting task is automatically generated according to the grade of Wafer or CF. The sorting task is to sort the products in the slot layer selected in Foup1 to the corresponding slot layer of Foup2, Foup3 or Foup4.

[0013] Step 2: Foup transport. After the sorting task is generated, the transport operation is automatically triggered. The material transport system transports Foup1, Foup2, Foup3 and Foup4 to the P01, P02, P03 and P04 ports of the sorting equipment respectively.

[0014] Step 3: The sorting task is sent to the device CIMPC, and the device CIMPC controls the device to complete the sorting operation;

[0015] Step 4: After the grading is completed, the Wafer or CF graded as A, B, and C are sorted into Foup2, Foup3, and Foup4 respectively.

[0016] Step 5: Processing the sorting results. After the sorting is completed, the device CIMPC reports the sorting results and updates the binding relationship between Wafer or CF and Foup2, Foup3, and Foup4.

[0017] The weight calculation in the smart matching step includes: overlaying the Wafer Map and the CF Map, and obtaining the best combination of Wafer and CF according to the weighted value after overlaying.

[0018] The weight calculation includes:

[0019] Step 1: Map overlay rules and weight maintenance, maintain the matching rules between Wafer Die level, CF Die level and ODF Die level. Each ODF Die level corresponds to a weight value, and the weight of G level is W. G , P level weight is W P , N level weight is W N , ,W G , W P , W N The relationship is:

[0020] W G <W P <W N

[0021] Step 2: The weight calculation method is:

[0022] W SUM =W G *QTY G +W P *QTY P +W N *QTY N

[0023] QTY G +QTY P +QTY N =QTY Die

[0024] in,

[0025] W G is the G level weight, W P is the P level weight, W N is the N-level weight, W G <W P <W N , QTY G is the quantity of G grade, QTY P is the number of P grades, QTY N is the number of N grades, QTY Die The number of available dies on the wafer or CF;

[0026] Step 3: Get the best combination;

[0027] The best combination is:

[0028] min{W SUM1 , W SUM2 , ..., W SUMN}

[0029] Among them, N is the number of wafers or CFs involved in matching, and the combination with the smallest weight value is selected as the best combination.

[0030] After the weight calculation obtains the best combination, information matching is performed. Information matching includes: Foup matching. The Foup matching method matches according to the matching rules of priority. The matching rules include:

[0031] ① Prioritize the wafer Foup matching of level A, then the wafer Foup matching of level B, and finally the wafer Foup matching of level C;

[0032] ② Prioritize matching Wafer Foup with CF Foup of level A, then match Wafer Foup with CFFoup of level B, and finally match Wafer Foup with CF Foup of level C;

[0033] The information matching also includes Slot matching, which includes: performing Slot matching according to a weight calculation value, wherein there are m wafers in Wafer Foup and m CFs in CF Foup, and the matching method includes: matching Wafer Foup Slot1 to Wafer Foup Slotm with the Slot of CF Foup in sequence, and calculating the weight value of the Slot in Wafer Foup and the Slot of CF Foup as a combination according to a one-to-one matching relationship, selecting a combination corresponding to the minimum weight value to perform a combined matching mark on the Slot in Wafer Foup and the Slot of CF Foup, and completing the matching of all Slots in Wafer Foup with the Slot layer in CF Foup.

[0034] The secondary sorting steps include:

[0035] Step 1: After the intelligent matching step is completed, the sorting task is automatically generated;

[0036] Step 2: After the sorting task is generated, the transport operation will be automatically triggered to transport the CF Foup to the P01 port of the sorting equipment;

[0037] Step 3: Send the sorting task to the device CIM PC, and the device CIM PC controls the device to complete the sorting operation;

[0038] Step 4: After the sorting is completed, the device CIM PC reports the sorting result, updates the Slot information in the CF Foup, and completes the CFSlot information adjustment.

[0039] The bonding steps include:

[0040] Step 1: Generate tasks that match the requirements;

[0041] Step 2: Foup transport. After the bonding task is generated, the transport operation will be automatically triggered to transport the Wafer Foup and CFFoup to the P01 and P02 ports of the bonding equipment respectively;

[0042] Step 3: The bonding task is sent to the device CIM PC, and the device CIM PC controls the device to complete the bonding operation;

[0043] Step 4: The equipment completes the bonding of Wafer and CF;

[0044] Step 5: Collect the sheets after bonding, and discharge the bonded products into the ODF Foup at the P03 port;

[0045] Step 6: After the bonding is completed, the device CIMPC reports the bonding result and updates the binding relationship between Wafer and CF.

[0046] In step 1 of the bonding step, when the wafer and CF information arrive at the bonding site, a bonding task is generated based on the matching wafer and CF matching information. The bonding task specifies that the product in the slot of the wafer Foup is bonded with the slot in the CF Foup according to the matching relationship.

[0047] The advantages of the present invention are: by using intelligent matching to achieve the matching between the wafer Wafer and the color film CF in the production of silicon-based OLED, the matching is more accurate and reliable, which can improve the bonding yield, improve production efficiency, and reduce production costs. This solution can be integrated into the silicon-based OLED production information system MES to achieve automated matching and sorting control, and improve the intelligence and automation of silicon-based OLED production. The technical advantages of this solution also include:

[0048] 1. The present invention provides an automatic sorting solution to achieve one-step sorting automation: sorting tasks are automatically generated according to the grading of Wafer and CF, and sent to the sorting equipment, and the sorting equipment sorts Wafer and CF according to the sorting tasks;

[0049] 2. The present invention provides an intelligent information matching solution to realize intelligent information matching: by calculating the weight of the overlay of Wafer and CFMap, the optimal weight combination is obtained, and the best CF is matched by Foup matching and Slot matching based on Wafer;

[0050] 3. The present invention provides an automatic sorting solution to realize secondary sorting automation: automatically generate CF sorting tasks according to the information matching results, and send them to the sorting equipment. The sorting equipment sorts CF according to the sorting tasks to realize the adjustment of CFSlot;

[0051] 4. The present invention provides a bonding solution to achieve automated bonding: a bonding task is automatically generated according to matching information and sent to a bonding device, and the bonding device bonds matching wafers and CFs;

[0052] 5. The present invention provides a silicon-based OLED product bonding system based on an intelligent matching algorithm. The system realizes primary sorting, intelligent matching, secondary sorting and bonding solutions, which can effectively control the bonding yield and improve production efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0053] The following is a brief description of the contents expressed in the drawings of the present invention and the symbols in the drawings:

[0054] Figure 1 This is a flow chart of the matching and bonding method of the present invention;

[0055] Figure 2 This is a schematic diagram of a primary sorting scheme of the present invention;

[0056] Figure 3 This is a primary sorting flow chart of the present invention;

[0057] Figure 4 This is an example diagram of a sorting task of the present invention;

[0058] Figure 5 It is a schematic diagram of the stacking scheme of the present invention;

[0059] Figure 6 This is a schematic diagram of the weight benchmark scheme principle of the present invention;

[0060] Figure 7 This is a schematic diagram of the information matching principle of the present invention;

[0061] Figure 8 The schematic diagram of the Wafer Foup matching CF Foup method of the present invention;

[0062] Fig. 9 The present invention is a schematic diagram of the Wafer Foup matching process of the present invention;

[0063] Fig.10 This is a schematic diagram of the CF Foup matching process of the present invention;

[0064] Fig.11 It is a schematic diagram of the principle of the secondary sorting method of the present invention;

[0065] Fig.12 This is a secondary sorting flow chart of the present invention;

[0066] Fig.13 It is a schematic diagram of the laminating process of the present invention;

[0067] Fig.14 This is an example schematic diagram of the bonding task of the present invention;

[0068] Fig.15 It is a schematic diagram of the process of the silicon-based OLED product bonding solution based on the intelligent matching algorithm of the present invention. DETAILED DESCRIPTION

[0069] The specific implementation of the present invention will be further explained in detail below by describing the optimal embodiment with reference to the accompanying drawings.

[0070] In this embodiment, the English special terms and Chinese comparisons involved are as follows:

[0071] Wafer: wafer;

[0072] CF: Color Filter, color filter, here refers to the glass with color filter technology;

[0073] ODF: One Drop Filling, an English term for the lamination process in panel display factories, here refers to the lamination process; ODF equipment, that is, the equipment that implements the lamination process, is commonly used in display factories;

[0074] Foup: Front Opening Unified Pod, a front-opening wafer transfer box, is a container used to store and transport wafers in semiconductor factories;

[0075] Slot: layer. Foup is a wafer container. Each Foup has 25 layers, i.e. 25 slots, which can hold 25 wafers. Here, the 25 layers are named Slot1 to Slot25, and different layers are distinguished by serial numbers.

[0076] CIMPC: Equipment message interaction computer, a computer on the equipment used to interact with MES and other system messages;

[0077] Grade: refers to the quality of Wafer or CF, with A, B, and C representing three different grades;

[0078] Grade: refers to the quality of the die on the wafer or CF, with three different grades represented by G, P, and N.

[0079] Foup1, Foup2, Foup3, and Foup4 refer to the four Foups numbered 1, 2, 3, and 4, respectively. Figure 2It is used to illustrate the principle of primary sorting, with different numbers representing different Foups.

[0080] Wafer and CF are two independent process routes in the sorting and production process. Before the bonding process, they are produced and stored separately. One sorting is to sort the two separately. Figure 2 Refers to the sorting of wafers or CFs. Wafers or CFs undergo a sorting step for preliminary sorting. Sorting is performed based on the grade (Judge) of the wafers or CFs. Before sorting, wafers or CFs of different grades exist in Foup1. After sorting, wafers or CFs of different grades are distinguished and stored in Foup2, Foup3, and Foup4 respectively.

[0081] This embodiment mainly implements a matching and bonding method for silicon-based OLED products, which involves the matching of wafers and CFs and the bonding after matching. Figure 1 As shown, the matching and fitting method includes the following steps:

[0082] S1, primary sorting;

[0083] S2, intelligent matching;

[0084] S3, secondary sorting;

[0085] S4. Fit.

[0086] In a silicon-based OLED product bonding method based on an intelligent matching algorithm in this embodiment, the first sorting includes sorting the wafers (wafers) and CFs (color films) of the same grade into the same Foup (front-opening wafer transfer box); the intelligent matching includes weighting the overlay of the wafer and CF Map, and matching the best CF based on the wafer through Foup matching and Slot (layer) matching; the second sorting includes adjusting the Slot of the CF in the Foup that matches the wafer according to the Slot of the wafer in the Foup; the bonding includes bonding the matching wafers and CFs. This solution can effectively control the bonding yield and improve production efficiency.

[0087] like Figure 2-15 As shown, a method for bonding silicon-based OLED products based on an intelligent matching algorithm in this embodiment includes: primary sorting, intelligent matching, secondary sorting and bonding. The specific implementation methods are as follows:

[0088] 1. Primary sorting

[0089] like Figure 2 The one-time sorting scheme shown in FIG. 1 is to sort the wafers (or CFs) of the same grade into the same Foup, such as Figure 3In the sorting process shown in the figure, there are wafers or CFs of different grades in Foup1, and wafers (or CFs) of grades A, B, and C need to be screened out and stored in Foup2, Foup3, and Foup4 respectively. The sorting task generation is completed in the silicon-based OLED production information system MES. After the task is generated, the transport operation is automatically triggered. The material transport system transports Foup1 to the P01 port of the wafer sorting equipment. The generated sorting task is sent to the CIM PC through the MES system, and then the CIM PC sorts the three grades of A, B, and C products at the P02, P03, and P04 ports of the wafer sorting equipment respectively. The sorting results are processed by CIMPC and uploaded to the MES system.

[0090] The specific implementation method of one-time sorting is as follows:

[0091] Step 1: Generation of sorting tasks. When Foup1 arrives at a sorting station (such as Figure 1 Process, primary sorting refers to sorting Wafer or CF before matching, and a primary sorting site refers to a fixed position), the Wafer or CF in Foup1 is graded, and its grade is determined. Then, according to the grade of Wafer or CF, a sorting task is automatically generated. The sorting task specifies that the product of a certain slot layer in Foup1 is sorted to a certain slot layer of Foup2, Foup3 or Foup4, such as Figure 4 The example of a sorting task shown is: sorting Slot1 of Foup1 to Slot1 of Foup2, sorting Slot2 of Foup1 to Slot1 of Foup4, sorting Slot3 of Foup1 to Slot1 of Foup3, and so on, that is, taking the Wafer or CF from a layer in one Foup and putting it in a layer in another Foup.

[0092] Step 2: Foup transport. After the sorting task is generated, the transport operation is automatically triggered, and the material transport system transports Foup1, Foup2, Foup3 and Foup4 to the P01, P02, P03 and P04 ports of the sorting equipment respectively. P01, 02, 03 and 04 are the ports of the sorting equipment respectively. Wafers are usually stored in Foup. During production, Foup needs to be transported to the port of the equipment, and Foup is opened. The equipment robot takes out the wafer from Foup and puts it into the equipment for production. After the production is completed, the robot puts the wafer into Foup again; here, an example is given that the sorting equipment has 4 ports, of which port 01 is used to put Foup1 (full), and ports 02, 03 and 04 are used to put Foup2, Foup3 and Foup4 (empty) respectively. During sorting, the wafer in Foup1 is taken out and put into Foup2, Foup3 and Foup4 respectively according to different grades.

[0093] Step 3: Send sorting tasks. Figure 4 The sorting task shown is sent to the device CIMPC, and the device CIMPC controls the device to complete the sorting operation.

[0094] Step 4: Complete the sorting of Wafer (or CF) with grade A. Sort the Wafer (or CF) with grade A into Foup2.

[0095] Step 5: Complete the sorting of wafers (or CFs) with a grade of B. Sort the wafers (or CFs) with a grade of B into Foup3.

[0096] Step 6: Complete the sorting of wafers (or CFs) with a grade of C. Sort the wafers (or CFs) with a grade of C into Foup4.

[0097] Step 7: Processing of sorting results. After sorting is completed, the equipment CIM PC reports the sorting results, updates the binding relationship between Wafer (or CF) and Foup2, Foup3, and Foup4, and unbinds Foup1. As mentioned above, all wafers in Foup1 are taken out and placed in Foup2, 3, and 4 respectively. Foup1 becomes an empty Foup, and the wafer is unbound from Foup1 in the system information.

[0098] 2. Intelligent matching

[0099] 2.1 Weight calculation

[0100] like Figure 5 The weight calculation is to overlay the Wafer Map and CF Map, and obtain the best combination according to the weighted value after overlay. Wafer Map means that a wafer can be cut into several dies according to the size of the final product. The arrangement of dies on the wafer is called Wafer Map. Figure 5 As shown in the figure, there are 9 dies on a wafer (for silicon-based OLED products, the number of dies on a 12-inch wafer varies from hundreds to thousands, depending on the product size), and the arrangement of dies on the wafer. CF Map: The principle is the same as that of Wafer Map. The number of dies on the wafer is the same as the number of dies on the CF. Figure 5 As shown in the figure, after production is completed, the die on the wafer and CF will have different qualities (differentiated by grades), such as Figure 6For example, the three grades of G, P, and N are used to distinguish the quality of each die. The bonding process is to bond the wafer and CF, that is, the die on the wafer corresponds to the die on the CF one by one. The final quality after bonding depends on the quality of the die on the wafer and the quality of the die on the CF. For example, a good wafer die corresponds to a good CF die, and a good bonding die is produced; a good wafer die corresponds to a second-best CF die, and a second-best bonding die is produced; a good wafer die corresponds to a bad CF die, and a bad bonding die is produced, which results in a waste of yield. The purpose of matching is to match a good wafer die with a good CF die, and finally produce a good bonding die to achieve the purpose of improving the yield. The quality of the product depends on the number and distribution of different die grades. Here, the weight value is used to quantify the quality of the matching result.

[0101] Overlay: Match Wafer Map and CF Map according to Figure 6 The matching rules shown in the figure calculate the weights, such as Figure 5 The weight calculation and comparison scheme shown in the figure shows that there are 5 good dies (marked as G), 1 second-best die (marked as P), and 3 bad dies (marked as N) on the wafer. Assuming that there are two CFs to choose from, named CF1 and CF2, which CF will fit the wafer better? (The smaller the weight, the better the matching result, and the higher the final yield). The first CF (codenamed CF1) Map: It shows that there are 7 good dies (marked as G), 0 second-best die (marked as P), and 2 bad dies (marked as N) on CF1.

[0102] If Wafer and CF1 are bonded, the final result will be: there are 3 good dies (marked as G), 1 second-best die (marked as P), and 5 bad dies (marked as N). Figure 5 As shown, the weight value is converted to: Add up the weight values ​​to get a total weight W SUM1 .

[0103] If the wafer is bonded to another CF (codenamed CF2), CF2 Map indicates that there are 6 good dies (marked as G), 1 second-best die (marked as P), and 2 bad dies (marked as N) on CF2. Figure 5As shown in the figure above, if Wafer and CF2 are fitted, the final result will be: there are 2 good dies (marked as G), 2 second-best dies (marked as P), and 5 bad dies (marked as N), distributed as shown in the figure above, converted to weight values: Add up the weight values ​​to get a total weight W SUM2 .

[0104] Depend on Figure 5 Instructions for selection in:

[0105] (1) If the wafer is bonded to CF1, 3 good dies, 1 second-rate dies, and 5 bad dies will be obtained;

[0106] (2) If the wafer is bonded to CF2, 2 good dies, 2 second-best dies, and 5 bad dies will be obtained.

[0107] It can be seen that Wafer and CF1 fit better, and the quantization result is the weight W of the matching between Wafer and CF1. SUM1 Less than the weight W of Wafer and CF2 matching SUM2 .

[0108] The specific implementation of weight calculation is as follows:

[0109] Step 1: Map overlay rules and weight maintenance. Figure 6 The weighted benchmark scheme shown maintains the matching rules between WaferDie level, CFDie level and (bonded product) ODF Die level. Each ODF Die level corresponds to a weight value, such as: G level weight is W G , P level weight is W P , N level weight is W N , where G grade means Good Die (grain), N grade means NG Die, P grade means Pending Die, and the grade cannot be determined for the time being, W G , W P , W N The relationship is:

[0110] W G <W P <W N

[0111] Step 2: Calculate the weight value. The weight calculation method is:

[0112] W SUM =W G *QTY G +W P *QTY P +W N *QTY N

[0113] QTY G +QTY P +QTY N =QTY Die

[0114] in,

[0115] W G is the G level weight, W P is the P level weight, W N is the N-level weight, W G <W P <W N , W P The value of will affect the final weight calculation result, and its value can be determined according to the defect cause corresponding to the P level; QTY G is the number of G grade, QTYP is the number of P grade, QTY N is the number of N grades, QTY Die The number of available dies on the wafer (or CF).

[0116] For example, Figure 5 In the overlay scheme shown, the weight values ​​of Wafer matching with CF1 and CF2 are: SUM1 =W G *3+W P *1+W N *5

[0117] Among them, W G *3 represents the Die weight value of level G, W P *1 represents the Die weight value of level P, W N *5 indicates the Die weight value of level N.

[0118] W SUM2 =W G *2+W P *2+W N *5

[0119] Among them, W G *2 indicates the Die weight value of level G, W P *2 indicates the Die weight value of level P, W N *5 indicates the Die weight value of level N.

[0120] Step 3: Get the best combination.

[0121] The best combination is:

[0122] min{W SUM1 , W SUM2 , ..., WSUMN}

[0123] Where N is the number of wafers (or CFs) involved in the matching, N≤25; for example: W SUM1 =min{W SUM1 , W SUM2 , ..., W SUMN}, it means combination 1 is the best combination.

[0124] For example, Figure 5 The best combination of the overlay scheme shown is:

[0125] min{W SUM1 , W SUM2}

[0126] Such as: W SUM1 =min{W SUM1 , W SUM2}, it means that combination 1 is the best combination, that is, Wafer and CF1 fit best. CF1 is the CF with serial number 1. Different serial numbers are used to represent different CFs. CF1...CFn refers to n CFs with code numbers 1-n. The overlay scheme refers to the overlay of the wafer Wafer with different color films CF1-n, and then the weight value of each overlay situation is calculated, and the best overlay combination scheme with the smallest weight value is selected. The matching process is to overlay the wafer and CF one by one, calculate the weight, and find the best solution (with the smallest weight).

[0127] 2.2 Information Matching

[0128] like Figure 7 The information matching scheme shown in the figure is the process of matching the best CF based on Wafer. It can be divided into Foup matching and Slot matching. The specific implementation methods are as follows:

[0129] Step 1: Foup matching. Match the specified Wafer Foup with the CF Foup. The matching rules are: high priority first, the number of Wafers in the Foup ≤ the number of CFs in the Foup. Figure 8 The Wafer Foup matches the CF Foup solution shown in the figure. The priority of level judgment is: level judgment A>level judgment B>level judgment C. The Foup matching rules are:

[0130] ① Prioritize the wafer Foup matching of level A, then the wafer Foup matching of level B, and finally the wafer Foup matching of level C;

[0131] ② Prioritize matching the Wafer Foup with the CF Foup of level A, then match the Wafer Foup with the CFFoup of level B, and finally match the Wafer Foup with the CF Foup of level C.

[0132] Rule ① The matching process is as follows Fig. 9 The Wafer Foup matching process shown is as follows: determine whether there is a Wafer Foup of level A. If so, use rule ② to perform CF Foup matching; if not, determine whether there is a Wafer Foup of level B. If so, use rule ② to perform CF Foup matching; if not, determine whether there is a Wafer Foup of level C. If so, use rule ② to perform CF Foup matching. If not, the process ends.

[0133] Rule ② matching process is as follows Fig.10 The CF Foup matching process shown is as follows: select 1 Wafer Foup, and find out whether there are CF Foups with a quantity equal to or greater than the Foup quantity. If not, skip this matching; if so, continue to determine whether there are CF Foups of level A. If so, the matching is completed; if not, continue to determine whether there are CF Foups of level B. If so, the matching is completed; if not, continue to determine whether there are CFFoups of level C. If so, the matching is completed; if not, the process ends.

[0134] Step 2: Slot matching. After matching the correct CF Foup, you need to perform slot matching according to the weight calculation method described in 2, such as Figure 7 As shown, there are 25 wafers in Wafer Foup, 25 CFs in CF Foup, Wafer Foup Slot: the layer of Wafer Foup, CF Foup Slot: the layer of CF Foup, that is, the Wafer and the CFs of layers 1-25 are matched one by one. The specific implementation is as follows:

[0135] ① Match Wafer Foup Slot1 with CF Foup Slot1 to 25 (match 25 times) and calculate the weight W respectively SUM1-1 ~W SUM1-25 , take min{W SUM1-1 , W SUM1-2 ,...W SUM1-25}, such as: W SUM1-2 , then Wafer Foup Slot1 and CF Foup Slot2 are matched and marked;

[0136] ② Match Wafer Foup Slot2 with CF Foup Slot1, Slot3~25 (match 24 times), and calculate the weight W respectively SUM2-1 , W SUM2-3 ~W SUM2-25 , take min{W SUM2-1 , W SUM2-3 ,...W SUM2-25}, such as: W SUM2-1 , then WaferFoup Slot2 and CF Foup Slot1 are matched and marked;

[0137] ③ Match Wafer Foup Slot3 with CF Foup Slot3 to 25 (match 23 times) and calculate the weight W respectively SUM3-3 ~W SUM3-25 , take min{W SUM3-3 ,...W SUM3-25}, such as: W SUM3-3 , then Wafer Foup Slot3 and CFFoup Slot3 are matched and marked;

[0138] …

[0139] Match Wafer Foup Slot 23 with CF Foup Slot 23 to 25 (match 3 times) and calculate the weight W respectively. SUM23-23 ~W SUM23-25 , take min{W SUM23-23 ,...W SUM23-25}, such as: W SUM23-25 , then Wafer Foup Slot23 and CF Foup Slot25 are matched and marked;

[0140] Match Wafer Foup Slot 24 with CF Foup Slot 23-24 (match twice) and calculate the weight W respectively. SUM24-23 ~W SUM24-24 , take min{W SUM24-23 ,W SUM24-24}, such as: W SUM24-23 , then Wafer Foup Slot24 and CF Foup Slot23 are matched and marked;

[0141] Match Wafer Foup Slot 25 with CF Foup Slot 24.

[0142] The above completes the matching of all slots of Wafer Foup, and the slot matching is completed.

[0143] 3. Secondary sorting

[0144] like Fig.11 , 12 In the secondary sorting scheme shown, step 1 completes the information matching of Wafer and CF, and step 2 adjusts the Slot of CF in Foup that matches Wafer according to the Slot of Wafer in Foup, ensuring that the Slot of Wafer and CF in Foup are completely consistent, so as to facilitate the ODF equipment to perform the bonding operation; that is, according to the matching relationship between Wafer Foup and CF Foup, the Slot layer in CF Foup is adjusted, so that the Slot layer in CF Foup corresponding to the Slot layer in Wafer Foup is the same or consistent in layer sequence number, so as to facilitate the subsequent bonding operation.

[0145] In the secondary sorting, the sorting task generation is realized by the MES system. At the same time, the CF Foup is transported to the P01 port of the sorting equipment Sorter through the transport system. The sorting task is sent to the CIM PC, which controls the sorting equipment Sorter to perform sorting control and upload the sorting processing results to the MES system.

[0146] like Fig.11 The secondary sorting process shown is specifically implemented as follows:

[0147] Step 1: Sorting task generation. After the information matching is completed, the sorting task is automatically generated, such as Fig.11 As shown in step 2, the sorting task content is:

[0148] Original Slot1-->Slot2, original Slot2-->Slot1, original Slot3-->Slot3, ..., original Slot23-->Slot24, original Slot24-->Slot25, original Slot25-->Slot23. That is, according to the matching relationship between Wafer Foup and CFFoup realized by the intelligent matching step, the Slot layer in CF Foup is adjusted so that the Slot layer in CFFoup corresponding to the Slot layer in Wafer Foup is the same or consistent in layer sequence number, so as to facilitate the subsequent bonding operation.

[0149] Step 2: Foup transfer. After the sorting task is generated, the transfer operation will be automatically triggered to transfer the CF Foup to the P01 port of the sorting equipment.

[0150] Step 3: Send sorting tasks. Send the sorting tasks to the device CIM PC, which controls the device to complete the sorting operation.

[0151] Step 4: Processing of sorting results. After sorting is completed, the device CIMPC reports the sorting results, updates the Slot information in the CF Foup, and completes the CF Slot information adjustment.

[0152] 4. Fit

[0153] After the secondary sorting is completed, the wafer and CF information arrive at the bonding station (the bonding station is a process station for silicon-based OLED products, where the wafer and CF are bonded). At this time, the bonding equipment can bond the wafer and CF according to the matching results, such as Fig.13 The specific implementation of the bonding process is as follows:

[0154] Step 1: Generate a bonding task. When the wafer and CF information arrive at the bonding site, a bonding task is automatically generated based on the wafer and CF matching information. The bonding task specifies to bond a certain slot in the wafer Foup with a certain slot in the CF Foup, such as Fig.13 The following is an example of a bonding task: bonding Slot 1 of Wafer Foup to Slot 1 of CF Foup, bonding Slot 2 of Wafer Foup to Slot 2 of CF Foup, ... bonding Slot 25 of Wafer Foup to Slot 25 of CF Foup.

[0155] Step 2 / 3: Foup transport. After the bonding task is generated, the transport operation will be automatically triggered to transport the Wafer Foup and CFFoup to the P01 and P02 ports of the bonding equipment respectively.

[0156] Step 4: Issue the task accordingly. Fig.14 The bonding task shown is sent to the device CIM PC, and the device CIMPC controls the device to complete the bonding operation.

[0157] Step 5: Bonding. The equipment completes the bonding of Wafer and CF.

[0158] Step 6: Collect the sheets after bonding. The products after bonding are discharged into the ODF Foup at the P03 port.

[0159] Step 7: Process the bonding results. After the bonding is completed, the device CIM PC reports the bonding results and updates the binding relationship between Wafer and CF.

[0160] The present invention discloses a silicon-based OLED product bonding method based on an intelligent matching algorithm, which can effectively control the bonding yield and improve production efficiency. Fig.15 The silicon-based OLED product bonding system solution based on the intelligent matching algorithm is shown. After the wafer and CF undergo primary sorting, intelligent matching, secondary sorting and bonding, the full process of silicon-based OLED product sorting, matching and bonding is automated.

[0161] Obviously, the specific implementation of the present invention is not limited to the above-mentioned methods. As long as various non-substantial improvements are made using the method concept and technical solution of the present invention, they are all within the protection scope of the present invention.

Claims

1. A method for matching and bonding silicon-based OLED products, characterized in that: The steps include: One-time sorting step: sort the wafers and color films CF of the same grade into the same front-opening wafer transfer box Foup; Smart matching steps: weight calculation is performed on the overlay of Wafer Map and CF Map, and the best CF is matched through Foup matching and Slot layer matching based on Wafer. Secondary sorting step: According to the Slot in the Wafer Foup, adjust the Slot information in the matching CF Foup so that the Slot layer of the Wafer and CF in the Foup is consistent, and obtain the matching information of the Wafer and CF.

2. A method for matching and bonding silicon-based OLED products as claimed in claim 1, characterized in that: The method further comprises a bonding step: after the secondary sorting is completed, the wafer and CF information arrive at the bonding station, and the bonding equipment bonds the wafer and CF according to the matching result.

3. A method for matching and bonding silicon-based OLED products as claimed in claim 1, characterized in that: The first sorting step refers to the presence of wafers or CFs of different grades in Foup1. Wafers or CFs of grades A, B, and C are screened out and stored in Foup2, Foup3, and Foup4 respectively, which includes: Step 1: Sorting task generation. When Foup1 arrives at a sorting station, a sorting task is automatically generated according to the grade of Wafer or CF. The sorting task is to sort the products in the slot layer selected in Foup1 to the corresponding slot layer of Foup2, Foup3 or Foup4. Step 2: Foup transport. After the sorting task is generated, the transport operation is automatically triggered. The material transport system transports Foup1, Foup2, Foup3 and Foup4 to the P01, P02, P03 and P04 ports of the sorting equipment respectively. Step 3: The sorting task is sent to the device CIM PC, and the device CIM PC controls the device to complete the sorting operation; Step 4: After the grading is completed, the Wafer or CF graded as A, B, and C are sorted into Foup2, Foup3, and Foup4 respectively; Step 5: Process the sorting results. After the sorting is completed, the device CIM PC reports the sorting results and updates the binding relationship between Wafer or CF and Foup2, Foup3, and Foup4.

4. The method for matching and bonding a silicon-based OLED product according to claim 1, characterized in that: The weight calculation in the smart matching step includes: overlaying the Wafer Map and the CF Map, and obtaining the best matching combination of Wafer and CF according to the weighted value after overlaying.

5. A method for matching and bonding silicon-based OLED products as claimed in claim 4, characterized in that: The weight calculation includes: Step 1: Map overlay rules and weight maintenance, maintain the matching rules between Wafer Die level, CF Die level and ODF Die level. Each ODF Die level corresponds to a weight value, and the weight of G level is W. G , P level weight is W P , N level weight is W N , ,W G , W P , W N The relationship is: IN G <In P <In N Step 2: The weight calculation method is: IN SUM =In G *QTY G +W P *QTY P +W N *QTY N QTY G +QTY P +QTY N =QTY Die in, W G is the G level weight, W P is the P level weight, W N is the N-level weight, W G <W P <W N , QTY G is the quantity of G grade, QTY P is the number of P grades, QTY N is the number of N grades, QTY Die The number of available dies on the wafer or CF; Step 3: Get the best combination; The best combination is: min{in SUM1 ,IN SUM2 ,...,IN SUMN } Among them, N is the number of wafers or CFs involved in matching, and the combination with the smallest weight value is selected as the best combination.

6. A method for matching and bonding a silicon-based OLED product as claimed in claim 4 or 5, characterized in that: After the weight calculation obtains the best combination, information matching is performed. Information matching includes: Foup matching. The Foup matching method matches according to the matching rules of priority. The matching rules include: ① Prioritize the matching of Wafer Foup with grade A, then the matching of Wafer Foup with grade B, and finally the matching of Wafer Foup with grade C; ② Prioritize matching the Wafer Foup with a CF Foup graded A, then match the Wafer Foup with a CFFoup graded B, and finally match the Wafer Foup with a CF Foup graded C.

7. A method for matching and bonding silicon-based OLED products as claimed in claim 6, characterized in that: The information matching also includes Slot matching, which includes: performing Slot matching according to a weight calculation value, wherein there are m wafers in Wafer Foup and m CFs in CFFoup, and the matching method includes: matching Wafer Foup Slot1 to Wafer FoupSlotm with the Slot of CF Foup in sequence, and calculating the weight value of the Slot in Wafer Foup and the Slot of CF Foup as a combination according to a one-to-one matching relationship, selecting a combination corresponding to the minimum weight value to perform a Slot combination matching mark of the Slot in Wafer Foup and the Slot of CF Foup, and completing the matching of all Slots in Wafer Foup with the Slot layer in CF Foup.

8. The method for matching and bonding silicon-based OLED products according to claim 1, characterized in that: The secondary sorting steps include: Step 1: After the intelligent matching step is completed, a sorting task is automatically generated. The sorting task is to adjust the Slot layer in CF Foup according to the matching relationship between Wafer Foup and CFFoup, so that the Slot layer in Wafer Foup corresponding to the Slot layer in CFFoup has the same or consistent layer sequence number; Step 2: After the sorting task is generated, the transport operation will be automatically triggered to transport the CF Foup to the P01 port of the sorting equipment; Step 3: Send the sorting task to the device CIM PC, and the device CIM PC controls the device to complete the sorting operation; Step 4: After the sorting is completed, the device CIM PC reports the sorting result, updates the Slot information in the CF Foup, and completes the CF Slot information adjustment.

9. The method for matching and bonding a silicon-based OLED product according to claim 2, characterized in that: The bonding steps include: Step 1: Generate tasks that match the requirements; Step 2: Foup transport. After the bonding task is generated, the transport operation will be automatically triggered to transport the Wafer Foup and CF Foup to the P01 and P02 ports of the bonding equipment respectively; Step 3: The bonding task is sent to the device CIM PC, and the device CIM PC controls the device to complete the bonding operation; Step 4: The equipment completes the bonding of Wafer and CF; Step 5: Collect the sheets after bonding, and discharge the bonded products into the ODF Foup at the P03 port; Step 6: After the bonding is completed, the device CIM PC reports the bonding result and updates the binding relationship between Wafer and CF.

10. A method for matching and bonding silicon-based OLED products as claimed in claim 9, characterized in that: In step 1 of the bonding step, when the wafer and CF information arrive at the bonding site, a bonding task is generated based on the matching wafer and CF matching information. The bonding task specifies that the product in the slot of the wafer Foup is bonded with the slot in the CF Foup according to the matching relationship.

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