Method and apparatus for distributed transformer on integrated circuit chip

Abstract

The invention provides a transformer device. In one example, a transformer device has a semiconductor substrate member including a first surface and a second surface. In one example, the device has a metallic material having a thickness and spatially configured in a pattern to form a distributed transformer device. The pattern has: a plurality of primary tracks numbered from 2 to J, wherein J is an integer from 2 to 40; and a plurality of secondary tracks numbered from 2 to K, wherein K is an integer from 2 to 40. In one example, the plurality of primary tracks and the plurality of secondary tracks are collectively configured to form an electromagnetic field from the plurality of primary tracks, thereby generating a magnetic flux to induce a varying current coupled to the plurality of secondary tracks.

Description

Technical Field

[0001] The present application relates to a method and apparatus for a distributed transformer on an integrated circuit chip. Background Art

[0002] Transformers have become important components in many electrical and electronic systems. Transformers are passive devices that transfer electrical energy between two or more circuits by electromagnetic induction. Transformers have been used in a wide variety of applications including power transmission and distribution, electronic equipment, and communication systems.

[0003] Historically, the concept of a transformer was first proposed by Michael Faraday, an early pioneer in electricity and magnetism, in the early 1830s. However, it was not until the late 19th century that practical transformer designs were developed. Pioneering work by William Stanley, Nikola Tesla, and Lucien Gaulard led to the development of efficient transformers suitable for power transmission.

[0004] In the context of integrated circuits (ICs), transformers have been primarily used to couple signals between different circuits, particularly in radio frequency (RF), millimeter wave (mmWave), power regulation, and high-speed analog and digital applications. Transformers designed for RF or mmWave purposes are commonly used for power transmission, impedance matching, coupling, and frequency conversion in RF circuits. RF transformers are commonly found in wireless communication systems such as transceivers, RF amplifiers, and antenna systems. Transformers are commonly used in switching power supplies, motor drives, and high-speed digital interfaces. Transformers also play a vital role in communication systems, enabling signal transmission and isolation.

[0005] IC transformers are mainly and widely made of two windings: one for the primary turns and the other for the secondary turns. Each winding consists of one or more turns, implemented by offsetting on the same metal layer or as two separate windings on different metal layers. Three-winding IC transformers have proven to be good for improving coupling and efficiency, with two windings surrounding the remaining winding. The two windings are connected together at the end points, ultimately simplifying the structure again to a single primary winding and a single secondary winding transformer.

[0006] While transformers have advantages, they also have disadvantages. These disadvantages include size and weight, cost, limited frequency range, and power losses, including difficulty in integration in miniaturized ICs. Specifically, transformers in ICs experience increased resistive losses compared to corresponding transformers implemented with discrete components or physical wire windings. Despite these disadvantages, IC transformers remain indispensable in a variety of electrical and electronic systems, playing a vital role in power transmission, signal coupling, and isolation. Advances in transformer technology are needed to address these limitations and improve their overall performance. Summary of the invention

[0007] According to the present invention, techniques generally associated with integrated circuits are provided. In particular, the present invention provides a distributed transformer device and method for communication technology. By way of example only, the present invention can be applied to a variety of applications (including RF circuits and design, mmWave circuits, power supply regulation and conversion, digital and analog amplifier and oscillator circuits, communication circuits, etc.).

[0008] In one example, the present invention provides a transformer device. In one example, the transformer device has a semiconductor substrate member, the semiconductor substrate member including a first surface and a second surface. In one example, the semiconductor substrate can be a silicon wafer, a silicon on insulator wafer, a compound semiconductor material (e.g., any II / VI or III / V material), etc. In one example, the device has an insulating material covering the second surface. In one example, a plurality of contact areas are constructed within the insulating material. In one example, the device has a metal material having a thickness and spatially configured into a pattern to form a distributed transformer device. The pattern has: a plurality of primary tracks numbered from 2 to J, where J is an integer from 2 to 40; and a plurality of secondary tracks numbered from 2 to K, where K is an integer from 2 to 40. In other examples, the number of tracks can be greater. In one example, the plurality of primary tracks and the plurality of secondary tracks are collectively configured to form an electromagnetic field from the plurality of primary tracks, thereby generating a magnetic flux to induce a changing current coupled to the plurality of secondary tracks.

[0009] In one example, the present invention provides an alternative transformer device. The device has a semiconductor substrate member, the semiconductor substrate member includes a first surface and a second surface. In one example, the device has a plurality of complementary metal oxide semiconductor (CMOS) cells, the plurality of CMOS cells are configured to cover a first portion of the second surface. In one example, an insulating material covers a second portion of the second surface. In one example, a plurality of contact regions are constructed in the insulating material so that each contact region includes a via structure. In one example, the device has a metal material having a thickness and spatially configured into a pattern, thereby forming a distributed transformer device. In one example, the pattern has a plurality of primary tracks numbered from 2 to J, where J is an integer from 2 to 40. Each primary track has a first endpoint and a second endpoint, and a length defined between the first endpoint and the second endpoint. In one example, the pattern has a plurality of secondary tracks numbered from 2 to K, where K is an integer from 2 to 40. In other examples, the number of tracks can be greater. Each secondary track has a first endpoint and a second endpoint, and a length defined between the first endpoint and the second endpoint. In one example, the plurality of primary tracks and the plurality of secondary tracks are collectively configured to form an electromagnetic field from the plurality of primary tracks to generate magnetic flux to induce a varying current that is coupled to the plurality of secondary tracks.

[0010] According to examples, the present invention can achieve one or more of these benefits and / or advantages. In one example, the present invention provides novel transformer designs and related methods, which are configured to be used with semiconductor integrated circuits in compact and space-efficient systems. In one example, transformer devices and methods can be configured with complementary metal oxide semiconductor (CMOS) circuits, etc. In one example, the present invention provides advantages of generating efficient transformers for manufacturing and scalability. These and other benefits and / or advantages can be achieved by the present device and related methods. More details of these benefits and / or advantages can be found in this specification (more specifically below).

[0011] A further understanding of the nature and advantages of the present invention may be obtained by reference to the following portions of the specification and drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] In order to more fully understand the present invention, please refer to the accompanying drawings. It should be understood that these drawings should not be considered to limit the scope of the present invention. Through the use of the accompanying drawings, the presently described embodiments of the present invention and the best mode currently understood are described in additional detail, wherein:

[0013] Figure 1 is a simplified diagram of a generalized distributed transformer schematic according to an example of the present invention.

[0014] Figure 2 is a simplified diagram of a schematic diagram of an example six-rail distributed transformer apparatus according to the present invention, having two primary rails and four secondary rails (each secondary rail having two segments).

[0015] Figure 3 is a simplified top view of the layout of a six-track distributed transformer apparatus according to an example of the present invention.

[0016] Figure 4 is a simplified top view layout of a six-track distributed transformer apparatus according to an alternative example.

[0017] Figure 5 is a simplified diagram of an example six-rail distributed transformer according to the present invention, having two primary rails and four secondary rails, each secondary rail having four segments.

[0018] Figure 6 is a simplified diagram of a top view layout of a six-track distributed transformer apparatus according to an alternative example of the present invention.

[0019] Figure 7 is a simplified top view of the layout of a six-track distributed transformer apparatus according to an alternative example of the present invention.

[0020] Figure 8 is a simplified diagram of a six-track distributed transformer apparatus according to an alternative example of the present invention.

[0021] Fig. 9 is a simplified top view of the layout of a six-track distributed transformer apparatus according to an example of the present invention.

[0022] Fig.10 is a simplified side view showing a cross section of a portion of various distributed transformer devices according to an example of the present invention.

[0023] Fig.11 is a simplified cross-sectional view of various rails of a transformer apparatus according to an example of the present invention.

[0024] Fig.12 is a simplified diagram of an integrated CMOS device coupled to a distributed transformer device according to an example of the present invention.

[0025] Fig.13 is a simplified diagram of a contact structure according to an example of the present invention. DETAILED DESCRIPTION

[0026] The present invention provides a distributed transformer device and method for integrated circuits. Specifically, the present technology includes a distributed transformer device and method for communications. By way of example only, the present invention can be applied to a variety of applications (including RF circuits and designs, digital and analog circuits, communications, etc.).

[0027] As background technology, a transformer is a device that is used to transfer electrical energy between two or more circuits through electromagnetic induction. In the context of radio frequency (RF) circuits, transformers provide various functions. For example, transformers can be used for impedance matching. That is, one of the main applications of transformers in RF circuits is impedance matching. Impedance matching is necessary for effective power transmission between different stages of RF systems. The transformer can be designed to match the impedance of the input and output circuits, maximize power transmission and minimize signal reflections. As will be described, by adjusting the turns ratio and configuration of the transformer, the impedance can be converted to a desired value. Other examples include balun (balanced-unbalanced) conversion, voltage level conversion (voltage level shifting), isolation, coupling and coupling transformers, etc. RF transformers are generally designed to work at higher frequencies and have specific impedance requirements to ensure normal function in the RF domain. Further details of the transformer device and method can be found in this specification (more specifically below).

[0028] Figure 1 is a simplified diagram of a generalized distributed transformer schematic diagram according to an example of the present invention. This diagram is for example only. Various modifications, substitutions and variations exist. As shown in the figure, the distributed transformer is shown in a generalized manner. The segments include various rails. In one example, the segments include multiple primary rails (e.g., p1 ... p2 ). J The segmentation also includes the segmentation of multiple secondary tracks (e.g. s1…s K ). Each segment is electrically and spatially tightly coupled to each other segment with varying coupling factors depending on the spatial proximity of the segments (e.g., maintaining overall shape). In one example, each secondary rail includes at least one pair of segments, wherein each segment has a pair of terminals at each end.

[0029] In one example, each track has a pair of nodes constructed on both sides of the track. Each node is coupled and / or directly connected to a device element (e.g., a pad, a transistor element (e.g., a gate, a drain, or a source, etc.)). Each device element is part of a larger element or component.

[0030] As used herein, the term "tightly coupled" means that multiple tracks are in a shifted structure, such as shown in the examples, to form a representative shape without changes that adversely affect electromagnetic properties.

[0031] As used herein, the term "track" refers to a linear structure having a width, thickness, and length in the examples (which does not have multiple conventional coils or windings (as used in conventional transformers)), although other meanings understood by those of ordinary skill in the art are also applicable. Various examples of tracks are shown in the drawings, but are not limited thereto.

[0032] In one example, coupling factors include the spatial shape, width, length, and proximity of one or more tracks, among other factors. In one example, multiple tracks (e.g., 2 ... J primary tracks and 2 ... K secondary tracks) allow for tight coupling, specific control over which tracks should be coupled together, and layout symmetry.

[0033] In one example, each track is made of a metal or a combination of metal materials. Examples of such metal materials include aluminum (Al), copper (Cu), gold (Au), titanium (Ti), tungsten (W), and nickel (Ni), among others. For example, aluminum interconnects in integrated circuits (ICs). Aluminum has good electrical conductivity, low resistivity, and compatibility with silicon-based processes. However, aluminum is often used for metal layers in older generation ICs. Recently, copper has become increasingly popular in interconnects due to its superior electrical conductivity compared to aluminum. Copper has lower resistance and can handle higher current densities, making it suitable for advanced ICs. Copper is preferably used in the present distributed transformer device. Other examples include gold in high-end ICs and applications requiring high-quality connections. Other materials include titanium, which is often a barrier metal in semiconductor manufacturing processes. Tungsten is used as a contact material in semiconductor devices. Tungsten is often used in combination with titanium to create a TiW alloy for forming contacts. Nickel can be used as a barrier metal to prevent diffusion, similar to titanium in the example. The specific choice of metal depends on the intended application, process compatibility, and performance requirements of the semiconductor device.

[0034] Figure 2 is a simplified diagram of a schematic diagram of an example six-track distributed transformer apparatus according to the present invention, having two primary tracks and four secondary tracks (each having two segments). In the example shown, the present invention provides a six-track distributed transformer having two primary tracks and four secondary tracks (each having two segments).

[0035] Figure 3is a simplified top view of the layout of an example six-track distributed transformer device according to the present invention. As shown, the top view layout example is a schematic diagram of a diamond version (e.g., a single diamond) of the arrangement of the tracks in the order of secondary, secondary, primary, primary, secondary, secondary. In one example, the tracks can be arranged according to which tracks should be more closely coupled. As shown, each secondary track has an opening (e.g., an open circuit) between a pair of segments. Each secondary track can include a plurality of segments, each segment having a first end and a second end.

[0036] In one example, a device is manufactured on a semiconductor substrate member including a first surface and a second surface. An insulating material is covered on the second surface. The metal material has a thickness and is spatially configured into a pattern. In one example, the metal material may have a first metal pattern in a first metal layer in a first layer region, and a second metal pattern in a second metal layer in a second layer region, the second layer region covers the first metal layer, and has an insulating material between the first metal layer and the second metal layer. As shown in the figure, a plurality of diamond tracks numbered from 4 to N are constructed from the pattern, where N is an integer from 4 to 80. The plurality of diamond tracks are constructed in an offset arrangement such that the second diamond track is placed adjacent to the first diamond track, the third diamond track is placed adjacent to the second diamond track, and the Nth diamond track is placed adjacent to the N-1th diamond track. Each pair of lateral corners of each diamond track relative to each other is arranged along a first lateral imaginary line. See Figure 3 The first vertical corner of each diamond track is arranged along a second transverse imaginary line parallel to the first transverse imaginary line, and the second vertical corner of each diamond track is arranged along a third transverse imaginary line parallel to the first transverse imaginary line. Figure 3 The lower corner of each diamond track formed along the second horizontal imaginary line (straight line) at the bottom of the page, and the upper corner of each diamond track formed along the third horizontal imaginary line (straight line) at the top of the page.

[0037] In one example, a transformer device is constructed from a plurality of primary rails (e.g., P1, P2) and a plurality of secondary rails (e.g., S1, S2, S3, S4), the primary rails including at least a first pair of diamond-shaped rails, and the secondary rails including at least a second pair of diamond-shaped rails, such that the plurality of primary rails form an electromagnetic field and generate magnetic flux, thereby inducing a changing current coupled to one or more of the plurality of secondary rails.

[0038] In one example, the plurality of diamond tracks are configured such that each diamond track is offset from an adjacent diamond track by a gap. In one example, each diamond track in the plurality of diamond tracks is isolated from any other diamond track in the plurality of diamond tracks. In one example, each diamond track in the N-1 diamond tracks in the plurality of diamond tracks is configured with a gap that is isolated from at least one or more diamond tracks in the plurality of diamond tracks.

[0039] In one example, a rhombus is a four-sided geometric shape that belongs to the category of quadrilaterals. In one example, a rhombus is characterized by having four sides of equal length, which means that it is an equilateral quadrilateral. In addition to having equal sides, a rhombus also has opposite angles that are congruent (equal) to each other. This means that if you label the angles A, B, C, and D, where A and C are opposite angles and B and D are opposite angles, then A=C and B=D. In other examples, the rhombus shape can be replaced with other shapes and variations. In one example, other quadrilaterals can be used as patterns. However, a rhombus is a quadrilateral with four sides of equal length and opposite angles that are congruent, with diagonals that are perpendicular to each other and intersect at its center. Although its sides are equal in length, the angles within a rhombus are not necessarily right angles. Of course, there can be other variations.

[0040] Figure 4 is a simplified top view layout of a six-track distributed transformer device according to an alternative example. As shown, the top view layout is a schematic diagram of two diamond versions of the arrangement of the tracks in the order of secondary, secondary, primary, primary, secondary, secondary. As shown, each diamond is constructed symmetrically to each other, connected by the opposite vertex areas of each diamond. In one example, the tracks can be arranged according to which tracks should be more tightly coupled.

[0041] Figure 5 is a simplified diagram of an example six-track distributed transformer according to the present invention, which has two primary tracks and four secondary tracks, each of which has four segments. As shown in the figure, the two primary tracks include P1 and P2, and the secondary tracks include S1, S2, S3 and S4. As shown in the figure, each secondary track has four segments.

[0042] Figure 6 is a simplified diagram of a top view layout of a six-track distributed transformer device according to an alternative example of the present invention. As shown in the figure, the top view layout example has a schematic diagram of a diamond version of the arrangement of the tracks in the order of secondary, secondary, primary, primary, secondary, secondary. As shown in the figure, the tracks can be arranged according to which tracks should be more closely coupled.

[0043] Figure 7is a simplified top view of the layout of a six-track distributed transformer device according to an alternative example of the present invention. As shown in the figure, the top view layout example is a schematic diagram of two diamond versions of the arrangement of the tracks in the order of secondary, secondary, primary, primary, secondary, secondary. Each diamond is symmetrical to the other diamond. As shown in the figure, the tracks can be arranged according to which tracks should be more closely coupled.

[0044] Figure 8 is a simplified diagram of a six-track distributed transformer apparatus according to an alternative example of the present invention. As shown, the transformer apparatus is constructed as a six-track distributed transformer having two primary tracks and four secondary tracks, each secondary track having three sections.

[0045] Fig. 9 is a simplified top view of the layout of a six-track distributed transformer device according to an example of the present invention. As shown in the figure, the top view layout example shows three diamond versions of the arrangement of the tracks in the order of secondary, secondary, primary, primary, secondary, secondary. Each diamond is arranged symmetrically with the other diamonds. As shown in the figure, the tracks can be arranged according to which tracks should be more closely coupled.

[0046] Further details of side views of any of the above examples can be found throughout the specification, and more particularly below.

[0047] Fig.10 1 is a simplified side view showing a section of a portion of various distributed transformer devices according to an example of the present invention. As shown, the figure shows a plurality of tracks in parallel configuration, which intersect with another plurality of tracks in parallel configuration. As shown, the cross section of the layout shows where a metal track N is connected to a metal track N+1 through a channel structure N, each such connection forming an "S-shaped" structure. The metal tracks form a crossover that allows the distributed transformer to be implemented as electrically isolated from a set of tracks, thereby forming a network by offsetting tracks that overlie multiple other tracks. An isolation material (e.g., silicon dioxide, nitride, or other glass material) fills the metal track area, the channel structure, and the area around the underlying track area.

[0048] Fig.11 is a simplified cross-sectional view of various tracks of a transformer device according to an example of the present invention. As shown in the figure, by removing the via at the intersection area, the track can be naturally divided or separated into segments by the isolation area. That is, one segment is insulated from the segment below by the isolation material. In one example, the track can be divided or separated into segments by simply cutting the track in a portion of the metal area.

[0049] In one example, the present invention provides a method for manufacturing a distributed transformer device. The method includes providing a semiconductor substrate member including a first surface and a second surface. The method includes forming a first insulating material covering the second surface, and forming a plurality of contact areas constructed in the insulating material. The method includes forming a first metal material having a thickness and a space structured into a first pattern. The first pattern has: a plurality of primary tracks numbered from 2 to J, where J is an integer from 2 to 40, each primary track having a first end and a second end; and a plurality of secondary tracks numbered from 2 to K, where K is an integer from 2 to 40.

[0050] In one example, the method includes forming a second insulating material covering a first metallic material. The method includes forming one or more channel structures in the second insulating material to connect to one or more portions of at least one of a plurality of primary tracks and at least one or more portions of a secondary track. In one example, the method includes forming a second metallic material spatially configured into a second pattern, the second pattern covering the one or more channel structures. The second metallic material electrically connects at least one primary track so that a rhombus is formed when the plurality of primary tracks, the plurality of secondary tracks, and the spatially patterned second metallic material are viewed from above. A distributed transformer device is formed by the plurality of primary tracks, the plurality of secondary tracks, and the second metallic material.

[0051] In one example, the distributed transformer device is manufactured using a semiconductor manufacturing process. This process involves a series of steps including: etching, deposition or sputtering, plating, polishing, photolithography and other techniques. Further details of this process can be found in this specification (more specifically below).

[0052] In one example, the process starts with a silicon wafer as the substrate. In one example, the properties of the substrate, such as conductivity and doping, are adjusted to meet the requirements of the transformer. In one example, etching involves selectively removing material from the substrate to create a pattern. Reactive ion etching (RIE) or wet chemical etching can be used to define the primary and secondary coils of the transformer and the insulating layer between them. The etching is guided by a photomask that defines the desired pattern on the substrate. In one example, after etching, insulating and conductive layers are deposited on the substrate using techniques such as chemical vapor deposition (CVD) or metal sputtering. As shown in the figure, these layers form the tracks of the transformer, the primary and secondary tracks, and the insulating layer.

[0053] In one example, photolithography defines the pattern of the conductive and insulating layers. A photoresist is applied to the substrate, exposed to ultraviolet light through a photomask, and then developed to create a mask for subsequent etching or deposition steps. In one example, an insulating layer (such as silicon dioxide (SiO2) or silicon nitride (Si3N4)) is deposited on the substrate to provide electrical insulation between and within the primary and secondary tracks. In one example, metal conductors (typically copper or aluminum) are deposited on the substrate to form the primary and secondary tracks of the transformer. These conductors can be patterned using photolithography and etching to achieve the desired coil geometry. In one example, electroplating can be used to thicken and enhance the conductivity of the transformer tracks. This step can improve the performance of the transformer. In one example, additional insulating layers can be deposited or grown on the conductors to provide further isolation and prevent short circuits. In one example, a passivation layer (typically an insulating material such as silicon dioxide or silicon nitride) is deposited to protect the device from environmental factors and pollutants.

[0054] After the transformer devices are fabricated on a wafer, the individual devices are separated by dicing. They are then bonded to a package and connected to external pins or pads to connect to other circuits.

[0055] In one example, the specific techniques and materials used may vary depending on the desired transformer specifications, semiconductor process technology, and application.

[0056] Fig.12 0013 is a simplified diagram of an integrated CMOS device coupled to a distributed transformer device according to an example of the present invention. As shown, the CMOS device is coupled to primary rails P1, P2. As shown, secondary rails S1 to SK are coupled to the CMOS device. As shown, the transformer is connected to a plurality of distributed CMOS cells. Each end point of each segment of each rail is connected to a gate region, source region or drain region of an nMOS or pMOS transistor.

[0057] In one example, a CMOS semiconductor integrated circuit is a semiconductor device built using CMOS technology. CMOS technology is necessary for low power consumption, high interference immunity, and compatibility with high-density integration. In one example, a CMOS IC is built on a silicon substrate using a combination of p-type and n-type metal-oxide-semiconductor field-effect transistors (MOSFETs). MOSFETs in CMOS technology include a pair of complementary transistors, namely pMOS (p-channel MOSFET) and nMOS (n-channel MOSFET). These transistors are arranged in a complementary configuration, where one transistor is turned on when the other transistor is turned off, and vice versa.

[0058] In one example, CMOS ICs mainly include logic gates (such as NAND gates, NOR gates, AND gates, and XOR gates) that are built using complementary pairs of pMOS and nMOS transistors. These logic gates perform digital operations and form building blocks for more complex digital circuits.

[0059] In one example, the operation of a CMOS IC is based on the principle that when a voltage applied to the gate terminal of a MOSFET exceeds a certain threshold voltage, it allows current to flow between the source and drain terminals. In a pMOS transistor, a positive voltage turns it off (0 logic level) while a negative voltage turns it on (1 logic level). Conversely, in an nMOS transistor, a positive voltage turns it on (1 logic level) while a negative voltage turns it off (0 logic level). Various applications can be used with the present CMOS IC and distributed transformers.

[0060] CMOS integrated circuit (IC) chips are fundamental components in electronics. A CMOS IC chip is a semiconductor device that combines various electronic components (such as transistors, resistors, capacitors, and interconnects) on a single silicon substrate. CMOS technology is widely used in analog circuits, radio frequency circuits, digital logic circuits, memory chips, microprocessors, and various other applications due to its low power consumption, high integration density, and relatively low manufacturing cost.

[0061] In one example, a CMOS integrated circuit chip is formed on a substrate. The chip is usually made of a silicon wafer (which is the basis of all components). Silicon is a semiconductor material that has the ability to conduct electricity under certain conditions.

[0062] In one example, a CMOS chip includes metal oxide semiconductor field effect transistors (MOSFETs). These transistors come in two types: n-channel (NMOS) and p-channel (PMOS). They work together to create digital logic circuits. When combined, NMOS and PMOS transistors form a complementary pair, which is where the term "complementary" in CMOS comes from.

[0063] Examples of CMOS chips include logic gates, inverters, amplifiers, interconnects, clock and timing circuits, memory cells, analog components, power supplies and grounds, etc. In one example, logic gates such as AND, OR, NOT, and XOR are formed by interconnecting these transistors. These gates process binary signals (0 and 1) and form the basis of digital circuits. CMOS logic gates are characterized by their low power consumption when switching between states. In one example, inverters are the basic building blocks, which include PMOS and NMOS transistors connected in series. They perform the operation of logical NOT and are widely used in circuit design. In one example, copper or aluminum interconnects are used to establish connections between transistors, resistors, and other components on the chip. These interconnects create complex circuits required for various functions.

[0064] In one example, CMOS chips typically contain clock and timing circuits to synchronize the operation of different parts of the chip. These circuits ensure that logic gates switch at the right time to avoid data corruption and errors. In one example, a CMOS chip may include memory cells, which are used to temporarily store data. Static Random Access Memory (SRAM) and Dynamic Random Access Memory (DRAM) cells are common types of memory cells used in integrated circuits. In one example, CMOS technology is used not only for digital logic, but also for analog circuits. Components such as operational amplifiers, analog-to-digital converters, and digital-to-analog converters can be integrated onto the chip. In one example, the power and ground distribution network provides the necessary supply voltages and reference potentials to different parts of the chip.

[0065] In a preferred example, the plurality of primary rails and the plurality of secondary rails are configured to form a transformer device so that parasitic electromagnetic fields from the transformer device do not adversely affect any device constructed from the plurality of CMOS cells. That is, the transformer device is configured to reduce and / or minimize any adverse effects on any circuit constructed from the CMOS cells.

[0066] Fig.13is a simplified diagram of a contact structure according to an example of the present invention. As shown in the figure, the figure has a contact structure, and the contact structure includes a lower metal layer and an upper metal layer. The metal layers are interconnected using a channel structure that occupies a large area of ​​the contact structure. Alternatively, the contact structure includes a plurality of channel structures arranged in a pattern to occupy approximately 10% to 50% of the area of ​​the contact structure. In one example, the pattern can be arbitrary, or arranged in an array or other organized manner. The multiple channel structures reduce the contact resistance between the upper and lower metal interconnects.

[0067] In one example, the present invention provides a transformer device. In one example, the transformer device has a semiconductor substrate member including a first surface and a second surface. In one example, the semiconductor substrate can be a silicon wafer, a silicon-on-insulator wafer, a compound semiconductor material (e.g., any II / VI or III / V material), etc. In one example, the device has an insulating material covering the second surface. In one example, a plurality of contact areas are constructed within the insulating material. In one example, the device has a metallic material having a thickness and spatially configured into a pattern to form a distributed transformer device. The pattern has: a plurality of primary tracks numbered from 2 to J, where J is an integer from 2 to 40; and a plurality of secondary tracks numbered from 2 to K, where K is an integer from 2 to 40. In one example, the plurality of primary tracks and the plurality of secondary tracks are collectively configured to form an electromagnetic field from the plurality of primary tracks, thereby generating a magnetic flux to induce a varying current coupled to the plurality of secondary tracks.

[0068] In one example, the present invention provides an alternative transformer device. The device has a semiconductor substrate member including a first surface and a second surface. In one example, the device has a plurality of CMOS cells, the plurality of CMOS cells being configured to cover a first portion of the second surface. In one example, an insulating material is overlaid on a second portion of the second surface. In one example, a plurality of contact regions are configured within the insulating material such that each contact region includes a channel structure. In one example, the device has a metal material having a thickness and spatially configured into a pattern, thereby forming a transformer device. In one example, the pattern has a plurality of primary tracks numbered from 2 to J, where J is an integer from 2 to 40. Each primary track has a first endpoint and a second endpoint, and a length defined between the first endpoint and the second endpoint. In one example, the pattern has a plurality of secondary tracks numbered from 2 to K, where K is an integer from 2 to 40. Each secondary track has a first endpoint and a second endpoint, and a length defined between the first endpoint and the second endpoint. In one example, the plurality of primary tracks and the plurality of secondary tracks are collectively configured to form an electromagnetic field from the plurality of primary tracks, thereby generating a magnetic flux to induce a changing current coupled to the plurality of secondary tracks.

[0069] In one example, any one track in the pattern can induce a varying current in any one track.

[0070] In one example, each of the plurality of primary tracks is electrically isolated from any of the plurality of primary tracks. In one example, each of the plurality of primary tracks is an electrically isolated mesh. In one example, each of the plurality of secondary tracks is an electrically isolated mesh. In one example, each of the plurality of primary tracks includes a first endpoint and a second point. In one example, each of the plurality of secondary tracks includes a first endpoint and a second point.

[0071] In one example, the plurality of primary tracks and the plurality of secondary tracks are configured as diamonds within a single planar area or material thickness. In one example, the plurality of primary tracks and the plurality of secondary tracks are configured as N diamonds, where N is 2 or greater.

[0072] In one example, the plurality of contact regions are configured at crossing regions coupled with the plurality of primary rails and the plurality of secondary rails.

[0073] In one example, the metal material includes copper material, etc. In one example, the semiconductor substrate includes a plurality of CMOS cells. In one example, the CMOS cells are constructed by suitable design rules, such as 1 micron, 0.5 micron and other sub-micron sizes (including 80nm, 40nm, etc.).

[0074] In one example, the plurality of primary tracks are generally arranged such that at least a first group is parallel to a second group. In one example, the plurality of secondary tracks are generally arranged such that at least a first group is parallel to a second group.

[0075] In one example, the plurality of primary tracks are configured within the planar region or within the thickness of the planar region.

[0076] In one example, the width of each primary track ranges from half the thickness of the metal to ten times the thickness of the metal, the metal comprising a copper material. Other thicknesses may also be used. In one example, the width of each secondary track ranges from half to five times the thickness. Other thicknesses may be used for the secondary tracks. In one example, the thickness of each primary track is 1 micron to 3 microns.

[0077] In one example, the present invention provides a transformer device. The transformer device has a semiconductor substrate member including a first surface and a second surface. The device has an insulating material covering the second surface. The device has a plurality of contact areas constructed in the insulating material. The device has a first metal material from a first metal layer and a second metal material from a second metal layer, the first metal material having a thickness and spatially configured into a first pattern, and the second metal material having a thickness and spatially configured into a second pattern. In one example, the device has: a plurality of primary tracks numbered from 2 to J, where J is an integer from 2 to 40; and a plurality of secondary tracks numbered from 2 to K, where K is an integer from 2 to 40. In one example, the device has a plurality of segments, the plurality of segments characterizing each of a plurality of secondary tracks numbered from 2 to L, where L is an integer greater than 2. Each of the plurality of segments has a first end and a second end. In one example, the plurality of primary tracks and the plurality of secondary tracks are jointly constructed to form an electromagnetic field from the plurality of primary tracks, thereby generating a magnetic flux to induce a changing current coupled to the plurality of secondary tracks.

[0078] In one example, each of the plurality of segments is electrically isolated from any of the plurality of segments; and at most one of the plurality of primary tracks is composed only of a first metal material. In one example, at least one or more of the plurality of segments is constructed on a straight line or on a line having a 90 degree angle. In one example, each first end of the plurality of segments is connected to a common first node, and each second end of the plurality of segments is connected to a common first node. In one example, each of the plurality of segments of a secondary track of the plurality of secondary tracks is coupled to form a continuous track.

[0079] In one example, each of the plurality of primary tracks is electrically isolated from any of the plurality of primary tracks. In one example, each of the plurality of primary tracks is an electrically isolated mesh. In one example, each of the plurality of secondary tracks is an electrically isolated mesh. In one example, each of the plurality of primary tracks includes a first endpoint and a second point. In one example, each of the plurality of secondary tracks includes a first endpoint and a second point. In one example, the plurality of primary tracks and the plurality of secondary tracks are constructed as a rhombus within a single planar area or material thickness. In one example, the plurality of primary tracks and the plurality of secondary tracks are constructed as N rhombuses, where N is 2 or greater. In one example, the plurality of contact areas are constructed at intersection areas coupled to the plurality of primary tracks and the plurality of secondary tracks.

[0080] In one example, the first metal material includes a copper material. In one example, the semiconductor substrate includes a plurality of CMOS cells. In one example, the plurality of primary tracks are arranged so that at least a first group is parallel to a second group. In one example, the plurality of secondary tracks are arranged so that at least a first group is parallel to a second group. In one example, the plurality of primary tracks are constructed within a planar region. In one example, the width of each primary track ranges from half the thickness of a metal to ten times the thickness of a metal, the metal including a copper material. In one example, the width of each secondary track ranges from half to five times the thickness. In one example, the thickness of the primary track is 1 micron to 3 microns.

[0081] Although described above with specific shapes and structures, the present invention can have variations. That is, the shape can be changed to a shape, curved or formed into other shapes to implement the present invention described in the technical solution.

[0082] In other examples, each track is described as having a constant width, however, according to alternative examples, each track may be patterned or shaped differently.

[0083] Although the above is a complete description of a specific example, various modifications, alternative configurations, and equivalents may be used. For example, a distributed transformer device may include any combination of the above elements and elements outside of this specification. In one example, a distributed transformer has been described according to a general configuration, but may include a plurality of tracks 1, 2, 3, 4, ... N and a plurality of segments 1, 2, 3, 4, ... M. Other configurations may also exist depending on the application. Therefore, the above description and illustration should not be considered to limit the scope of the present invention defined by the technical solution.

[0084] Copyright Notice

[0085] A portion of the disclosure of this patent document contains material that is copyrighted. The copyright owner has no objection to the facsimile reproduction by anyone of the patent document or the patent disclosure, as it appears in the Patent and Trademark Office patent file or records, but otherwise reserves all other copyright rights.

Claims

1. An integrated circuit device, comprising: a semiconductor substrate member comprising a first surface and a second surface; an insulating material covering the second surface; a first metal material formed in a first layer covering the insulating material, the first metal material having a first thickness and spatially configured into a first pattern; a second metal material formed in a second layer covering the first metal material, having a second thickness and spatially configured into a second pattern; a plurality of diamond tracks numbered from 4 to N and constructed from the first pattern and the second pattern, wherein N is an integer from 4 to 80; the plurality of diamond tracks are constructed in an offset arrangement such that the second diamond track is placed adjacent to the first diamond track, the third diamond track is placed adjacent to the second diamond track, and the Nth diamond track is placed adjacent to the N-1th diamond track, so that each pair of horizontal angles of each diamond track relative to each other is arranged along a first transverse imaginary line, the first vertical angle of each diamond track is arranged along a second transverse imaginary line parallel to the first transverse imaginary line, and the second vertical angle of each diamond track is arranged along a third transverse imaginary line parallel to the first transverse imaginary line; as well as A transformer device is constructed from a plurality of primary tracks and a plurality of secondary tracks, wherein the plurality of primary tracks include at least a first pair of said diamond tracks, and the plurality of secondary tracks include at least a second pair of said diamond tracks, wherein each diamond track in the second pair of diamond tracks includes at least two segments, so that the plurality of primary tracks form an electromagnetic field and a magnetic flux generated thereby, thereby inducing a changing current coupled to one or more of the plurality of secondary tracks.

2. The device according to claim 1, wherein: The plurality of diamond tracks are configured such that each diamond track is offset from an adjacent diamond track by a gap; at least N-1 of the plurality of diamond tracks include a contact structure, the contact structure including a plurality of channel structures arranged in a pattern to occupy approximately 10% to 50% of an area of ​​the contact structure, the pattern being random or arranged.

3. The device according to claim 1, wherein: Each diamond track of the plurality of diamond tracks is isolated from any other diamond track of the plurality of diamond tracks.

4. The device according to claim 1, wherein: Each of the N-1 diamond tracks among the plurality of diamond tracks is configured with a gap isolated from at least one or more diamond tracks among the plurality of diamond tracks.

5. The device according to claim 1, wherein: Each of the N-1 diamond tracks among the plurality of diamond tracks is configured with a gap isolated from at least one or more diamond tracks among the plurality of diamond tracks, and each gap is an open area in the diamond track.

6. The device according to claim 1, wherein: Each of the N-1 diamond tracks among the plurality of diamond tracks is constructed with a gap isolated from at least one or more of the plurality of diamond tracks, each gap being an open area in a portion of the metal material in the diamond track; and also including an interconnect line that connects the open areas located on the covering metal material using at least one pair of channel structures.

7. The device according to claim 1, wherein: A pair of primary rails are arranged adjacent to each other and spatially disposed between at least one pair of secondary rails, each of the primary rails is electrically isolated from the other primary rails, and each pair of the primary rails is electrically coupled by at least one electrical device.

8. A transformer device, comprising: a semiconductor substrate member comprising a first surface and a second surface; an insulating material covering the second surface; a plurality of contact regions constructed within the insulating material; a first metal material, from the first metal layer, having a thickness and spatially configured into a first pattern; The second metal material, from the second metal layer, has a thickness and is spatially configured into a second pattern, wherein the first pattern and the second pattern include: a plurality of primary orbitals numbered from 2 to J, where J is an integer from 2 to 40; a plurality of secondary orbitals numbered from 2 to K, where K is an integer from 2 to 40; a plurality of segments characterizing each of the plurality of secondary tracks numbered from 2 to L, wherein L is an integer of 3 or greater, each of the plurality of segments having a first end and a second end; The plurality of primary tracks and the plurality of secondary tracks are thus collectively configured to form an electromagnetic field from the plurality of primary tracks, thereby generating a magnetic flux to induce a varying current that is coupled to the plurality of secondary tracks.

9. The device according to claim 8, wherein: Each of the multiple segments is electrically isolated from any of the multiple segments; at most one of the multiple primary tracks is composed only of the first metal material; at least one or more of the multiple segments are constructed on a straight line or on a line with a 90-degree angle.

10. The device according to claim 8, wherein: Each of the first ends of the plurality of segments is connected to a common first node, and each of the second ends of the plurality of segments is connected to the common first node.

11. The device according to claim 8, wherein: Each of the plurality of segments in one of the plurality of secondary tracks are coupled to form a continuous track.

12. The device according to claim 8, wherein: Each of the plurality of primary tracks is electrically isolated from any of the plurality of primary tracks.

13. The apparatus according to claim 8, wherein: Each primary track of the plurality of primary tracks is an electrically isolated mesh; and each secondary track of the plurality of secondary tracks is an electrically isolated mesh.

14. The apparatus according to claim 8, wherein: Each primary track of the plurality of primary tracks includes a first end point and a second point; and each secondary track of the plurality of secondary tracks includes a first end point and a second point.

15. The apparatus according to claim 8, wherein: The plurality of primary tracks and the plurality of secondary tracks are configured as diamonds within a single planar area or material thickness.

16. The apparatus according to claim 8, wherein: The plurality of primary tracks and the plurality of secondary tracks are configured as N diamonds, where N is 2 or greater.

17. The apparatus according to claim 8, wherein: The plurality of contact regions are configured at intersection regions coupled with the plurality of primary rails and the plurality of secondary rails.

18. The apparatus according to claim 8, wherein: The first metal material includes copper material.

19. The apparatus according to claim 8, wherein: The semiconductor substrate includes a plurality of CMOS cells.

20. The apparatus of claim 8, wherein: The plurality of primary tracks are arranged such that at least a first set is parallel to a second set.

21. The apparatus according to claim 8, wherein: The plurality of secondary tracks are arranged such that at least a first group is parallel to a second group.

22. The apparatus according to claim 8, wherein: The plurality of primary tracks are configured within a planar area.

23. The apparatus of claim 8, wherein: The width of each of the primary tracks ranges from half the thickness of a metal to ten times the thickness of a metal, the metal comprising a copper material.

24. The apparatus of claim 8, wherein: The width of each of the secondary tracks ranges from half to five times the thickness.

25. The apparatus of claim 8, wherein: The thickness of the primary track is 1 micron to 3 microns.

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