Non-isolated inverter leakage current suppression method and device, medium, equipment and product

Abstract

The invention discloses a non-isolated inverter leakage current suppression method and device, a medium, equipment and a product, which are applied to an inverter, the inverter adopts a common-ground topological structure in which the negative electrode of a direct-current voltage-stabilizing capacitor is directly connected with a neutral point of a power grid, and a fifth power switch tube and a flying capacitor are introduced to realize decoupling of a direct-current side and an alternating-current side in a follow current mode; the leakage current suppression method comprises the following steps: acquiring state data of an inverter; according to the state data, a command signal is obtained based on a double-closed-loop control strategy of voltage outer loop PI control and current inner loop QPR control; and according to the instruction signal, based on a unipolar SPWM modulation technology, obtaining a switch driving signal so as to realize control of a plurality of power switch tubes in the inverter. According to the inverter, common-mode voltage can be kept unchanged, and system leakage current can be effectively suppressed based on a double-closed-loop control strategy of voltage outer loop PI control and current inner loop QPR control in combination with a unipolar SPWM modulation technology.

Description

Technical Field

[0001] The invention relates to a method, device, medium, equipment and product for suppressing leakage current of a non-isolated inverter, and belongs to the technical field of leakage current suppression. Background Art

[0002] Flexible interconnection technology combines power electronics flexible control technology with distribution network optimization design, and can provide fast and accurate active and reactive power control, power failure support and power quality management functions between distribution network lines and between substations, providing an effective technical means to tap the power supply potential of distribution networks and improve power supply reliability. At the same time, the DC side of the flexible interconnection system can be more flexibly connected to distributed power sources and charging facilities, data centers and other DC sources and loads. The DC system based on DC voltage control can achieve photovoltaic grid connection, local source and load balance, etc. more quickly and efficiently, without harmonics, terminal overvoltage and three-phase imbalance and other power quality problems. Therefore, the multi-level access of large-scale distributed power sources by flexible interconnection of low-voltage distribution networks can maximize the energy supply potential of distributed renewable energy, effectively improve the reliability, economy and environmental protection of the overall operation of the distribution system, and is an important technical route to solve the problem of high-proportion consumption of distributed power sources in distribution networks.

[0003] The existing low-voltage area flexible interconnection equipment using isolation transformers has the disadvantages of "high equipment investment, large size, low efficiency, and insufficient scalability", which restricts its promotion and application. At present, flexible interconnection technology without isolation transformer has become an important development direction. However, the back-to-back converter based on the traditional two-level topology will bring technical problems such as high common-mode voltage after the isolation transformer is eliminated, which affects the safe and stable operation of the equipment. Summary of the invention

[0004] The purpose of the present invention is to overcome the deficiencies in the prior art and provide a method, device, medium, equipment and product for suppressing leakage current of a non-isolated inverter. On the one hand, an inverter with a common ground topology is adopted, and decoupling of the DC side and the AC side is achieved in the freewheeling mode, so that the common mode voltage can be kept unchanged; on the other hand, a dual closed-loop control strategy based on voltage outer loop PI control and current inner loop QPR control is combined with unipolar SPWM modulation technology to control the operation of the inverter and effectively suppress the system leakage current.

[0005] To achieve the above object, the present invention is implemented by adopting the following technical solutions:

[0006] In the first aspect, the present invention discloses a method for suppressing leakage current of a non-isolated inverter, which is applied to an inverter, wherein the inverter adopts a common ground topology structure in which the negative electrode of a DC stabilizing capacitor is directly connected to the neutral point of a power grid, and introduces a fifth power switch tube S5 and a flying capacitor C1 to achieve decoupling of the DC side and the AC side in a freewheeling mode;

[0007] The leakage current suppression method comprises:

[0008] Acquiring status data of the inverter;

[0009] According to the state data, a command signal is obtained based on a dual closed-loop control strategy of voltage outer loop PI control and current inner loop QPR control;

[0010] According to the command signal, based on the unipolar SPWM modulation technology, a switch drive signal is obtained by comparing the triangular wave carrier and the sinusoidal modulation wave to control multiple power switch tubes in the inverter, thereby achieving leakage current suppression.

[0011] Furthermore, the state data of the inverter includes the grid-connected current i g , DC bus voltage U dc , grid voltage v g ;

[0012] The step of obtaining the command signal comprises the following steps:

[0013] Based on the voltage outer loop PI controller, according to the DC bus voltage U dc and the pre-acquired reference voltage U dcref , get the reference current I dcref ;

[0014] Based on the PLL phase-locked loop, according to the grid voltage v g , get the angle signal θ;

[0015] Based on the current inner loop QPR controller, according to the reference current I dcref and the angle signal θ, the reference grid-connected current i is obtained dcref According to the grid-connected current i g and the reference grid current i dcref , get the command signal.

[0016] Furthermore, the performance of the voltage outer loop PI controller depends on the proportionality coefficient K P and the integration coefficient K i ; The performance of the current inner loop QPR controller depends on the cut-off frequency ω r , proportionality coefficient K p and the resonance coefficient K R ;

[0017] The calculation process of the dual closed-loop control strategy of voltage outer loop PI control and current inner loop QPR control is:

[0018]

[0019] In the formula, represents the transfer function of the PI controller; represents the proportionality coefficient; represents the integral coefficient; represents a complex variable;

[0020] represents the transfer function of the QPR controller; represents the resonance coefficient; represents the cut-off frequency; Indicates the resonant frequency.

[0021] Furthermore, the inverter includes a DC stabilizing capacitor C dc , flying capacitor C1, filter inductor L f , a first power switch tube S1, a second power switch tube S2, a third power switch tube S3, a fourth power switch tube S4 and a fifth power switch tube S5; the inverter is arranged between the photovoltaic module and the power grid;

[0022] The DC voltage stabilizing capacitor C dc The positive electrode of the capacitor C is connected to the positive electrode of the photovoltaic module, the collector of the first power switch tube S1 and the collector of the third power switch tube S3; the DC voltage stabilizing capacitor C dc The negative electrode is connected to the emitter of the second power switch tube S2, the collector of the fifth power switch tube S5 and one end of the power grid; the other end of the power grid is connected to the grid filter inductor L f one end of

[0023] The positive electrode of the flying capacitor C1 is connected to the emitter of the first power switch tube S1 and the collector of the second power switch tube S2 respectively; the negative electrode of the flying capacitor C1 is connected to the emitter of the power switch tube S3, the collector of the power switch tube S4 and the grid filter inductor L f the emitter of the fourth power switch tube S4 is connected to the emitter of the fifth power switch tube S5 to achieve decoupling of the DC side and the AC side in the freewheeling mode.

[0024] Furthermore, the inverter also includes a parasitic capacitor C to ground pv , the parasitic capacitance to ground C pv One end of the parasitic capacitance to ground is C pv The other end is set on the DC voltage stabilizing capacitor C dc Between the negative electrode and one end of the grid, the DC stabilizing capacitor C dc The negative pole is directly connected to the neutral point of the grid to realize the common ground topology. pv Directly short-circuit to eliminate common-mode leakage current.

[0025] Furthermore, the first power switch tube S1 , the second power switch tube S2 , the third power switch tube S3 , the fourth power switch tube S4 and the fifth power switch tube S5 are all switch components with symmetrical parasitic parameters.

[0026] Furthermore, the high-frequency common-mode voltage of the inverter is zero; and the low-frequency common-mode voltage generated by the inverter due to the power frequency voltage of the power grid is a constant value.

[0027] In a second aspect, the present invention discloses a non-isolated inverter leakage current suppression device, which is applied to an inverter, wherein the inverter adopts a common ground topology structure in which the negative electrode of a DC voltage stabilizing capacitor is directly connected to the neutral point of a power grid, and a flying capacitor is introduced to achieve decoupling of the DC side and the AC side in a freewheeling mode;

[0028] The leakage current suppression device comprises:

[0029] A data acquisition module, used to acquire status data of the inverter;

[0030] A dual closed-loop control module, used for obtaining a command signal according to the state data based on a dual closed-loop control strategy of voltage outer loop PI control and current inner loop QPR control;

[0031] The SPWM modulation module is used to obtain a switch drive signal by comparing a triangular wave carrier and a sinusoidal modulation wave according to the command signal based on the unipolar SPWM modulation technology, so as to control multiple power switch tubes in the inverter and further achieve leakage current suppression.

[0032] Furthermore, the state data of the inverter includes the grid-connected current i g , DC bus voltage U dc , grid voltage v g ;

[0033] The dual closed-loop control module comprises:

[0034] The voltage outer loop PI controller is used to control the DC bus voltage U dc and the pre-acquired reference voltage U dcref , get the reference current I dcref ;

[0035] The PLL phase-locked loop is used to adjust the grid voltage v g , get the angle signal θ;

[0036] The current inner loop QPR controller is used to control the reference current I dcref and the angle signal θ, the reference grid-connected current i is obtained dcref According to the grid-connected current i g and the reference grid current i dcref , get the command signal.

[0037] In a third aspect, the present invention discloses a computer-readable storage medium having a computer program / instruction stored thereon. When the computer program / instruction is executed by a processor, the steps of the above-mentioned non-isolated inverter leakage current suppression method are implemented.

[0038] In a fourth aspect, the present invention discloses a computer device, comprising:

[0039] Memory, for storing computer programs / instructions;

[0040] A processor is used to execute the computer program / instructions to implement the steps of the above-mentioned non-isolated inverter leakage current suppression method.

[0041] In a fifth aspect, the present invention discloses a computer program product, including a computer program / instruction, which, when executed by a processor, implements the steps of the above-mentioned non-isolated inverter leakage current suppression method.

[0042] Compared with the prior art, the present invention has the following beneficial effects:

[0043] The present invention firstly adopts an inverter with a common ground topology structure, and realizes decoupling of the DC side and the AC side in the freewheeling mode, which can keep the common mode voltage unchanged and suppress leakage current. Secondly, the dual closed-loop control strategy based on the voltage outer loop PI control and the current inner loop QPR control combined with the unipolar SPWM modulation technology can reduce the harmonic distortion rate of the grid-connected current and improve the grid-connected power quality, with huge application value and prospects. BRIEF DESCRIPTION OF THE DRAWINGS

[0044] Figure 1 is a flow chart of a method for suppressing leakage current of a non-isolated inverter provided in Example 1;

[0045] Figure 2 is a schematic structural diagram of the inverter provided in Example 1;

[0046] Figure 3 It is a schematic diagram of common mode characteristic simulation waveform of the inverter based on QPR control and unipolar PWM modulation provided in Example 1.

[0047] Figure 4 is a current THD and FFT analysis diagram of the inverter provided in Example 1;

[0048] Figure 5 is a grid voltage and grid-connected current experimental waveform diagram of the inverter topology provided in Example 1;

[0049] Figure 6 This is a leakage current dynamic waveform diagram of the inverter topology provided in Example 1. DETAILED DESCRIPTION

[0050] The present invention will be further described below in conjunction with the accompanying drawings. The following embodiments are only used to more clearly illustrate the technical solution of the present invention, and cannot be used to limit the protection scope of the present invention.

[0051] Example 1

[0052] This embodiment 1 provides a method for suppressing leakage current of a non-isolated inverter, such as Figure 1 and Figure 2 As shown, it is applied to the inverter, the inverter adopts a common ground topology structure in which the negative electrode of the DC voltage stabilizing capacitor is directly connected to the neutral point of the power grid, and introduces the fifth power switch tube S5 and the flying capacitor C1 to achieve decoupling of the DC side and the AC side in the freewheeling mode;

[0053] Leakage current suppression methods include:

[0054] Get the status data of the inverter;

[0055] According to the state data, the command signal is obtained based on the dual closed-loop control strategy of voltage outer loop PI control and current inner loop QPR control;

[0056] According to the command signal, based on the unipolar SPWM modulation technology, the switch drive signal is obtained by comparing the triangular wave carrier and the sinusoidal modulation wave to achieve control of multiple power switch tubes in the inverter, thereby achieving leakage current suppression.

[0057] The technical concept of the present invention is as follows: first, an inverter with a common ground topology is adopted, and the DC side and AC side are decoupled in the freewheeling mode, so that the common mode voltage can be kept unchanged and the leakage current can be suppressed. Secondly, a dual closed-loop control strategy based on the voltage outer loop PI control and the current inner loop QPR control combined with the unipolar SPWM modulation technology can reduce the harmonic distortion rate of the grid-connected current and improve the grid-connected power quality, with great application value and prospects.

[0058] The design steps of the non-isolated inverter leakage current suppression method of the present invention are as follows:

[0059] (1) Design of a new inverter to suppress leakage current.

[0060] like Figure 1 and Figure 2 As shown, the inverter includes a DC stabilizing capacitor C dc , flying capacitor C1, filter inductor L f , a first power switch tube S1, a second power switch tube S2, a third power switch tube S3, a fourth power switch tube S4 and a fifth power switch tube S5; the inverter is arranged between the photovoltaic module and the power grid;

[0061] DC voltage stabilizing capacitor C dcThe positive electrode of the capacitor C is connected to the positive electrode of the photovoltaic module, the collector of the first power switch tube S1 and the collector of the third power switch tube S3; the DC voltage stabilizing capacitor C dc The negative electrode is connected to the emitter of the second power switch tube S2, the collector of the fifth power switch tube S5 and one end of the power grid; the other end of the power grid is connected to the grid filter inductor L f one end of

[0062] The positive electrode of the flying capacitor C1 is connected to the emitter of the first power switch tube S1 and the collector of the second power switch tube S2 respectively; the negative electrode of the flying capacitor C1 is connected to the emitter of the power switch tube S3, the collector of the power switch tube S4 and the grid filter inductor L f the emitter of the fourth power switch tube S4 is connected to the emitter of the fifth power switch tube S5 to achieve decoupling of the DC side and the AC side in the freewheeling mode.

[0063] The inverter inserts an additional fifth power switch tube S5 and a flying capacitor C1 into a traditional single-phase bridge inverter so as to decouple the DC side from the AC side in the inverter freewheeling mode, keep the common mode voltage unchanged, and suppress leakage current.

[0064] The inverter also includes parasitic capacitance to ground C pv , parasitic capacitance to ground C pv One end of the ground is grounded, and the parasitic capacitance C pv The other end is set on the DC voltage stabilizing capacitor C dc Between the negative electrode and one end of the grid, the DC voltage stabilizing capacitor C dc The negative pole is directly connected to one end of the grid to realize the common ground topology. pv Directly short-circuit to eliminate common-mode leakage current.

[0065] Furthermore, the first power switch tube S1 , the second power switch tube S2 , the third power switch tube S3 , the fourth power switch tube S4 and the fifth power switch tube S5 are all switch components with symmetrical parasitic parameters.

[0066] The inverter also includes a photovoltaic cell PV, the positive electrode of which is connected to a DC stabilizing capacitor C. dc The positive pole of the photovoltaic cell PV is connected to the DC stabilizing capacitor C dc In the freewheeling mode, the photovoltaic cell PV charges the flying capacitor C1, and the filter inductor L f Continue current.

[0067] In the freewheeling mode, the DC voltage stabilizing capacitor C dc The first power switch tube S1, the flying capacitor C1, the fourth power switch tube S4 and the fifth power switch tube S5 form a loop, and the AC side of the power grid is connected through the filter inductor L fThe fourth power switch tube S4 and the fifth power switch tube S form a loop, and there is no coupling between the DC side and the AC side, so the decoupling of the DC side and the AC side is achieved. In the freewheeling mode, due to the existence of the fifth power switch tube S5, the potential difference =0, ensuring that the common-mode voltage of this modal topology is constant and 0, and realizing the function of suppressing leakage current. The specific analysis steps are as follows:

[0068] (2) Analyze the leakage current suppression principle of the inverter.

[0069] By deriving the common-mode model of the inverter, its leakage current suppression principle is further analyzed as follows:

[0070] From the definition of differential and common mode voltages, we can get:

[0071] ;

[0072] ;

[0073] In the formula, Represents common mode voltage; Represents differential mode voltage; Indicates the potential difference between the AC output point A and the neutral point N of the power grid; Indicates the potential difference between the AC output point B and the neutral point N of the power grid.

[0074] like Figure 1 and Figure 2 As shown, the AC output point A is set between the flying capacitor C1 and the grid filter inductor L f The AC output point B is set between the power grid and the fifth power switch tube S5; the neutral point N of the power grid is set between the DC voltage stabilizing capacitor C dc and between the second power switch tube S2.

[0075] The above definition formulas of differential and common mode voltages are transformed to obtain:

[0076] ;

[0077] ;

[0078] Since the switching frequency is much higher than the grid frequency, the grid voltage source can be regarded as a short circuit. Based on the “superposition principle”, the differential mode loop and components can be ignored to obtain the high-frequency common-mode equivalent loop of the proposed inverter.

[0079] Therefore, in the energy transfer stage, , ; In the formula, is the DC bus voltage, that is, the DC voltage stabilizing capacitor C dc voltage.

[0080] At this time, the equivalent common mode voltage v in the energy transfer stage tCM for

[0081] .

[0082] In the freewheeling phase, there are ;

[0083] At this time, the equivalent common mode voltage v tCM for .

[0084] The high-frequency equivalent common-mode voltage analysis results for the negative half-cycle of the grid voltage are consistent and will not be repeated here. Therefore, when considering parasitic capacitance and filter inductance, the high-frequency common-mode voltage v of the proposed new topology is tCM In addition, the low-frequency common-mode voltage generated by the power-frequency voltage of the grid in the common-ground non-isolated inverter is constant. In summary, the inverter of the proposed topology has low common-mode characteristics and theoretically has the ability to eliminate leakage current.

[0085] (3) Design the control strategy for the inverter.

[0086] like Figure 1 and Figure 2 As shown, the voltage on both sides of the grid is the grid voltage v g ; The current flowing through the power grid is the grid-connected current i g ; DC voltage stabilizing capacitor C dc The voltage at is the DC bus voltage U dc .

[0087] Step 1: Obtain the status data of the inverter, including the grid-connected current i g , DC bus voltage U dc , grid voltage v g .

[0088] Step 2: According to the state data, a dual closed-loop control strategy based on voltage outer loop PI control and current inner loop QPR control is used to obtain the command signal.

[0089] Based on the voltage outer loop PI controller, according to the DC bus voltage U dc and the pre-acquired reference voltage U dcref , after PI modulation, the reference current I is obtained dcref ;

[0090] Based on the PLL phase-locked loop, according to the grid voltage v g , get the angle signal θ;

[0091] Based on the current inner loop QPR controller, according to the reference current I dcref and the angle signal θ, the reference grid-connected current i is obtaineddcref ; According to the grid current i g and the reference grid current i dcref , after difference processing and QPR modulation, the command signal is obtained.

[0092] Among them, the calculation process of the dual closed-loop control strategy of voltage outer loop PI control and current inner loop QPR control is:

[0093]

[0094] In the formula, represents the transfer function of the PI controller; represents the proportionality coefficient; represents the integral coefficient; represents a complex variable;

[0095] represents the transfer function of the QPR controller; represents the resonance coefficient; represents the cut-off frequency; Indicates the resonant frequency.

[0096] Furthermore, the performance of the current inner loop QPR controller depends on the cutoff frequency ω r , proportionality coefficient K p and the resonance coefficient K R Among them, the cut-off frequency ω r The value of can be considered as the fluctuation range of the power grid frequency ±0.5Hz; the proportionality coefficient K p The cutoff frequency of the current inner loop open-loop transfer function can be designed to be one tenth of the system switching frequency; the resonance coefficient K R It can be increased as much as possible without significantly changing the inner loop cutoff frequency and ensuring a large phase margin.

[0097] The performance of the voltage outer loop PI controller depends on the proportional coefficient K P and the integration coefficient K i The PI controller can realize zero-static-error tracking of the DC signal, so that there is no steady-state error between the actual inductor current and the reference current, which is used to stabilize the energy storage inductor current.

[0098] The reason why this method adopts a dual closed-loop control strategy based on voltage outer loop PI control and current inner loop QPR control is that in order to make the system output signal track the given signal without static error, the gain of the system open-loop transfer function should be infinite at the given signal frequency, so that even a small error can generate a sufficiently large control signal. The PI controller does not have a large gain at the grid frequency, so there will be a steady-state error. Although the PR controller provides a large gain at the grid frequency, the gain at other frequency points is extremely small. Once the grid frequency fluctuates, this controller will not be able to quickly and accurately track the sinusoidal signal. The QPR controller broadens the bandwidth at the grid frequency on the basis of the PR controller, which can suppress the impact of grid frequency fluctuations. At the same time, it has a large gain and can eliminate steady-state errors. Therefore, a dual closed-loop control strategy based on voltage outer loop PI control and current inner loop QPR control is selected.

[0099] Step 3: According to the command signal, based on the unipolar SPWM modulation technology, the switch drive signal is obtained by comparing the triangle wave carrier and the sinusoidal modulation wave to control multiple power switch tubes in the inverter, thereby achieving leakage current suppression.

[0100] To further verify the effectiveness of the proposed structure, a 1kW experimental prototype was built. The DC input voltage was replaced by a 400V DC voltage source, the switching frequency was set to 20kHz, the switch junction capacitance was 100pF, the filter inductance was 3mH, and the parasitic capacitance was 100nF. The common mode characteristic simulation results are shown in Figure 2. Figure 3 As shown, the grid-connected current THD and FFT analysis results are as follows Figure 4 The experimental results are shown in Figure 5 and Figure 6 shown.

[0101] Figure 3 This is the common mode characteristic simulation waveform of the inverter based on QPR control and unipolar PWM modulation. Consistent with the simulation results and theoretical analysis, the high-frequency common mode voltage of this new topology is naturally maintained at zero, and the power frequency common mode voltage is a constant value, so the leakage current is theoretically completely eliminated.

[0102] Figure 4 The current THD and FFT analysis diagram of the proposed inverter. Under light load conditions, due to the absence of leakage current interference, the THD value of the new topology is 2.30%. Therefore, the current harmonics of the new topology are small, which can improve the grid reliability.

[0103] Figure 5 The grid voltage and grid current experimental waveforms of the proposed inverter topology are shown in Figure 2. g and grid current i gThe experimental waveform shows that the grid-connected current THD is about 2.1%. The above experimental results all meet the grid-connected standards, proving that the experimental prototype built according to the new inverter of this scheme can be normally connected to the grid and operate.

[0104] Figure 6 The leakage current dynamic waveform of the proposed grid topology is shown in Figure 2. The peak value of the leakage current is about 12mA, and the average value is about 10.979mA, which completely eliminates the leakage current of the non-isolated grid-connected system. This proves that the new current-source inverter proposed in this scheme can better solve the leakage current problem of the single-phase photovoltaic grid-connected system.

[0105] Furthermore,

[0106] Example 2

[0107] This embodiment 2 provides a non-isolated inverter leakage current suppression device, which is applied to an inverter. The inverter adopts a common ground topology structure in which the negative electrode of a DC voltage stabilizing capacitor is directly connected to the neutral point of a power grid, and introduces a flying capacitor to achieve decoupling of the DC side and the AC side in a freewheeling mode.

[0108] The leakage current suppression device includes:

[0109] A data acquisition module, used to acquire status data of the inverter;

[0110] A dual closed-loop control module is used to obtain a command signal according to the state data based on a dual closed-loop control strategy of voltage outer loop PI control and current inner loop QPR control;

[0111] The SPWM modulation module is used to obtain a switch drive signal by comparing a triangular wave carrier and a sinusoidal modulation wave according to a command signal based on unipolar SPWM modulation technology, so as to control multiple power switch tubes in the inverter and thereby suppress leakage current.

[0112] Furthermore, the status data of the inverter includes the grid-connected current i g , DC bus voltage U dc , grid voltage v g ;

[0113] The dual closed-loop control module includes:

[0114] The voltage outer loop PI controller is used to adjust the DC bus voltage U dc and the pre-acquired reference voltage U dcref , get the reference current I dcref ;

[0115] PLL phase-locked loop is used to g , get the angle signal θ;

[0116] The current inner loop QPR controller is used todcref and the angle signal θ, the reference grid-connected current i is obtained dcref ; According to the grid current i g and the reference grid current i dcref , get the command signal.

[0117] Example 3

[0118] This embodiment 3 provides a computer-readable storage medium on which a computer program / instruction is stored. When the computer program / instruction is executed by a processor, the steps of the above-mentioned non-isolated inverter leakage current suppression method are implemented.

[0119] Example 4

[0120] This embodiment 4 provides a computer device, including:

[0121] Memory, for storing computer programs / instructions;

[0122] A processor is used to execute computer programs / instructions to implement the steps of the above-mentioned non-isolated inverter leakage current suppression method.

[0123] Example 5

[0124] This embodiment 5 provides a computer program product, including a computer program / instruction, which implements the steps of the above-mentioned non-isolated inverter leakage current suppression method when executed by a processor.

[0125] Those skilled in the art will appreciate that the embodiments of the present application may be provided as methods, systems, or computer program products. Therefore, the present application may adopt the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware. Moreover, the present application may adopt the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program codes.

[0126] The present application is described with reference to the flowcharts and / or block diagrams of the methods, devices (systems), and computer program products according to the embodiments of the present application. It should be understood that each process and / or box in the flowchart and / or block diagram, as well as the combination of the processes and / or boxes in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to generate a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0127] These computer program instructions may also be stored in a computer-readable memory capable of directing a computer or other programmable data processing device to operate in a specific manner, so that the instructions stored in the computer-readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1 A process or multiple processes and / or boxes Figure 1 A function specified in one or more boxes.

[0128] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operating steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing instructions for implementing the process. Figure 1 A process or multiple processes and / or boxes Figure 1 The steps for the functions specified in one or more boxes.

[0129] The above is only a preferred embodiment of the present invention. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the principle of the present invention. These improvements and modifications should also be regarded as the scope of protection of the present invention.

Claims

1. A method for suppressing leakage current of a non-isolated inverter, characterized in that: In the inverter, the inverter adopts a common ground topology structure in which the negative electrode of the DC stabilizing capacitor is directly connected to the neutral point of the power grid, and introduces a fifth power switch tube S5 and a flying capacitor C1 to achieve decoupling of the DC side and the AC side in the freewheeling mode; The leakage current suppression method comprises: Acquiring status data of the inverter; According to the state data, a command signal is obtained based on a dual closed-loop control strategy of voltage outer loop PI control and current inner loop QPR control; According to the command signal, based on the unipolar SPWM modulation technology, a switch drive signal is obtained by comparing the triangular wave carrier and the sinusoidal modulation wave to control multiple power switch tubes in the inverter, thereby achieving leakage current suppression.

2. The method for suppressing leakage current of a non-isolated inverter according to claim 1, wherein: The inverter status data includes the grid-connected current i g , DC bus voltage U dc , grid voltage v g ; The step of obtaining the command signal comprises the following steps: Based on the voltage outer loop PI controller, according to the DC bus voltage U dc and the pre-acquired reference voltage U dcref , and obtain the reference current I dcref ; Based on the PLL phase-locked loop, according to the grid voltage v g , get the angle signal θ; Based on the current inner loop QPR controller, according to the reference current I dcref and the angle signal θ, the reference grid-connected current i is obtained dcref According to the grid-connected current i g and the reference grid current i dcref , get the command signal.

3. The method for suppressing leakage current of a non-isolated inverter according to claim 2, wherein: The performance of the voltage outer loop PI controller depends on the proportionality coefficient K P and the integral coefficient K i ; The performance of the current inner loop QPR controller depends on the cut-off frequency ω r , proportionality coefficient K p and the resonance coefficient K R ; The calculation process of the dual closed-loop control strategy of voltage outer loop PI control and current inner loop QPR control is: ； In the formula, represents the transfer function of the PI controller; represents the proportionality coefficient; represents the integral coefficient; represents a complex variable; represents the transfer function of the QPR controller; represents the resonance coefficient; represents the cut-off frequency; Indicates the resonant frequency.

4. The method for suppressing leakage current of a non-isolated inverter according to claim 1, wherein: The inverter includes a DC stabilizing capacitor C dc , flying capacitor C1, filter inductor L f , a first power switch tube S1, a second power switch tube S2, a third power switch tube S3, a fourth power switch tube S4 and a fifth power switch tube S5; the inverter is arranged between the photovoltaic module and the power grid; The DC voltage stabilizing capacitor C dc The positive electrode of the capacitor C is connected to the positive electrode of the photovoltaic module, the collector of the first power switch tube S1 and the collector of the third power switch tube S3; the DC voltage stabilizing capacitor C dc The negative electrode is connected to the emitter of the second power switch tube S2, the collector of the fifth power switch tube S5 and one end of the power grid; the other end of the power grid is connected to the grid filter inductor L f one end of The positive electrode of the flying capacitor C1 is connected to the emitter of the first power switch tube S1 and the collector of the second power switch tube S2 respectively; the negative electrode of the flying capacitor C1 is connected to the emitter of the power switch tube S3, the collector of the power switch tube S4 and the grid filter inductor L f the emitter of the fourth power switch tube S4 is connected to the emitter of the fifth power switch tube S5 to achieve decoupling of the DC side and the AC side in the freewheeling mode.

5. The method for suppressing leakage current of a non-isolated inverter according to claim 4, characterized in that: The inverter also includes a parasitic capacitor C to ground pv , the parasitic capacitance to ground C pv One end of the ground is grounded, and the parasitic capacitance C pv The other end is set on the DC voltage stabilizing capacitor C dc Between the negative electrode and one end of the grid, the DC stabilizing capacitor C dc The negative pole is directly connected to the neutral point of the grid to realize the common ground topology. pv Directly short-circuit to eliminate common-mode leakage current.

6. The method for suppressing leakage current of a non-isolated inverter according to claim 4, characterized in that: The first power switch tube S1 , the second power switch tube S2 , the third power switch tube S3 , the fourth power switch tube S4 and the fifth power switch tube S5 are all switch components with symmetrical parasitic parameters.

7. The method for suppressing leakage current of a non-isolated inverter according to claim 1, characterized in that: The high-frequency common-mode voltage of the inverter is zero; the low-frequency common-mode voltage generated by the inverter due to the power frequency voltage of the power grid is a constant value.

8. A non-isolated inverter leakage current suppression device, characterized in that: Applied to an inverter, the inverter adopts a common ground topology structure in which the negative electrode of a DC voltage stabilizing capacitor is directly connected to the neutral point of a power grid, and a flying capacitor is introduced to achieve decoupling of the DC side and the AC side in a freewheeling mode; The leakage current suppression device comprises: A data acquisition module, used to acquire status data of the inverter; A dual closed-loop control module, used for obtaining a command signal according to the state data based on a dual closed-loop control strategy of voltage outer loop PI control and current inner loop QPR control; The SPWM modulation module is used to obtain a switch drive signal by comparing a triangular wave carrier and a sinusoidal modulation wave according to the command signal based on the unipolar SPWM modulation technology, so as to control multiple power switch tubes in the inverter and further achieve leakage current suppression.

9. The non-isolated inverter leakage current suppression device according to claim 8, characterized in that: The inverter status data includes the grid-connected current i g , DC bus voltage U dc , grid voltage v g ; The dual closed-loop control module comprises: The voltage outer loop PI controller is used to control the DC bus voltage U dc and the pre-acquired reference voltage U dcref , and obtain the reference current I dcref ; The PLL phase-locked loop is used to adjust the grid voltage v g , get the angle signal θ; The current inner loop QPR controller is used to control the reference current I dcref and the angle signal θ, the reference grid-connected current i is obtained dcref According to the grid-connected current i g and the reference grid current i dcref , get the command signal.

10. A computer-readable storage medium having a computer program / instruction stored thereon, characterized in that: When the computer program / instruction is executed by a processor, the steps of the non-isolated inverter leakage current suppression method described in any one of claims 1-7 are implemented.

11. A computer device, comprising: Memory, for storing computer programs / instructions; A processor, configured to execute the computer program / instructions to implement the steps of the non-isolated inverter leakage current suppression method according to any one of claims 1 to 7.

12. A computer program product comprising a computer program / instructions, characterized in that When the computer program / instruction is executed by a processor, the steps of the non-isolated inverter leakage current suppression method described in any one of claims 1 to 7 are implemented.

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