Image sensor based on semi-insulating gallium arsenide substrate and manufacturing method thereof

Abstract

The invention belongs to the technical field of semiconductor manufacturing processes, and discloses an image sensor based on a semi-insulating gallium arsenide substrate and a manufacturing method thereof, the image sensor comprises a semi-insulating gallium arsenide substrate, a germanium electrode layer, a germanium absorption layer, a P-type charge layer, a gallium arsenide avalanche layer, a gallium arsenide electrode layer and a passivation layer which are stacked in sequence; the gallium arsenide avalanche layer adopts a superlattice structure or a quantum well structure; a plurality of rectangular grooves which have the same shape and are distributed at preset intervals penetrate through the gallium arsenide electrode layer, the gallium arsenide avalanche layer and the germanium absorption layer in sequence; the P-type charge layer is located between two adjacent rectangular grooves and embedded into the germanium absorption layer, and the length of the P-type charge layer is smaller than a preset interval; and the passivation layer uniformly covers the gallium arsenide electrode layer and the inner wall of each rectangular groove. According to the invention, dark current and excess noise can be reduced, and the signal-to-noise ratio, sensitivity and photon detection efficiency of the sensor are improved.

Description

Technical Field

[0001] The present application relates to the field of semiconductor manufacturing process technology, and in particular to an image sensor based on a semi-insulating gallium arsenide substrate and a manufacturing method thereof. Background Art

[0002] Single-photon avalanche photodetectors (SPADs) are known for their high sensitivity and can accurately detect the energy of a single photon. In traditional silicon-based germanium SPAD image sensors, the significant lattice mismatch and thermal mismatch between silicon and germanium will seriously affect the image sensor's dark current, dark count rate, noise, accuracy, and energy consumption. For this reason, current image sensors have begun to use semi-insulating gallium arsenide as a substrate and germanium as an epitaxial layer. Because the semi-insulating gallium arsenide material and germanium material are highly matched in lattice constant (both 5.65754 Å) and thermal expansion coefficient (both 6.0x10^-6 / K), the image sensor's excellent heterogeneous interface quality is ensured, while also reducing the image sensor's dark current and dark count rate.

[0003] However, existing photodetectors based on semi-insulating GaAs substrates directly use GaAs as the avalanche layer. Due to the random collision ionization process of carriers under a strong electric field, the GaAs avalanche layer will generate large noise during the avalanche multiplication process, thereby limiting the signal-to-noise ratio and detection sensitivity of the device; secondly, the absorption layer of existing photodetectors based on semi-insulating GaAs substrates is arranged above the avalanche layer, which reduces the detection efficiency of the absorption layer for photons. Summary of the invention

[0004] The present application provides an image sensor based on a semi-insulating gallium arsenide substrate and a method for manufacturing the same, which can reduce dark current and excess noise, and improve the signal-to-noise ratio, sensitivity and photon detection efficiency of the sensor.

[0005] In a first aspect, the present application provides an image sensor based on a semi-insulating gallium arsenide substrate, comprising: N-type electrode, P-type electrode and readout circuit, and sequentially stacked semi-insulating gallium arsenide substrate, germanium electrode layer, germanium absorption layer, P-type charge layer, gallium arsenide avalanche layer, gallium arsenide electrode layer and passivation layer; The gallium arsenide avalanche layer adopts a superlattice structure or a quantum well structure; A plurality of rectangular grooves of the same shape and distributed at preset intervals sequentially penetrate the gallium arsenide electrode layer, the gallium arsenide avalanche layer and the germanium absorption layer; the P-type charge layer is located between two adjacent rectangular grooves, embedded in the germanium absorption layer and has a length less than the preset interval; the passivation layer uniformly covers the gallium arsenide electrode layer and the inner walls of each rectangular groove; The P-type electrode is arranged in the rectangular groove, passes through the passivation layer and connects to the germanium electrode layer; the N-type electrode passes through the passivation layer and connects to the gallium arsenide electrode layer; and the readout circuit is respectively connected to the N-type electrode and the P-type electrode.

[0006] Furthermore, the germanium electrode layer is a P-type germanium electrode layer, and the thickness ranges from 100 nanometers to 500 nanometers.

[0007] Furthermore, the germanium absorption layer is a quantum well structure with a thickness ranging from 500 nanometers to 3000 nanometers.

[0008] Furthermore, the thickness of the GaAs avalanche layer ranges from 0.1 micrometers to 3 micrometers.

[0009] Furthermore, when the GaAs avalanche layer adopts a superlattice structure, the number of periods is between 60 and 400, the thickness of a single period ranges from 8 nanometers to 40 nanometers, the thickness of the barrier layer ranges from 3 nanometers to 10 nanometers, and the thickness of the well layer ranges from 5 nanometers to 30 nanometers.

[0010] Furthermore, when the GaAs avalanche layer adopts a quantum well structure, the number of periods is between 10 and 300, the thickness of a single period is greater than or equal to 15 nanometers, the thickness of the barrier layer is greater than or equal to 10 nanometers, and the thickness of the well layer ranges from 5 nanometers to 30 nanometers.

[0011] Furthermore, the gallium arsenide electrode layer is an N-type gallium arsenide electrode layer, and has a thickness ranging from 100 nanometers to 500 nanometers.

[0012] Furthermore, the germanium absorption layer is a germanium-silicon quantum well absorption layer, a germanium-tin quantum well absorption layer or a silicon-germanium-tin quantum well absorption layer.

[0013] Furthermore, the P-type charge layer is a P-type germanium charge layer or a P-type germanium silicon charge layer, and has a thickness of 100 nanometers.

[0014] In a second aspect, the present application provides a method for manufacturing an image sensor based on a semi-insulating gallium arsenide substrate, comprising: Providing a semi-insulating gallium arsenide substrate, and sequentially forming a germanium electrode layer and a germanium absorption layer on the semi-insulating gallium arsenide substrate; A plurality of P-type charge layers are formed on the germanium absorption layer by an ion implantation method; the length of the P-type charge layer is less than a preset interval, and the distance between two adjacent P-type charge layers is greater than a preset width; A gallium arsenide avalanche layer and a gallium arsenide electrode layer are sequentially formed on the germanium absorption layer and each P-type charge layer to obtain a sensor wafer; the gallium arsenide avalanche layer adopts a superlattice structure or a quantum well structure; A plurality of rectangular grooves of the same shape and distributed at preset intervals are arranged on the sensor wafer; the length of the rectangular groove is less than the preset width, and the rectangular grooves sequentially penetrate the gallium arsenide electrode layer, the gallium arsenide avalanche layer and the germanium absorption layer; A passivation layer, an N-type electrode and a P-type electrode are provided, and the N-type electrode and the P-type electrode are connected to a readout circuit.

[0015] Furthermore, the germanium electrode layer is formed by molecular beam epitaxy or chemical vapor deposition.

[0016] Furthermore, the germanium absorption layer is formed by molecular beam epitaxy or chemical vapor deposition.

[0017] Furthermore, the gallium arsenide avalanche layer is formed by molecular beam epitaxy or chemical vapor deposition.

[0018] Furthermore, the gallium arsenide electrode layer is formed by molecular beam epitaxy or chemical vapor deposition.

[0019] Furthermore, the rectangular groove is formed by wet etching or dry etching.

[0020] In summary, compared with the prior art, the technical solution provided in the embodiment of the present application has at least the following beneficial effects: The embodiment of the present application provides an image sensor based on a semi-insulating gallium arsenide substrate. First, the gallium arsenide avalanche layer of the present application adopts a superlattice structure or a quantum well structure. This structure can affect the electric field distribution by changing the barrier width and the potential well doping concentration, thereby optimizing the transport and multiplication of carriers, reducing the non-uniform distribution and random collision process of carriers in the electric field, thereby reducing dark current and excess noise, improving the signal-to-noise ratio of the sensor, significantly improving the avalanche gain of the image sensor, and enhancing its sensitivity in detecting weak light signals, making the light signal detection more accurate and reliable. Secondly, the germanium absorption layer of the present application is arranged below the gallium arsenide avalanche layer, so that photons can be directly incident on the germanium absorption layer, greatly improving the detection efficiency of photons, thereby indirectly reducing the size of the image sensor and helping to improve the resolution of the image sensor. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] Figure 1 A structural diagram of an image sensor based on a semi-insulating gallium arsenide substrate provided in an embodiment of the present application.

[0022] Figure 2 A flow chart of a method for manufacturing an image sensor based on a semi-insulating gallium arsenide substrate provided in an embodiment of the present application.

[0023] Figure 3 A schematic diagram of the structure of an image sensor wafer provided in an embodiment of the present application.

[0024] Figure 4 This is a schematic diagram of setting a rectangular groove on a sensor wafer provided in an embodiment of the present application.

[0025] Figure 5This is a diagram of the sensor structure after forming electrodes and a passivation layer according to an embodiment of the present application.

[0026] Description of reference numerals: 101. Semi-insulating gallium arsenide substrate; 102. Germanium electrode layer; 103. Germanium absorption layer; 104. P-type charge layer; 105. Gallium arsenide avalanche layer; 106. Gallium arsenide electrode layer; 107. Passivation layer; 201. P-type electrode; 202. N-type electrode; 203. Readout circuit. DETAILED DESCRIPTION

[0027] The technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all of the embodiments.

[0028] Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making any creative work shall fall within the scope of protection of this application.

[0029] See also Figure 1 The embodiment of the present application provides an image sensor based on a semi-insulating gallium arsenide substrate 101, including: an N-type electrode 202, a P-type electrode 201 and a readout circuit 203, and a semi-insulating gallium arsenide substrate 101, a germanium electrode layer 102, a germanium absorption layer 103, a P-type charge layer 104, a gallium arsenide avalanche layer 105, a gallium arsenide electrode layer 106 and a passivation layer 107 stacked in sequence.

[0030] Among them, the semi-insulating gallium arsenide substrate 101 is a SI-GaAs substrate, which achieves extremely high resistivity (usually greater than 1e10^7Ω·cm) by removing impurities in the GaAs crystal, especially shallow energy level impurities, effectively reducing the dark current and dark count rate of the image sensor and reducing parasitic effects. In addition, the band gap of SI-GaAs is about 1.42eV, which can give it good transmittance in the infrared light region, further improving the photon detection efficiency of the germanium absorption layer 103.

[0031] Furthermore, the germanium electrode layer 102 may be a P-type germanium electrode layer with a thickness ranging from 100 nanometers to 500 nanometers.

[0032] The GaAs electrode layer 106 may be an N-type GaAs electrode layer with a thickness ranging from 100 nanometers to 500 nanometers.

[0033] The GaAs avalanche layer 105 adopts a superlattice structure or a quantum well structure.

[0034] The thickness of the gallium arsenide avalanche layer 105 ranges from 0.1 micrometers to 3 micrometers. Specifically, when the gallium arsenide avalanche layer 105 adopts a superlattice structure, the number of periods is between 60 and 400, the thickness of a single period ranges from 8 nanometers to 40 nanometers, the thickness of the barrier layer ranges from 3 nanometers to 10 nanometers, and the thickness of the potential well layer ranges from 5 nanometers to 30 nanometers. When the gallium arsenide avalanche layer 105 adopts a quantum well structure, the number of periods is between 10 and 300, the thickness of a single period is greater than or equal to 15 nanometers, the thickness of the barrier layer is greater than or equal to 10 nanometers, and the thickness of the potential well layer ranges from 5 nanometers to 30 nanometers.

[0035] Specifically, the quantum well structure or superlattice structure not only enhances the impact ionization ability of electrons and holes in the avalanche layer, improves the avalanche gain and sensitivity, reduces the excess noise factor, and improves the signal-to-noise ratio, but the electron potential barrier therein also limits the movement of carriers, so that the avalanche multiplication effect can be achieved at a lower operating voltage, reducing the multiplication voltage while maintaining high sensitivity.

[0036] A plurality of rectangular grooves of the same shape and distributed at preset intervals sequentially penetrate the gallium arsenide electrode layer 106, the gallium arsenide avalanche layer 105 and the germanium absorption layer 103; the P-type charge layer 104 is located between two adjacent rectangular grooves, embedded in the germanium absorption layer 103 and has a length less than the preset interval; the passivation layer 107 uniformly covers the gallium arsenide electrode layer 106 and the inner walls of each rectangular groove.

[0037] The P-type charge layer 104 may be a P-type germanium charge layer or a P-type germanium silicon charge layer, and has a thickness of 100 nanometers.

[0038] Specifically, Figure 1 As shown, the P-type charge layer 104 is embedded on the germanium absorption layer 103 and buried deep inside the material, which effectively reduces the electrical interference and surface leakage current between each mesa (ie, between adjacent pixels), and performs particularly well in a high temperature environment.

[0039] The P-type electrode 201 is disposed in the rectangular groove and passes through the passivation layer 107 to connect to the germanium electrode layer 102 ; the N-type electrode 202 passes through the passivation layer 107 to connect to the gallium arsenide electrode layer 106 ; the readout circuit 203 is respectively connected to the N-type electrode 202 and the P-type electrode 201 .

[0040] The above embodiment provides an image sensor based on a semi-insulating gallium arsenide substrate. First, the gallium arsenide avalanche layer 105 of the present application adopts a superlattice structure or a quantum well structure. This structure can affect the electric field distribution by changing the barrier width and the potential well doping concentration, thereby optimizing the transport and multiplication of carriers, reducing the non-uniform distribution and random collision process of carriers in the electric field, thereby reducing dark current and excess noise, improving the signal-to-noise ratio of the sensor, significantly improving the avalanche gain of the image sensor, and enhancing its sensitivity in detecting weak light signals, making the light signal detection more accurate and reliable. Secondly, the germanium absorption layer 103 of the present application is arranged below the gallium arsenide avalanche layer 105, so that photons can be directly incident on the germanium absorption layer 103, greatly improving the detection efficiency of photons, thereby indirectly reducing the size of the image sensor and helping to improve the resolution of the image sensor.

[0041] In some embodiments, the germanium absorption layer 103 is a quantum well structure with a thickness ranging from 500 nanometers to 3000 nanometers.

[0042] The germanium absorption layer 103 may be a germanium-silicon quantum well absorption layer, a germanium-tin quantum well absorption layer, or a silicon-germanium-tin quantum well absorption layer.

[0043] Specifically, the absorption layer of the quantum well structure can strongly confine carriers in a very small space. This confinement significantly reduces the mechanisms that cause dark current, such as non-radiative recombination and tunneling. At the same time, strong carrier confinement also increases the probability of interaction between carriers and incident photons, which not only helps to further reduce the dark count rate, but also significantly improves the single-photon detection efficiency. In addition, the electronic state and band structure in the quantum well structure are highly adjustable. By fine-tuning the well width and selecting appropriate material components, the energy of photons of different wavelengths can be matched, thereby improving the applicability and flexibility of the sensor.

[0044] See also Figure 2 Another embodiment of the present application provides a method for manufacturing an image sensor based on a semi-insulating gallium arsenide substrate 101, which may specifically include the following steps: Step S1, providing a semi-insulating gallium arsenide substrate 101, and sequentially forming a germanium electrode layer 102 and a germanium absorption layer 103 on the semi-insulating gallium arsenide substrate 101. The semi-insulating gallium arsenide substrate 101 is a SI-GaAs substrate.

[0045] Specifically, in addition to the lattice constant and thermal expansion coefficient that perfectly match germanium, the SI-GaAs substrate also has excellent thermal conductivity. It can efficiently dissipate heat during the operation of the image sensor, ensuring stable operation of the sensor even under high power and high temperature conditions, significantly improving the reliability and radiation resistance of the sensor.

[0046] The germanium electrode layer 102 may be a P-type germanium electrode layer with a thickness ranging from 100 nanometers to 500 nanometers.

[0047] The germanium absorption layer 103 is a quantum well structure, and has a thickness ranging from 500 nanometers to 3000 nanometers.

[0048] The germanium absorption layer 103 may be a germanium-silicon quantum well absorption layer, a germanium-tin quantum well absorption layer, or a silicon-germanium-tin quantum well absorption layer.

[0049] Specifically, the germanium electrode layer 102 is formed by molecular beam epitaxy or chemical vapor deposition. After the germanium electrode layer 102 is formed, the germanium absorption layer 103 is epitaxially grown on the germanium electrode layer 102 by molecular beam epitaxy or chemical vapor deposition.

[0050] Step S2, forming a plurality of P-type charge layers 104 on the germanium absorption layer 103 by ion implantation; the length of the P-type charge layer 104 is less than the preset interval, and the distance between two adjacent P-type charge layers 104 is greater than the preset width.

[0051] The P-type charge layer 104 may be a P-type germanium charge layer or a P-type germanium silicon charge layer, and has a thickness of 100 nanometers.

[0052] Step S3, sequentially forming a gallium arsenide avalanche layer 105 and a gallium arsenide electrode layer 106 on the germanium absorption layer 103 and each P-type charge layer 104 to obtain a sensor wafer; the gallium arsenide avalanche layer 105 adopts a superlattice structure or a quantum well structure.

[0053] See also Figure 3 The GaAs electrode layer 106 may be an N-type GaAs electrode layer 106 with a thickness ranging from 100 nanometers to 500 nanometers. Specifically, the GaAs avalanche layer 105 and the GaAs electrode layer 106 may be epitaxially formed on the next layer region by molecular beam epitaxy (MBE) or chemical vapor deposition (CVD).

[0054] When the GaAs avalanche layer 105 adopts a superlattice structure, the number of periods is between 60 and 400, the thickness of a single period ranges from 8 nanometers to 40 nanometers, the thickness of the barrier layer ranges from 3 nanometers to 10 nanometers, and the thickness of the potential well layer ranges from 5 nanometers to 30 nanometers. When the GaAs avalanche layer 105 adopts a quantum well structure, the number of periods is between 10 and 300, the thickness of a single period is greater than or equal to 15 nanometers, the thickness of the barrier layer is greater than or equal to 10 nanometers, and the thickness of the potential well layer ranges from 5 nanometers to 30 nanometers.

[0055] The above parameter restrictions on the GaAs avalanche layer 105 of the superlattice structure and the quantum well structure can optimize the energy band structure of the GaAs avalanche layer 105. In particular, the thickness restriction of the potential well layer can ensure that electrons and holes are confined in different potential wells, thereby minimizing the possibility of recombination, thereby reducing dark current and noise, and ensuring that the image sensor has an optimal signal-to-noise ratio.

[0056] Step S4, setting a plurality of rectangular grooves of the same shape and distributed at preset intervals on the sensor wafer; the length of the rectangular groove is smaller than the preset width, and passes through the gallium arsenide electrode layer 106, the gallium arsenide avalanche layer 105 and the germanium absorption layer 103 in sequence.

[0057] The rectangular groove can be formed by wet etching or dry etching. Figure 4 The rectangular groove penetrates through the three semiconductor layers and reaches the germanium electrode layer 102 to ensure that the germanium electrode layer 102 is exposed, so that the subsequently arranged N-type electrode 202 can pass through the passivation layer 107 and connect to the germanium electrode layer 102 .

[0058] The rectangular groove is disposed between the two P-type charge layers 104 to ensure that the sidewalls of the rectangular groove do not expose the P-type charge layers 104 , so that the image sensor forms a planar structure and avoids leakage of leakage current.

[0059] Step S5, providing a passivation layer 107, an N-type electrode 202 and a P-type electrode 201, and connecting the N-type electrode 202 and the P-type electrode 201 to a readout circuit 203. Figure 5 The P-type electrode 201 is disposed in the rectangular groove and passes through the passivation layer 107 to connect to the germanium electrode layer 102; the N-type electrode 202 passes through the passivation layer 107 to connect to the gallium arsenide electrode layer 106; and the readout circuit 203 is respectively connected to the N-type electrode 202 and the P-type electrode 201.

[0060] The passivation layer 107 may be formed of InGaP (Indium Gallium Phosphide) material or organic sulfur molecules.

[0061] The provision of the passivation layer 107 can reduce the surface leakage current of the device, reduce the influence of surface oxides and impurity defects on the material, and reduce the Fermi pinning phenomenon caused by high-concentration surface states in the band gap, thereby improving the sensitivity of the detector.

[0062] In the production process, the flip-chip technology may be used to perform In bump bonding or Cu bump bonding on the readout circuit 203 and the SPAD focal plane array chip on the SI-GaAs sensor wafer.

[0063] The technical features of the above embodiments may be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0064] The above-mentioned embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the invention patent. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent of the present application shall be subject to the attached claims.

Claims

1. An image sensor based on a semi-insulating gallium arsenide substrate, characterized in that: include: N-type electrode, P-type electrode and readout circuit, and sequentially stacked semi-insulating gallium arsenide substrate, germanium electrode layer, germanium absorption layer, P-type charge layer, gallium arsenide avalanche layer, gallium arsenide electrode layer and passivation layer; The gallium arsenide avalanche layer adopts a superlattice structure or a quantum well structure; A plurality of rectangular grooves of the same shape and distributed at preset intervals sequentially penetrate the gallium arsenide electrode layer, the gallium arsenide avalanche layer and the germanium absorption layer; the P-type charge layer is located between two adjacent rectangular grooves, embedded in the germanium absorption layer and has a length less than the preset interval; the passivation layer uniformly covers the gallium arsenide electrode layer and the inner walls of each rectangular groove; The P-type electrode is arranged in the rectangular groove, passes through the passivation layer and is connected to the germanium electrode layer; the N-type electrode passes through the passivation layer and is connected to the gallium arsenide electrode layer; the readout circuit is respectively connected to the N-type electrode and the P-type electrode.

2. The image sensor based on a semi-insulating gallium arsenide substrate according to claim 1, characterized in that: The germanium electrode layer is a P-type germanium electrode layer, and the thickness ranges from 100 nanometers to 500 nanometers.

3. The image sensor based on a semi-insulating gallium arsenide substrate according to claim 1, characterized in that: The germanium absorption layer is a quantum well structure with a thickness ranging from 500 nanometers to 3000 nanometers.

4. The image sensor based on a semi-insulating gallium arsenide substrate according to claim 1, characterized in that: The thickness of the GaAs avalanche layer ranges from 0.1 micrometers to 3 micrometers.

5. The image sensor based on a semi-insulating gallium arsenide substrate according to claim 4, characterized in that: When the GaAs avalanche layer adopts a superlattice structure, the number of periods is between 60 and 400, the thickness of a single period ranges from 8 nanometers to 40 nanometers, the thickness of the barrier layer ranges from 3 nanometers to 10 nanometers, and the thickness of the well layer ranges from 5 nanometers to 30 nanometers.

6. The image sensor based on a semi-insulating gallium arsenide substrate according to claim 4, characterized in that: When the GaAs avalanche layer adopts a quantum well structure, the number of periods is between 10 and 300, the thickness of a single period is greater than or equal to 15 nanometers, the thickness of the barrier layer is greater than or equal to 10 nanometers, and the thickness of the well layer ranges from 5 nanometers to 30 nanometers.

7. The image sensor based on a semi-insulating gallium arsenide substrate according to claim 1, characterized in that: The gallium arsenide electrode layer is an N-type gallium arsenide electrode layer, and the thickness ranges from 100 nanometers to 500 nanometers.

8. The image sensor based on a semi-insulating gallium arsenide substrate according to claim 3, characterized in that: The germanium absorption layer is a germanium-silicon quantum well absorption layer, a germanium-tin quantum well absorption layer or a silicon-germanium-tin quantum well absorption layer.

9. The image sensor based on a semi-insulating gallium arsenide substrate according to claim 1, characterized in that: The P-type charge layer is a P-type germanium charge layer or a P-type germanium silicon charge layer, and has a thickness of 100 nanometers.

10. A method for manufacturing an image sensor based on a semi-insulating gallium arsenide substrate, characterized in that: include: Providing a semi-insulating gallium arsenide substrate, and sequentially forming a germanium electrode layer and a germanium absorption layer on the semi-insulating gallium arsenide substrate; A plurality of P-type charge layers are formed on the germanium absorption layer by an ion implantation method; the length of the P-type charge layer is less than a preset interval, and the distance between two adjacent P-type charge layers is greater than a preset width; A gallium arsenide avalanche layer and a gallium arsenide electrode layer are sequentially formed on the germanium absorption layer and each of the P-type charge layers to obtain a sensor wafer; the gallium arsenide avalanche layer adopts a superlattice structure or a quantum well structure; A plurality of rectangular grooves having the same shape and distributed at the preset intervals are arranged on the sensor wafer; the length of the rectangular groove is less than the preset width, and the rectangular grooves sequentially penetrate the gallium arsenide electrode layer, the gallium arsenide avalanche layer and the germanium absorption layer; A passivation layer, an N-type electrode and a P-type electrode are provided, and the N-type electrode and the P-type electrode are connected to a readout circuit.

11. The method for manufacturing an image sensor based on a semi-insulating gallium arsenide substrate according to claim 10, characterized in that: The germanium electrode layer is formed by molecular beam epitaxy or chemical vapor deposition.

12. The method for manufacturing an image sensor based on a semi-insulating gallium arsenide substrate according to claim 10, characterized in that: The germanium absorption layer is formed by molecular beam epitaxy or chemical vapor deposition.

13. The method for manufacturing an image sensor based on a semi-insulating gallium arsenide substrate according to claim 10, characterized in that: The gallium arsenide avalanche layer is formed by molecular beam epitaxy or chemical vapor deposition.

14. The method for manufacturing an image sensor based on a semi-insulating gallium arsenide substrate according to claim 10, characterized in that: The gallium arsenide electrode layer is formed by molecular beam epitaxy or chemical vapor deposition.

15. The method for manufacturing an image sensor based on a semi-insulating gallium arsenide substrate according to claim 10, characterized in that: The rectangular groove is formed by wet etching or dry etching.

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