Virtual machine instruction conversion method and device, electronic equipment and storage medium

Abstract

The invention discloses a virtual machine instruction conversion method and device, electronic equipment and a storage medium. The method comprises the following steps: splitting a first executable file of the 16-bit virtual machine to obtain a plurality of components, and determining a first method component from the plurality of components; splitting the first method component to obtain a plurality of executable methods; performing instruction screening processing in the instruction sequences of all the executable methods to obtain a target integer instruction comprising an integer variable; reconstructing a target integer instruction, and modifying the number of transmitted parameters to obtain a reconstructed target integer instruction; and on the basis of all instructions including the reconstructed target integer instruction, instruction rearrangement processing, instruction updating processing and method component generation processing are performed in sequence, and a second executable file used in the 32-bit virtual machine is generated on the basis of a regenerated second method component. Incompatible instructions in the first executable file of the 16-bit virtual machine can be conveniently and effectively converted and reconstructed, and the second executable file suitable for the 32-bit virtual machine is obtained.

Description

Technical Field

[0001] The present application relates to the field of virtual machine technology, and in particular to a virtual machine instruction conversion method and its device, electronic device, and storage medium. Background Art

[0002] Server virtualization technology is a key technology based on the infrastructure layer in cloud computing. By virtualizing physical servers, multiple virtual machines (virtual operating systems) can be deployed on a single physical node to improve the resource utilization of physical servers and reduce the cost of use. In resource-constrained micro-operating systems, the space of ROM (Read-Only Memory) and RAM (Random Access Memory) is often small. In order to save the RAM space occupied by the method runtime, each virtual register in the micro-operating system is designed to occupy 16 bits, that is, the basic data types byte, short, and boolean each occupy a 16-bit register, and an int type of data occupies two consecutive 16-bit registers (i.e., a register pair). The virtual machine that supports this design is called a 16-bit virtual machine. Similarly, a virtual machine with a register occupying 32 bits is called a 32-bit virtual machine. As business needs continue to change, int and long data types have become the main basic data types. If a 16-bit virtual machine is still used, a long data type needs to occupy four consecutive virtual registers, which increases the difficulty of register allocation, instruction optimization, and virtual machine value acquisition and storage for the reduced register instruction set (that is, half a byte is used in the instruction to represent the register number, and the register number is 0-15). It will be more advantageous to run the reduced register instruction set on a 32-bit virtual machine.

[0003] However, the reduced instruction set based on virtual machine registers and the 16-bit virtual machine are part of the domestic operating system, and the current design is only designed for the 16-bit virtual machine. As an enhanced version of the 16-bit virtual machine, the 32-bit virtual machine is incompatible with the reduced instruction set. Generally, the reduced instruction set of the virtual machine register can be made compatible with the 32-bit virtual machine by recompiling the source code, but this processing method is relatively complex. Specifically, the incompatible instructions mainly involve method call instructions. In the 16-bit virtual machine, the method parameters are calculated by the number of registers occupied when the method is passed. According to the declaration of the executable file method header generated after the same source code is compiled for different target virtual machines, the executable file in the 16-bit virtual machine is called the v1 version EF, and the total executable file of the 32-bit virtual machine is called the v2 version EF; the number of parameters passed during method calls is inconsistent, which will cause the parameter check in the virtual machine to fail when the v1 and v2 versions of the method call each other, resulting in operation failure. However, there is currently no more effective instruction conversion method for 32-bit virtual machines. Summary of the invention

[0004] The present application aims to solve at least one of the technical problems existing in the prior art. To this end, the present application proposes a virtual machine instruction conversion method and its device, electronic device, and storage medium, which can conveniently and effectively convert and reconstruct incompatible instructions in a first executable file of a 16-bit virtual machine to obtain a second executable file suitable for a 32-bit virtual machine.

[0005] In a first aspect, an embodiment of the present application provides a method for converting a virtual machine instruction, comprising:

[0006] Identifying a first executable file in a 16-bit virtual machine, splitting the first executable file into multiple components, and determining a first method component from the multiple components;

[0007] Splitting the first method component to obtain a plurality of executable methods; wherein each of the executable methods includes a method header and an instruction sequence;

[0008] Perform instruction screening processing in the instruction sequences of all the executable methods to obtain target integer instructions including integer variables;

[0009] Reconstructing the target integer instruction, modifying the number of parameters passed, and obtaining a reconstructed target integer instruction;

[0010] Based on all instructions including the reconstructed target integer instruction, sequentially perform instruction reordering, instruction updating, and method component generation to obtain a regenerated second method component;

[0011] A second executable file for the 32-bit virtual machine is regenerated based on the second method component.

[0012] According to some embodiments of the present application, when the multiple components do not include a descriptor component and a debugging component; the first method component is split to obtain multiple executable methods, including:

[0013] According to the method component structure, the method structure, and the instruction structure, the first method component is analyzed byte by byte to obtain the starting position, instruction size information, and function end position of each executable method;

[0014] According to the starting position, the instruction size information and the function end position of each executable method, the first method component is split to obtain a plurality of the executable methods.

[0015] According to some embodiments of the present application, the method component structure, the method structure, and the instruction structure are analyzed byte by byte to obtain the starting position, instruction size information, and function end position of each executable method, including:

[0016] According to the method component structure, an exception table entry is analyzed from the first method component, and relative offset information of the executable method is obtained from the exception table entry;

[0017] According to the method structure, determining a starting position and a method header based on a base address of the first method component and the relative offset information;

[0018] Determine an executable method to be analyzed based on the starting position, and determine an instruction sequence of the executable method to be analyzed based on the method header;

[0019] According to the instruction structure, all instructions in the instruction sequence are analyzed and processed by instruction type and offset, and the instruction size information and the end position of the function are determined, so as to split the first method array according to the instruction size information and the end position of the function to obtain one of the executable methods;

[0020] After analyzing one of the executable methods, continue to analyze the first method components byte by byte based on the start position, instruction size information and function end position of each executable method obtained through analysis.

[0021] According to some embodiments of the present application, when the multiple components include a descriptor component and a debugging component; the first method component is split to obtain multiple executable methods, including:

[0022] Retrieve the descriptor component and the debug component from the plurality of components;

[0023] Acquire method size information and offset information of each defined executable method from the descriptor component and the debugging component;

[0024] The first method component is split according to the method size information and the offset information to obtain the multiple executable methods.

[0025] According to some embodiments of the present application, the step of performing instruction screening in the instruction sequences of all the executable methods to obtain a target integer instruction including an integer variable includes:

[0026] Traversing the instruction sequences of all the executable methods to determine candidate integer instructions;

[0027] Extracting variables used and defined in the candidate integer instruction, and when it is determined that the variable is used by a method call instruction, determining that the candidate integer instruction includes an integer parameter;

[0028] After performing variable analysis processing on all the candidate integer instructions, the candidate integer instruction including the integer parameter is determined as the target integer instruction.

[0029] According to some embodiments of the present application, the method of sequentially performing instruction reordering, instruction updating, and method component generation based on all instructions including the reconstructed target integer instruction to obtain a regenerated second method component includes:

[0030] Rearranging all instructions including the reconstructed target integer instruction to obtain a rearranged instruction sequence;

[0031] Traversing all instructions in the rearranged instruction sequence, determining a plurality of control transfer instructions and target jump instructions indicated by the control transfer instructions;

[0032] Generate a first position label for each of the control transfer instructions, and generate a second position label for the corresponding target jump instruction indicated by the control transfer instruction;

[0033] Recalculating effective offset information between the corresponding control transfer instruction and the target jump instruction according to the first position tag and the second position tag;

[0034] Recalculating instruction size update information of the control transfer instruction, and updating instruction header information of the control transfer instruction according to the effective offset information and the instruction size update information to obtain an updated control transfer instruction;

[0035] After obtaining the updated control transfer instruction, regenerate the method content, recalculate the number of parameters in the method content, update the method header information, and generate a new executable target method based on the method content and the method header information;

[0036] Based on the new executable target method, the second method component is generated.

[0037] According to some embodiments of the present application, splitting the first executable file into multiple components includes:

[0038] Obtaining a first header component from the first executable file;

[0039] The executable file is split according to the starting position and size of each component recorded in the first header component to obtain the multiple components of different types.

[0040] In a second aspect, an embodiment of the present application provides a virtual machine instruction conversion device, comprising at least one processor and a memory for communicating with the at least one processor; the memory stores instructions that can be executed by the at least one processor, and the instructions are executed by the at least one processor so that the at least one processor can execute the virtual machine instruction conversion method as described in any one of the embodiments of the first aspect.

[0041] In a third aspect, an embodiment of the present application provides an electronic device, comprising the virtual machine instruction conversion device as described in the embodiment of the second aspect.

[0042] In a fourth aspect, an embodiment of the present application provides a computer-readable storage medium, wherein the computer-readable storage medium stores computer-executable instructions, and the computer-executable instructions are used to enable a computer to execute the virtual machine instruction conversion method as described in any one of the embodiments of the first aspect.

[0043] The embodiment of the present application includes: in the process of converting instructions in a 16-bit virtual machine that are incompatible with a 32-bit virtual machine, first, identifying a first executable file in the 16-bit virtual machine, splitting the first executable file into multiple components, and determining a first method component from the multiple components; then, splitting the first method component to obtain multiple executable methods; wherein each executable method includes a method header and an instruction sequence; then, performing instruction screening processing in the instruction sequences of all executable methods to obtain a target integer instruction including an integer variable; reconstructing the target integer instruction, modifying the number of parameters passed, and obtaining a reconstructed target integer instruction; then, based on the reconstructed All instructions of the target integer instruction after the construction are sequentially subjected to instruction reordering, instruction updating, and method component generation processing to obtain a regenerated second method component; finally, a second executable file for a 32-bit virtual machine is regenerated based on the second method component; without using the source code and only using the first executable file in the 16-bit virtual machine, the instructions in the first executable file that are incompatible with the 32-bit virtual machine are conveniently and effectively converted and reconstructed to obtain a second executable file, thereby avoiding the complexity of recompiling the source code and protecting the privacy of the source code; and the second executable file can run on a 32-bit virtual machine to improve data processing efficiency and meet changes in business needs. That is to say, the embodiment of the present application can conveniently and effectively convert and reconstruct the incompatible instructions in the first executable file of the 16-bit virtual machine to obtain a second executable file suitable for a 32-bit virtual machine.

[0044] Other features and advantages of the present application will be described in the following description, and partly become apparent from the description, or understood by practicing the present application. The purpose and other advantages of the present application can be realized and obtained through the structures particularly pointed out in the description and the drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0045] Figure 1 This is a schematic diagram of the steps of a virtual machine instruction conversion method provided by an embodiment of the present application;

[0046] Figure 2 This is a schematic diagram of method frame data representation of the same variable in different virtual machines provided by an embodiment of the present application;

[0047] Figure 3 It is a schematic diagram of an abnormality check when passing parameters of a method provided by an embodiment of the present application;

[0048] Figure 4 It is a specific flow chart of performing instruction type analysis and offset analysis on all instructions in an instruction sequence one by one, provided by an embodiment of the present application;

[0049] Figure 5 It is a hardware structure diagram of a virtual machine instruction conversion device provided by an embodiment of the present application. DETAILED DESCRIPTION

[0050] In order to make the objectives, technical solutions and advantages of the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments.

[0051] It should be understood that in the description of the present application, the orientation descriptions, such as up, down, front, back, left, right, etc., indicating orientations or positional relationships, are based on the orientations or positional relationships shown in the drawings, and are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation on the present application.

[0052] It should be noted that although a logical order is shown in the flowchart in the description of the present application, in some cases, the steps shown or described may be performed in an order different from that in the flowchart. In the description of the present application, a number of means one or more, and a plurality of means two or more. The description of "first" and "second" is only used for the purpose of distinguishing technical features, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features or implicitly indicating the order of the indicated technical features.

[0053] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used herein are only for the purpose of describing the embodiments of this application and are not intended to limit this application.

[0054] The present application provides a method for converting virtual machine instructions and its device, electronic device, and storage medium. The method includes: splitting a first executable file of a 16-bit virtual machine into multiple components, determining a first method component from the multiple components; splitting the first method component into multiple executable methods; performing instruction screening processing in the instruction sequence of all executable methods to obtain a target integer instruction including an integer variable; reconstructing the target integer instruction, modifying the number of parameters passed, and obtaining a reconstructed target integer instruction; based on all instructions including the reconstructed target integer instruction, sequentially performing instruction reordering processing, instruction updating processing, and method component generation processing, and generating a second executable file for a 32-bit virtual machine based on the regenerated second method component. The method can conveniently and effectively convert and reconstruct incompatible instructions in the first executable file of a 16-bit virtual machine to obtain a second executable file suitable for a 32-bit virtual machine.

[0055] The embodiments of the present application are further described below in conjunction with the accompanying drawings.

[0056] First, as Figure 1 As shown, the virtual machine instruction conversion method may include but is not limited to steps S110 to S160.

[0057] Step S110: identifying a first executable file in a 16-bit virtual machine, splitting the first executable file into multiple components, and determining a first method component from the multiple components.

[0058] Step S120: split the first method component to obtain multiple executable methods; each executable method includes a method header and an instruction sequence.

[0059] Step S130: Perform instruction screening processing in the instruction sequences of all executable methods to obtain target integer instructions including integer variables.

[0060] Step S140: reconstruct the target integer instruction, modify the number of passed parameters, and obtain a reconstructed target integer instruction.

[0061] Step S150: Based on all instructions including the reconstructed target integer instruction, instruction reordering processing, instruction updating processing, and method component generation processing are performed in sequence to obtain a regenerated second method component.

[0062] Step S160: regenerate a second executable file for the 32-bit virtual machine based on the second method component.

[0063] It can be understood that the first executable file in the 16-bit virtual machine is called version v1 EF, and the second executable file in the 32-bit virtual machine is called version v2 EF.

[0064] Specifically, an executable file usually contains: a header component, a class component, a method component (ie, a method component), a constant pool component, a static field component, an export component, a descriptor component, and the like.

[0065] In step S160, it can be understood that when the method component changes, other components related to the method component will be updated based on the method component, and new components will be regenerated accordingly, and the second executable file will be regenerated according to each new component.

[0066] It is understandable that the embodiment of the present application converts incompatible instructions, and the incompatible instructions mainly involve method call instructions. In a 16-bit virtual machine, when passing parameters to a method, the parameters of the method are calculated by the number of registers occupied. Figure 2 and Figure 3 As shown in the figure, for example, a method is declared as test(byte a1, boolean a2, short a3, int a4), then the number of parameters of this method is 4, but when processed in a 16-bit virtual machine, it is considered to be 5 16-bit variables, and in a 32-bit virtual machine, it is considered to be 4 32-bit variables. That is, according to different target virtual machines, the declaration of the method header of the executable file generated after the same source code is compiled, the number of parameters passed when the method is called is inconsistent, which will cause the parameter check in the virtual machine to fail when the methods of the v1 version of EF and the v2 version of EF are called each other, resulting in a run failure.

[0067] The embodiment of the present application, through steps S110 to S160, in the process of converting instructions in the 16-bit virtual machine that are incompatible with the 32-bit virtual machine, firstly, identifies a first executable file in the 16-bit virtual machine, splits the first executable file into multiple components, and determines a first method component from the multiple components; then, splits the first method component to obtain multiple executable methods; wherein each executable method includes a method header and an instruction sequence; then, performs instruction screening processing in the instruction sequences of all executable methods to obtain a target integer instruction including an integer variable; reconstructs the target integer instruction, modifies the number of parameters passed, and obtains the reconstructed target integer instruction; then, Then, based on all instructions including the reconstructed target integer instruction, instruction reordering processing, instruction update processing, and method component generation processing are performed in sequence to obtain a regenerated second method component; finally, a second executable file for a 32-bit virtual machine is regenerated based on the second method component; without using the source code and only using the first executable file in the 16-bit virtual machine, the instructions in the first executable file that are incompatible with the 32-bit virtual machine are conveniently and effectively converted and reconstructed to obtain a second executable file, thereby avoiding the complexity of recompiling the source code and protecting the privacy of the source code; and the second executable file can run on a 32-bit virtual machine to improve data processing efficiency and meet changes in business needs. That is to say, the embodiment of the present application can conveniently and effectively convert and reconstruct the incompatible instructions in the first executable file of the 16-bit virtual machine to obtain a second executable file suitable for a 32-bit virtual machine.

[0068] According to some embodiments of the present application, step S110 is further described, wherein the first executable file is split into multiple components, including: obtaining a first header component from the first executable file; splitting the executable file according to the starting position and component size of each component recorded in the first header component to obtain multiple components of different types. According to the information recorded in the obtained first header component, the first executable file is quickly split into multiple components to facilitate the acquisition of the method component.

[0069] It should be noted that there may be two situations in which the multiple components obtained after splitting the first executable file are: first, the multiple components obtained by splitting include descriptor components and debugging components; second, the multiple components obtained by splitting do not include descriptor components and debugging components. In view of these two situations, the embodiment of the present application provides two different ways of splitting the first method component. The way of splitting the first method component provided in the embodiment of the present application is described.

[0070] According to some embodiments of the present application, when the multiple components include a descriptor component and a debugging component; step S120 is further described, step S120: the first method component is split to obtain multiple executable methods, including but not limited to steps S210 to S230.

[0071] Step S210: Acquire a descriptor component and a debugging component from multiple components.

[0072] Step S220: Obtain method size information and offset information of each defined executable method from the descriptor component and the debugging component.

[0073] Step S230: split the first method component according to the method size information and the offset information to obtain multiple executable methods.

[0074] Specifically, the offset information refers to: the offset of the executable method relative to the base position in the first method component.

[0075] Through steps S210 to S230, when the multiple components obtained by splitting include descriptor components and debug components, the method size information and offset information are directly obtained from the descriptor components and debug components, providing reliable reference information for the subsequent splitting of method components, and the first method component is split based on the reference information to obtain multiple executable methods, thereby ensuring the accuracy of component splitting.

[0076] According to some embodiments of the present application, when the multiple components do not include a descriptor component and a debugging component; step S120 is further described. Step S120: split the first method component to obtain multiple executable methods, including but not limited to steps S310 to S320.

[0077] Step S310: According to the method component structure, method structure, and instruction structure, the first method component is analyzed byte by byte to obtain the starting position, instruction size information, and function end position of each executable method.

[0078] Step S320: split the first method component according to the starting position, instruction size information and function end position of each executable method to obtain multiple executable methods.

[0079] Specifically, the method component structure includes: an exception table entry and multiple executable methods. It is understandable that the present application only lists the method component structure required to be used in the embodiments of the present application, and the method component structure also includes other components, which will not be repeated here.

[0080] Specifically, the method structure includes: a method header and an instruction sequence; wherein the instruction sequence includes multiple instructions.

[0081] Specifically, the instruction structure includes: an operation code and a number of operands. Among them, the operation code is used to characterize the instruction type of the instruction, and the operand is used to characterize the instruction operation content of the instruction. It is understandable that both the operation code and the operand have a certain field length, and the overall instruction will occupy a certain number of bytes. The instruction size information in the embodiment of the present application refers to: the number of bytes occupied by the instruction.

[0082] According to some embodiments of the present application, step S310 is further described. Step S310: according to the method component structure, method structure, and instruction structure, the first method component is analyzed byte by byte to obtain the starting position, instruction size information, and function end position of each executable method, including but not limited to steps S311 to S315.

[0083] Step S311: According to the method component structure, an exception table entry is analyzed from the first method component, and relative offset information of the executable method is obtained from the exception table entry.

[0084] Step S312: According to the method structure, determine the starting position and method header based on the base address and relative offset information of the first method component.

[0085] Step S313: determining the executable method to be analyzed based on the starting position, and determining the instruction sequence of the executable method to be analyzed based on the method header.

[0086] Step S314: According to the instruction structure, all instructions in the instruction sequence are analyzed and processed for instruction type and offset, and the instruction size information and the end position of the function are determined, so as to obtain an executable method from the first method array according to the instruction size information and the end position of the function.

[0087] Step S315: After analyzing an executable method, continue to analyze the first method component byte by byte based on the start position, instruction size information and function end position of each executable method obtained through analysis.

[0088] Specifically, the relative offset information of the executable method in step 311 refers to the offset of the executable method relative to the base address of the first method component. Obtaining the relative offset information can provide a reliable reference for determining the starting position of the executable method; and after determining the starting position, the method header can be determined.

[0089] It can be understood that, through step S313, the executable method to be analyzed is initially located through the starting position, and then the starting position of the instruction sequence in the executable method to be analyzed is further located according to the method header.

[0090] Combination Figure 4, further illustrating the instruction type analysis and offset analysis in step S314. Step S314 includes but is not limited to steps S401 to S411.

[0091] Step S401: After parsing the method header and the exception table entry, the maximum offset maxOffset is initialized to 0.

[0092] Step S402: Access the instruction in the instruction sequence, and record the current instruction offset insOffset of the current instruction currently accessed.

[0093] Step S403: parse the current instruction, obtain the instruction code and operand of the current instruction, and record the current instruction offset insOffset of the current instruction.

[0094] Step S404: determine whether the current instruction is a return instruction according to the instruction code; if so, jump to step S405; if not, jump to step S406.

[0095] Step S405: Determine whether the current instruction offset insOffset is equal to the maximum offset maxOffset; if so, determine that the end of the function is found and end the processing; if not, jump to step S402. It can be understood that when it is determined that the current instruction offset insOffset is equal to the maximum offset maxOffset, it means that the return instruction has reached the end of the function, and the processing can be ended. When it is determined that the current instruction offset insOffset is not equal to the maximum offset maxOffset, it means that the return instruction has not reached the end of the function, and step S402 needs to be executed to continue accessing the next instruction from the instruction sequence and analyze it as the current instruction.

[0096] Step S406: Determine whether the current instruction offset insOffset is greater than the maximum offset maxOffset; if so, jump to step S408; if not, execute steps S407 and S408 in sequence.

[0097] Step S407: Assign the maximum offset maxOffset as the offset of the next instruction.

[0098] Step S408: According to the previous instruction offset insOffset, the maximum jump offset is matched in the exception table entry; the maximum jump offset is compared with the maximum offset maxOffset and updated. Specifically, when the maximum jump offset is greater than the maximum offset maxOffset, the maximum offset maxOffset is updated to the maximum jump offset; when the maximum jump offset is not greater than the maximum offset maxOffset, the maximum offset maxOffset is maintained unchanged.

[0099] Step S409: Determine whether the current instruction is a control transfer instruction; if so, execute steps S410 and S411 in sequence; if not, jump to step S411.

[0100] Step S410: Obtain the jump offset in the control transfer instruction, and compare and update the jump offset with the maximum offset maxOffset. Specifically, when the jump offset is greater than the maximum offset maxOffset, the maximum offset maxOffset is updated to the jump offset; when the jump offset is not greater than the maximum offset maxOffset, the maximum offset maxOffset is maintained unchanged.

[0101] Step S411: Determine whether the current instruction offset insOffset is less than the updated maximum offset maxOffset; if so, jump to step S402. If not, end the process. It can be understood that when the current instruction offset insOffset is less than the updated maximum offset maxOffset, it means that the instruction has not reached the end of the function, and step S403 needs to be executed to continue accessing the next instruction from the instruction sequence and analyze it as the current instruction. Otherwise, end the process.

[0102] It can be understood that steps S401 to S411 are instruction type analysis and offset analysis for an executable method. After parsing an executable method, the remaining executable methods are analyzed based on steps S401 to S411, which will not be described in detail.

[0103] The embodiment of the present application continuously updates the maximum offset maxOffset according to the control transfer instruction through steps S401 to S411, and parses a valid executable method from the first method component according to the maximum offset maxOffset.

[0104] Through steps S310 to S320 and S311 to S315, the first method component can be analyzed byte by byte to obtain the starting position, instruction size information and function end position when the descriptor component and the debug component are not included in the multiple components obtained by splitting, thereby providing reliable reference information for the subsequent splitting of the method components. Based on the reference information, the first method component is split to obtain multiple executable methods, thereby ensuring the accuracy of the component splitting.

[0105] According to some embodiments of the present application, step S130 is further described. Step S130: perform instruction screening processing in the instruction sequences of all executable methods to obtain target integer instructions including integer variables, including but not limited to steps S131 to S133.

[0106] Step S131: traverse the instruction sequences of all executable methods to determine candidate integer instructions.

[0107] Step S132: extract the variables used and defined in the candidate integer instruction, and when it is determined that the variable is used by the method call instruction, determine that the candidate integer instruction includes an integer parameter.

[0108] Step S133: After performing variable analysis processing on all candidate integer instructions, the candidate integer instructions including integer parameters are determined as target integer instructions.

[0109] Specifically, step S132 is further explained. After extracting the variables used and defined in the candidate integer instruction, it is necessary to determine whether the variable is used in the method call instruction. If so, it is determined that the candidate integer instruction contains an int type parameter; if not, it is determined that the candidate integer instruction does not contain an int type parameter.

[0110] In one embodiment, the method of determining whether the variable is used in a method call instruction includes: extracting a parameter name from a method call instruction in a linear variable method; traversing the instructions to find an instruction that most recently uses the parameter name, and inferring the type of the parameter name according to the instruction type of the found instruction, specifically, when the instruction type of the found instruction is an integer, inferring the type of the parameter name to be an integer. Determining whether the variable of the integer instruction in the most recently used instruction is used in the method call instruction.

[0111] Through steps S131 to S133, incompatible target integer instructions are determined from multiple instructions in the instruction sequence of the executable method, so that the incompatible target integer instructions can be converted and reconstructed in a targeted manner later, thereby improving the accuracy and efficiency of instruction conversion.

[0112] Further explaining step S140, step S140: reconstructing the target integer instruction, modifying the number of parameters passed, and obtaining the reconstructed target integer instruction; thereby converting the 16-bit virtual machine instruction that is incompatible with the 32-bit virtual machine into a 32-bit virtual machine instruction.

[0113] Specifically, the instruction reconstruction process performed in step S140 includes: replacing the target integer instruction and changing the two parameters passed by the integer variable into one parameter. For example, the instruction before reconstruction is: invoke r0 r1 r2 r3 r4; the instruction after reconstruction is: invoke r0 r1 r2 r3.

[0114] It is understandable that the source code of the executable file is a private asset and is generally unwilling to be disclosed. However, this application only uses the executable file without the source code, and implements a method of instruction conversion and reconstruction, which can perform data inspection, analysis and instruction replacement on the first executable file (EF) running on the 16-bit virtual machine, process incompatible instructions, and finally enable it to run normally on the 32-bit virtual machine. This enables existing applications to run on a stronger virtual machine, which not only improves data processing efficiency, but also takes advantage of the more powerful performance of the 32-bit virtual machine to meet changes in business needs. At the same time, it avoids the complexity of recompiling the source code and protects the privacy of the source code.

[0115] According to some embodiments of the present application, step S150 is further described. Step S150: based on all instructions including the reconstructed target integer instruction, instruction reordering processing, instruction update processing, and method component generation processing are performed in sequence to obtain a regenerated second method component, including but not limited to steps S151 to S157.

[0116] Step S151: Rearrange all instructions including the reconstructed target integer instruction to obtain a rearranged instruction sequence.

[0117] Step S152: traverse all instructions in the rearranged instruction sequence to determine a plurality of control transfer instructions and target jump instructions indicated by the control transfer instructions.

[0118] Step S153: Generate a first position label for each control transfer instruction, and generate a second position label for the corresponding target jump instruction indicated by the control transfer instruction.

[0119] Step S154: recalculate the effective offset information between the corresponding control transfer instruction and the target jump instruction according to the first position tag and the second position tag.

[0120] Step S155: recalculate the instruction size update information of the control transfer instruction, and update the instruction header information of the control transfer instruction according to the effective offset information and the instruction size update information to obtain an updated control transfer instruction.

[0121] Step S156: After obtaining the updated control transfer instruction, regenerate the method content, recalculate the number of parameters in the method content, update the method header information, and generate a new executable target method based on the method content and the method header information.

[0122] Step S157: Generate a second method component based on the new executable target method.

[0123] Specifically, the embodiment of the present application implements instruction reordering processing through step S151, implements instruction update processing through steps S152 to S155, and implements method component generation processing through steps S156 to S157.

[0124] It is understandable that after the instructions are reordered, other instructions may be added between the control transfer instruction and the target jump instruction indicated by the control transfer instruction. In this case, the effective offset between the control transfer instruction and the target jump instruction needs to be recalculated to ensure that the target jump instruction can be accurately located when the control transfer instruction is executed.

[0125] It can be understood that, by regenerating new method content based on the rearranged instructions through step S156, a new executable target method and a second method component are further generated conveniently.

[0126] Through steps S151 to S157, without using the source code and only using the first executable file in the 16-bit virtual machine, the instructions in the first executable file that are incompatible with the 32-bit virtual machine are quickly and effectively converted and reconstructed, and then the second executable file suitable for the 32-bit virtual machine is regenerated based on the reconstructed target integer instructions, thereby avoiding the complexity of recompiling the source code and protecting the privacy of the source code.

[0127] In summary, the embodiments of the present application have the following three beneficial effects: First, it is conducive to improving data processing performance and efficiency: that is, by converting 16-bit virtual machine instructions into 32-bit virtual machine instructions, the more powerful processing capabilities and higher execution efficiency of the 32-bit virtual machine can be utilized. In particular, for the processing of int and long type data, the 32-bit virtual machine can perform register operations and data calculations more efficiently. Second, it expands application compatibility: through the instruction conversion method of the embodiments of the present application, the existing 16-bit virtual machine applications can be seamlessly migrated to a 32-bit virtual machine to run, avoiding the cost of redevelopment or recompilation, and achieving instruction compatibility. Third, 3. Protecting the privacy of the source code: This application only involves the conversion of the executable file (EF), and does not require access to or modification of the source code; it is conducive to protecting the privacy of the source code. Such as Figure 5 As shown, Figure 5 1 is a schematic diagram of the hardware structure of a virtual machine instruction conversion device provided by an embodiment of the present invention. The present invention also provides a virtual machine instruction conversion device, comprising:

[0128] The processor 501 may be implemented by a general-purpose central processing unit (CPU), a microprocessor, an application-specific integrated circuit (ASIC), or one or more integrated circuits, and is used to execute relevant programs to implement the technical solutions provided in the embodiments of the present application;

[0129] The memory 502 can be implemented in the form of a read-only memory (ROM), a static storage device, a dynamic storage device, or a random access memory (RAM). The memory 502 can store an operating system and other application programs. When the technical solution provided in the embodiment of this specification is implemented by software or firmware, the relevant program code is stored in the memory 502, and the processor 501 calls and executes the virtual machine instruction conversion method of the embodiment of this application;

[0130] Input / output interface 503, used to implement information input and output;

[0131] Communication interface 504, used to realize communication interaction between the present apparatus and other devices, which can be realized by wired means (such as USB, network cable, etc.) or wireless means (such as mobile network, WIFI, Bluetooth, etc.);

[0132] A bus 505 that transmits information between the various components of the device (e.g., the processor 501, the memory 502, the input / output interface 503, and the communication interface 504);

[0133] The processor 501 , the memory 502 , the input / output interface 503 and the communication interface 504 are connected to each other in communication within the device via the bus 505 .

[0134] An embodiment of the present application also provides an electronic device, comprising the virtual machine instruction conversion device as described above.

[0135] An embodiment of the present application also provides a storage medium, which is a computer-readable storage medium. The storage medium stores a computer program, and when the computer program is executed by a processor, the above-mentioned virtual machine instruction conversion method is implemented.

[0136] As a non-transient computer-readable storage medium, the memory can be used to store non-transient software programs and non-transient computer executable programs. In addition, the memory may include a high-speed random access memory, and may also include a non-transient memory, such as at least one disk storage device, a flash memory device, or other non-transient solid-state storage devices. In some embodiments, the memory may optionally include a memory remotely arranged relative to the processor, and these remote memories may be connected to the processor via a network. Examples of the above-mentioned networks include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and a combination thereof. The device embodiments described above are merely schematic, wherein the units described as separate components may or may not be physically separated, and are implemented to be located in one place, or may also be distributed to multiple network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the present embodiment.

[0137] It will be appreciated by those skilled in the art that all or some of the steps and systems in the disclosed method above may be implemented as software, firmware, hardware and appropriate combinations thereof. Some physical components or all physical components may be implemented as software executed by a processor, such as a central processing unit, a digital signal processor or a microprocessor, or may be implemented as hardware, or may be implemented as an integrated circuit, such as an application specific integrated circuit. Such software may be distributed on a computer-readable medium, which may include a computer storage medium (or a non-transitory medium) and a communication medium (or a temporary medium). As known to those skilled in the art, the term computer storage medium includes volatile and non-volatile, removable and non-removable media implemented in any method or technology for storing information (such as computer-readable instructions, data structures, program modules or other data). Computer storage media include, but are not limited to, RAM, ROM, EEPROM, flash memory or other memory technologies, CD-ROM, digital versatile disks (DVD) or other optical disk storage, magnetic cassettes, magnetic tapes, disk storage or other magnetic storage devices, or any other medium that may be used to store desired information and may be accessed by a computer. Furthermore, it is well known to those skilled in the art that communication media typically include computer readable instructions, data structures, program modules, or other data in a modulated data signal such as a carrier wave or other transport mechanism, and may include any information delivery media.

[0138] The above is a specific description of the preferred implementation of the present application, but the present application is not limited to the above-mentioned implementation mode. Technical personnel familiar with the field can also make various equivalent deformations or substitutions without violating the spirit of the present application. These equivalent deformations or substitutions are all included in the scope defined by the present application.

Claims

1. A method for converting virtual machine instructions, characterized in that: include: Identifying a first executable file in a 16-bit virtual machine, splitting the first executable file into multiple components, and determining a first method component from the multiple components; Splitting the first method component to obtain a plurality of executable methods; wherein each of the executable methods includes a method header and an instruction sequence; Perform instruction screening processing in the instruction sequences of all the executable methods to obtain target integer instructions including integer variables; Reconstructing the target integer instruction, modifying the number of parameters passed, and obtaining a reconstructed target integer instruction; Based on all instructions including the reconstructed target integer instruction, sequentially perform instruction reordering, instruction updating, and method component generation to obtain a regenerated second method component; A second executable file for the 32-bit virtual machine is regenerated based on the second method component.

2. The method for converting virtual machine instructions according to claim 1, characterized in that: When the multiple components do not include a descriptor component and a debugging component; the first method component is split to obtain multiple executable methods, including: According to the method component structure, the method structure, and the instruction structure, the first method component is analyzed byte by byte to obtain the starting position, instruction size information, and function end position of each executable method; According to the starting position, the instruction size information and the function end position of each executable method, the first method component is split to obtain a plurality of the executable methods.

3. The method for converting virtual machine instructions according to claim 2, characterized in that: The method component structure, the method structure, and the instruction structure are analyzed byte by byte to obtain the starting position, instruction size information, and function end position of each executable method, including: According to the method component structure, an exception table entry is analyzed from the first method component, and relative offset information of the executable method is obtained from the exception table entry; According to the method structure, determining a starting position and a method header based on a base address of the first method component and the relative offset information; Determine an executable method to be analyzed based on the starting position, and determine an instruction sequence of the executable method to be analyzed based on the method header; According to the instruction structure, all instructions in the instruction sequence are analyzed and processed by instruction type and offset, and the instruction size information and the end position of the function are determined, so as to split the first method array according to the instruction size information and the end position of the function to obtain one of the executable methods; After analyzing one of the executable methods, continue to analyze the first method components byte by byte based on the start position, instruction size information and function end position of each executable method obtained through analysis.

4. The method for converting virtual machine instructions according to claim 1, characterized in that: When the multiple components include a descriptor component and a debugging component; the first method component is split to obtain multiple executable methods, including: Retrieve the descriptor component and the debug component from the plurality of components; Acquire method size information and offset information of each defined executable method from the descriptor component and the debugging component; The first method component is split according to the method size information and the offset information to obtain the multiple executable methods.

5. The instruction conversion method according to claim 1, characterized in that: The step of performing instruction screening in the instruction sequences of all the executable methods to obtain a target integer instruction including an integer variable includes: Traversing the instruction sequences of all the executable methods to determine candidate integer instructions; Extracting variables used and defined in the candidate integer instruction, and when it is determined that the variable is used by a method call instruction, determining that the candidate integer instruction includes an integer parameter; After performing variable analysis processing on all the candidate integer instructions, the candidate integer instruction including the integer parameter is determined as the target integer instruction.

6. The instruction conversion method according to claim 1, characterized in that: The method of sequentially performing instruction reordering, instruction updating, and method component generation based on all instructions including the reconstructed target integer instruction to obtain a regenerated second method component includes: Rearranging all instructions including the reconstructed target integer instruction to obtain a rearranged instruction sequence; Traversing all instructions in the rearranged instruction sequence, determining a plurality of control transfer instructions and target jump instructions indicated by the control transfer instructions; Generate a first position label for each of the control transfer instructions, and generate a second position label for the corresponding target jump instruction indicated by the control transfer instruction; Recalculating effective offset information between the corresponding control transfer instruction and the target jump instruction according to the first position tag and the second position tag; Recalculating instruction size update information of the control transfer instruction, and updating instruction header information of the control transfer instruction according to the effective offset information and the instruction size update information to obtain an updated control transfer instruction; After obtaining the updated control transfer instruction, regenerate the method content, recalculate the number of parameters in the method content, update the method header information, and generate a new executable target method based on the method content and the method header information; Based on the new executable target method, the second method component is generated.

7. The method for converting virtual machine instructions according to claim 1, characterized in that: The step of splitting the first executable file into multiple components includes: Obtaining a first header component from the first executable file; The executable file is split according to the starting position and size of each component recorded in the first header component to obtain the multiple components of different types.

8. A virtual machine instruction conversion device, characterized in that: It includes at least one processor and a memory for communicating with the at least one processor; the memory stores instructions that can be executed by the at least one processor, and the instructions are executed by the at least one processor so that the at least one processor can execute the virtual machine instruction conversion method as described in any one of claims 1 to 7.

9. An electronic device, characterized in that: It comprises the virtual machine instruction conversion device as described in claim 8.

10. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores computer-executable instructions, and the computer-executable instructions are used to enable a computer to execute the virtual machine instruction conversion method according to any one of claims 1 to 7.

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