Buck-boost converter and mode switching method and circuit thereof

Abstract

The invention discloses a buck-boost converter and a mode switching method and circuit thereof, and the mode switching method comprises the steps: selecting a driving signal from a third driving signal and a first driving signal of a first switching tube according to a boost-buck mode signal and a third driving signal of a third switching tube, filtering the selected driving signal or the voltage division signal of the selected driving signal, comparing the filtered signal with a first reference voltage, and obtaining a closed-loop voltage reduction mode signal according to a comparison result; comparing the output voltage of the buck-boost converter with a second reference voltage, and obtaining an open-loop buck mode signal according to a comparison result; and when both the closed-loop voltage reduction mode signal and the open-loop voltage reduction mode signal are effective, outputting an effective voltage reduction mode signal so as to switch the working mode of the buck-boost converter into the voltage reduction mode in the next switching period, thereby improving the accuracy of judging the working mode of the buck-boost converter and improving the reliability of the buck-boost converter. And smooth switching between the working modes of the buck-boost converter is realized.

Description

Technical Field

[0001] The present invention relates to the technical field of integrated circuits, and in particular to a buck-boost converter and a mode switching method and circuit thereof. Background Art

[0002] The four-switch buck-boost converter has three operating modes: buck mode, boost mode, and buck-boost mode. It adapts to different voltage conversion requirements by switching between the three operating modes.

[0003] The working mode of the four-switch buck-boost converter in the prior art is generally determined by open-loop determination. The method for open-loop determination of the working mode of the four-switch buck-boost converter is to compare the output voltage of the buck-boost converter with the threshold voltage by hysteresis, and determine the working mode of the four-switch buck-boost converter according to the comparison result, wherein the threshold voltage is the product of the input voltage and a duty cycle, and the duty cycle is a fixed value. Since the duty cycle is not dynamically adjusted according to the actual load current, this determination method often cannot accurately determine the true working state of the four-switch buck-boost converter when facing a large load current, thereby increasing the risk of misjudgment.

[0004] Therefore, a new four-switch buck-boost converter and a mode switching method and circuit thereof are needed to solve the above problems. Summary of the invention

[0005] In view of the above problems, an object of the present invention is to provide a buck-boost converter and a mode switching method and circuit thereof, so as to achieve smooth switching between the working modes of the buck-boost converter.

[0006] According to one aspect of the present invention, a mode switching method for a buck-boost converter is provided, wherein the buck-boost converter comprises an inductor, a first switch tube, a second switch tube, a third switch tube and a fourth switch tube, wherein the first switch tube, the inductor and the fourth switch tube are sequentially connected between an input end and an output end, one end of the second switch tube is connected to a node between the first switch tube and the inductor, one end of the third switch tube is connected to a node between the inductor and the fourth switch tube, and the working modes of the buck-boost converter include a buck mode, a boost mode and a boost-buck mode, wherein the mode switching method comprises: The third driving signal of the third switch tube selects a driving signal from the third driving signal and the first driving signal of the first switch tube, filters the selected driving signal or the voltage-divided signal of the selected driving signal and compares it with the first reference voltage, and obtains a closed-loop buck mode signal according to the comparison result; compares the output voltage of the buck-boost converter with the second reference voltage, and obtains an open-loop buck mode signal according to the comparison result; and when both the closed-loop buck mode signal and the open-loop buck mode signal are valid, outputs a valid buck mode signal to switch the working mode of the buck-boost converter to the buck mode in the next switching cycle.

[0007] Optionally, the mode switching method further includes selecting a drive signal from the second drive signal and the fourth drive signal of the fourth switch tube according to the boost-buck mode signal and the second drive signal of the second switch tube, filtering the selected drive signal or the voltage division signal of the selected drive signal and comparing it with a third reference voltage, and obtaining a closed-loop boost mode signal according to the comparison result; comparing the output voltage of the buck-boost converter with the fourth reference voltage, and obtaining an open-loop boost mode signal according to the comparison result; and when the closed-loop boost mode signal and / or the open-loop boost mode signal are valid, outputting a valid boost mode signal to switch the working mode of the buck-boost converter to the boost mode in the next switching cycle; the mode switching method also includes outputting a valid boost-buck mode signal when both the buck mode signal and the boost mode signal are invalid, so as to switch the working mode of the buck-boost converter to the boost-buck mode in the next switching cycle.

[0008] Optionally, selecting a drive signal from the third drive signal and the first drive signal of the first switch tube according to the boost-buck mode signal and the third drive signal of the third switch tube, filtering the selected drive signal or the voltage-divided signal of the selected drive signal and comparing it with the first reference voltage, and obtaining a closed-loop buck mode signal according to the comparison result includes performing a NAND operation on the boost-buck mode signal and the third drive signal, and providing the third drive signal or the voltage-divided signal of the first drive signal to the first node according to the operation result; filtering the voltage of the first node to obtain a buck filter voltage; and comparing the buck filter voltage with the first reference voltage, and obtaining the closed-loop buck mode signal according to the comparison result, wherein the first reference voltage is equal to the product of a first threshold value and a first voltage, the second reference voltage is equal to the product of the first threshold value and the input voltage of the buck-boost converter, the first threshold value is related to the maximum conversion ratio of the output voltage to the input voltage when the buck-boost converter is in the buck mode, and the first voltage is related to the amplitudes of the first to fourth drive signals.

[0009] Optionally, selecting a drive signal from the second drive signal and the fourth drive signal of the fourth switch tube according to the boost-buck mode signal and the second drive signal of the second switch tube, filtering the selected drive signal or the voltage-divided signal of the selected drive signal and comparing it with a third reference voltage, and obtaining a closed-loop boost mode signal according to the comparison result includes performing a NAND operation on the boost-buck mode signal and the second drive signal, and providing the second drive signal or the voltage-divided signal of the fourth drive signal to the second node according to the operation result; filtering the voltage of the second node to obtain a boost filter voltage; and comparing the boost filter voltage with the third reference voltage, and obtaining the closed-loop boost mode signal according to the comparison result, wherein the third reference voltage is equal to the product of a second threshold value and the first voltage, the fourth reference voltage is equal to the product of the second threshold value and the input voltage, the second threshold value is related to the minimum conversion ratio of the output voltage to the input voltage when the buck-boost converter is in the boost mode, and the first voltage is related to the amplitude of the first to fourth drive signals.

[0010] According to a second aspect of the present invention, a mode switching circuit of a buck-boost converter is provided, wherein the buck-boost converter comprises an inductor, a first switch tube, a second switch tube, a third switch tube and a fourth switch tube, wherein the first switch tube, the inductor and the fourth switch tube are sequentially connected between an input end and an output end, one end of the second switch tube is connected to a node between the first switch tube and the inductor, one end of the third switch tube is connected to a node between the inductor and the fourth switch tube, and the working modes of the buck-boost converter include a buck mode, a boost mode and a boost-buck mode, and the mode switching circuit comprises a closed-loop buck judgment module for judging a buck mode according to a boost-buck mode signal and the third switch tube. The third driving signal selects a driving signal from the third driving signal and the first driving signal of the first switching tube, filters the selected driving signal or the voltage-divided signal of the selected driving signal and compares it with the first reference voltage, and obtains a closed-loop buck mode signal according to the comparison result; an open-loop buck judgment module is used to compare the output voltage of the buck-boost converter with the second reference voltage, and obtain an open-loop buck mode signal according to the comparison result; and an open-loop closed-loop judgment module is used to output a valid buck mode signal when both the closed-loop buck mode signal and the open-loop buck mode signal are valid, so as to switch the working mode of the buck-boost converter to the buck mode in the next switching cycle.

[0011] Optionally, the mode switching circuit also includes a closed-loop boost judgment module, which is used to select a drive signal from the second drive signal and the fourth drive signal of the fourth switch tube according to the boost-buck mode signal and the second drive signal of the second switch tube, filter the selected drive signal or the voltage division signal of the selected drive signal and compare it with the third reference voltage, and obtain a closed-loop boost mode signal according to the comparison result; an open-loop boost judgment module, which is used to compare the output voltage of the buck-boost converter with the fourth reference voltage and obtain an open-loop boost mode signal according to the comparison result; and the open-loop closed-loop judgment module is also used to output a valid boost mode signal when the closed-loop boost mode signal and / or the open-loop boost mode signal are valid, so as to switch the working mode of the buck-boost converter to the boost mode in the next switching cycle; the open-loop closed-loop judgment module is also used to output a valid boost-buck mode signal when both the buck mode signal and the boost mode signal are invalid, so as to switch the working mode of the buck-boost converter to the boost-buck mode in the next switching cycle.

[0012] Optionally, the closed-loop buck judgment module includes a first resistor and a second resistor, which are sequentially connected between the first drive signal and the ground terminal; a third resistor and a first transmission gate, which are sequentially connected between the third drive signal and the first node; a second transmission gate, which is connected between a common node of the first resistor and the second resistor and the first node; a first comparator, whose negative input terminal is connected to the first node, whose positive input terminal receives the first reference voltage, and whose output terminal provides the closed-loop buck mode signal; a first NAND gate, whose first input terminal receives the boost-buck mode signal, whose second input terminal receives the third drive signal, and whose output terminal is connected to The control end of the second transmission gate; the first NOT gate, whose input end receives the output end of the first NAND gate, and whose output end is connected to the control end of the first transmission gate; the open-loop buck-voltage determination module includes a third comparator, whose negative input end receives the output voltage of the buck-boost converter, whose positive input end receives the second reference voltage, and whose output end provides the open-loop buck mode signal; the open-loop closed-loop determination module includes a third NAND gate, whose first input end receives the open-loop buck mode signal, and whose second input end receives the closed-loop buck mode signal; and a third NOT gate, whose input end is connected to the output end of the third NAND gate, and whose output end provides the buck mode signal.

[0013] Optionally, the closed-loop boost judgment module includes a fourth resistor and a fifth resistor, which are connected between the fourth drive signal and the ground terminal in sequence; a sixth resistor and a third transmission gate, which are connected between the second drive signal and the second node in sequence; a fourth transmission gate, which is connected between the common node of the fourth resistor and the fifth resistor and the second node; a second comparator, whose negative input terminal is connected to the second node, whose positive input terminal receives the third reference voltage, and whose output terminal provides the closed-loop boost mode signal; a second NAND gate, whose first input terminal receives the boost-buck mode signal, whose second input terminal receives the second drive signal, and whose output terminal is connected to the control terminal of the fourth transmission gate; and a second NOT gate, whose input terminal receives the control terminal of the second NAND gate. The output end is connected to the control end of the third transmission gate; the open-loop boost judgment module includes a fourth comparator, the positive input end receives the output voltage of the buck-boost converter, the negative input end receives the fourth reference voltage, and the output end provides the open-loop boost mode signal; the open-loop and closed-loop detection circuit also includes a first NOR gate, the first input end receives the open-loop boost mode signal, and the second input end receives the closed-loop boost mode signal; a fourth NOR gate, the input end is connected to the output end of the first NOR gate, and the output end provides the boost mode signal; a second NOR gate, the first input end receives the output end of the third NOR gate, the second input end receives the output end of the fourth NOR gate, and the output end provides the boost-buck mode signal.

[0014] Optionally, the first to fourth comparators are hysteresis comparators, and the resistance values ​​of the first resistor, the second resistor, the fourth resistor and the fifth resistor are equal; the first reference voltage is equal to the product of a first threshold value and a first voltage, the third reference voltage is equal to the product of a second threshold value and the first voltage, the second reference voltage is equal to the product of the first threshold value and an input voltage of the buck-boost converter, and the fourth reference voltage is equal to the product of the second threshold value and the input voltage, wherein the first threshold value is related to the maximum conversion ratio of the output voltage to the input voltage when the buck-boost converter is in a buck mode, the second threshold value is related to the minimum conversion ratio of the output voltage to the input voltage when the buck-boost converter is in a boost mode, and the first voltage is related to the amplitude of the first to fourth drive signals.

[0015] According to a third aspect of the present invention, a buck-boost converter is provided, comprising a first switch tube and a second switch tube, which are sequentially connected between an input voltage and a ground terminal, and whose common node is a first switch node, and whose control terminals receive a first drive signal and a second drive signal respectively; an inductor, which is connected between the first switch node and the second switch node; a third switch tube, which is connected between the second switch node and the ground terminal, and whose control terminal receives a third drive signal; a fourth switch tube, which is connected between the second switch node and the output voltage, and whose control terminal receives a fourth drive signal; a mode switching circuit as described above; and a logic control circuit, which is used to control the buck-boost converter to operate in a corresponding operating mode according to the boost mode signal, the buck mode signal and the boost-buck mode signal.

[0016] The buck-boost converter and mode switching method and circuit provided by the present invention determine the working mode of the buck-boost converter in the next switching cycle by combining open-loop detection and closed-loop detection, thereby improving the accuracy of judging the working mode of the buck-boost converter and realizing smooth switching between the working modes of the buck-boost converter. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] The above and other objects, features and advantages of the present invention will become more apparent through the following description of the embodiments of the present invention with reference to the accompanying drawings, in which:

[0018] Figure 1 A schematic structural diagram of a buck-boost converter is shown;

[0019] Figure 2 A schematic diagram showing a mode determination of a prior art buck-boost converter during open-loop determination is shown;

[0020] Figure 3 A schematic structural diagram of a buck-boost converter according to an embodiment of the present invention is shown;

[0021] Figure 4 A circuit diagram of a mode switching circuit according to an embodiment of the present invention is shown;

[0022] Figure 5 A simplified schematic diagram of a closed-loop buck determination module according to an embodiment of the present invention when the buck-boost converter is in buck mode is shown;

[0023] Figure 6 A timing diagram of a closed-loop buck determination module according to an embodiment of the present invention when the buck-boost converter is in buck mode is shown;

[0024] Figure 7 A timing diagram of a closed-loop buck determination module according to an embodiment of the present invention when the buck-boost converter is in a boost-buck mode and tends to buck;

[0025] Figure 8 A schematic flow chart of a mode switching method according to an embodiment of the present invention is shown. DETAILED DESCRIPTION

[0026] Various embodiments of the present invention will be described in more detail below with reference to the accompanying drawings. In each of the accompanying drawings, the same elements or modules are represented by the same or similar reference numerals. For the sake of clarity, the various parts in the accompanying drawings are not drawn to scale.

[0027] It should be understood that in the following description, a "circuit" may include a single or multiple combined hardware circuits, programmable circuits, state machine circuits, and / or elements capable of storing instructions executed by programmable circuits. When an element or circuit is said to be "connected to" another element or an element or circuit is said to be "connected between" two nodes, it may be directly coupled or connected to another element or there may be an intermediate element, and the connection between the elements may be physical, logical, or a combination thereof. Conversely, when an element is said to be "directly coupled to" or "directly connected to" another element, it means that there is no intermediate element between the two.

[0028] At the same time, certain words are used in this patent specification and claims to refer to specific components. It should be understood by those skilled in the art that hardware manufacturers may use different terms to refer to the same component. This patent specification and claims do not use differences in names as a way to distinguish components, but rather use differences in components' functions as the criteria for distinction.

[0029] In addition, it should be noted that, in this article, relational terms such as first and second are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that the process, method, article or equipment including a series of elements includes not only those elements, but also includes other elements not explicitly listed, or also includes elements inherent to such process, method, article or equipment. In the absence of more restrictions, the elements defined by the statement "comprise one..." do not exclude the existence of other identical elements in the process, method, article or equipment including the elements.

[0030] Figure 1 A schematic structural diagram of a buck-boost converter is shown.

[0031] See also Figure 1 The buck-boost converter 10 adopts a four-switch buck-boost converter, which includes an input capacitor Cin, an output capacitor Cout, first to fourth switch tubes Q1-Q4 and an inductor L. The input capacitor Cin is connected between the input voltage Vin and the ground terminal, the first switch tube Q1, the inductor L, and the fourth switch tube Q4 are connected between the input voltage Vin and the output voltage Vout in sequence, the second switch tube Q2 is connected between the switch node SW1, i.e., the middle node between the first switch tube Q1 and the inductor L and the ground terminal, the third switch tube Q3 is connected between the switch node SW2, i.e., the middle node between the inductor L and the fourth switch tube Q4 and the ground terminal, and the output capacitor Cout is connected between the output voltage Vout and the ground terminal. The control end of the first switch tube Q1 receives the first drive signal Tg_q1, the control end of the second switch tube Q2 receives the second drive signal Bg_q2, the control end of the third switch tube Q3 receives the third drive signal Bg_q3, and the control end of the fourth switch tube Q4 receives the fourth drive signal Tg_q4.

[0032] The buck-boost converter 10 switches between a boost mode (Boost mode), a buck mode (Buck mode) and a boost-buck mode (Boost-Buck) by controlling the on and off of the first to fourth switch tubes Q1 - Q4 .

[0033] Specifically, when the buck-boost converter 10 operates in the buck mode, the third switch tube Q3 is turned off, the fourth switch tube Q4 is turned on, and the first switch tube Q1 and the second switch tube Q2 are turned on alternately. When the buck-boost converter 10 operates in the boost mode, the first switch tube Q1 is turned on, the second switch tube Q2 is turned off, and the third switch tube Q3 and the fourth switch tube Q4 are turned on alternately. When the buck-boost converter 10 operates in the boost-buck mode, two of the first to fourth switch tubes Q1-Q4 are selectively turned on.

[0034] Figure 2 A schematic diagram of mode determination of a prior art buck-boost converter during open-loop determination is shown.

[0035] For example, the switching frequency of the first to fourth switch tubes Q1 - Q4 is 1.2 MHZ, and the minimum on-time of the first to fourth switch tubes Q1 - Q4 is 100 ns.

[0036] In buck mode, the maximum conversion ratio of the output voltage Vout to the input voltage Vin is:

[0037] , where D1 refers to the duty cycle of the first driving signal Tg_q1.

[0038] In order to improve the stability of the buck-boost converter 10, a certain margin, generally 2%, needs to be reserved when the buck-boost converter 10 switches from the buck mode to the boost-buck mode or from the boost-buck mode to the buck mode. Figure 2 As shown, the conversion ratio of the output voltage Vout to the input voltage Vin is 86% as the threshold value for switching the buck-boost converter 10 from the buck mode to the boost-buck mode. In addition, since the open-loop judgment of the buck-boost converter 10 is realized by using a hysteresis comparator to compare the product of the above threshold and the input voltage Vin with the output voltage Vout, when the buck-boost converter 10 switches from the boost-buck mode to the buck mode, there is a certain hysteresis, so it is necessary to leave a hysteresis of, for example, 2%, so the conversion ratio of the output voltage Vout to the input voltage Vin is 84% ​​as the threshold value for switching the buck-boost converter 10 from the boost-buck mode to the buck mode.

[0039] In boost mode, the minimum conversion ratio of the output voltage Vout to the input voltage Vin is:

[0040] , where D2 refers to the duty cycle of the third driving signal Bg_q3.

[0041] In order to improve the stability of the buck-boost converter 10, a certain margin is also required when the buck-boost converter 10 switches from the boost mode to the boost-buck mode or from the boost-buck mode to the boost mode. Figure 2As shown, the conversion ratio of the output voltage Vout to the input voltage Vin is generally 115% as the threshold value when the buck-boost converter 10 switches from the boost mode to the boost-buck mode. In addition, since there is a certain hysteresis when the buck-boost converter 10 switches from the boost-buck mode to the boost mode during the open-loop judgment, it is also necessary to leave a hysteresis of, for example, 2%, so the conversion ratio of the output voltage Vout to the input voltage Vin is 117% as the threshold value when the buck-boost converter 10 switches from the boost-buck mode to the boost mode.

[0042] Although the above method for determining the working mode of the buck-boost converter 10 is simple in structure and easy to implement, it has certain problems. For example, when a large current of converting a 4V input voltage Vin into a 3.2V output voltage Vout occurs, the duty cycle of the first drive signal Tg_q1 is 3.2 / 4=80% using the above determination method. Therefore, the open loop determines that the buck-boost converter 10 needs to work in the buck mode. Since the input and output lines of the buck-boost converter 10 have a voltage drop of 200mV to both ends of the inductor L under the condition of large current, the voltages across the inductor L are actually L+=3.8V and L-=3.4V. At this time, the actual required duty cycle of the first drive signal Tg_q1 is 3.4 / 3.8=89.5%. However, since it is judged to be the buck mode, the buck-boost converter 10 operates in the buck mode at this time. Even if the loop is adjusted so that the conduction time of the first switch tube Q1 reaches the longest conduction time, the duty cycle of the first drive signal Tg_q1 is only 88%, which is less than the required duty cycle of 89.5%. Therefore, the output voltage Vout does not meet the requirements, resulting in the buck-boost converter 10 not being able to work normally.

[0043] Therefore, a new mode switching method and circuit of a buck-boost converter is needed to solve the above problems.

[0044] Figure 3 A schematic structural diagram of a buck-boost converter according to an embodiment of the present invention is shown.

[0045] See also Figure 3The buck-boost converter 100 includes a first switch tube Q1 and a second switch tube Q2, which are sequentially connected between the input voltage Vin and the ground terminal, and the common node thereof is the switch node SW1. The control terminal of the first switch tube Q1 receives the first drive signal Tg_q1, and the control terminal of the second switch tube Q2 receives the second drive signal Bg_q2; an inductor L is connected between the switch node SW1 and the switch node SW2; a third switch tube Q3 is connected between the switch node SW2 and the ground terminal, and the control terminal of the third switch tube Q3 receives the third drive signal Bg_q3; a fourth switch tube Q4 is connected between the switch node SW2 and the output voltage Vout, and the control terminal of the fourth switch tube Q4 receives the fourth drive signal Tg_q4; an output capacitor Cout is connected between the output voltage Vout and the ground terminal; and an input capacitor Cin is connected between the input voltage Vin and the ground terminal. The amplitudes of the first to fourth drive signals are the same. The working modes of the buck-boost converter 100 include a boost mode, a buck mode, and a boost-buck mode.

[0046] The buck-boost converter 100 further includes a mode switching circuit 110 and a logic control circuit 120. The mode switching circuit 110 is used to generate a boost mode signal Boost, a buck mode signal Buck, and a boost-buck mode signal Buck_Boost according to the output voltage Vout, the input voltage Vin, and the first to fourth driving signals. The logic control circuit 120 is used to control the buck-boost converter 100 to operate in a corresponding operating mode according to the boost mode signal Boost, the buck mode signal Buck, and the boost-buck mode signal Buck_Boost.

[0047] Figure 4 A circuit diagram of a mode switching circuit according to an embodiment of the present invention is shown.

[0048] The mode switching circuit of the embodiment of the present invention is applied to a boost-buck converter of four switch tubes. Figure 3 The buck-boost converter 100 shown in the figure is taken as an example. It is understood that its application scope is not limited to Figure 3 A buck-boost converter 100 is shown.

[0049] See also Figure 3 The mode switching circuit 110 includes a closed-loop detection circuit 200, an open-loop detection circuit 300, and an open-loop voltage reduction judgment module 400. The closed-loop detection circuit 200 includes a closed-loop voltage reduction judgment module 210 and a closed-loop voltage increase judgment module 220. The open-loop detection circuit 300 includes an open-loop voltage reduction judgment module 310 and an open-loop voltage increase judgment module 320.

[0050] Specifically, the closed-loop buck determination module 210 is used to select a drive signal from the third drive signal Bg_q3 and the first drive signal Tg_q1 according to the boost-buck mode signal Buck_boost and the third drive signal Bg_q3, and filter the selected drive signal or the voltage division signal of the selected drive signal and compare it with the first reference voltage V Buck_ref_close Compare to obtain the closed-loop buck mode signal Buck_close according to the comparison result. Buck_ref_close = first threshold value * first voltage = first threshold value * (2 / VDD), VDD represents the amplitude of the first drive signal Tg_q1, and the first threshold value represents the maximum conversion ratio of the output voltage Vout to the input voltage Vin when the buck-boost converter 100 is in the buck mode (i.e., the maximum duty cycle of the first drive signal Tg_q1). Taking the switching frequency of the first to fourth switch tubes Q1-Q4 as 1.2MHZ and the minimum on-time of the first to fourth switch tubes Q1-Q4 as 100ns as an example, the maximum conversion ratio is 88%. In order to improve the stability of the buck-boost converter 100, the first threshold value generally leaves a certain margin on the basis of the maximum conversion ratio, for example, 86% can be selected.

[0051] Optionally, when the selected driving signal is the first driving signal Tg_q1, it is necessary to filter the voltage division signal of the first driving signal Tg_q1 and then compare it with the first reference voltage V Buck_ref_close When the selected signal is the third drive signal Bg_q3, the third drive signal Bg_q3 needs to be filtered and then compared with the first reference voltage V Buck_ref_close Make a comparison.

[0052] The closed-loop boost determination module 220 is used to select a drive signal from the second drive signal Bg_q2 and the fourth drive signal Tg_q4 according to the boost-buck mode signal Buck_boost and the second drive signal Bg_q2, and filter the selected drive signal or the voltage division signal of the selected drive signal and then compare it with the third reference voltage V Boost_ref_close The third reference voltage V Boost_ref_close= second threshold value*(2 / VDD), VDD represents the amplitude of the third driving signal Bg_q3, and the second threshold value represents the minimum conversion ratio of the output voltage Vout to the input voltage Vin when the buck-boost converter 100 is in the boost mode. Taking the switching frequency of the first to fourth switch tubes Q1-Q4 as 1.2MHZ and the minimum on-time of the first to fourth switch tubes Q1-Q4 as 100ns as an example, the minimum conversion ratio is 113.64%. In order to improve the stability of the buck-boost converter 100, the second threshold value generally leaves a certain margin on the basis of the minimum conversion ratio, for example, 115% can be selected.

[0053] Optionally, when the selected driving signal is the fourth driving signal Tg_q4, it is necessary to filter the voltage division signal of the fourth driving signal Tg_q4 and then compare it with the third reference voltage V Boost_ref_close When the selected driving signal is the second driving signal Bg_q2, the second driving signal Bg_q2 needs to be filtered and then compared with the third reference voltage V Boost_ref_close Make a comparison.

[0054] The open-loop voltage reduction determination module 310 is used to compare the output voltage Vout with the second reference voltage V Buck_ref_open The comparison is performed to obtain an open-loop buck mode signal Buck_open according to the comparison result. Buck_ref_open =first threshold value*Vin.

[0055] The open-loop boost determination module 320 is used to compare the output voltage Vout with the fourth reference voltage V Boost_ref_open The fourth reference voltage V Boost_ref_open =second threshold value*Vin.

[0056] The open-loop buck determination module 400 is used to output a valid buck mode signal Buck when both the open-loop buck mode signal Buck_open and the closed-loop buck mode signal Buck_close are valid, so as to switch the working mode of the buck-boost converter 100 to the buck mode in the next switching cycle; to output a valid boost mode signal Boost when the open-loop boost mode signal Boost_open and / or the closed-loop boost mode signal Boost_close are valid, so as to switch the working mode of the buck-boost converter 100 to the boost mode in the next switching cycle; and to output a valid boost-buck mode signal Buck_boost when both the buck mode signal Buck and the boost mode signal Boost are invalid, so as to switch the working mode of the buck-boost converter 100 to the boost-buck mode in the next switching cycle. Among them, the open-loop buck mode signal Buck_open, the closed-loop buck mode signal Buck_close, the open-loop boost mode signal Boost_open, the closed-loop boost mode signal Boost_close, the boost mode signal Boost, the buck mode signal Buck and the boost-buck mode signal Buck_boost are all valid when their level values ​​are the first level value, and the first level value is 1, for example.

[0057] For further reference, Figure 4 The closed-loop voltage reduction judgment module 210 includes resistors R1-R4, a NAND gate U7, a NOT gate U11, transmission gates U12 and U13, a capacitor C1, and a comparator U3, wherein the resistor R4 and the capacitor C1 form a first filtering circuit, and the common node of the resistor R4 and the capacitor C1 provides a voltage reduction filtering voltage V DC_buck Specifically, the resistor R3 and the transmission gate U12 are connected between the third drive signal Bg_q3 and the node A in sequence. The resistors R1 and R2 are connected between the first drive signal Tg_q1 and the ground terminal in sequence. The transmission gate U13 is connected between the common node of the resistors R1 and R2 and the node A. The resistor R4 is connected between the node A and the negative input terminal of the comparator U3, and the positive input terminal of the comparator U3 receives the first reference voltage V Buck_ref_close, the output end of the comparator U3 provides a closed-loop buck mode signal Buck_close. The capacitor C1 is connected between the middle node of the resistor R4 and the comparator U3 and the ground terminal. The first input end of the NAND gate U7 receives the boost-buck mode signal Buck_boost, the second input end receives the third drive signal Bg_q3, and the output end is connected to the input end of the NAND gate U11. The control end of the transmission gate U12 is connected to the output end of the NAND gate U11, and the transmission gate U12 is controlled by the output signal of the NAND gate U11 to selectively perform data transmission. The control end of the transmission gate U13 is connected to the output end of the NAND gate U7, and the transmission gate U13 is controlled by the output signal of the NAND gate U7 to selectively perform data transmission. Specifically, the transmission gates U12 and U13 select to perform data transmission when the signal received at the control end is a high level.

[0058] The closed-loop boost determination module 220 includes resistors R5-R8, a NAND gate U6, a NOT gate U10, transmission gates U14 and U15, a capacitor C2, and a comparator U4, wherein the resistor R8 and the capacitor C2 form a second filter circuit, and the common node of the resistor R8 and the capacitor C2 provides a boost filter voltage V DC_boost Specifically, the resistor R5 and the transmission gate U14 are connected between the second drive signal Bg_q2 and the node B in sequence. The resistors R6 and R7 are connected between the fourth drive signal Tg_q4 and the ground terminal in sequence. The transmission gate U15 is connected between the common node of the resistors R6 and R7 and the node B. The resistor R8 is connected between the node B and the negative input terminal of the comparator U4, and the positive input terminal of the comparator U4 receives the third reference voltage V Boost_ref_close , the output end of the comparator U4 provides a closed-loop boost mode signal Boost_close. The capacitor C2 is connected between the resistor R8 and the middle node of the comparator U4 and the ground terminal. The first input end of the NAND gate U6 receives the boost-buck mode signal Buck_boost, the second input end receives the second drive signal Bg_q2, and the output end is connected to the input end of the NAND gate U10. The control end of the transmission gate U14 is connected to the output end of the NAND gate U10, and the transmission gate U14 is controlled by the output signal of the NAND gate U10 to selectively perform data transmission. The control end of the transmission gate U15 is connected to the output end of the NAND gate U6, and the transmission gate U15 is controlled by the output signal of the NAND gate U6 to selectively perform data transmission. Specifically, the transmission gates U14 and U15 select to perform data transmission when the signal received at the control end is a high level.

[0059] Optionally, the resistance values ​​of the resistors R1 - R2 and the resistors R6 - R7 are equal.

[0060] The open-loop buck determination module 310 includes a comparator U1, a negative input terminal of the comparator U1 receives the output voltage Vout of the buck-boost converter 100, and a positive input terminal receives the second reference voltage V Buck_ref_open, the output terminal provides an open-loop buck mode signal Buck_open. Among them, when the open-loop buck mode signal Buck_open=1, that is, Vout<V Buck_ref_open When the open loop determines that the working mode of the buck-boost converter 100 in the next switching cycle is the buck mode.

[0061] The open-loop boost determination module 320 includes a comparator U2, the positive input terminal of the comparator U2 receives the output voltage Vout, and the negative input terminal receives the fourth reference voltage V Boost_ref_open , the output terminal provides an open-loop boost mode signal Boost_open. Among them, when the open-loop buck mode signal Boost_open = 1, that is, Vout>V Boost_ref_open When the open loop determines that the working mode of the buck-boost converter 100 in the next switching cycle is the boost mode.

[0062] Optionally, comparators U1-U4 use hysteresis comparators.

[0063] The open-loop buck determination module 400 includes a NAND gate U5, NAND gates U8-U9, and NOR gates U16 and U17. The first input end of the NAND gate U5 receives an open-loop buck mode signal Buck_open, and the second input end receives a closed-loop buck mode signal Buck_close. The first input end of the NOR gate U16 receives an open-loop boost mode signal Boost_open, and the second input end receives a closed-loop boost mode signal Boost_close. The NAND gate U9 is connected between the output end of the NAND gate U5 and the first input end of the NOR gate U17, and the output end of the NAND gate U9 provides a buck mode signal Buck. The NAND gate U8 is connected between the output end of the NOR gate U16 and the second input end of the NOR gate U17, and the output end of the NOR gate U8 provides a boost mode signal Boost. The output end of the NOR gate U17 provides a boost-buck mode signal Buck_Boost.

[0064] The following takes the closed-loop voltage reduction judgment module 210 as an example to illustrate the working principle of the closed-loop detection circuit 200 according to the embodiment of the present invention:

[0065] When the buck-boost converter 100 is in buck mode, the third switch Q3 is turned on, the fourth switch Q4 is turned off, and the first switches Q1 and Q2 are turned on alternately. At this time, the boost-buck mode signal Buck_Boost=0, and the closed-loop buck determination module 210 can be simplified as follows: Figure 5 At this time, the timing diagram of the closed-loop voltage reduction judgment module 210 is as follows Figure 6 shown.

[0066] Similarly, the switching frequency of the first to fourth switch tubes Q1-Q4 is 1.2MHZ, and the minimum conduction time of the first to fourth switch tubes Q1-Q4 is 100ns. When the buck-boost converter 100 works in the buck mode, the first drive signal Tg_q1 is divided by the resistors R1 and R2, and then filtered by the first filter circuit composed of the resistor R4 and the capacitor C1 to obtain the buck filter voltage V DC_buck =D1*(VDD / 2). With the first reference voltage V Buck_ref_close =86%*(VDD / 2) as an example, when the buck-boost converter 100 needs to switch from the buck mode to the boost-buck mode, the output voltage Vout and the input voltage Vin reach the maximum conversion ratio, that is, the duty cycle D1 of the first drive signal Tg_q1 reaches the maximum duty cycle of 88%, then the collected buck filter voltage V DC_buck =88%*(VDD / 2)>V Buck_ref_close [86%*(VDD / 2)], therefore, the closed-loop buck mode signal buck_close=0. Wherein, D1=Ton / Tsw, Ton represents the on-time of the first switch tube Q1, and Tsw represents a switching cycle of the buck-boost converter 100.

[0067] When the buck-boost converter 100 is in the boost-buck mode, it is necessary to determine whether the current working state can return to the buck mode. Specifically, when the buck-boost converter 100 works in the boost-buck mode, it will adaptively perform boost and buck, that is, one switching cycle includes two stages: boost and buck. Since the output voltage Vout is raised in the boost stage, the duty cycle D1 of the first drive signal Tg_q1 in the buck stage is lower than that in the buck mode. Therefore, it is possible to determine how large the duty cycle (the duty cycle is referred to as D in the following text) is required if the buck mode is adopted in the current working state. buck_real If the duty cycle D buck_real If the maximum duty cycle in buck mode is exceeded, it means that the system cannot return to buck mode. Otherwise, it means that the system can return to buck mode.

[0068] Figure 7 A timing diagram of a closed-loop buck determination module according to an embodiment of the present invention is shown when the buck-boost converter is in a boost-buck mode and tends to buck.

[0069] See also Figure 7 and Figure 4When the buck-boost converter 100 operates in the boost-buck mode, the boost-buck mode signal Buck_Boost=1, when the third switch tube Q3 is turned on, the transmission gate U12 is turned on, the third drive signal Bg_q3=VDD, and the third drive signal Bg_q3 is transmitted to the node A through the transmission gate U12; when the third switch tube Q3 is turned off, the transmission gate U13 is turned on, the first drive signal Tg_q1 is transmitted to the node A by the transmission gate U13 after being divided by the resistors R1 and R2, and the third drive signal Bg_q3 is transmitted to the node A through the transmission gate U12. Therefore, when the third switch tube Q3 is turned on, the voltage V pulse_buck =VDD, when the first switch tubes Q1 and Q3 are both turned off, the voltage at node A is V pulse_buck =0, when the third switch tube Q3 is turned off and the first switch tube Q1 is turned on, the voltage V pulse_buck =2 / VDD.

[0070] exist Figure 7 In , time T represents a switching cycle of the buck-boost converter 100 in the boost-buck mode, and Ts represents a half cycle of the buck-boost converter 100 in the boost-buck mode. In a switching cycle T, the increase amount of the inductor current IL is equal to the decrease amount, so it can be obtained:

[0071] (Vin-Vout)*(2*Ts-T Q2 -T Q3 )+Vin*T Q3 =Vout*T Q2 , where T Q2 represents the conduction time of the second switch tube Q2, T Q3 Indicates the on-time of the third switch tube Q3.

[0072] From this it follows that:

[0073]

[0074] Convert it to voltage to get the voltage V corresponding to the real pure buck duty cycle buck_real for:

[0075]

[0076] Since this formula is not easy to reflect in the circuit, the actual method used is as follows Figure 3 The method shown is derived as follows:

[0077]

[0078] From this it follows that:

[0079]

[0080] Since the biased buck state in the boost-buck mode of the buck-boost converter 100 is:

[0081] T Q2 >T Q3

[0082] So we can deduce:

[0083] V DC_buck >V buck_real

[0084] Therefore, when V DC_buck <V Buck_ref_close When

[0085] V Buck_ref_close >V buck_real

[0086] That is, the duty cycle V of the first driving signal Tg_q1 required for the actual voltage reduction of the buck-boost converter 100 is represented by buck_real is less than the maximum duty cycle of the first driving signal Tg_q1 when the buck-boost converter 100 operates in the buck mode. Therefore, the buck mode can be entered at this time. DC_buck <V buck_ref_close When the closed-loop buck mode signal buck_close=1, the closed-loop detection determines that the buck-boost converter 100 should switch from the boost-buck mode Buck_Boost to the buck mode Buck in the next switching cycle.

[0087] The buck-boost converter and its mode switching circuit provided in the embodiment of the present invention determine the operating mode of the buck-boost converter in the next switching cycle by combining open-loop detection and closed-loop detection, thereby improving the accuracy of judging the operating mode of the buck-boost converter and realizing smooth switching between the operating modes of the buck-boost converter.

[0088] Figure 8 A schematic flow chart of a mode switching method according to an embodiment of the present invention is shown.

[0089] The present invention further provides a mode switching method, which can be applied to the buck-boost converter 100 described above, and specifically comprises the following steps:

[0090] Step S1: selecting a drive signal from the third drive signal and the first drive signal of the first switch tube according to the boost-buck mode signal and the third drive signal of the third switch tube, filtering the selected drive signal or the voltage division signal of the selected drive signal and comparing it with the first reference voltage, and obtaining a closed-loop buck mode signal according to the comparison result;

[0091] Step S2: comparing the output voltage of the buck-boost converter with a second reference voltage, and obtaining an open-loop buck mode signal according to the comparison result; and

[0092] Step S5: when both the closed-loop buck mode signal and the open-loop buck mode signal are valid, outputting a valid buck mode signal to switch the working mode of the buck-boost converter to the buck mode in the next switching cycle.

[0093] Furthermore, the mode switching method further includes:

[0094] Step S3: selecting a drive signal from the second drive signal and the fourth drive signal of the fourth switch tube according to the boost-buck mode signal and the second drive signal of the second switch tube, filtering the selected drive signal or the voltage division signal of the selected drive signal and comparing it with the third reference voltage, and obtaining a closed-loop boost mode signal according to the comparison result;

[0095] Step S4: comparing the output voltage of the buck-boost converter with a fourth reference voltage, and obtaining an open-loop boost mode signal according to the comparison result; and

[0096] Step S6: When one of the closed-loop boost mode signal and / or the open-loop boost mode signal is valid, output a valid boost mode signal to switch the working mode of the buck-boost converter to the boost mode in the next switching cycle.

[0097] Furthermore, the mode switching method further includes:

[0098] Step S7: when both the buck mode signal and the boost mode signal are invalid, outputting a valid boost-buck mode signal to switch the working mode of the buck-boost converter to the boost-buck mode in the next switching cycle.

[0099] Furthermore, step S1 further includes:

[0100] Performing a NAND operation on the boost-buck mode signal and the third driving signal, and providing the third driving signal or a voltage division signal of the first driving signal to the first node according to the operation result;

[0101] filtering the voltage of the first node to obtain a stepped-down filtered voltage; and

[0102] The buck filtered voltage is compared with the first reference voltage, and the closed-loop buck mode signal is obtained according to the comparison result.

[0103] Step S3 also includes:

[0104] Performing a NAND operation on the boost-buck mode signal and the second drive signal, and providing a voltage division signal of the second drive signal or the fourth drive signal to the second node according to the operation result;

[0105] filtering the voltage of the second node to obtain a boosted filtered voltage; and

[0106] The boost filter voltage is compared with the third reference voltage, and the closed-loop boost mode signal is obtained according to the comparison result.

[0107] Among them, the first reference voltage is equal to the product of the first threshold and the first voltage, the third reference voltage is equal to the product of the second threshold and the first voltage, the second reference voltage is equal to the product of the first threshold and the input voltage of the buck-boost converter, and the fourth reference voltage is equal to the product of the second threshold and the input voltage, wherein the first threshold is related to the maximum conversion ratio of the output voltage to the input voltage when the buck-boost converter is in the buck mode, the second threshold is related to the minimum conversion ratio of the output voltage to the input voltage when the buck-boost converter is in the boost mode, and the first voltage is related to the amplitude of the first to fourth drive signals.

[0108] According to the embodiments of the present invention, as described above, these embodiments do not describe all the details in detail, nor do they limit the invention to specific embodiments. Obviously, many modifications and changes can be made based on the above description. This specification selects and specifically describes these embodiments in order to better explain the principles and practical applications of the present invention, so that those skilled in the art can make good use of the present invention and the modified use based on the present invention. The scope of protection of the present invention shall be based on the scope defined by the claims of the present invention and their equivalents.

Claims

1. A mode switching method for a buck-boost converter, the buck-boost converter comprising an inductor, a first switch tube, a second switch tube, a third switch tube and a fourth switch tube, the first switch tube, the inductor and the fourth switch tube are sequentially connected between an input end and an output end, one end of the second switch tube is connected to a node between the first switch tube and the inductor, one end of the third switch tube is connected to a node between the inductor and the fourth switch tube, the working modes of the buck-boost converter include a buck mode, a boost mode and a boost-buck mode, wherein: The mode switching method comprises: selecting a driving signal from the third driving signal and the first driving signal of the first switching tube according to the boost-buck mode signal and the third driving signal of the third switching tube, filtering the selected driving signal or the voltage-divided signal of the selected driving signal and comparing it with the first reference voltage, and obtaining a closed-loop buck mode signal according to the comparison result; Comparing the output voltage of the buck-boost converter with a second reference voltage, and obtaining an open-loop buck mode signal according to the comparison result; and When both the closed-loop buck mode signal and the open-loop buck mode signal are valid, a valid buck mode signal is output to switch the working mode of the buck-boost converter to the buck mode in the next switching cycle.

2. The mode switching method according to claim 1, further comprising: selecting a driving signal from the second driving signal and the fourth driving signal of the fourth switching tube according to the boost-buck mode signal and the second driving signal of the second switching tube, filtering the selected driving signal or the voltage-divided signal of the selected driving signal and comparing it with a third reference voltage, and obtaining a closed-loop boost mode signal according to the comparison result; Comparing the output voltage of the buck-boost converter with a fourth reference voltage, and obtaining an open-loop boost mode signal according to the comparison result; as well as When the closed-loop boost mode signal and / or the open-loop boost mode signal is valid, outputting a valid boost mode signal to switch the working mode of the buck-boost converter to the boost mode in the next switching cycle; When both the buck mode signal and the boost mode signal are invalid, a valid boost-buck mode signal is output to switch the working mode of the buck-boost converter to the boost-buck mode in the next switching cycle.

3. The mode switching method according to claim 1, wherein: The step of selecting a driving signal from the third driving signal and the first driving signal of the first switching tube according to the boost-buck mode signal and the third driving signal of the third switching tube, filtering the selected driving signal or the voltage-divided signal of the selected driving signal and comparing it with the first reference voltage, and obtaining a closed-loop buck mode signal according to the comparison result includes: Performing a NAND operation on the boost-buck mode signal and the third driving signal, and providing the third driving signal or a voltage division signal of the first driving signal to the first node according to the operation result; filtering the voltage of the first node to obtain a stepped-down filtered voltage; and comparing the buck filtered voltage with the first reference voltage, and obtaining the closed-loop buck mode signal according to the comparison result, Among them, the first reference voltage is equal to the product of the first threshold and the first voltage, the second reference voltage is equal to the product of the first threshold and the input voltage of the buck-boost converter, the first threshold is related to the maximum conversion ratio of the output voltage to the input voltage when the buck-boost converter is in the buck mode, and the first voltage is related to the amplitude of the first to fourth drive signals.

4. The mode switching method according to claim 2, wherein: The step of selecting a drive signal from the second drive signal and the fourth drive signal of the fourth switch tube according to the boost-buck mode signal and the second drive signal of the second switch tube, filtering the selected drive signal or the voltage-divided signal of the selected drive signal and comparing it with a third reference voltage, and obtaining a closed-loop boost mode signal according to the comparison result includes: Performing a NAND operation on the boost-buck mode signal and the second drive signal, and providing a voltage division signal of the second drive signal or the fourth drive signal to the second node according to the operation result; filtering the voltage of the second node to obtain a boosted filtered voltage; and The boost filter voltage is compared with the third reference voltage, and the closed-loop boost mode signal is obtained according to the comparison result. Among them, the third reference voltage is equal to the product of the second threshold and the first voltage, the fourth reference voltage is equal to the product of the second threshold and the input voltage, the second threshold is related to the minimum conversion ratio of the output voltage to the input voltage when the buck-boost converter is in the boost mode, and the first voltage is related to the amplitude of the first to fourth drive signals.

5. A mode switching circuit of a buck-boost converter, the buck-boost converter comprising an inductor, a first switch tube, a second switch tube, a third switch tube and a fourth switch tube, the first switch tube, the inductor and the fourth switch tube are sequentially connected between an input end and an output end, one end of the second switch tube is connected to a node between the first switch tube and the inductor, one end of the third switch tube is connected to a node between the inductor and the fourth switch tube, the working modes of the buck-boost converter include a buck mode, a boost mode and a boost-buck mode, and the mode switching circuit comprises: a closed-loop buck determination module, configured to select a drive signal from the third drive signal and the first drive signal of the first switch tube according to the boost-buck mode signal and the third drive signal of the third switch tube, filter the selected drive signal or the voltage-divided signal of the selected drive signal and compare it with the first reference voltage, and obtain a closed-loop buck mode signal according to the comparison result; an open-loop buck determination module, configured to compare the output voltage of the buck-boost converter with a second reference voltage, and obtain an open-loop buck mode signal according to the comparison result; and The open-loop / closed-loop judgment module is used to output a valid buck mode signal when both the closed-loop buck mode signal and the open-loop buck mode signal are valid, so as to switch the working mode of the buck-boost converter to the buck mode in the next switching cycle.

6. The mode switching circuit according to claim 5, further comprising: a closed-loop boost judgment module, configured to select a drive signal from the second drive signal and the fourth drive signal of the fourth switch tube according to the boost-buck mode signal and the second drive signal of the second switch tube, filter the selected drive signal or the voltage-divided signal of the selected drive signal, and compare it with a third reference voltage, and obtain a closed-loop boost mode signal according to the comparison result; an open-loop boost determination module, configured to compare the output voltage of the buck-boost converter with a fourth reference voltage, and obtain an open-loop boost mode signal according to the comparison result; and The open-loop / closed-loop judgment module is further configured to output a valid boost mode signal when the closed-loop boost mode signal and / or the open-loop boost mode signal is valid, so as to switch the working mode of the buck-boost converter to the boost mode in the next switching cycle; The open-loop and closed-loop judgment module is also used to output a valid boost-buck mode signal when both the buck mode signal and the boost mode signal are invalid, so as to switch the working mode of the buck-boost converter to the boost-buck mode in the next switching cycle.

7. The mode switching circuit according to claim 6, wherein: The closed-loop voltage reduction judgment module comprises: A first resistor and a second resistor are connected in sequence between the first driving signal and a ground terminal; A third resistor and a first transmission gate are sequentially connected between the third driving signal and the first node; a second transmission gate connected between a common node of the first resistor and the second resistor and the first node; A first comparator, having a negative input terminal connected to the first node, a positive input terminal receiving the first reference voltage, and an output terminal providing the closed-loop buck mode signal; A first NAND gate, having a first input terminal receiving the boost-buck mode signal, a second input terminal receiving the third driving signal, and an output terminal connected to the control terminal of the second transmission gate; A first NOT gate, whose input end receives the output end of the first NAND gate and whose output end is connected to the control end of the first transmission gate; The open-loop voltage reduction judgment module comprises: A third comparator, having a negative input terminal receiving the output voltage of the buck-boost converter, a positive input terminal receiving the second reference voltage, and an output terminal providing the open-loop buck mode signal; The open-loop and closed-loop judgment module comprises: A third NAND gate, a first input terminal receiving the open-loop buck mode signal, and a second input terminal receiving the closed-loop buck mode signal; The third NOT gate has an input end connected to the output end of the third NAND gate, and an output end providing the buck mode signal.

8. The mode switching circuit according to claim 7, wherein: The closed-loop boost judgment module comprises: A fourth resistor and a fifth resistor are connected between the fourth driving signal and the ground terminal in sequence; a sixth resistor and a third transmission gate, connected in sequence between the second driving signal and the second node; a fourth transmission gate connected between a common node of the fourth resistor and the fifth resistor and the second node; A second comparator, having a negative input terminal connected to the second node, a positive input terminal receiving the third reference voltage, and an output terminal providing the closed-loop boost mode signal; A second NAND gate, having a first input terminal receiving the boost-buck mode signal, a second input terminal receiving the second drive signal, and an output terminal connected to the control terminal of the fourth transmission gate; A second NOT gate, whose input end receives the output end of the second NAND gate and whose output end is connected to the control end of the third transmission gate; The open-loop boost judgment module comprises: A fourth comparator, having a positive input terminal receiving the output voltage of the buck-boost converter, a negative input terminal receiving the fourth reference voltage, and an output terminal providing the open-loop boost mode signal; The open-loop and closed-loop judgment module also includes: A first NOR gate, a first input terminal receiving the open-loop boost mode signal, and a second input terminal receiving the closed-loop boost mode signal; a fourth NOT gate, whose input end is connected to the output end of the first NOR gate, and whose output end provides the boost mode signal; The second NOR gate has a first input terminal receiving the output terminal of the third NOR gate, a second input terminal receiving the output terminal of the fourth NOR gate, and an output terminal providing the boost-buck mode signal.

9. The mode switching circuit according to claim 8, wherein: The first to fourth comparators are hysteresis comparators, and the resistance values ​​of the first resistor, the second resistor, the fourth resistor and the fifth resistor are equal; The first reference voltage is equal to the product of a first threshold value and a first voltage, the third reference voltage is equal to the product of a second threshold value and the first voltage, the second reference voltage is equal to the product of the first threshold value and an input voltage of the buck-boost converter, and the fourth reference voltage is equal to the product of the second threshold value and the input voltage, wherein the first threshold value is related to a maximum conversion ratio of an output voltage to an input voltage when the buck-boost converter is in a buck mode, the second threshold value is related to a minimum conversion ratio of an output voltage to an input voltage when the buck-boost converter is in a boost mode, and the first voltage is related to the amplitudes of the first to fourth drive signals.

10. A buck-boost converter, comprising: The first switch tube and the second switch tube are connected between the input voltage and the ground terminal in sequence, and the common node thereof is the first switch node. The control terminals of the first switch tube and the second switch tube receive the first drive signal and the second drive signal respectively. an inductor connected between the first switch node and the second switch node; A third switch tube is connected between the second switch node and a ground terminal, and a control terminal of the third switch tube receives a third driving signal; a fourth switch tube, connected between the second switch node and the output voltage, wherein a control terminal of the fourth switch tube receives a fourth driving signal; The mode switching circuit according to any one of claims 5 to 9; as well as The logic control circuit is used to control the buck-boost converter to operate in a corresponding operating mode according to the boost mode signal, the buck mode signal and the boost-buck mode signal.

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