Implementation method for expanding slave station function on EtherCAT master station
By expanding the slave function on the EtherCAT master station, using the connection between the CPU chip and the slave control chip, the two-way transmission of slave data is achieved, and the problems of complex structure, high power consumption and high cost of the integrated implementation method of the EtherCAT master station and slave station in the prior art are solved, and better performance and larger data volume are achieved.
Patent Information
- Application Number
- CN202411763985.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-03
- Publication Date
- 2025-03-07
AI Technical Summary
In the prior art, the integrated implementation method of the EtherCAT master and slave station has problems such as complex structure, high power consumption and high cost, and the performance is poor when the data volume is large.
The slave function is expanded on the EtherCAT master station, and connected to the first slave control chip esc1 through the CPU chip, and sent the data collected by the slave to the CPU chip; at the same time, the MCU connects the second slave control chip esc2 with the second slave protocol stack, and connects to the external EtherCAT master station to realize the two-way transmission of slave data.
The slave expansion function of the EtherCAT master station is realized, which reduces the main processor load, simplifies the hardware circuit design, has better performance, more functions and larger data volume.
Smart Images
Figure CN119583246A_ABST
Abstract
Description
Technical Field
[0001] The present invention belongs to the field of EtherCAT control, and specifically relates to a method for implementing extended slave station functions on an EtherCAT master station. The method is suitable for scenarios where the collection and data transmission of large amounts of data require both EtherCAT master and slave station functions. Background Art
[0002] As we all know, EtherCAT (Ethernet Control Automation Technology) is an open architecture, Ethernet-based fieldbus system. The CAT in its name is the abbreviation of Control Automation Technology.
[0003] To achieve EtherCAT communication control and management, a master station and slave stations with communication connections are usually provided. The existing methods for integrating the EtherCAT master and slave stations mainly use high-performance, high-cost ARM processors to run the Linux system and implement the EtherCAT master function using IGH1.5.2, which has a complex structure, high power consumption, and high cost. Alternatively, only a low-cost MCU is used to implement the EtherCAT slave function, or a low-cost MCU is used to implement both the EtherCAT master and EtherCAT slave functions, which has poor performance and a small amount of data.
[0004] Therefore, the applicant hopes to seek technical solutions to improve the above technical problems. Summary of the Invention
[0005] In view of this, the purpose of the present invention is to propose a method for extending the slave station function on an EtherCAT master station, which realizes the slave station expansion function of the EtherCAT master station and has a simpler hardware circuit design. Compared with the existing implementation method of using a high-performance ARM processor to run a Linux system, the solution provided by the present invention has the advantages of reducing the load of the main processor and integrating the master station and slave station into one. Compared with the method of using an MCU to implement the EtherCAT master station and slave station, the solution provided by the present invention has the advantages of better performance, more functions and larger data volume.
[0006] To this end, the technical solution adopted in the present invention is as follows: A method for implementing extended slave station functions on an EtherCAT master station, wherein the EtherCAT master station includes a CPU chip for implementing core control, the CPU chip is transplanted with a master station protocol stack and is only used to implement the master station function; wherein, The MCU of the slave controller is transplanted with two sets of slave protocol stacks. One of them is connected to the first slave control chip esc1 via the first slave protocol stack. The CPU chip is connected to the first slave control chip esc1, and the data collected from the slave is sent to the CPU chip through the first slave control chip esc1. Another path of the MCU is connected to the second slave control chip esc2 via the second slave protocol stack. The second slave control chip esc2 is connected to the external EtherCAT master station, and the data collected by the slave station is sent to the external EtherCAT master station through the second slave control chip esc2, thereby realizing the slave expansion function of the EtherCAT master station. The MCU is extended with multiple AO and multiple CAN channels.
[0007] Preferably, the CPU chip adopts a Feiteng E2000D processor with a MAC (Media Access Control) interface; the master station protocol stack uses the open source protocol stack IGH1.5.2, which is used to implement the EtherCAT master station function on the Linux operating system.
[0008] Preferably, the MCU of the slave controller adopts a GD32F470 processor; the first slave control chip esc1 and the second slave control chip esc2 both adopt ET1100.
[0009] Preferably, the CPU chip is connected to the first slave station control chip esc1 via an Ethernet physical layer PHY chip.
[0010] Preferably, the first slave control chip esc1 and the second slave control chip esc2 are respectively connected to the MCU of the slave controller through SPI (Serial Peripheral Interface) or MCI (MicroController Interface), and the slave protocol stack encapsulates the two modes into a unified interface for direct call by the upper layer protocol; the MCU of the slave controller processes EtherCAT data frames and provides a data interface for the slave control device.
[0011] Preferably, when the first slave control chip esc1 and the second slave control chip esc2 are respectively communicated with the MCU of the slave controller through SPI, their underlying communication is realized through the Spihw.c module; wherein, the Spihw.c module refers to a serial mode processor interface module, which defines the communication interface function between the MCU in serial mode and its corresponding slave control chip esc, for calling during upper-layer application communication to complete the exchange of underlying data.
[0012] Preferably, the first slave station protocol stack and the second slave station protocol stack are the same, and are divided into two layers from the communication level: a data link layer (DL) and an application layer (AL), wherein the data link layer is the data exchange layer between each slave station control chip and the MCU; the application layer is used to implement the EtherCAT protocol, including state machine ecatslv.* processing, periodic process data ecatappl.* processing and aperiodic mailbox (Mailbox.*) data processing.
[0013] Preferably, the state machine ecatslv.* processes as an EtherCAT state machine module, the EtherCAT state machine conversion request is initiated by the master station, the master station writes the request status into the A1Control register, the slave station obtains the current state conversion event by querying, and passes the register value as a parameter into the AL_ControlInd() function, which serves as the core function to process the state machine conversion, configures the SM channel to be turned on or off according to the status requested by the master station, and checks whether the SM channel parameters are configured correctly; The periodic process data ecatappl.* is processed as the application layer AL interface of the EtherCAT slave and the interface between the state machine ecatslv.* and the process data, including the definition of the Main() function, the mapping of input and output process data objects, and the exchange of input and output process data between each slave control chip and the MCU local memory; The aperiodic mailbox (Mailbox.*) data processing is handled as an EtherCAT mailbox service module, including: initialization of the mailbox communication interface and configuration of mailbox channel parameters, opening or closing the mailbox service according to the current state machine ecatslv.*, repeated mailbox sending requests after mailbox communication failure, reading and writing mailbox data, and calling corresponding service functions for processing according to different service types requested by the master station.
[0014] Preferably, in the data interaction between the external EtherCAT master station and the current EtherCAT master station, the refresh TXPDO data flow of the external EtherCAT master station includes: When the external EtherCAT master refreshes the TXPDO, the MCU receives the instruction and the data of the TXPDO, which is set to N bytes. These bytes contain the control of the MCU connected to multiple AOs and multiple CANs, but not direct control; they are placed in the RXPDO of the EtherCAT master CPU chip, waiting for the refresh of the RXPDO of the EtherCAT master CPU chip, and then these data are transmitted to the CPU chip; the CPU chip decomposes these data, parses out the control data connected to the multiple AOs and multiple CANs on the MCU, and transmits them to the multiple AOs and multiple CANs extended by the MCU through TXPDO; the CPU chip reads the current information of the multiple AOs and multiple CANs extended by the MCU through RXPDO.
[0015] Preferably, in the data interaction between the external EtherCAT master station and the current EtherCAT master station, the refresh RXPDO data flow of the external EtherCAT master station includes: The EtherCAT master CPU chip refreshes TXPDO and sends the data to the MCU; the MCU stores the received data; when the external EtherCAT master refreshes RXPDO, the MCU transmits the TXPDO data sent by the EtherCAT master CPU chip to the external EtherCAT master.
[0016] The present invention realizes the expansion of slave station functions on a high-performance EtherCAT master station (preferably using a Feiteng E2000D processor as its CPU chip). The expanded slave station MCU runs two sets of slave station protocol stacks simultaneously, one set of slave station protocol stacks communicates with the CPU chip of the EtherCAT master station for the master station, and the other set of slave station protocol stacks communicates with an external EtherCAT master station; the high-performance CPU board is only used to implement the EtherCAT master station function, and does not implement the slave station protocol stack to reduce the load of the high-performance EtherCAT master station; at the same time, dual sets of slave station protocol stacks are creatively implemented on the MCU, which can communicate with two masters at the same time, thereby realizing the slave station expansion function of the EtherCAT master station, and the present application makes the hardware circuit design more concise; compared with the implementation method of using a high-performance ARM processor to run a Linux system in the prior art, the solution provided by the present invention has the advantages of reducing the load of the main processor and integrating the master station and the slave station; compared with the method of using an MCU to implement the EtherCAT master station and slave station, the solution provided by the present invention has the advantages of better performance, more functions and larger data volume. BRIEF DESCRIPTION OF THE DRAWINGS
[0017] Figure 1 This is a system structure diagram for extending the slave function on the EtherCAT master station under the specific implementation mode of this application; Figure 2This is an architectural diagram of a slave station protocol stack according to a specific embodiment of the present application; Figure 3 This is a schematic diagram of the connection structure between the first slave station control chip esc1 or the second slave station control chip esc2 and the MCU under the specific implementation mode of this application, wherein Figure 2 In the example, the first slave control chip esc1 or the second slave control chip esc2 are both marked with "esc (ET1100)". Figure 4 Schematic diagram of the refresh TXPDO data flow of the external EtherCAT master station under the specific implementation mode of this application; Figure 5 This is a schematic diagram of the refresh RXPDO data flow of the external EtherCAT master station under the specific implementation method of this application. DETAILED DESCRIPTION
[0018] An embodiment of the present invention discloses a method for implementing slave function extension on an EtherCAT master station. The EtherCAT master station includes a CPU chip for implementing core control. The CPU chip is transplanted with a master protocol stack and is only used to implement the master function. The MCU of the slave controller is transplanted with two sets of slave protocol stacks. One path is connected to a first slave control chip esc1 via a first slave protocol stack. The CPU chip is connected to the first slave control chip esc1, and data collected from the slave is sent to the CPU chip via the first slave control chip esc1. The other path of the MCU is connected to a second slave control chip esc2 via a second slave protocol stack. The second slave control chip esc2 is connected to an external EtherCAT master station, and data collected from the slave is sent to the external EtherCAT master station via the second slave control chip esc2, thereby implementing the slave extension function of the EtherCAT master station. The MCU is extended with multiple AOs and multiple CANs.
[0019] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are only some embodiments recorded in the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.
[0020] See Figure 1As shown, this embodiment proposes a method for implementing extended slave functions on an EtherCAT master station. The EtherCAT master station includes a CPU chip for implementing core control. The CPU chip is transplanted with a master protocol stack and is only used to implement the master function. The MCU of the slave controller is transplanted with two sets of slave protocol stacks. One path is connected to the first slave control chip esc1 with the first slave protocol stack, and the CPU chip is connected to the first slave control chip esc1, and the data collected by the slave is sent to the CPU chip through the first slave control chip esc1; the other path of the MCU is connected to the second slave control chip esc2 with the second slave protocol stack, and the second slave control chip esc2 is connected to the external EtherCAT master station, and the data collected by the slave is sent to the external EtherCAT master station through the second slave control chip esc2, thereby implementing the slave extension function of the EtherCAT master station; the MCU is extended with multiple AOs and multiple CANs.
[0021] Preferably, in this embodiment, the CPU chip ( Figure 1 Marked as "Feitian E2000D Master Station") adopts Feiteng E2000D processor with MAC (Media Access Control) interface; Feiteng E2000D processor is E2000D developed and produced by Feiteng Information Technology Co., Ltd. for embedded applications; Among them, Feiteng E2000D processor integrates 2 FTC310 processor cores, is compatible with 64-bit ARMv8 instruction set and supports ARM64 and ARM32 execution modes, supports single-precision and double-precision floating-point operation instructions and ASIMD processing instructions, supports hardware virtualization, and the product supports commercial and industrial grades.
[0022] Preferably, in this embodiment, the master protocol stack uses the open-source IGH 1.5.2 protocol stack, which has been ported to the Feiteng E2000D processor to implement EtherCAT master functionality on the Linux operating system. It should be noted that the IGH EtherCAT Master for Linux is an open-source EtherCAT master implementation specifically for the Linux platform, designed to provide complete EtherCAT master functionality for Linux systems. IGH EtherCAT is an open-source implementation of the EtherCAT protocol master stack, a fully compliant library that runs on real-time operating systems. Compared to traditional buses, EtherCAT reduces bus communication latency, thereby improving real-time performance. IGH EtherCAT implements this protocol and optimizes and improves it. The IGH EtherCAT Master consists of three components: the master protocol stack, a control application, and an EtherCAT-enabled network card driver module. IGH provides two network card driver options: generic and native. The generic driver works with all network cards and uses the Linux network protocol stack to send and receive data packets. It cannot directly operate the hardware, making real-time performance difficult to guarantee. The native driver is targeted at specific network cards supported by the master station. It operates on the underlying hardware and supports real-time extensions such as RATI and Xenomai, ensuring the real-time performance of the EtherCAT master station.
[0023] Preferably, in this embodiment, the slave controller's MCU utilizes a GD32F470 processor, specifically the GD32F470 processor manufactured by GigaDevice Technology Group Co., Ltd. The GD32F470 processor is a 32-bit general-purpose microcontroller based on the Arm® Cortex®-M4 processor. The Arm® Cortex®-M4 processor includes three AHB buses: the I-CODE bus, the D-CODE bus, and the system bus. All memory accesses within the Cortex®-M4 processor are executed on these three buses, depending on the purpose and target memory space. The memory organization utilizes a Harvard architecture, with predefined memory mapping and up to 4 GB of memory space, ensuring system flexibility and scalability. The system also features a rich set of peripheral resources, including up to four USARTs and four UARTs, three I2Cs, six SPIs, two I2Ss, two CAN 2.0Bs, one SDIO interface, a 10 / 100M Ethernet controller, and support for USB 2.0 FS and HS communications. It is also equipped with three 12-bit high-speed ADCs and two 12-bit DACs with a sampling rate of up to 2.6MSPS; the high performance and low power consumption of the GD32F470 processor are suitable for implementing two sets of station protocol stacks, which can shorten data communication time and improve the overall performance of the product.
[0024] Preferably, in this embodiment, the first slave station control chip esc1 ( Figure 1 Marked as "ET1100") and the second slave control chip esc2 ( Figure 1 Marked as "ET1100") all use ET1100 (produced by Beckhoff); preferably, in this embodiment, the CPU chip is connected to the Ethernet physical layer PHY chip ( Figure 1 Marked as "Ethernet PHY") is connected to the first slave control chip esc1.
[0025] Please refer to the reference for further details. Figure 2 As shown, preferably, the first slave control chip esc1 and the second slave control chip esc2 are connected to the MCU of the slave controller via SPI (Serial Peripheral Interface) or MCI (MicroController Interface) modes respectively, and the slave protocol stack encapsulates the two modes into a unified interface for direct call by the upper layer protocol ( Figure 2 The SPI communication connection mode is shown); the MCU of the slave controller processes the EtherCAT data frame and provides a data interface for the slave control device.
[0026] Please refer to the reference for further details. Figure 3As shown, preferably, when the first slave control chip esc1 ( Figure 3 Marked as "ESC (ET1100) connected to the Feiteng E2000D master") and the second slave control chip esc2 ( Figure 3 When the ESC (ET1100) connected to the external master station communicates with the MCU of the slave controller via SPI, the underlying communication is implemented through the Spihw.c module; the Spihw.c module refers to the serial mode processor interface module, which defines the communication interface functions between the MCU in serial mode and its corresponding slave control chip ESC, which is called by the upper-layer application during communication to complete the exchange of underlying data.
[0027] Preferably, the first slave station protocol stack and the second slave station protocol stack are the same, and are divided into two layers from the communication level: Data Link Layer (DL) and Application Layer (AL). The Data Link Layer is the data exchange layer between each slave station control chip and the MCU; the Application Layer is used to implement the EtherCAT protocol, including state machine ecatslv.* processing, periodic process data ecatappl.* processing, and aperiodic mailbox (Mailbox.*) data processing.
[0028] Preferably, the state machine ecatslv.* is used as the module for processing the EtherCAT state machine. The EtherCAT state machine transition request is initiated by the master station. The master station writes the request status into the A1Control register. The slave station obtains the current state transition event by querying and passes the register value as a parameter into the AL_ControlInd() function. This function is used as the core function to process the transition of the state machine, configure the SM channel to be turned on or off according to the status requested by the master station, and check whether the SM channel parameters are configured correctly. Periodic process data ecatappl.* is processed as the application layer AL interface of the EtherCAT slave and the interface between the state machine ecatslv.* and process data, including the definition of the Main() function, the mapping of input and output process data objects, and the exchange of input and output process data between each slave control chip and the MCU local memory; Aperiodic mailbox (Mailbox.*) data processing, as a module for processing EtherCAT mailbox services, includes: initialization of the mailbox communication interface and configuration of mailbox channel parameters, opening or closing the mailbox service according to the current state machine ecatslv.*, repeated mailbox sending requests after mailbox communication failure, reading and writing mailbox data, and calling corresponding service functions for processing according to different service types requested by the master station; further preferably, in this embodiment, aperiodic mailbox (Mailbox.*) data processing specifically includes processing of the following mailbox service types: Ecatcoe.*, as the CoE processing function definition module, includes the initialization of the CoE interface, the processing of the currently requested CoE service, and the processing of the saved but unprocessed CoE service; Sdoserv.*, as the SDO service processing module, includes: processing all SDO and SDO information services, including processing the upload and download SDO service requests sent by the master station. After processing is completed, the SDO response data is actively read by the master station; Objdef.*, as the module for accessing the CoE object dictionary, includes: reading and writing the object dictionary, obtaining the entry to the object dictionary, and setting the specific processing function of the object dictionary.
[0029] Coeappl.*, as the application layer interface module of the CoE service, processes the actual application of the CoE service and the CoE object dictionary. Its processing functions include: initializing the object dictionary, adding objects to the object dictionary, removing an entry in the object dictionary, and clearing the object dictionary.
[0030] Please refer to the reference for further details. Figure 4As shown, preferably, in the data interaction between the external EtherCAT master station and the current EtherCAT master station, the refresh TXPDO data flow of the external EtherCAT master station includes: when the external EtherCAT master station refreshes the TXPDO, the MCU receives the instruction through the connection of "ET1100 connected to the external master station" (i.e., the second slave station control chip esc2), receives the TXPDO data, and sets it to N bytes. These bytes contain the control of the MCU connected to multiple AOs and multiple CANs, but not direct control; through the connection of "ET1100 connected to the Feiteng E2000D master station" (i.e., the first slave station control chip esc1), put it into the RXPDO of the EtherCAT master station CPU chip, wait for the refresh of the RXPDO of the EtherCAT master station CPU chip, and transmit these data to the CPU chip; the CPU chip decomposes these data, parses out the control data connected to the multiple AOs and multiple CANs on the MCU, and transmits them to the multiple AOs and multiple CANs extended by the MCU through TXPDO; the CPU chip reads the current information of the multiple AOs and multiple CANs extended by the MCU through RXPDO.
[0031] Please refer to the reference for further details. Figure 5 As shown, preferably, in the data interaction between the external EtherCAT master station and the present EtherCAT master station, the refresh RXPDO data flow of the external EtherCAT master station includes: through the connection of "ET1100 connected to the Feiteng E2000D master station" (that is, the first slave station control chip esc1), the EtherCAT master station CPU chip refreshes TXPDO and sends the data to the MCU; the MCU stores the data after receiving it; when the external EtherCAT master station refreshes RXPDO, the MCU transmits the TXPDO data sent by the EtherCAT master station CPU chip to the external EtherCAT master station through the connection of "ET1100 connected to the external master station" (that is, the second slave station control chip esc2).
[0032] It will be apparent to those skilled in the art that the present invention is not limited to the details of the exemplary embodiments described above and that the invention can be embodied in other specific forms without departing from the spirit or essential characteristics of the invention. Therefore, the embodiments should be considered in all respects as illustrative and non-restrictive, and the scope of the invention is defined by the appended claims, not the foregoing description, and all variations within the meaning and range of equivalents of the claims are intended to be included therein. Any reference sign in a claim should not be construed as limiting the claim to which it relates.
[0033] In addition, it should be understood that although this specification is described in terms of implementation methods, not every implementation method contains only one independent technical solution. This narrative method of the specification is only for the sake of clarity. Those skilled in the art should regard the specification as a whole. The technical solutions in each embodiment can also be appropriately combined to form other implementation methods that can be understood by those skilled in the art.
Claims
1. A method for implementing the extension of slave station functions on an EtherCAT master station, characterized in that: The EtherCAT master station includes a CPU chip for realizing core control, and the CPU chip is transplanted with a master station protocol stack and is only used to realize the master station function; wherein, The MCU of the slave controller is transplanted with two sets of slave protocol stacks, one of which is connected to the first slave control chip esc1 with the first slave protocol stack, and the CPU chip is connected to the first slave control chip esc1, and the data collected from the slave is sent to the CPU chip through the first slave control chip esc1; Another path of the MCU is connected to the second slave control chip esc2 through the second slave protocol stack, and the second slave control chip esc2 is connected to the external EtherCAT master station, and the data collected by the slave station is sent to the external EtherCAT master station through the second slave control chip esc2, so as to realize the slave expansion function of the EtherCAT master station; The MCU is extended with multiple AO and multiple CAN channels.
2. The method for implementing the extension of slave station functions on the EtherCAT master station according to claim 1, characterized in that: The CPU chip adopts the Feiteng E2000D processor with a MAC (Media Access Control) interface; the master station protocol stack uses the open source protocol stack IGH1.5.2, which is used to implement the EtherCAT master station function on the Linux operating system.
3. The method for implementing the extension of slave station functions on the EtherCAT master station according to claim 1, characterized in that: The MCU of the slave controller adopts the GD32F470 processor; the first slave control chip esc1 and the second slave control chip esc2 both adopt ET1100.
4. The method for implementing the extension of slave station functions on an EtherCAT master station according to claim 1 or 3, characterized in that: The CPU chip is connected to the first slave station control chip esc1 through an Ethernet physical layer PHY chip.
5. The method for implementing the extension of slave station functions on the EtherCAT master station according to claim 1, characterized in that: The first slave control chip esc1 and the second slave control chip esc2 are connected to the MCU of the slave controller via SPI (Serial Peripheral Interface) or MCI (MicroController Interface) modes respectively, and the slave protocol stack encapsulates the two modes into a unified interface for direct calling by the upper layer protocol; The MCU of the slave controller processes the EtherCAT data frame and provides a data interface for the slave control device.
6. The method for implementing the extension of slave station functions on the EtherCAT master station according to claim 5, characterized in that: When the first slave control chip esc1 and the second slave control chip esc2 are respectively connected to the MCU of the slave controller via SPI, the underlying communication is implemented through the Spihw.c module; wherein the Spihw.c module refers to a serial mode processor interface module, which defines the communication interface function between the MCU in serial mode and its corresponding slave control chip esc, for calling during upper-layer application communication to complete the exchange of underlying data.
7. The method for implementing the extension of slave station functions on an EtherCAT master station according to claim 1 or 5, characterized in that: The first slave station protocol stack is the same as the second slave station protocol stack, and is divided into two layers from the communication level: data link layer (DL) and application layer (AL, Application Layer, wherein the data link layer is the data exchange layer between each slave station control chip and the MCU; the application layer is used to implement the EtherCAT protocol, including state machine ecatslv.* processing, periodic process data ecatappl.* processing and non-periodic mailbox (Mailbox.*) data processing.
8. The method for implementing the extension of slave station functions on the EtherCAT master station according to claim 7, characterized in that: The state machine ecatslv.* is used as a module for processing the EtherCAT state machine. The EtherCAT state machine conversion request is initiated by the master station. The master station writes the request status into the A1Control register. The slave station obtains the current state conversion event by querying, and passes the register value as a parameter into the AL_ControlInd() function. This function is used as a core function to process the conversion of the state machine, configure the opening or closing of the SM channel according to the status requested by the master station, and check whether the SM channel parameters are configured correctly; The periodic process data ecatappl.* is processed as the application layer AL interface of the EtherCAT slave and the interface between the state machine ecatslv.* and the process data, including the definition of the Main() function, the mapping of the input and output process data objects, and the exchange of the input and output process data between each slave control chip and the MCU local memory; The non-periodic mailbox (Mailbox.*) data processing is used as the EtherCAT mailbox service module, including: initialization of the mailbox communication interface and parameter configuration of the mailbox channel, opening or closing the mailbox service according to the current state machine ecatslv.*, repeated mailbox sending requests after mailbox communication fails, reading and writing mailbox data, and calling corresponding service functions for processing according to different service types requested by the master station.
9. The method for implementing the extension of slave station functions on the EtherCAT master station according to claim 1, characterized in that: In the data interaction between the external EtherCAT master station and the current EtherCAT master station, the refresh TXPDO data flow of the external EtherCAT master station includes: When the external EtherCAT master refreshes TXPDO, the MCU receives the instruction and the data of TXPDO, which is set to N bytes. These bytes contain the control of the MCU connected to multiple AOs and multiple CANs, but not direct control; put it into the RXPDO of the EtherCAT master CPU chip, wait for the refresh of the RXPDO of the EtherCAT master CPU chip, and transmit these data to the CPU chip; the CPU chip decomposes these data, parses out the control data connected to multiple AOs and multiple CANs on the MCU, and transmits it to the multiple AOs and multiple CANs extended by the MCU through TXPDO; the CPU chip reads the current information of the multiple AOs and multiple CANs extended by the MCU through RXPDO.
10. The method for implementing the extension of slave station functions on an EtherCAT master station according to claim 1 or 9, characterized in that: In the data interaction between the external EtherCAT master station and the current EtherCAT master station, the refresh RXPDO data flow of the external EtherCAT master station includes: The EtherCAT master CPU chip refreshes TXPDO and sends the data to the MCU; the MCU stores the received data; when the external EtherCAT master refreshes RXPDO, the MCU transmits the TXPDO data sent by the EtherCAT master CPU chip to the external EtherCAT master.