Gateway based on efficient redundant task removal general description language and control logic

Abstract

The invention relates to a gateway based on a general description language and control logic for efficient redundancy removal tasks. The gateway comprises a file library in an HTDL form, a compiler, an instruction composer and a task scheduler, a terminal task description file is written through HTDL and stored in a file library, a task scheduler selects the task description file needing to be sent from the file library and transmits the task description file to a compiler, and the compiler compiles data preprocessing statements and sensor control statements in the task description file into continuous binary instruction streams and sends the continuous binary instruction streams to an instruction composer. The instruction arranger arranges task instruction data and control instruction data and outputs binary data flow which can be identified by the terminal to the communication interface, and the task scheduler predicts long downlink communication of the system through a multi-terminal task prediction mechanism and performs coordinated management on terminal tasks. According to the invention, the architecture is lighter, and the general task description language is used in the gateway, so that the development process is faster, and the architecture redundancy is reduced.

Description

Technical Field

[0001] The present invention relates to the technical field of Internet of Things, and in particular to a gateway based on a highly efficient redundant task decompression general description language and control logic. Background Art

[0002] The Internet of Things perceives and connects the world through terminals. The traditional terminal architecture is mainly evolved from the embedded computer architecture. Its essence is to use a general-purpose computer platform as a carrier and simulate the control method of the target control logic through software, so it has good versatility. Figure 1 As shown in the figure, under the existing design architecture, developers need to select functional chips according to the functional requirements of the terminal, and select the terminal's computing platform (i.e., microprocessor) according to indicators such as terminal form, power consumption, and task performance. Then, with the microprocessor as the core, they will carry out cross-layer design of software and hardware, including the development of terminal hardware circuits and embedded firmware programs. Finally, they need to conduct joint debugging before they can be applied. The process relies on a multi-faceted professional knowledge base, a long development technology chain, and high technical barriers, making it difficult for ordinary users to participate, thus limiting the rapid development of IoT applications.

[0003] At present, Tinylink, a rapid development platform for IoT applications, has been representatively proposed. Its core idea is to develop sensing terminals in a top-down manner. Developers can generate recommended hardware configurations and executable programs on embedded platforms by writing application-oriented high-level control codes. Since then, the research team has further improved the system performance through machine learning, which can help developers better express application logic. Although Tinylink can effectively reduce the burden on application developers, it can only support standard hardware platforms such as standard Arduino and Raspberry Pi, which has certain limitations. Some people have designed an object-oriented scripting language mruby from the perspective of simplifying the difficulty of software design, transferring the terminal software development to a universal development platform (mrubyVM virtual machine), so that developers can quickly write the terminal control code. However, in actual applications, developers need to customize the underlying logic of the virtual machine according to the selected computing platform (microprocessor). Therefore, the existing methods have little effect on simplifying the development process of sensing terminals. Summary of the invention

[0004] The purpose of the present invention is to overcome the shortcomings of the prior art and provide a gateway based on a general description language and control logic for efficient redundancy removal tasks, thereby solving the deficiencies of the prior art.

[0005] The object of the present invention is achieved by the following technical solutions: a gateway based on an efficient redundant task general description language and control logic, wherein the gateway sends task logic to a terminal through wireless communication according to a task allocation strategy preset by a user, and manages terminal tasks using control instructions; the gateway includes an HTDL file library in the form of HTDL and an HTDL compiler, an instruction scheduler, a task scheduler and a communication interface;

[0006] The terminal task description file is written through HTDL and saved in the HTDL file library. The task scheduler selects the task description file to be sent from the HTDL file library and transmits it to the HTDL compiler. The HTDL compiler compiles the data preprocessing statements and sensor control statements in the task description file into continuous binary instruction streams and sends them to the instruction arranger. The instruction arranger arranges the task instruction data and control instruction data, and outputs the binary data stream that the terminal can recognize to the communication interface. The task scheduler predicts the long downlink communication of the system through the multi-terminal task prediction mechanism and coordinates the management of terminal tasks.

[0007] The HTDL syntax design is divided into an off-chip task layer and an on-chip control layer. The syntax of the off-chip task layer is used to describe the key data acquisition, data processing, and data upload logic, and the syntax of the on-chip control layer is used to unify the description of the variable sensor control logic on the perception terminal.

[0008] The syntax of the off-chip task layer includes 8 keywords: task, call, comb, between, outside, sub, avg and upload;

[0009] Task is a keyword for off-chip task definition;

[0010] Call is a keyword for calling a sensor control task, which is used to activate the sensor control circuit to perform a specific sensor control task, thereby obtaining raw data;

[0011] comb is a data combination keyword, which is used to shift, split, and splice separate data to obtain complete sensor data;

[0012] Both between and outside are interval judgment keywords, which are used to judge whether a sensor is within or outside a certain interval. If the judgment result is true, the response pin corresponding to the data is set to a low level or a high level, and its valid flag is set to 1, indicating that the data needs to be uploaded. If the judgment result is false, the response pin is set to the opposite level, and the valid flag is set to 0.

[0013] sub is the difference calculation keyword, which is used to calculate the difference between a certain sensor data and the last sent data;

[0014] avg is the keyword for average value calculation, which is used to realize average value aggregation or mean filtering of sensor data;

[0015] Upload is the keyword for data upload, which is used to set the number of bits of each sensor data to be uploaded after the off-chip task is completed;

[0016] The on-chip control layer includes 9 keywords: sensor, busconfig, pinconfig, read, write, pinread, pinwite, delay and wait;

[0017] sensor is a keyword for defining sensor control tasks;

[0018] busconfig is a keyword for bus interface configuration, indicating that the sensor uses a certain set of pins as the bus interface;

[0019] pinconfig is a single pin configuration keyword, which means to configure a pin as pull-up / pull-down input mode;

[0020] Read is the bus read keyword, which means the data is read from the sensor through the bus;

[0021] Write is the keyword for writing to the bus, which means writing a certain binary data to the sensor through the bus;

[0022] pinread is a keyword for reading pin level, which means reading the pin level of a certain pin;

[0023] pinwrite is a pin level configuration keyword, which means setting the pin level of a pin to a low level or a high level;

[0024] delay is the delay keyword;

[0025] Wait is an event waiting keyword, which means waiting for the level state of a certain pin to become low or high.

[0026] The control instructions from the gateway to the terminal include task allocation instructions and task management instructions. When the user determines the task description file that the terminal needs to receive, the HTDL compiler is only responsible for compiling the task description file into a binary task instruction data stream. The terminal will normally identify and store the task instruction data only after receiving the task allocation instructions sent by the gateway.

[0027] The encoding format of the task assignment instruction consists of a terminal unique identifier, a task assignment instruction code, a sensor control task, a task number and task attribute information. The task number information in the task assignment instruction is recognized by the terminal, and the location for storing the task instruction is selected accordingly. If the assigned task is an off-chip task, the end of the task assignment instruction carries the execution cycle and start delay information of the task.

[0028] The task management instructions include task attribute adjustment instructions, task start and stop instructions, data retransmission instructions and task status query instructions;

[0029] The encoding format of the task attribute adjustment instruction consists of a terminal unique identifier, a task attribute adjustment instruction code, an off-chip task identifier, and task attribute information. The gateway sets the task attribute information of the off-chip task through the task attribute adjustment instruction. The task attribute information includes an execution cycle and a startup delay.

[0030] The encoding format of the task start and stop instruction consists of a terminal unique identifier, a task start and stop instruction code and a computing task identifier. The instruction is provided with a broadcast mechanism. When the terminal number corresponding to the terminal unique identifier in the instruction is equal to the broadcast number, the instruction is effective for all terminals. When the off-chip task number corresponding to the computing task identifier in the instruction is equal to the broadcast number, the instruction will control the start and stop of all off-chip tasks of the target terminal. Through the broadcast mechanism and the task start delay mechanism, the gateway realizes overall control of uplink data transmission of multiple terminals, thereby reducing data collision.

[0031] The encoding format of the data retransmission instruction includes a terminal unique identifier, a data retransmission instruction code and a retransmission data type, and the terminal number to be retransmitted and the retransmission data type are specified by the gateway;

[0032] The encoding format of the status query instruction includes a terminal unique identifier and a status query instruction encoding. The gateway sends the status query instruction to the target terminal to learn about the task allocation status of the target terminal.

[0033] The multi-terminal task prediction mechanism predicts the occupancy and idle time of the uplink communication channel by calculating the time interval for the terminal to upload data, and coordinates the uplink and downlink communications of the system according to the prediction results to achieve efficient utilization of communication resources to avoid uplink and downlink data transmission conflicts and multi-terminal uplink data transmission conflicts.

[0034] The method for avoiding uplink and downlink data transmission conflicts includes:

[0035] Assume that the clock frequency of the terminal is 𝑠, the total length of the off-chip task instructions and sensor control instructions in a task is j bits, the total time required to execute the instructions is t, the size of the uploaded data is k bits, and the execution period of the task is T. Then the time interval for uploading data of this task is The task scheduler uses the time interval and the time of the most recent data upload to calculate the time node for the next data upload of each task, and automatically selects the idle time period of the channel to send data to the terminal based on the calculation result, thereby avoiding conflicts in uplink and downlink data transmission.

[0036] The method for avoiding multi-terminal uplink data transmission conflicts includes:

[0037] When the system starts running, the task scheduler sends a task instruction stream carrying the start delay information of each off-chip task to each terminal in turn. After the task instruction is sent, the task scheduler broadcasts the task start instruction. Each terminal starts to execute the task after a different delay. int Under the same setting conditions, the time from task start to data upload completion is , the task scheduler is based on T c To adjust the startup delay of each terminal task, so as to ensure that most terminals upload data when the channel is idle;

[0038] Design a threshold detection mechanism for data collision rate: When the data collision rate of a periodic task is higher than the threshold, the task scheduler broadcasts task stop and start instructions in sequence, so that each terminal task restarts with a delay, thereby aligning the data transmission time and maintaining the uplink data collision rate within a small range;

[0039] When encountering unpredictable data collision, the task scheduler broadcasts a task stop instruction to all terminals. Subsequently, the task scheduler broadcasts an event data retransmission instruction and sends a periodic task data retransmission instruction to the terminal that is uploading data during the collision event segment. The terminal that receives the data retransmission instruction re-uploads the data after a random delay. After the collision data is processed, the task scheduler broadcasts a task start instruction to restore the normal operation of the system.

[0040] The instruction arrangement format of the instruction arranger consists of a preamble, control instruction data, task instruction length and task instruction data. The terminal starts to parse the control instruction only after identifying the preamble to reduce the probability of data packet mistransmission. The terminal then identifies the terminal number and instruction code in the control instruction and responds accordingly. When the transmitted control instruction is a task allocation instruction, the control instruction will be followed by a signal of the overall length of the task instruction to be allocated, and then the terminal receives and caches the task instruction data of the specified length.

[0041] The present invention has the following advantages: a gateway based on an efficient redundant task general description language and control logic, directly facing the Internet of Things terminal tasks through a general task description language (HTDL), designing special keywords, and users can directly generate terminal control logic in a building block writing manner, which is easier to use; through a task scheduler, tasks of multiple terminals are allocated and managed, the uplink and downlink communications of the system can be predicted according to a task prediction mechanism, and the terminal tasks can be coordinated, thereby ensuring that system communication resources can be efficiently utilized, and solving the problem of uplink and downlink data collision in multi-terminal application scenarios. BRIEF DESCRIPTION OF THE DRAWINGS

[0042] Figure 1 This is a schematic diagram of the architecture of a traditional terminal;

[0043] Figure 2 It is a schematic diagram of the architecture of the present invention;

[0044] Figure 3 Design a schematic diagram for the hierarchical syntax of HTDL;

[0045] Figure 4 This is a schematic diagram of the temperature data storage format of the TMP125 sensor;

[0046] Figure 5 This is a sample diagram of a task description file;

[0047] Figure 6 This is a schematic diagram of the coding example of HTDL statements;

[0048] Figure 7 A schematic diagram of the encoding format for task assignment instructions;

[0049] Figure 8 A schematic diagram of the encoding format of the task attribute adjustment instruction;

[0050] Fig. 9 This is a schematic diagram of the encoding format of task start and stop instructions;

[0051] Fig.10 A schematic diagram of the encoding format of a data retransmission instruction;

[0052] Fig.11 This is a schematic diagram of the encoding format of the status query instruction;

[0053] Fig.12 It is a schematic diagram of uplink and downlink communication mode under the multi-terminal task prediction mechanism;

[0054] Fig.13 This is a diagram of the instruction arrangement format. DETAILED DESCRIPTION

[0055] In order to make the purpose, technical scheme and advantages of the embodiments of the present application clearer, the technical scheme in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. The components of the embodiments of the present application described and shown in the drawings here can be arranged and designed in various different configurations. Therefore, the detailed description of the embodiments of the present application provided below in conjunction with the drawings is not intended to limit the scope of protection of the application claimed for protection, but merely represents the selected embodiments of the present application. Based on the embodiments of the present application, all other embodiments obtained by those skilled in the art without making creative work belong to the scope of protection of the present application. The present invention is further described below in conjunction with the drawings.

[0056] like Figure 2 As shown, the present invention specifically relates to a gateway based on a high-efficiency redundant task general description language and control logic. The gateway sends the task logic to the terminal through wireless communication according to the task allocation strategy preset by the user, and uses control instructions to manage the terminal tasks. The terminal executes the received data processing and sensor control tasks; the gateway sends the task logic to the terminal through wireless communication according to the task allocation strategy preset by the user, and the terminal and the gateway together constitute a unified Internet of Things computer system. Among them, the gateway, as a control center, is responsible for the unified generation of all control logics on the terminal side. The terminal, as a "wireless peripheral" of the gateway, completes the target control logic through the perception task circuit under the control drive of the gateway.

[0057] Furthermore, the gateway includes a common task description language (HTDL) and its compiler, instruction scheduler, and task scheduler, which facilitates the gateway to generate terminal-side control logic; when the system is operating normally, the gateway is responsible for sending task logic to the terminal according to the task allocation strategy preset by the user, and uses control instructions to manage terminal tasks. The terminal is responsible for sensing environmental information, processing sensor data, and uploading valid data. From the perspective of task logic, the gateway, as the carrier of terminal task logic, can schedule and manage multiple terminal tasks through wireless communication; from the perspective of task execution, different terminals can complete related tasks under the remote control of the gateway.

[0058] 1. Divide into task description language design;

[0059] The tasks of IoT terminals are so complicated that it is difficult to find a simple combination method. This makes the terminal's task logic execution have to rely on the microprocessor as a unified computing platform, resulting in a complex terminal architecture (relying on the local microprocessor) or relying on a large amount of communication with the gateway (relying on the microprocessor on the gateway side). This makes it difficult to optimize the hardware architecture or communication overhead of existing terminals.

[0060] To address this problem, the present invention conducts in-depth research on the logic combination principle of terminal tasks and proposes a hierarchical task description language and its compiler to achieve unified description and control of the diverse tasks of the perception terminal, so that the task logic of the terminal can be transferred to the gateway, thereby simplifying the terminal development steps and reducing the cost of IoT application development.

[0061] 1. HTDL syntax design;

[0062] Based on the hierarchical terminal control framework, the present invention divides the syntax design of HTDL into two layers: the off-chip task layer and the on-chip control layer. Figure 3 As shown in the figure, the off-chip task layer syntax is used to describe the terminal's data acquisition, data processing, and data upload logic. The on-chip control layer syntax is responsible for describing the sensor control logic such as bus reading and writing, pin level reading and writing, and event signal detection. This hierarchical design fits the terminal task model, making the syntax logic clearer and easier to understand, which is conducive to improving the readability of the code.

[0063] The present invention constructs the Backus-Naur Form (BNF) expression of the unified chip description language (UCDL). BNF is a paradigm proposed by John Backus and Peter Naur in the 1990s. It is a context-free grammar that uses a series of symbols and expressions to create string generation rules. It has been widely used today because of its concise and clear structure.

[0064] The basic rule of BNF is "<symbol> ::=__expression__", which means that the content of the "symbol" on the left is explained by the expression on the right. The angle brackets "<>" are non-terminal symbols, indicating that the content can be further subdivided. When a non-terminal symbol appears on the right side of a generation rule, it means that there will be another generation rule to explain its place, for example:

[0065] <fullname> ::= <title><First Name><Last Name> That is to say< / title> <fullname>Depend on <title> ,<First Name> and<Last Name> These strings can be further subdivided, such as< / title> <title> ::=Mr|Mrs|Ms|Miss|Dr. Here Mr, Mrs, Ms, Miss, etc. are terminators, representing the actual value of title. The symbol "|" means "or". This rule means< / title> <title> It can be interpreted as one of Mr or Mrs or Ms or Miss or Dr. For ease of understanding, the present invention summarizes the symbols used in HTDL as follows:< / title>

[0066] 1) "<>" represents a nonterminal symbol, and its contents are syntactic variables.

[0067] 2) "::=" is used to connect the left and right sides of a sentence, and indicates that the variable on the left is composed of the content on the right.

[0068] 3) "|" means or, that is, choose one from multiple options. For example, X|Y|Z means choose one from X, Y and Z.

[0069] 4) "[]" indicates that the content is optional, i.e., not mandatory. ::= [ <c>], then it means the variable is necessary, and <c>It is an optional item and can be omitted under certain conditions.

[0070] (1) Off-chip task layer;

[0071] According to the hierarchical terminal control framework, the off-chip task layer of HTDL is used to describe the task logic of data acquisition, data processing, and data upload. The syntax of this layer contains 8 keywords, as follows:

[0072] 1) task: keyword for defining off-chip tasks. Its syntax is 𝑡𝑎𝑠𝑘𝑥𝑥𝑥, which means defining an off-chip task named "xxx".

[0073] 2) call: sensor control task call keyword, used to activate the sensor control circuit to perform a specific sensor control task to obtain raw data. Its syntax format is: 𝑐𝑎ll(𝑥𝑥𝑥), which means calling the sensor control task logic named 𝑥𝑥𝑥. An off-chip task can execute the call statement multiple times to achieve control and data acquisition of multiple sensor chips. The acquired data will be stored in the raw data register group in the sensor control circuit in sequence, and 𝑟[𝑥] is used to represent the x-th 8-bit raw data.

[0074] 3) comb: data combination keyword. In some sensor chips with higher sensing accuracy, data longer than 8 bits will be split and stored in multiple registers. In order to pre-process the sensing data, it is first necessary to shift, split, and splice these separately stored data to obtain complete sensing data. This is the role of the comb keyword. Its syntax format is 𝑐𝑜𝑚𝑏(𝑛, 𝑠𝑖𝑔𝑛𝑒d / 𝑢𝑛𝑠𝑖𝑔𝑛𝑒d, 𝑟[𝑥][𝑎 ∶ 𝑏], 𝑟[𝑦][𝑐 ∶ d], ...), which means that the nth sensor data is a signed / unsigned number, and its value is the concatenation of the a-bit to b-bit data of the xth data and the c-bit to d-bit data of the yth data in the sensor output buffer. For example, the temperature data of the TMP125 chip is stored as follows:< / c> < / c> Figure 4 As shown, the corresponding data combination statement is 𝑐𝑜𝑚𝑏(𝑛, 𝑠𝑖𝑔𝑛𝑒d, 𝑟[0][6 ∶ 0], 𝑟[1][7 ∶ 5]).

[0075] 4) between and outside: two interval judgment keywords, with the syntax format of 𝑏𝑒𝑡𝑤𝑒𝑒𝑛 / 𝑜𝑢𝑡𝑠𝑖d𝑒(𝑛, 𝐴, 𝐵, 0 / 1), indicating whether the nth sensor data is within or outside the interval "[A, B)". If the judgment result is true, the response pin corresponding to the data is set to a low level ("0") or a high level ("1"), and its valid flag is set to "1", indicating that the data needs to be uploaded; if the judgment result is false, the response pin is set to the opposite level and the valid flag is set to "0". The gateway usually only pays attention to the sensor data within a specific numerical range, so the interval judgment function can save system uplink communication resources without losing sensor performance and give the terminal real-time response capabilities.

[0076] 5) sub: difference calculation keyword, the syntax format is 𝑠𝑢𝑏(𝑛), which means to calculate the difference between the nth sensor data and the last sent data. This keyword can be used in combination with the interval judgment keyword, and the combined syntax format is 𝑠𝑢𝑏_𝑏𝑒𝑡𝑤𝑒𝑒𝑛 / 𝑜𝑢𝑡𝑠𝑖d𝑒(𝑛, 𝐴, 𝐵), which means to perform interval judgment on the difference of the nth sensor data and realize the threshold detection processing of the change amount of sensor data.

[0077] 6) avg: average value calculation keyword, used to realize average value aggregation or average filtering of sensor data. Its syntax format is 𝑎𝑣𝑔(𝑛, 𝑚, 𝑘), which means to calculate the average value of the nth sensor data, the queue length is m, and the average value is uploaded every k samples. Similar to the "sub" keyword, this keyword can also be used in combination with the interval judgment keyword. The syntax format is 𝑎𝑣𝑔_𝑏𝑒𝑡𝑤𝑒𝑒𝑛 / 𝑜𝑢𝑡𝑠𝑖d𝑒(𝑛, 𝑚, 𝑘, 𝐴, 𝐵).

[0078] 7) upload: data upload keyword, used to set the number of bits required to upload each sensor data after the execution of this off-chip task. The grammatical format of this keyword is 𝑢𝑝l𝑜𝑎d(𝑎, 𝑏, 𝑐), which means uploading the lower a bit of the first sensor data, the lower b bit of the second sensor data, and so on. Due to the different bit lengths of different sensor data, the terminal will expand each sensor data to the maximum bit length that the UTE circuit can handle after executing the "comb" instruction. The function of this keyword is to crop the results of data processing, thereby preventing the increase in the amount of uplink communication data caused by data bit expansion.

[0079] (2) On-chip control layer;

[0080] The on-chip control layer of HTDL is used to unify the description of the variable sensor control logic on the perception terminal. After consulting a large number of sensor chip data manuals, the present invention found that although the control logic of different sensor chips is different, most sensors use a few standardized bus communication protocols, such as SPI, I2C, etc. In addition to the interaction of bus signals, some sensor chips also output event signals to indicate the occurrence of events in the environment. Therefore, the following 9 keywords are summarized to achieve the description of different sensor control logics:

[0081] 1) sensor: keyword for defining sensor control tasks. Its syntax is 𝑠𝑒𝑛𝑠𝑜𝑟𝑛𝑎𝑚𝑒, which means defining a sensor control task named "name".

[0082] 2) busconfig: bus interface configuration keyword, the syntax format is 𝑏𝑢𝑠𝑐𝑜𝑛𝑓𝑖𝑔(𝑛, 𝑡𝑦𝑝𝑒), indicating that the sensor uses the nth group of pins as the bus interface, and the bus type is "type". In the prototype system of the present invention, the specified bus types are SPI and I2C, which can realize data interaction with most common sensor chips.

[0083] 3) pinconfig: single pin configuration keyword. The syntax format for configuring an input pin is 𝑝𝑖𝑛𝑐𝑜𝑛𝑓𝑖𝑔(𝑛, 𝑖𝑛𝑝𝑢𝑡, 𝑝𝑢ll − 𝑢𝑝 / 𝑝𝑢ll − d𝑜𝑤𝑛), which means configuring pin n as pull-up / pull-down input mode. The syntax format for configuring an output pin is 𝑝𝑖𝑛𝑐𝑜𝑛𝑓𝑖𝑔(𝑛, 𝑜𝑢𝑡𝑝𝑢𝑡, 𝑂𝐷 / 𝑃 𝑃), which means configuring pin n as open-drain / push-pull output mode. The single pin configuration keyword enables the terminal to flexibly configure the pin electrical characteristics and enhance compatibility with different sensor chips.

[0084] 4) read: bus read keyword, the syntax format is 𝑟𝑒𝑎d(𝑛), which means reading n bytes of data from the sensor through the bus.

[0085] 5) write: bus write keyword, the syntax format is 𝑤𝑟𝑖𝑡𝑒(0𝑥𝐴𝐴), which means writing hexadecimal data 0xAA to the sensor through the bus. The "write" keyword supports writing unsigned 8-bit data and is compatible with decimal and hexadecimal writing formats.

[0086] 6) pinread: Pin level reading keyword, the syntax format is 𝑝𝑖𝑛𝑟𝑒𝑎d(𝑛), which means reading the pin level of pin number n.

[0087] 7) pinwrite: Pin level configuration keyword, the syntax format is 𝑝𝑖𝑛𝑤𝑟𝑖𝑡𝑒(𝑛, 0 / 1), which means setting the pin level of pin number n to low level ("0") or high level ("1").

[0088] 8) delay: Delay keyword, the syntax format is d𝑒l𝑎𝑦(𝑎, 𝑏), which means the delay is a and the time unit is b. Users can choose four frequency division modes from "1" to "4", which represent the time units of "microseconds", "milliseconds", "seconds", and "minutes". For example, at a clock frequency of 1MHz, d𝑒l𝑎𝑦(120, 2) means the delay is 120 milliseconds. Different sensors have different internal operating timings, and the time interval between two operations of the terminal on the bus is different. Users can use this keyword to wait for the transfer of the internal state of the chip.

[0089] 9) wait: event waiting keyword, the syntax format is 𝑤𝑎𝑖𝑡(𝑛, 0 / 1, 𝑎, 𝑏), which means waiting for the level state of the nth pin to become low or high. a and b have the same meaning as the parameters in the "delay" keyword, indicating the upper limit of the waiting time. Some sensor chips have the function of preprocessing sensor data. The trigger conditions can be configured internally. When the sensor data meets the trigger conditions, the sensor chip will notify the outside world of the occurrence of the event through the pin. After executing the "wait" instruction, the terminal will start to monitor the target pin level and suspend the task execution until the target pin level is consistent with the target condition, or the waiting time exceeds the upper limit, and then the task will be allowed to continue running.

[0090] Based on the syntax design of the above-mentioned off-chip task layer and on-chip control layer, the present invention realizes the atomic expression of the task logic of the perception terminal. Compared with programming on the microprocessor platform using other high-level programming languages ​​(such as C, C++), users no longer need to learn the underlying principles of the microprocessor, experimental environment, language encapsulation library and other complex development knowledge when programming using HTDL. They only need to consult and understand the data manual of the sensor chip to easily write the sensor control and off-chip task logic. Users can focus more on application development on the gateway side, making IoT application development more efficient.

[0091] 2. Terminal task description file;

[0092] Users can use HTDL to write a terminal task description file with a clear structure, short and easy to read. Take the perception terminal with TMP125 temperature sensor chip as an example, its task description file is as follows: Figure 5 As shown in the figure. This file describes two off-chip tasks and one sensor control task using only 17 lines of code. Compared with codes written in other high-level programming languages, the code complexity is lower and the readability is stronger. The written task description file can be saved in the HTDL file library. The gateway task scheduler can select the task description file to be sent from the HTDL file library, and then hand it over to the HTDL compiler to generate a binary task instruction stream.

[0093] (1) Off-chip fingerprint instruction encoding;

[0094] Each off-chip task instruction has a 3-bit keyword code as the first field, and the encoding mapping of the off-chip task layer keyword is shown in Table 1. The suffix encoding format of different keyword instructions is different.

[0095] Table 1. Off-chip task layer keyword function and coding mapping table

[0096] Keywords Function Encoding Mapping call Sensor control task call 001 comb Data Combination 010 between Judgment within the range 011 outside Out-of-range judgment 100 sub Difference calculation 101 avg Average value calculation 110 upload Data upload 111

[0097] 1) Call instruction: This instruction consists of a keyword and a sensor control task number (3 bits). This instruction is used to call the specified sensor control task to obtain the output of the sensor.

[0098] 2) comb instruction: This instruction contains 5 fields, which are the keyword, sensor data number (2 bits), symbol (1 bit), position mask of the data involved in the combination (8 bits), and valid bit mask of each data (n×8 bits). Its function is to combine n 8 register data output by the sensor into a single 24-bit sensor data. In the prototype system designed by the present invention, there are at most 8 registers that can participate in the combination in each off-chip task, and at most 3 24-bit sensor data can be generated, which can meet the data processing conditions of most sensors.

[0099] 3) Between instruction: This instruction contains 5 fields, namely, keyword, sensor data number (2 bits), left threshold (24 bits), right threshold (24 bits), and response pin level (1 bit). Its function is to make interval judgment on the specified sensor data and control the response pin level according to the judgment result.

[0100] 4) Outside instruction: This instruction has the same encoding format as the "between" instruction. The keyword encoding of the two is different, and the judgment results are opposite.

[0101] 5) sub instruction: This instruction consists of a keyword and a sensor data number (2 bits). Its function is to calculate the difference of the specified sensor data.

[0102] 6) avg instruction: This instruction contains 4 fields, namely, keyword, sensor data number (2 bits), queue length (2 bits), and upload interval (4 bits). Its function is to calculate the average value of sensor data and specify the interval for uploading the average value.

[0103] 7) Upload command: This command contains two fields, namely the keyword and the number of bits required to upload each sensor data (15 bits). Its function is to remove invalid bits in the sensor data expanded to 24 bits and reduce the amount of uploaded data.

[0104] (2) Sensor control instruction encoding;

[0105] Similar to the off-chip task instructions, the first field of the sensor control instruction is a 3-bit keyword code field. The encoding mapping of each keyword is shown in Table 2. The encoding format of each instruction is as follows:

[0106] Table 2. On-chip control layer keyword function and coding mapping table

[0107] Keywords Function Encoding Mapping busconfig Bus interface configuration 000 pinconfig Single pin configuration 001 read Bus Read 010 write Bus Write 011 pinread Pin level reading 100 pinwrite Pin level configuration 101 delay Delay 110 wait Event Waiting 111

[0108] 1) busconfig instruction: This instruction contains 3 fields, namely keyword, pin group number (2 bits), and bus type (1 bit). Its function is to configure a specified group of pins as the bus interface required by the sensor chip.

[0109] 2) pinconfig instruction: This instruction contains 4 fields, namely keyword, pin number (4 bits), input / output type (1 bit), and electrical characteristics (1 bit). Its function is to configure the working mode of a single pin, which can be used for pin level reading, writing, and waiting.

[0110] 3) Read instruction: This instruction contains 2 fields, namely the keyword and the number of data to be read (3 bits). Its function is to read the specified amount of data inside the sensor chip through the bus interface.

[0111] 4) Write instruction: This instruction consists of a keyword and the data to be written (8 bits). Its purpose is to write one byte of data to the sensor chip through the bus interface.

[0112] 5) pinread instruction: This instruction consists of a keyword and the pin number (4 bits) of the level to be read. Its function is to read the level status of the specified pin.

[0113] 6) pinwrite instruction: This instruction contains 3 fields, namely, keyword, pin number (4 bits) to be configured, and level high and low (1 bit). Its function is to configure the level status of the selected pin.

[0114] 7) Delay command: This command contains 3 fields, namely keyword, time length (8 bits), and time unit (2 bits). This command is used to pause the terminal task for a specified time length.

[0115] 8) Wait instruction: This instruction contains 5 fields, namely keyword, waiting pin number (4 bits), target level (1 bit), time length (8 bits), and time unit (2 bits). Its function is to make the terminal suspend the execution of the task until the pin level meets the target state or continues to execute the task after waiting timeout.

[0116] The coding example of HTDL statement is as follows Figure 6 As shown. Based on the above instruction encoding format, the HTDL compiler will compile the data preprocessing statements and sensor control statements in the task description file into continuous binary instruction streams. It should be noted that the statements written by the combined keywords of the off-chip task layer (i.e., the "sub / avg_between / outside" keywords) will be decomposed into two during compilation. For example, 𝑠𝑢𝑏_𝑏𝑒𝑡𝑤𝑒𝑒𝑛(0, 200, 1000) will be decomposed into 𝑠𝑢𝑏(0) and 𝑏𝑒𝑡𝑤𝑒𝑒𝑛(0, 200, 1000).

[0117] 2. Task scheduler design;

[0118] The task scheduler on the gateway is responsible for allocating and managing tasks of the terminal. Therefore, the present invention designs a series of control instructions for the task scheduler. In addition, in order to solve the problem of uplink and downlink data collision in multi-terminal application scenarios, the present invention proposes a multi-terminal task prediction mechanism. The task scheduler can predict the uplink and downlink communications of the system according to the task prediction mechanism and coordinate the terminal tasks, thereby ensuring that the system communication resources can be efficiently utilized.

[0119] 1. Control instruction design;

[0120] There are two main types of control instructions from the gateway to the terminal: task allocation instructions and task management instructions. The first two fields of the control instruction code are the terminal number and the instruction code. Among them, the terminal number uniquely identifies a terminal device in the network and is used to select the control target; the instruction code enables the terminal to identify the type of instruction and make the correct response. The remaining fields vary with the instruction type. The function and encoding format of each instruction are as follows:

[0121] (1) Task assignment instructions;

[0122] When the user determines the task description file that the terminal needs to receive, the HTDL compiler is only responsible for compiling the task description file into a binary task instruction data stream. The terminal needs to receive the task assignment instruction sent by the gateway before it can normally identify and store the task instruction data. The encoding format of the task assignment instruction is as follows: Figure 7 shown.

[0123] The task instruction cache circuit on the terminal will identify the task number information in the task assignment instruction and select the location to store the task instruction accordingly. If the assigned task is an off-chip task, the end of the task assignment instruction will also carry the execution cycle and start delay information of the task. The terminal can set the execution cycle of each task to make the perception strategy more flexible and changeable. Setting a start delay for the terminal's off-chip task can reduce the occurrence of uplink data collisions.

[0124] (2) Task management instructions;

[0125] Task management instructions include task attribute adjustment instructions, task start and stop instructions, data retransmission instructions, and status query instructions, as follows:

[0126] 1) Task attribute adjustment instruction. When the system is running normally, the gateway may need to set the execution frequency and startup delay of the off-chip task. Therefore, the present invention designs a task attribute adjustment instruction, whose encoding format is as follows: Figure 8 shown.

[0127] 2) Task start and stop instructions. As a management node of the network, the gateway needs to have the function of starting and stopping terminal tasks at any time. Therefore, the present invention designs task start and stop instructions. Its encoding format is as follows Fig. 9 As shown. The present invention sets a broadcast mechanism for the instruction: when the terminal number in the instruction is equal to the broadcast number, the instruction will take effect on all terminals; when the off-chip task number in the instruction is equal to the broadcast number, the instruction will control the start and stop of all off-chip tasks of the target terminal. The broadcast mechanism and task start delay mechanism can enable the gateway to achieve overall control of the uplink data transmission of multiple terminals, thereby reducing data collisions.

[0128] 3) Data retransmission instruction. When the gateway detects an uplink data collision, it will send a data retransmission instruction to the terminal where the data upload failed. Its encoding format is as follows: Fig.10 The gateway needs to specify the terminal number that needs to be retransmitted and the type of data to be retransmitted.

[0129] 4) Status query command. The gateway can send a status query command to the target terminal to understand the task allocation of the target terminal. The encoding format is as follows: Fig.11 shown.

[0130] 2. Multi-terminal task prediction mechanism;

[0131] The gateway and the terminal form a star network topology, and there is no communication link between the terminals. Therefore, the present invention only needs to consider the data collision problem between the gateway and the terminal. In terms of the downlink communication link, when the communication mode between the gateway and the terminal is half-duplex (such as backscatter communication mode), the gateway needs to avoid conflicts in uplink and downlink data transmission; in terms of the uplink communication link, when multiple terminals send data to the gateway at the same time, the wireless signals will interfere with each other, resulting in the gateway being unable to receive data normally. In order to solve the above problems, the present invention proposes a multi-terminal task prediction mechanism, which predicts the occupancy and idle time of the uplink communication channel by calculating the time interval for the terminal to upload data, and coordinates the uplink and downlink communications of the system according to the prediction results to achieve efficient utilization of communication resources.

[0132] The present invention first analyzes the law of terminal data upload. The tasks of the sensing terminal can be divided into two categories based on the time characteristics: periodic tasks and event tasks. The frequency of data upload for periodic tasks is fixed and relatively easy to predict. The data upload of event tasks is usually triggered by changes in environmental information and cannot be predicted, so data collisions in the system cannot be completely avoided. The data upload trigger frequency of event tasks is usually low. Therefore, this study focuses on solving the data collision problem caused by periodic tasks, and uses the task prediction mechanism to effectively avoid conflicts between uplink and downlink data transmission and uplink data transmission of multiple terminals.

[0133] 1) Uplink and downlink data transmission conflicts

[0134] In the design of this article, the task content of the terminal, the number of clock cycles spent on each instruction, and the clock frequency are all known information to the gateway. The task scheduler can calculate the time required for the terminal to execute the task based on this information. The task instructions of the terminal are output bit by bit to the general task execution circuit in the form of a data stream, and the data that the terminal needs to upload is also transmitted bit by bit to the communication module. Therefore, the task scheduler can calculate the time spent on the transmission of the task instructions based on the clock frequency. Assuming that the clock frequency of the terminal is 𝑠, the total length of the off-chip task instructions and sensor control instructions in a task is 𝑗 bits, the total time required to execute the instructions is 𝑡, the size of the uploaded data is 𝑘 bits, and the execution cycle of the task is 𝑇, then the time interval T for uploading data for this task is int The calculation formula is as follows:

[0135]

[0136] The task scheduler can use formula (1) and the time of the most recent data upload to calculate the time node for each task to upload data next time, and automatically select the idle time period of the channel to send data to the terminal according to the calculation result, so as to avoid conflicts in uplink and downlink data transmission.

[0137] (2) Uplink data transmission conflicts among multiple terminals

[0138] This paper sets up a startup delay mechanism for the terminal's off-chip tasks. When the system starts running, the task scheduler will send a task instruction stream to each terminal in turn, which carries the startup delay information of each off-chip task.

[0139] After the task instruction is sent, the task scheduler will broadcast the task start instruction, and each terminal will start executing the task after a different delay. Under the same assumptions as in equation (1), the time from task start to data upload end is T c It can be expressed as:

[0140]

[0141] The task scheduler will adjust the start delay of each terminal task based on the time calculated by formula (2), so as to ensure that most terminals can upload data when the channel is idle. In addition, when the execution cycles of two terminal tasks are not equal, as the system running time increases, the data upload time nodes of the two tasks will continue to approach, and data collision will eventually occur. In response to this problem, the present invention designs a threshold detection mechanism for the data collision rate: when the data collision rate of the periodic task is higher than the threshold, the task scheduler will broadcast the task stop and start instructions in turn, so that each terminal task will restart the delay, thereby realizing the "alignment" function of the data upload time and maintaining the uplink data collision rate in a small range.

[0142] By predicting channel occupancy and coordinating terminal tasks, the probability of data collision in the uplink and downlink communications of the system will be greatly reduced. The uplink and downlink communication modes of the system under the multi-terminal task prediction mechanism are as follows: Fig.12 As shown. Due to the existence of event tasks, the system still has the possibility of data collision. When encountering unpredictable data collision (for example, the event task conflicts with the data upload of other tasks), the task scheduler will broadcast the task stop command to all terminals to prevent further data conflicts. Subsequently, the task scheduler will broadcast the event data retransmission command and send the periodic task data retransmission command to the terminals that are uploading data during the collision time period. The terminal that receives the data retransmission command will re-upload the data after a random delay. After the collision data is processed, the task scheduler will broadcast the task start command to restore the normal operation of the system.

[0143] 3. Design of instruction arranger;

[0144] The function of the instruction arranger is to arrange the atomic task instruction data and control instruction data, and finally output the binary data stream that the terminal can recognize to the communication interface. The instruction arrangement format is as follows: Fig.13 As shown. Each set of data sent by the gateway to the terminal carries a preamble, and the length of the preamble should not be too short (bit length greater than 40 bits) to avoid being the same as the transmitted data content. The central controller of the terminal will only start parsing the control command after identifying the preamble. This design is to allow all terminals to start parsing the control command synchronously, thereby reducing the probability of data packet mistransmission.

[0145] After the preamble, the first thing transmitted is the control instruction data. The central controller on the terminal will identify the terminal number, instruction code and other information in the control instruction and respond accordingly. When the transmitted control instruction is a task allocation instruction, the control instruction will be followed by the overall length information of the task instruction to be allocated, and then the terminal will receive and cache the task instruction data of the specified length.

[0146] The above is only a preferred embodiment of the present invention. It should be understood that the present invention is not limited to the form disclosed in the present invention, and should not be regarded as excluding other embodiments, but can be used for various other combinations, modifications and improvements, and can be modified within the scope of the concept described in the present invention through the above teachings or the technology or knowledge in the relevant field. The changes and modifications made by those skilled in the art do not deviate from the spirit and scope of the present invention, and should be within the scope of protection of the claims attached to the present invention. < / fullname> < / fullname>

Claims

1. A gateway based on a common description language and control logic for efficient de-redundancy tasks, characterized by: The gateway sends task logic to the terminal through wireless communication according to the task allocation strategy preset by the user, and manages the terminal tasks using control instructions; it includes an HTDL file library in HTDL form and an HTDL compiler, an instruction scheduler, a task scheduler and a communication interface; The terminal task description file is written through HTDL and saved in the HTDL file library. The task scheduler selects the task description file to be sent from the HTDL file library and transmits it to the HTDL compiler. The HTDL compiler compiles the data preprocessing statements and sensor control statements in the task description file into continuous binary instruction streams and sends them to the instruction arranger. The instruction arranger arranges the task instruction data and control instruction data, and outputs the binary data stream that the terminal can recognize to the communication interface. The task scheduler predicts the long downlink communication of the system through the multi-terminal task prediction mechanism and coordinates the management of terminal tasks.

2. A gateway based on efficient redundant task general description language and control logic according to claim 1, characterized in that: The HTDL syntax design is divided into an off-chip task layer and an on-chip control layer. The syntax of the off-chip task layer is used to describe key data acquisition, data processing, and data upload logic, and the syntax of the on-chip control layer is used to unify the description of the variable sensor control logic on the perception terminal.

3. A gateway based on efficient redundant task general description language and control logic according to claim 2, characterized in that: The syntax of the off-chip task layer includes 8 keywords: task, call, comb, between, outside, sub, avg and upload; Task is a keyword for off-chip task definition; Call is a keyword for calling a sensor control task, which is used to activate the sensor control circuit to perform a specific sensor control task, thereby obtaining raw data; comb is a data combination keyword, which is used to shift, split, and splice separate data to obtain complete sensor data; Both between and outside are interval judgment keywords, which are used to judge whether a sensor is within or outside a certain interval. If the judgment result is true, the response pin corresponding to the data is set to a low level or a high level, and its valid flag is set to 1, indicating that the data needs to be uploaded. If the judgment result is false, the response pin is set to the opposite level, and the valid flag is set to 0. sub is the difference calculation keyword, which is used to calculate the difference between a certain sensor data and the last sent data; avg is the keyword for average value calculation, which is used to realize average value aggregation or mean filtering of sensor data; Upload is the keyword for data upload, which is used to set the number of bits of each sensor data to be uploaded after the off-chip task is completed; The on-chip control layer includes 9 keywords: sensor, busconfig, pinconfig, read, write, pinread, pinwite, delay and wait; sensor is a keyword for defining sensor control tasks; busconfig is a keyword for bus interface configuration, indicating that the sensor uses a certain set of pins as the bus interface; pinconfig is a single pin configuration keyword, which means to configure a pin as pull-up / pull-down input mode; Read is the bus read keyword, which means the data is read from the sensor through the bus; Write is the keyword for writing to the bus, which means writing a certain binary data to the sensor through the bus; pinread is a keyword for reading pin level, which means reading the pin level of a certain pin; pinwrite is a pin level configuration keyword, which means setting the pin level of a pin to a low level or a high level; delay is the delay keyword; Wait is an event waiting keyword, which means waiting for the level state of a certain pin to become low or high.

4. A gateway based on efficient redundant task general description language and control logic according to claim 1, characterized in that: The control instructions from the gateway to the terminal include task allocation instructions and task management instructions. When the user determines the task description file that the terminal needs to receive, the HTDL compiler is only responsible for compiling the task description file into a binary task instruction data stream. The terminal will normally identify and store the task instruction data only after receiving the task allocation instructions sent by the gateway.

5. A gateway based on efficient de-redundancy task general description language and control logic according to claim 4, characterized in that: The encoding format of the task assignment instruction consists of a terminal unique identifier, a task assignment instruction code, a sensor control task, a task number and task attribute information. The task number information in the task assignment instruction is recognized by the terminal, and the location for storing the task instruction is selected accordingly. If the assigned task is an off-chip task, the end of the task assignment instruction carries the execution cycle and start delay information of the task.

6. A gateway based on efficient redundant task general description language and control logic according to claim 4, characterized in that: The task management instructions include task attribute adjustment instructions, task start and stop instructions, data retransmission instructions and task status query instructions; The encoding format of the task attribute adjustment instruction consists of a terminal unique identifier, a task attribute adjustment instruction code, an off-chip task identifier, and task attribute information. The gateway sets the task attribute information of the off-chip task through the task attribute adjustment instruction. The task attribute information includes an execution cycle and a startup delay. The encoding format of the task start and stop instruction consists of a terminal unique identifier, a task start and stop instruction code and a computing task identifier. The instruction is provided with a broadcast mechanism. When the terminal number corresponding to the terminal unique identifier in the instruction is equal to the broadcast number, the instruction is effective for all terminals. When the off-chip task number corresponding to the computing task identifier in the instruction is equal to the broadcast number, the instruction will control the start and stop of all off-chip tasks of the target terminal. Through the broadcast mechanism and the task start delay mechanism, the gateway realizes overall control of the uplink data transmission of multiple terminals, thereby reducing data collision. The encoding format of the data retransmission instruction includes a terminal unique identifier, a data retransmission instruction code and a retransmission data type, and the terminal number to be retransmitted and the retransmission data type are specified by the gateway; The encoding format of the status query instruction includes the terminal unique identifier and the status query instruction encoding The gateway sends a status query command to the target terminal to understand the task allocation status of the target terminal.

7. The gateway based on efficient redundant task general description language and control logic according to claim 1, characterized in that: The multi-terminal task prediction mechanism predicts the occupancy and idle time of the uplink communication channel by calculating the time interval for the terminal to upload data, and coordinates the uplink and downlink communications of the system according to the prediction results to achieve efficient utilization of communication resources to avoid uplink and downlink data transmission conflicts and multi-terminal uplink data transmission conflicts.

8. A gateway based on efficient redundant task general description language and control logic according to claim 7, characterized in that: The method for avoiding uplink and downlink data transmission conflicts includes: Assume that the clock frequency of the terminal is s, the total length of the off-chip task instructions and sensor control instructions in a task is j bits, the total time required to execute the instructions is t, the size of the uploaded data is k bits, and the execution period of the task is T. Then the time interval for uploading data of this task is The task scheduler uses the time interval and the time of the most recent data upload to calculate the time node for the next data upload of each task, and automatically selects the idle time period of the channel to send data to the terminal based on the calculation result, thereby avoiding conflicts in uplink and downlink data transmission.

9. A gateway based on efficient redundant task general description language and control logic according to claim 8, characterized in that: The method for avoiding multi-terminal uplink data transmission conflicts includes: When the system starts running, the task scheduler sends a task instruction stream carrying the start delay information of each off-chip task to each terminal in turn. After the task instruction is sent, the task scheduler broadcasts the task start instruction. Each terminal starts to execute the task after a different delay. int Under the same setting conditions, the time from task start to data upload completion is , the task scheduler is based on T c To adjust the startup delay of each terminal task, so as to ensure that most terminals upload data when the channel is idle; Design a threshold detection mechanism for data collision rate: When the data collision rate of a periodic task is higher than the threshold, the task scheduler broadcasts task stop and start instructions in sequence, so that each terminal task restarts with a delay, thereby aligning the data transmission time and maintaining the uplink data collision rate within a small range; When encountering unpredictable data collision, the task scheduler broadcasts a task stop instruction to all terminals. Subsequently, the task scheduler broadcasts an event data retransmission instruction and sends a periodic task data retransmission instruction to the terminal that is uploading data during the collision event segment. The terminal that receives the data retransmission instruction re-uploads the data after a random delay. After the collision data is processed, the task scheduler broadcasts a task start instruction to restore the normal operation of the system.

10. The gateway based on efficient redundant task general description language and control logic according to claim 1, characterized in that: The instruction arrangement format of the instruction arranger consists of a preamble, control instruction data, task instruction length and task instruction data. The terminal starts to parse the control instruction only after identifying the preamble to reduce the probability of data packet mistransmission. The terminal then identifies the terminal number and instruction code in the control instruction and responds accordingly. When the transmitted control instruction is a task allocation instruction, the control instruction will be followed by a signal of the overall length of the task instruction to be allocated, and then the terminal receives and caches the task instruction data of the specified length.

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