Display panel and display device

Abstract

According to the display panel and the display device, the display panel comprises a pixel circuit and a light-emitting device, the pixel circuit is electrically connected with a first electrode of the light-emitting device, and the pixel circuit comprises a driving transistor used for generating light-emitting driving current; the shunting module is electrically connected with a node between the driving transistor and the light-emitting device; wherein the light-emitting driving current received by the light-emitting device for emitting light is I1, the light-emitting driving current generated by the driving transistor is I2, I2 = I1 + delta I, and delta I is the light-emitting driving current received by the shunt module. According to the embodiment of the invention, the light-emitting driving current generated by the driving transistor is increased, the influence degree of the threshold bias of the driving transistor on the light-emitting driving current is reduced, the accuracy of receiving the small light-emitting driving current by the light-emitting device is ensured, the light-emitting brightness accuracy of the display panel at a low gray scale is improved, and the display effect is improved. And the display effect of the display panel is improved.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a display panel and a display device. Background Art

[0002] The display panel includes a pixel circuit and a light-emitting element. The pixel circuit generates a light-emitting driving current and provides it to the light-emitting device to emit light. When the light-emitting driving current required by the light-emitting device is small, the light-emitting driving current generated by the driving transistor included in the pixel circuit is required to be small. However, the light-emitting driving current generated by the driving transistor is affected to a certain extent by the threshold bias of the transistor. When the driving transistor generates a large light-emitting driving current, the influence of this threshold bias on the light-emitting driving current accounts for a small proportion, and the influence on the accuracy of the light-emitting driving current is small. However, when the light-emitting driving current required to be generated by the driving transistor is small, the influence of this threshold bias on the small light-emitting driving current accounts for a much larger proportion, and at this time, the influence on the accuracy of the light-emitting driving current is greater. It can be understood that when the light-emitting driving current is small, the threshold bias has a greater impact, so the light-emitting brightness deviation generated by the light-emitting device after receiving the light-emitting driving current with a large deviation is also more obvious. Especially when the light-emitting device is a series light-emitting device structure, the light-emitting efficiency of this type of light-emitting device is high, and the required light-emitting driving current is close to half of that of an ordinary light-emitting device, so the series light-emitting device also has higher requirements for the accuracy of the light-emitting driving current. Summary of the invention

[0003] In view of this, the present application provides a display panel and a display device to solve the above problems.

[0004] In a first aspect, an embodiment of the present application provides a display panel, including a pixel circuit and a light-emitting device, wherein the pixel circuit is electrically connected to a first electrode of the light-emitting device, and the pixel circuit includes:

[0005] A driving transistor, the driving transistor is used to generate a light-emitting driving current;

[0006] A shunt module, the shunt module is electrically connected to a node between the driving transistor and the light-emitting device;

[0007] The light-emitting device receives a light-emitting driving current of I1, and the light-emitting driving current generated by the driving transistor is I2. I2=I1+ΔI, where ΔI is the light-emitting driving current received by the shunt module.

[0008] In a second aspect, an embodiment of the present application provides a display device, comprising a display module as provided in the first aspect.

[0009] In the embodiment of the present application, the node between the driving transistor of the pixel circuit and the light-emitting device is electrically connected to the shunt module, so that the light-emitting driving current generated by the driving transistor is increased, which is conducive to reducing the influence of the threshold bias of the driving transistor on the light-emitting driving current and improving the accuracy of the light-emitting driving current generated by the driving transistor. In addition, the light-emitting driving current required by the shunt module is a relatively stable value. By quantifying the light-emitting driving current I2=I1+ΔI, it is conducive to improving the accuracy of the light-emitting driving current provided to the light-emitting device and improving the accuracy of the light-emitting brightness of the light-emitting device. In addition, the embodiment of the present application is conducive to ensuring the accuracy of the light-emitting device receiving a smaller light-emitting driving current, improving the accuracy of the light-emitting brightness of the display panel at low grayscale, and improving the display effect of the display panel. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative labor.

[0011] Figure 1 A schematic plan view of a display panel provided in an embodiment of the present application;

[0012] Figure 2 A schematic diagram of a pixel circuit provided in an embodiment of the present application;

[0013] Figure 3 A schematic diagram of another pixel circuit provided in an embodiment of the present application;

[0014] Figure 4 A schematic diagram of another pixel circuit provided in an embodiment of the present application;

[0015] Figure 5 A schematic diagram of the structure of a display panel provided in an embodiment of the present application;

[0016] Figure 6 A schematic plan view of a driving transistor provided in an embodiment of the present application;

[0017] Figure 7 A schematic diagram of the structure of another display panel provided in an embodiment of the present application;

[0018] Figure 8 A schematic plan view of a driving transistor provided in an embodiment of the present application;

[0019] Fig. 9 A schematic plan view of a driving transistor provided in an embodiment of the present application;

[0020] Fig.10 A schematic diagram of the structure of another display panel provided in an embodiment of the present application;

[0021] Fig.11 A schematic plan view of another driving transistor provided in an embodiment of the present application;

[0022] Fig.12 A schematic diagram of the structure of another display panel provided in an embodiment of the present application;

[0023] Fig.13 A schematic plan view of another driving transistor provided in an embodiment of the present application;

[0024] Fig.14 A schematic diagram of another pixel circuit provided in an embodiment of the present application;

[0025] Fig.15 A schematic diagram of another pixel circuit provided in an embodiment of the present application;

[0026] Fig.16 A schematic diagram of another pixel circuit provided in an embodiment of the present application;

[0027] Fig.17 A schematic diagram of another pixel circuit provided in an embodiment of the present application;

[0028] Fig.18 A schematic diagram of the structure of another display panel provided in an embodiment of the present application;

[0029] Fig.19 A schematic diagram of the structure of another display panel provided in an embodiment of the present application;

[0030] Fig. 20 A schematic diagram of the structure of another display panel provided in an embodiment of the present application;

[0031] Fig.21 A schematic diagram of another pixel circuit provided in an embodiment of the present application;

[0032] Fig. 22 A schematic diagram of another pixel circuit provided in an embodiment of the present application;

[0033] Fig.23 A schematic diagram of a display device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0034] In order to better understand the technical solution of the present application, the embodiments of the present application are described in detail below with reference to the accompanying drawings.

[0035] It should be clear that the described embodiments are only part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in the field without creative work are within the scope of protection of the present application.

[0036] The terms used in the embodiments of the present application are only for the purpose of describing specific embodiments, and are not intended to limit the present application. The singular forms "a", "an", "the" and "the" used in the embodiments of the present application and the appended claims are also intended to include plural forms, unless the context clearly indicates other meanings.

[0037] It should be understood that the term "and / or" used in this article is only a description of the association relationship of associated objects, indicating that there can be three relationships. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. In addition, the character " / " in this article generally indicates that the associated objects before and after are in an "or" relationship.

[0038] In the description of this specification, it is necessary to understand that the words such as "substantially", "approximately", "approximately", "about", "roughly", "substantially" and the like described in the claims and embodiments of the present application refer to what can be generally recognized within a reasonable process operation range or tolerance range, rather than an exact value.

[0039] It should be understood that, although the terms first, second, etc. may be used to describe nodes, sub-dividing modules, capacitors, etc. in the embodiments of the present application, these should not be limited to these terms. These terms are only used to distinguish nodes, sub-dividing modules, capacitors, etc. from each other. For example, without departing from the scope of the embodiments of the present application, the first node may also be referred to as the second node, and similarly, the second node may also be referred to as the first node. The applicant of this case has provided a solution to the problems existing in the prior art through careful and in-depth research.

[0040] Figure 1 A schematic plan view of a display panel provided in an embodiment of the present application, Figure 2 A schematic diagram of a pixel circuit provided in an embodiment of the present application.

[0041] The display panel AA provided in the embodiment of the present application is combined with Figure 1 , Figure 2 As shown, the display panel AA includes a pixel circuit A10 and a light emitting device B10. The pixel circuit A0 is electrically connected to a first electrode B101 of the light emitting device B10. The pixel circuit A10 includes a driving transistor Md. The driving transistor Md is used to generate a light emitting driving current.

[0042] Normally, the driving transistor Md receives a data voltage transmitted according to the luminous brightness of the light-emitting device B10, thereby generating a corresponding luminous driving current. However, as mentioned in the background technology, when the driving transistor Md needs to generate a smaller luminous driving current, the threshold voltage of the driving transistor Md has a more obvious effect on the magnitude of the generated luminous driving current. When the driving transistor Md generates a larger luminous driving current, the threshold voltage has no obvious effect on the magnitude of the generated luminous driving current. In order to reduce the effect of the threshold voltage bias of the driving transistor Md on the generation of a small luminous driving current and improve the accuracy of the generated small luminous driving current, the embodiment of the present application proposes:

[0043] A shunt module 10 is provided in the pixel circuit A10, and the shunt module 10 is electrically connected to a node between the driving transistor Md and the light emitting device B10. That is, the shunt module 10 is located between the driving transistor Md and the light emitting device B10, and when the light emitting driving current generated by the driving transistor Md is output from the driving transistor Md, part of the light emitting driving current can flow to the light emitting device B10, and part of the light emitting driving current can flow to the shunt module 10.

[0044] Among them, in the process of generating the light-emitting driving current, the light-emitting driving current I2 generated by the driving transistor Md can be set according to the rule that the light-emitting driving current received by the light-emitting device B10 is I1, the light-emitting driving current generated by the driving transistor Md is I2, I2=I1+ΔI, ΔI is the light-emitting driving current received by the shunt module 10.

[0045] During the application process, the size of the light-emitting driving current ΔI that the shunt module 10 will receive is tested. When transmitting the data voltage to the driving transistor Md, the light-emitting driving current required by the shunt module 10 is also taken into account, so that the light-emitting driving current generated by the driving transistor Md after receiving the data voltage can be provided to the shunt module 10 and the light-emitting device B10. In this way, when the light-emitting driving current required by the light-emitting device B10 is small, the light-emitting driving current required to be generated by the driving transistor Md is increased due to the addition of the shunt module 10, which is conducive to reducing the degree to which the light-emitting driving current generated by the driving transistor Md is affected by the threshold bias.

[0046] In the embodiment of the present application, the node between the driving transistor Md of the pixel circuit A10 and the light emitting device B10 is electrically connected to the shunt module 10, so that the light emitting driving current generated by the driving transistor Md is increased, which is conducive to reducing the influence of the threshold bias of the driving transistor Md on the light emitting driving current and improving the accuracy of the light emitting driving current generated by the driving transistor Md. In addition, the light emitting driving current ΔI required by the shunt module 10 is a relatively stable value. By quantifying the light emitting driving current I 2 = I 1 + ΔI, it is conducive to improving the accuracy of the light emitting driving current provided to the light emitting device B10 and improving the accuracy of the light emitting brightness of the light emitting device B10. In addition, the embodiment of the present application is conducive to ensuring the accuracy of the light emitting device B10 receiving a small light emitting driving current, improving the accuracy of the light emitting brightness of the display panel AA at low grayscale, and improving the display effect of the display panel AA.

[0047] Figure 3 A schematic diagram of another pixel circuit provided in an embodiment of the present application.

[0048] In one embodiment of the present application, Figure 3 As shown, the pixel circuit A10 also includes a light emitting control module 20, which is electrically connected to the driving transistor Md and the light emitting device B10. One end of the light emitting control module 20 is connected to the light emitting driving current generated by the driving transistor Md. When the light emitting control module 20 is turned on, the light emitting driving current can be transmitted to the light emitting device B10 through the light emitting control module 20, so that the light emitting device B10 can emit light.

[0049] The pixel circuit A10 further includes a first node N1 , which is located between the driving transistor Md and the light emitting control module 20 , and the light emitting driving current passes through the first node N1 .

[0050] The shunt module 10 in the pixel circuit A10 includes a first sub-shunt module 10A, and the first sub-shunt module 10A is electrically connected to the first node N1. When the first sub-shunt module 10A is electrically connected to the first node N1, the first sub-shunt module 10A is located between the driving transistor Md and the light-emitting device B10, so that the first sub-shunt module 10A has a shunt function.

[0051] In the embodiment of the present application, the shunt module 10 is provided to include a first sub-shunt module 10A, and the first sub-shunt module 10A is electrically connected to the first node N1, which is beneficial for the first sub-shunt module 10A to receive part of the light-emitting driving current before the light-emitting driving current reaches the light-emitting device B10, and is beneficial for realizing a solution in which the driving transistor Md can generate a relatively large light-emitting driving current when the light-emitting device B10 needs a small current to emit light, thereby reducing the influence of the threshold bias on the accuracy of the light-emitting driving current, improving the accuracy of the light-emitting brightness when the light-emitting device B10 receives a small current to emit light, and improving the display effect of the display panel AA.

[0052] In one embodiment of the present application, continue to refer to Figure 3 As shown, the pixel circuit A10 further includes a first reset module 30, a first end of which receives a first reset voltage Vref1, and a second end of which is electrically connected to the first node N1. Optionally, the first reset module 30 is performed after the shunting operation of the first sub-shunting module 10A is completed and before the next shunting operation.

[0053] It can be seen from the above embodiment that the first sub-dividing module 10 is electrically connected to the first node N1, and after the first sub-dividing module 10 receives the light-emitting driving current, the potential of the first node N1 will change. Optionally, the light-emitting driving current that can be received by the first sub-dividing module 10 is a relatively stable value. After the first sub-dividing module 10 receives the light-emitting driving current and the potential increases, if the potential of the first sub-dividing module 10 is not corrected in time, the first sub-dividing module 10A may fail to divert normally or divert inaccurately during the next light-emitting driving current transmission process of the pixel circuit A10, thereby losing the use effect of the first sub-dividing module 10A.

[0054] It should be noted that the pixel circuit A10 also includes a threshold voltage compensation module 60, which is used to compensate the threshold voltage of the driving transistor Md to the gate of the driving transistor Md. The threshold voltage compensation module 60 and the first reset module 30 are turned on at the same time before the driving transistor Md generates a light-emitting driving current. At this time, the first reset voltage Vref1 can simultaneously reset the first node N1 electrically connected to the first sub-shunt module 10A and the gate of the driving transistor Md, which is beneficial to ensure the accuracy of the light-emitting driving current generated by the driving transistor Md and the accuracy of the shunt of the first sub-shunt module 10A.

[0055] In the embodiment of the present application, the pixel circuit A10 is further configured to include a first reset module 30. The first reset module 30 transmits a first reset voltage Vref1 to the first node N1 after the first sub-shunt module 10 shunts the current, thereby resetting the first node N1, and further achieving the effect of resetting the input end of the first sub-shunt module 30, which is beneficial to stabilizing the operation of the first sub-shunt module 10A and ensuring the accuracy of the light-emitting drive current received by the first sub-shunt module 10A, thereby facilitating the accuracy of the light-emitting drive current received by the light-emitting device B10.

[0056] Figure 4 A schematic diagram of another pixel circuit provided in an embodiment of the present application.

[0057] In one embodiment of the present application, Figure 4 As shown, the first sub-dividing module 10A includes a first capacitor C1, and the first capacitor C1 includes a first electrode plate C1A and a second electrode plate C1B.

[0058] In the embodiment of the present application, the first sub-dividing module 10A is provided to include a first capacitor C1, which is conducive to utilizing the function of the first capacitor C1 to store charge to realize the diversion scheme of the first sub-dividing module 10A. The capacity of the first capacitor C1 can be limited according to actual use, which is conducive to preparing the first sub-dividing module 10A more flexibly and conveniently, and improves the applicability of the embodiment of the present application. In addition, the first capacitor C1 includes a first plate C1A and a second plate C1B, and one of the first plate C1A and the second plate C1B is electrically connected to the first node N1 to realize the charging of the first capacitor C1 and complete the diversion of the first sub-dividing module 10A.

[0059] Figure 5 A schematic diagram of the structure of a display panel provided in an embodiment of the present application is shown in FIG. Figure 6 A schematic plan view of a driving transistor provided in an embodiment of the present application.

[0060] In one embodiment of the present application, Figure 5 , Figure 6As shown, the first electrode of the driving transistor Md is electrically connected to the first node N1. The display panel AA includes a substrate A20, and the driving transistor Md is located on one side of the substrate A20. The driving transistor Md includes an active layer S1 and a gate G1. The active layer S1 is located on the side of the gate G1 facing the substrate A20. The active layer S1 includes a first portion S1A, a second portion S1B, and a third portion S1C. In a direction perpendicular to the plane where the display panel is located, the second portion S1B overlaps with the gate G1. Along the extension direction of the active layer S1, the first portion S1A and the third portion S1C are respectively located on opposite sides of the second portion S1B. The first portion S1A and the third portion S1C can be used as the source and drain of the driving transistor Md, respectively. In the embodiment of the present application, the first portion S1A of the active layer S1 is multiplexed as the first electrode of the driving transistor Md. Then, the first portion S1A of the active layer S1 is electrically connected to the first node N1. In the circuit structure, the first node N1 is a part of the first portion S1A, and the potential on the first portion S1A is equal to the potential of the first node N1.

[0061] From the above embodiments, it can be seen that the first node N1 is electrically connected to the first capacitor C1. When preparing the first capacitor C1 in the circuit structure, the structure at the first node N1, that is, the first portion S1A of the active layer S1, can be used as one of the plates of the first capacitor C1.

[0062] In the embodiments of the present application, Figure 5-Figure 6 As shown, the width of the first portion S1A along the first direction X1 is set to be greater than the width of the third portion S1C along the first direction X1, and the first direction X1 is parallel to the plane where the display panel A10 is located and intersects with the extension direction of the active layer S1. At this time, the area of ​​the first portion S1A on the surface parallel to the display panel AA is increased, so that the first portion S1A has a portion that exceeds the range of the active layer S1 in the first direction X1, which is conducive to the first portion S1A being reused as a plate of the first capacitor C1, and is also conducive to utilizing the structure of the first capacitor C1, which is a structural component of the driving transistor Md, to reduce the structural complexity of the display panel AA, and avoid increasing the film thickness of the display panel AA.

[0063] Supplementary explanation, combined with Figure 4 , Figure 6 The driving transistor Md shown has a first electrode electrically connected to the first node N1 , a second electrode electrically connected to the third node N3 , and a gate electrically connected to the fourth node N4 .

[0064] In one embodiment of the present application, continue to refer to Figure 5-Figure 6As shown, in the structure of the display panel AA, the first plate C1A of the first capacitor C1 is located on the side of the gate G1 of the driving transistor Md away from the substrate A20; in the direction perpendicular to the plane where the display panel AA is located, the first plate C1A covers the first part S1A, and the first part S1A is reused as the second plate C1B of the first capacitor C1.

[0065] In the embodiment of the present application, the first portion S1B of the active layer S1 of the driving transistor Md is reused as the second plate C1B of the first capacitor C1 as an example for explanation. From the above embodiment, it can be seen that the area of ​​the first portion S1A is set to be larger than the third portion S1C, so that the first portion S1A has the ability to serve as the second plate C1B, thereby improving the charge storage capacity of the first capacitor C1.

[0066] In the embodiment of the present application, the first plate C1A of the first capacitor C1 is located on the side of the gate G1 of the driving transistor Md away from the substrate A20, and in a direction perpendicular to the plane where the display panel AA is located, the first plate C1A covers the first part S1A, which is conducive to having an overlapping portion between the first part S1A and the first plate C1A, thereby forming the first capacitor C1.

[0067] Figure 7 A schematic diagram of the structure of another display panel provided in an embodiment of the present application is shown in FIG. Figure 8 A schematic plan view of a driving transistor provided in an embodiment of the present application, Fig. 9 A schematic plan view of a driving transistor provided in an embodiment of the present application.

[0068] like Figure 3-Figure 4 As shown, the pixel circuit A10 includes a storage capacitor Cst, which is electrically connected to the gate G1 of the driving transistor Md and can be used to stabilize the gate potential of the driving transistor Md. Figure 7 , Figure 8 As shown, in the circuit structure of the pixel circuit A10, the gate of the driving transistor Md can be reused as one plate of the storage capacitor Cst, and the other plate of the storage capacitor Cst is arranged on the side of the gate G1 of the driving transistor Md away from the substrate A20 to form the storage capacitor Cst. Optionally, one plate of the storage capacitor Cst away from the gate G1 is extended and extended to cover the first portion S1A, so that the portion overlapping the first portion S1A serves as the first plate C1A of the first capacitor C1.

[0069] Or, alternatively, as Fig. 9 As shown, the first plate C1A of the first capacitor C1 and a plate of the storage capacitor Cst away from the gate G1 may be located in the same film layer, but are not an integrated structure.

[0070] Fig.10A schematic diagram of the structure of another display panel provided in an embodiment of the present application is shown in FIG. Fig.11 A schematic plan view of another driving transistor provided in an embodiment of the present application, Fig.12 A schematic diagram of the structure of another display panel provided in an embodiment of the present application is shown in FIG. Fig.13 A schematic plan view of another driving transistor provided in an embodiment of the present application.

[0071] In one embodiment of the present application, Fig.10 , Fig.11 As shown, the first plate C1A of the first capacitor C1 is located on the side of the active layer S1 of the driving transistor Md facing the substrate A20. In a direction perpendicular to the plane where the display panel AA is located, the first plate C1A covers the first portion S1A, and the first portion S1A is reused as the second plate C1B of the first capacitor C1. At this time, the first plate C1A overlaps with the first portion S1A of the active layer S1 to form the first capacitor C1, thereby realizing the preparation of the first sub-shunt module 10A.

[0072] Combination Fig.10 , Fig.11 As shown, the first electrode plate C1A of the first capacitor C1 only includes a portion located on the side of the active layer S1 facing the substrate A20, which is conducive to the preparation of the first capacitor C1. In addition, the embodiment of the present application is conducive to providing a feasible solution for the preparation of the first capacitor C1, and improving the manufacturability of the first capacitor C1 in the display panel AA.

[0073] Or, combined Figure 12-13 As shown, the first plate C1A of the first capacitor C1 includes a portion located on the side of the active layer S1 facing the substrate A20, and another first plate C1A may be provided on the side of the gate G1 of the driving transistor Md away from the substrate A20. Exemplarily, the first plate C1A is divided into a first sub-plate C1A1 and a second sub-plate C1A2. Optionally, the first sub-plate C1A1 is provided on the side of the first part S1A of the active layer S1 away from the substrate A20, and the second sub-plate C1A2 is provided on the side of the first part S1A of the active layer S1 facing the substrate A20. A first capacitor C1 structure composed of the capacitor between the first sub-plate C1A1 and the first part S1A and the capacitor between the second sub-plate C1A2 and the first part S1A is formed. In this way, it is beneficial to increase the capacity of the first capacitor C1, prepare for increasing the light-emitting drive current value generated by the driving transistor Md under a small current demand to a greater extent, and further reduce the influence of the threshold bias of the driving transistor Md on the accuracy of the light-emitting drive current.

[0074] Fig.14 A schematic diagram of another pixel circuit provided in an embodiment of the present application is shown. Fig.15A schematic diagram of another pixel circuit provided in an embodiment of the present application.

[0075] In one embodiment of the present application, Fig.14 As shown, the pixel circuit A10 further includes a second node N2, and the second node N2 is located between the light emitting control module 20 and the light emitting device B10. After the light emitting control module 20 is turned on, the received light emitting driving current is output to the light emitting device B10. The second node N2 is located between the light emitting control module 20 and the light emitting device B10, and the light emitting driving current also passes through the second node N2.

[0076] In the embodiment of the present application, the shunt module 10 includes a second sub-shunt module 10B, which is electrically connected to the second node N2. This is beneficial for the second sub-shunt module 10B to receive part of the light-emitting driving current when the light-emitting driving current is provided to the light-emitting device B10, thereby achieving the purpose of shunt.

[0077] In the embodiment of the present application, the second sub-shunt module 10B is arranged between the light emitting device B10 and the light emitting control module 20, which is conducive to completing the function of the shunt module 10 and providing a feasible technical solution for the embodiment of the present application. In addition, the output end of the light emitting control module 20 has fewer electrical connection lines, so that the output end of the light emitting control module 20 has less coupling effect on the entire pixel circuit A10. Therefore, setting the second sub-shunt module 10B at the second node N2 is conducive to reducing the influence of the second sub-shunt module 10B on the operation of the entire pixel circuit A10, and is conducive to avoiding the second sub-shunt module 10B from shunting in the working stage of the pixel circuit A10 not transmitting the light emitting drive current, thereby ensuring the working stability of the pixel circuit A10.

[0078] In addition, if Fig.15 As shown, the embodiment of the present application sets the shunt module 10 to include a first sub-shunt module 10A and a second sub-shunt module 10B, the first sub-shunt module 10A is electrically connected to the first node N1, and the second sub-shunt module 10B is electrically connected to the second node N2, which is conducive to improving the shunt range of the shunt module 10, and improving the feasibility space of the driving transistor Md to generate the light-emitting driving current when the light-emitting device B10 receives a small current to emit light. In addition, the working stability of the shunt module 10 can be more flexibly improved through the shunt ratio of the first sub-shunt module 10A and the second sub-shunt module 10B, and the shunt accuracy can be improved, thereby improving the accuracy of the light-emitting driving current received by the light-emitting device 10.

[0079] In one embodiment of the present application, continue to refer to Fig.14 , Fig.15As shown, the pixel circuit A10 further includes a second reset module 40, a first end of the second reset module 40 receives a second reset voltage Vref2, and a second end is electrically connected to the second node N2. After the second sub-dividing module 10B electrically connected to the second node N2 performs partial diversion, the potential of the second node N2 changes accordingly, and the potential of the second node N2 needs to be corrected, and the storable state of the second sub-dividing module 10B needs to be restored, so as to prepare for the next diversion.

[0080] In the embodiment of the present application, the second node N2 is electrically connected to the second reset module 40, and the second reset module 40 transmits the second reset voltage Vref2 to the second node N2 after the second sub-shunt module 10B shunts, which is conducive to resetting the second node N2 and restoring the state of the second sub-shunt module 10B. The second sub-shunt module 10B can accurately shunt the next time the transistor Md generates a light-emitting driving current, thereby ensuring the accuracy of the light-emitting driving current received by the light-emitting device B10 and ensuring the accuracy of the light-emitting brightness of the light-emitting device B10.

[0081] Fig.16 A schematic diagram of another pixel circuit provided in an embodiment of the present application is shown. Fig.17 A schematic diagram of another pixel circuit provided in an embodiment of the present application.

[0082] In one embodiment of the present application, Figure 16-Figure 17 As shown, the second sub-dividing module 10B includes a second capacitor C2, and the second capacitor C2 includes a third plate C2A and a fourth plate C2B. It is beneficial to use the second capacitor C2 to realize the shunting function of the second sub-dividing module 10B. One of the third plate C21 and the fourth plate C2B is electrically connected to the second node N2. When the driving transistor Md generates a light-emitting driving current, one of the third plate C1 and the fourth plate C2B receives the charge and stores it in the second capacitor C2.

[0083] Fig.18 A schematic diagram of the structure of another display panel provided in an embodiment of the present application.

[0084] In one embodiment of the present application, Figure 16-18 As shown, the display panel AA includes a substrate A20, a pixel circuit A10 is located on one side of the substrate A20, and a light emitting device B10 is located on a side of the pixel circuit A10 away from the substrate A20. A first insulating layer D1 is included between the pixel circuit A10 and the first electrode of the light emitting device B10. Optionally, the pixel circuit A10 and the light emitting device B10 are electrically connected by punching, and the pixel circuit A10 includes a plurality of transistors. Fig.18The transistor M1 electrically connected to the light emitting device B10 is for illustration only. Optionally, the light emitting control module 20 includes the transistor M1, and one electrode of the transistor M1 is electrically connected to the first electrode B101 of the light emitting device B10 via a punch hole. Fig.18 As shown, the transistor M1 includes a gate G2 and an active layer S2. The capacitor plate layer MC included on the side of the gate G2 away from the substrate A20 can be used to prepare a plate of a capacitor such as a storage circuit Cst.

[0085] In the embodiment of the present application, in the direction perpendicular to the plane where the display panel AA is located, the third plate C2A of the second capacitor C2 is located between the first insulating layer D1 and the pixel circuit A10, and the third plate C2A overlaps at least partially with the first pole B101 of the light-emitting device B10, and the first pole B101 of the light-emitting device B10 is reused as the fourth plate C2B, which is conducive to the preparation of the second capacitor C2 in the display panel AA. In addition, in the preparation of the second capacitor C2, the third plate C2A is set between the pixel circuit A10 and the first insulating layer D1, and the structure shown is that the first insulating layer D1 covers the third plate C2A, and the third plate C2A overlaps at least partially with the first pole B101 of the light-emitting device B10, which is conducive to forming a capacitor structure between the third plate C2A and the first pole B101. At this time, part of the first insulating layer D1 can be used as the dielectric material of the second capacitor C2.

[0086] Since the second node N2 is located between the light control module 20 and the first electrode B101 of the light emitting device B10, the second capacitor C2 is electrically connected to the first electrode B101 of the light emitting device B10, which is equivalent to being electrically connected to the second node N2. The first electrode B101 of the light emitting device B10 is reused as the fourth electrode plate C2B in the second capacitor C2, which is conducive to realizing the electrical connection between the second capacitor C2 and the second node N2, and reduces the structure that needs to be prepared, reduces the structural complexity of the display panel AA, and is conducive to improving the feasibility of thinning the display panel AA.

[0087] Fig.19 A schematic diagram of the structure of another display panel provided in an embodiment of the present application.

[0088] In one embodiment of the present application, Fig.19 As shown, the display panel AA further includes a second insulating layer D2 and a third insulating layer D3. The second insulating layer D2 is located between the first pole B101 of the light emitting device B10 and the first insulating layer D1. The third insulating layer D3 is located on the side of the first pole B101 of the light emitting device B10 away from the substrate A20.

[0089] The first insulating layer D1 includes a first opening D11, and part of the second insulating layer D2 and part of the first pole B101 of the light emitting device B10 are located in the first opening D11. In a direction perpendicular to the plane where the display panel AA is located, the first opening D11 overlaps part of the second opening D31. In a direction perpendicular to the plane where the display panel AA is located, the third plate C2A of the second capacitor C2 is located between the second insulating layer D2 and the pixel circuit A10, the third plate C2A overlaps the first pole B101 of the light emitting device B10 and overlaps the first opening D11, and the first pole B101 of the light emitting device B10 is reused as the fourth plate C2B.

[0090] Combination Fig.18 As shown, the third electrode plate C2A can be located between the first insulating layer D1 and the pixel circuit B10, and part of the first insulating layer D1 can be used as a dielectric layer between the third electrode plate C2A and the fourth electrode plate C2B. However, the thickness of the first insulating layer D1 used at this time is relatively large, which easily leads to a large distance between the third electrode plate C2A and the fourth electrode plate C2B when the second capacitor C2 is prepared using the first insulating layer D1, which is not conducive to increasing the capacitance of the prepared second capacitor C2. In addition, when the thickness of the first insulating layer D1 is relatively large, the prepared second capacitor C2 usually adopts a method of increasing the electrode area to achieve the desired capacitance, but this method will occupy a larger structural space.

[0091] So, if Fig.19 As shown, the embodiment of the present application proposes to open a first opening D11 in the first insulating layer D1 at a position overlapping with the third electrode plate C2A. Optionally, the first opening D11 does not include the first insulating layer D1 material. At this time, the first opening D11 exposes the third electrode plate C2A. In order to avoid direct contact between the third electrode plate C2A and the first pole B101 of the light-emitting device B10, a second insulating layer D2 is prepared between the first insulating layer D1 and the first pole B101 of the light-emitting device B10, so that part of the second insulating layer D2 is located in the first opening D11. Then, when preparing the first pole B101 of the light-emitting device B10, part of the first pole B101 is also prepared in the first opening D11. The first pole B101 of the part of the light-emitting device B10 located in the first opening D11 forms a second capacitor C2 with the third electrode plate C2A and the second insulating layer D2. During the preparation of the second capacitor C2, the thickness of the prepared second insulating layer D2 can be adjusted according to actual use needs. When the thickness of the second insulating layer D2 is relatively small, it is beneficial to increase the capacitance of the second capacitor C2 and reduce the overlapping area of ​​the third electrode plate C2A and the fourth electrode plate C2B, thereby avoiding occupying a larger preparation space.

[0092] Further, the third insulating layer D3 includes a second opening D31, and the light-emitting device B10 is located in the second opening D31. The third insulating layer D3 can be used to separate adjacent light-emitting devices B10 in the display panel AA, and one light-emitting device B10 is prepared in one second opening D31. In the embodiment of the present application, when preparing the film layer other than the first pole B101 in the light-emitting device B10, at least part of the film layer is also prepared in the first opening D11. When the first pole B101 of the light-emitting device B10 is prepared in a direction parallel to the display panel AA, it also includes a portion located in the first opening D31, which is beneficial to increase the extension area of ​​the first pole B101, and part of the second opening D31 overlaps with the first opening D11. After increasing the area of ​​the first pole B101 through the first opening D11, it is beneficial to improve the ability of the first pole B101 to provide electrons or holes for the light-emitting device B10, thereby improving the luminous efficiency of the light-emitting device B10.

[0093] In another implementation of the embodiment of the present application, optionally, when the first opening D11 is formed, according to the capacitance requirement of the second capacitor C2, a portion of the first insulating layer D1 material is reserved so that the first opening D11 does not expose the third electrode plate C2A.

[0094] Fig. 20 A schematic diagram of the structure of another display panel provided in an embodiment of the present application.

[0095] In one embodiment of the present application, Fig. 20 As shown, the display panel AA also includes a second insulating layer D2 and a third insulating layer D3. The second insulating layer D2 is located between the first pole B101 of the light-emitting device B10 and the first insulating layer D1, and the third insulating layer D3 is located on the side of the first pole B101 of the light-emitting device B10 away from the substrate A20; the first insulating layer D1 includes a first opening D11, and part of the second insulating layer D2 and part of the first pole B101 of the light-emitting device B10 are located in the first opening D11; the third insulating layer D3 includes a second opening D31, and the light-emitting device B10 is located in the second opening D31; along the direction perpendicular to the plane where the display panel AA is located, the first opening D11 and the second opening D31 do not overlap.

[0096] In a direction perpendicular to the plane of the display panel AA, the third plate C2A of the second capacitor C1 is located between the first insulating layer D1 and the pixel circuit B10, the third plate C2A overlaps with the first pole B101 of the light-emitting device B10 and the first opening D11, and the first pole B101 of the light-emitting device B10 is reused as the fourth plate C32.

[0097] The above embodiment describes that the preparation of the first opening D11 reduces the thickness of the dielectric layer between the third plate C2A and the fourth plate C2B of the second capacitor C2, thereby facilitating the increase of the capacitance of the second capacitor C2. The difference is that the first opening D11 and the second opening D31 for preparing the light-emitting device B10 are arranged not to overlap each other in the embodiment of the present application, which is conducive to improving the flatness of the first pole B10 and the light-emitting layer in the light-emitting device B10 when preparing the light-emitting device B10, thereby improving the structural regularity of the prepared light-emitting device B10, and improving the working stability and uniformity of the light-emitting device B10.

[0098] In the embodiment of the present application, the first pole B101 of the light-emitting device B10 is extended to the position where the first opening D11 is opened. At this time, the part of the first pole B101 that can serve as the fourth pole plate C2B overlaps with the third pole plate C2A and has no overlap with other film layers of the light-emitting device B10, which is beneficial to improving the structural flatness when preparing the light-emitting device B10 and flexibly adjusting the structure of the second capacitor C2.

[0099] In one embodiment of the present application, a first sub-dividing module 10A is provided to include a first capacitor C1 , and the structure of the first capacitor C1 is the same as that of the second capacitor C2 .

[0100] In the embodiment of the present application, the first capacitor C1 and the second capacitor C2 are arranged to have the same structure. The same structure here means that the overlapping area and distance between the capacitor plates are the same, which is conducive to reducing the difficulty of preparation and improving the uniformity when the first capacitor C1 and the second capacitor C2 are shunted.

[0101] In one embodiment of the present application, continue to refer to 5, Fig.18 As shown, the first sub-dividing module 10A includes a first capacitor C1, and the structure of the first capacitor C1 is different from that of the second capacitor C2.

[0102] In the embodiment of the present application, the structures of the first capacitor C1 and the second capacitor C2 are set to be different, which is conducive to flexibly setting the first capacitor C1 and the second capacitor C2 according to the circuit conditions of the first node N1 and the second node N2, adaptively adjusting the capacitance of the first capacitor C1 and the second capacitor C2, and improving the accuracy of current diversion.

[0103] Fig.21 A schematic diagram of another pixel circuit provided in an embodiment of the present application.

[0104] In one embodiment of the present application, Fig.21As shown, the pixel circuit B10 also includes a shunt control module 50, which is electrically connected to the nodes between the shunt module 10 and the driving transistor Md and the light-emitting device B10. The above embodiment mentions that the node between the driving transistor Md and the light-emitting device B10 includes a first node N1 and a second node N2, and the shunt module 10 can be electrically connected to the first node N1 and / or the second node N2. Optionally, one end of the shunt control module 50 is electrically connected to the first node N1, and the other end is electrically connected to the shunt module 10. Optionally, one end of the shunt control module 50 is electrically connected to the first node N1, and the other end is electrically connected to the shunt module 10. Alternatively, a plurality of shunt control modules 50 are provided in the pixel circuit B10, one of which is electrically connected to the first node N1, and another shunt control module 50 is electrically connected to the second node N2.

[0105] The shunt control module 50 is turned on in at least part of the light-emitting phase of the pixel circuit B10 and controls the shunt module 10 to receive part of the light-emitting driving current. The pixel circuit B10 also includes a transistor M2, the gate of which receives a valid signal transmitted by the light-emitting control signal line Emit and is turned on in the light-emitting phase, and the transistor M2 transmits the power supply voltage PVDD to the driving transistor Md, driving the driving transistor Md to generate a light-emitting driving current. In addition, the pixel circuit B10 also includes a first data voltage writing module 70 and a second data voltage writing module 80, the first data voltage writing module 70 is used to write the first data voltage Vdata to the driving transistor Md before the pixel circuit B10 enters the light-emitting phase, and the second data voltage writing module 80 can be used to write a second data voltage Dvh of a compensatory nature to the driving transistor Md when the pixel circuit B10 maintains frame operation. Among them, the first data voltage Vdata can be used to regulate the size of the light-emitting driving current generated by the driving transistor Md.

[0106] When the shunt control module 50 is turned on, part of the light-emitting driving current can be transmitted to the shunt module 10. When the shunt control module 50 is turned off, the shunt module 10 cannot receive the light-emitting driving current. When the pixel circuit B10 works in the light-emitting stage, the driving transistor Md generates a light-emitting driving current, and the light-emitting driving current is output to the light-emitting device B10. At this time, the shunt control module 50 can be turned on to prepare for the shunt module 10 to perform shunt.

[0107] In an embodiment of the present application, a shunt control module 50 is provided between the shunt module 10 and the node electrically connected thereto, for controlling part of the light-emitting driving current to flow to the shunt module 10, and the shunt control module 50 is provided to be turned on during the light-emitting stage, which is beneficial to accurately control the operation of the shunt module 10 and avoid the shunt module 10 from shunting during various stages of the operation of the pixel circuit B10, thereby avoiding the shunt module 10 from disrupting the working process of the pixel circuit B10, avoiding interfering with the normal electrical signal transmission of the pixel circuit B10, and improving the working stability of the pixel circuit B10.

[0108] Fig. 22 A schematic diagram of another pixel circuit provided in an embodiment of the present application.

[0109] In one embodiment of the present application, Figure 21-22 As shown, the pixel circuit B10 includes a light emitting control module 20, and the light emitting control module 20 is electrically connected to the driving transistor Md and the light emitting device B10. The light emitting control module 20 is used to turn on in the light emitting stage of the pixel circuit B10 and control the light emitting device B10 to receive at least part of the light emitting driving current. During the operation of the pixel circuit B10, the light emitting driving current can only be received by the light emitting device B10 when the light emitting control module 20 is turned on. Optionally, the control end of the light emitting control module 20 is also electrically connected to the light emitting control signal line Emit, so that the light emitting control module 20 and the transistor M2 are both turned on in the light emitting stage.

[0110] In the embodiment of the present application, the control terminal 501 of the shunt control module 50 is electrically connected to the same control signal line as the control terminal 201 of the light control module 20, which is beneficial to reducing the number of control signal lines prepared in the display panel AA. It is also beneficial to ensure that when the light-emitting device B10 receives the light-emitting drive current, the shunt module 10 can also receive the light-emitting drive current, thereby ensuring the stability of the shunt function of the shunt module 10. In combination with the above content, the control signal line electrically connected to the same control terminal 501 of the shunt control module 50 and the control terminal 201 of the light control module 20 can be the light-emitting control signal line Emit.

[0111] In one embodiment of the present application, the operation of the pixel circuit B10 includes a first mode W1 and a second mode W2, the shunt control module 50 is turned on in the first mode W1 and is not turned on in the second mode W2, and the light emitting brightness of the light emitting device B10 in the first mode W1 is less than the light emitting brightness in the second mode W2. The first mode W1 is the working process when the light emitting device B10 needs to receive a small current to emit light, and the light emitting brightness at this time is small. When the driving transistor Md generates a small current, the current is greatly affected by the threshold bias. The second mode W2 is the working process when the light emitting device B10 needs to receive a large current to emit light, and the light emitting brightness at this time is high.

[0112] In the embodiment of the present application, the shunt control module 50 is set to be turned on in the first mode W1 and not turned on in the second mode W2, which is conducive to ensuring that the shunt module 10 is turned on when the light-emitting device B10 needs a small current, and combined with the control driving transistor Md, a relatively large current can be generated, thereby reducing the impact of the threshold bias on the light-emitting driving current, and ensuring the accuracy of the light-emitting driving current received by the light-emitting device B10. Setting the shunt control module 50 not to be turned on in the second mode W2 is conducive to preventing the shunt module 10 from being turned on when it is not necessary, thereby reducing the power consumption of the pixel circuit A10.

[0113] Fig.23 A schematic diagram of a display device provided in an embodiment of the present application.

[0114] The present application embodiment provides a display device AA1, such as Fig.23 As shown, the display device AA1 includes the display panel AA provided in the above embodiment, and the display device AA1 can be a device that can be used for display, such as a computer, a television, a mobile phone, etc.

[0115] In the display device AA1, the node between the driving transistor Md of the pixel circuit A10 and the light emitting device B10 is electrically connected to the shunt module 10, so that the light emitting driving current generated by the driving transistor Md is increased, which is conducive to reducing the influence of the threshold bias of the driving transistor Md on the light emitting driving current and improving the accuracy of the light emitting driving current generated by the driving transistor Md. In addition, the light emitting driving current ΔI required by the shunt module 10 is a relatively stable value. By quantifying the light emitting driving current I 2 = I 1 + ΔI, it is conducive to improving the accuracy of the light emitting driving current provided to the light emitting device B10 and improving the accuracy of the light emitting brightness of the light emitting device B10. In addition, the embodiment of the present application is conducive to ensuring the accuracy of the light emitting device B10 receiving a smaller light emitting driving current, improving the accuracy of the light emitting brightness of the display panel AA at low grayscale, and improving the display effect of the display panel AA. .

[0116] The above description is only a preferred embodiment of the present application and is not intended to limit the present application. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present application shall be included in the scope of protection of the present application.

Claims

1. A display panel, characterized in that: The invention comprises a pixel circuit and a light emitting device, wherein the pixel circuit is electrically connected to a first electrode of the light emitting device, and the pixel circuit comprises: A driving transistor, the driving transistor is used to generate a light-emitting driving current; A shunt module, the shunt module is electrically connected to a node between the driving transistor and the light emitting device; The light-emitting driving current received by the light-emitting device for light emission is I1, the light-emitting driving current generated by the driving transistor is I2, I2=I1+ΔI, ΔI is the light-emitting driving current received by the shunt module.

2. The display panel according to claim 1, characterized in that: The pixel circuit further comprises: A light emitting control module, the light emitting control module electrically connecting the driving transistor and the light emitting device; A first node, located between the driving transistor and the light emitting control module; The current splitting module includes a first sub-current splitting module, and the first sub-current splitting module is electrically connected to the first node.

3. The display panel according to claim 2, characterized in that: The pixel circuit further includes a first reset module, wherein a first terminal of the first reset module receives a first reset voltage, and a second terminal of the first reset module is electrically connected to the first node.

4. The display panel according to claim 2, characterized in that: The first sub-dividing module includes a first capacitor, and the first capacitor includes a first electrode plate and a second electrode plate.

5. The display panel according to claim 4, characterized in that: The first electrode of the driving transistor is electrically connected to the first node; the display panel includes a substrate, and the driving transistor is located on one side of the substrate; the driving transistor includes an active layer and a gate, the active layer is located on the side of the gate facing the substrate, the active layer includes a first portion, a second portion, and a third portion, and along a direction perpendicular to the plane where the display panel is located, the second portion overlaps the gate; along an extending direction of the active layer, the first portion and the third portion are respectively located on opposite sides of the second portion, and the first portion is reused as the first electrode of the driving transistor; The width of the first portion along a first direction is greater than the width of the third portion along the first direction, and the first direction is parallel to the plane where the display panel is located and intersects with the extension direction of the active layer.

6. The display panel according to claim 5, characterized in that: The first electrode plate of the first capacitor is located on a side of the gate of the driving transistor away from the substrate; in a direction perpendicular to the plane where the display panel is located, the first electrode plate covers the first part, and the first part is reused as the second electrode plate of the first capacitor.

7. The display panel according to claim 5 or 6, characterized in that: The first electrode plate of the first capacitor is located on a side of the active layer of the driving transistor facing the substrate; In a direction perpendicular to the plane where the display panel is located, the first electrode plate covers the first portion, and the first portion is reused as the second electrode plate of the first capacitor.

8. The display panel according to claim 1 or 2, characterized in that: The pixel circuit further includes a second node located between the light emitting control module and the light emitting device; The current splitting module includes a second sub-current splitting module, and the second sub-current splitting module is electrically connected to the second node.

9. The display panel according to claim 8, characterized in that: The pixel circuit further includes a second reset module, wherein a first terminal of the second reset module receives a second reset voltage, and a second terminal of the second reset module is electrically connected to the second node.

10. The display panel according to claim 8, characterized in that: The second sub-shunt module includes a second capacitor, and the second capacitor includes a third electrode plate and a fourth electrode plate.

11. The display panel according to claim 10, characterized in that: The display panel comprises a substrate, the pixel circuit is located on one side of the substrate, and the light emitting device is located on a side of the pixel circuit away from the substrate; a first insulating layer is included between the pixel circuit and the first electrode of the light emitting device; In a direction perpendicular to the plane where the display panel is located, the third plate of the second capacitor is located between the first insulating layer and the pixel circuit, and the third plate at least partially overlaps with the first pole of the light-emitting device, and the first pole of the light-emitting device is reused as the fourth plate.

12. The display panel according to claim 11, characterized in that: The display panel further comprises a second insulating layer and a third insulating layer, wherein the second insulating layer is located between the first electrode of the light emitting device and the first insulating layer, and the third insulating layer is located on a side of the first electrode of the light emitting device away from the substrate; the first insulating layer comprises a first opening, and a portion of the second insulating layer and a portion of the first electrode of the light emitting device are located in the first opening; the third insulating layer comprises a second opening, and the light emitting device is located in the second opening; Along a direction perpendicular to the plane where the display panel is located, the first opening overlaps a portion of the second opening; In a direction perpendicular to the plane where the display panel is located, the third plate of the second capacitor is located between the second insulating layer and the pixel circuit, the third plate overlaps with the first pole of the light-emitting device and the first opening, and the first pole of the light-emitting device is reused as the fourth plate.

13. The display panel according to claim 11, characterized in that: The display panel further comprises a second insulating layer and a third insulating layer, wherein the second insulating layer is located between the first electrode of the light emitting device and the first insulating layer, and the third insulating layer is located on a side of the first electrode of the light emitting device away from the substrate; the first insulating layer comprises a first opening, and a portion of the second insulating layer and a portion of the first electrode of the light emitting device are located in the first opening; the third insulating layer comprises a second opening, and the light emitting device is located in the second opening; Along a direction perpendicular to the plane where the display panel is located, the first opening and the second opening do not overlap; In a direction perpendicular to the plane where the display panel is located, the third plate of the second capacitor is located between the second insulating layer and the pixel circuit, the third plate overlaps with the first pole of the light-emitting device and the first opening, and the first pole of the light-emitting device is reused as the fourth plate.

14. The display panel according to claim 10, characterized in that: The first sub-dividing module includes a first capacitor, and the structure of the first capacitor is the same as that of the second capacitor.

15. The display panel according to claim 10, characterized in that: The first sub-dividing module includes a first capacitor, and the structure of the first capacitor is different from the structure of the second capacitor.

16. The display panel according to claim 1, characterized in that: The pixel circuit also includes a shunt control module, which electrically connects the shunt module to the nodes between the driving transistor and the light-emitting device; the shunt control module is turned on during at least part of the light-emitting stage of the pixel circuit and controls the shunt module to receive part of the light-emitting driving current.

17. The display panel according to claim 16, characterized in that: The pixel circuit comprises a light emitting control module, the light emitting control module is electrically connected to the driving transistor and the light emitting device; the light emitting control module is used to turn on in the light emitting stage of the pixel circuit and control the light emitting device to receive at least part of the light emitting driving current; The control end of the current shunting control module and the control end of the light emitting control module are electrically connected to the same control signal line.

18. The display panel according to claim 16, characterized in that: The operation of the pixel circuit includes a first mode and a second mode, the shunt control module is turned on in the first mode and is not turned on in the second mode, and the light emitting brightness of the light emitting device in the first mode is lower than the light emitting brightness in the second mode.

19. A display device, characterized in that: Comprising a display panel as described in any one of claims 1-18.

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