Ion energy distribution testing device for immersed plasma injection equipment

Abstract

The invention provides an ion energy distribution testing device for immersed plasma injection equipment. The ion energy distribution testing device comprises a Faraday cup, a biasing circuit, a data acquisition unit and an upper computer, the Faraday cup is arranged around the wafer and configured to collect plasma energy around the wafer, and the plasma energy is converted into a current signal at a collector of the Faraday cup; the bias circuit is configured to apply bias voltage to the grid mesh of the Faraday cup under the enabling of the data acquisition unit; and the data acquisition unit is configured to drive the biasing circuit, acquire a current signal of the collector of the Faraday cup and a voltage signal of the grid, and upload the current signal and the voltage signal to an upper computer. According to the invention, through the design of the Faraday cups and the bias circuit, the whole measuring device can realize ion energy distribution measurement under high voltage, and the distribution condition and uniformity of ion energy around the wafer can be tested in cooperation with the arrangement of the plurality of Faraday cups.

Description

Technical Field

[0001] The present disclosure relates to the field of semiconductor ion implantation technology, and in particular to an ion energy distribution testing device for immersion plasma implantation equipment. Background Art

[0002] Plasma processing has a wide range of applications in modern industry. For example, in the semiconductor industry, many integrated circuit manufacturing processes are plasma-related. In addition, plasma processing is also used in the production of solar panels, flat-panel displays, thin-film coatings, and medical devices.

[0003] During semiconductor processing, the substrate surface is bombarded by plasma species, and the surface structure or features of the workpiece are changed by etching or depositing material layers. Ion impact can directly drive etching and deposition, or it can be used to activate the surface, which can be done by more reactive plasmas. Due to the chemical reactions and physical impact collisions involved in the process, the ion current density and energy distribution reaching the substrate surface strongly affect the performance of plasma-based processes. For example, in plasma etching processes, ion flux and energy distribution determine important parameters such as etching rate, selectivity and anisotropy. Therefore, ion energy distribution is a key parameter to measure, understand and control plasma to ensure optimal process performance.

[0004] In previous studies, scientists have developed a variety of ion energy analyzers to measure the ion energy distribution in plasma processes, among which the most well-known is the deceleration field analyzer. However, in their studies, the measured ion energy is relatively small and is not suitable for high-energy ion detection in current semiconductor industrial equipment. Summary of the invention

[0005] The purpose of the embodiments of the present disclosure is to provide an ion energy distribution testing device for immersion plasma implantation equipment, so as to solve the problem that high-energy ion detection cannot be achieved in the prior art.

[0006] The embodiment of the present disclosure adopts the following technical scheme: an ion energy distribution test device for immersion plasma implantation equipment, comprising: a Faraday cup, a bias circuit, a data acquisition unit and a host computer; wherein the Faraday cup is arranged around a wafer and is configured to collect plasma energy around the wafer, and the plasma energy is converted into a current signal at the collector of the Faraday cup; the bias circuit is configured to apply a bias voltage to the grid of the Faraday cup when enabled by the data acquisition unit; the data acquisition unit is configured to drive the bias circuit, and collect the current signal of the collector of the Faraday cup and the voltage signal of the grid, and upload the current signal and the voltage signal to the host computer; the host computer is configured to analyze and calculate the energy distribution of the plasma based on the current signal and the voltage signal.

[0007] The beneficial effects of the embodiments of the present disclosure are as follows: through the design of the Faraday cup and the bias circuit, the measuring device as a whole can achieve ion energy distribution and current density measurement within 2000eV, and can be combined with the setting of multiple Faraday cups to achieve the distribution and uniformity test of ion energy around the wafer. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] In order to more clearly illustrate one or more embodiments of this specification or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in this specification. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative labor.

[0009] Figure 1 It is a schematic structural diagram of an ion energy distribution testing device for an immersion plasma implantation device in an embodiment of the present disclosure;

[0010] Figure 2 is a schematic diagram of the cross-sectional structure of a single Faraday cup in an embodiment of the present disclosure;

[0011] Figure 3 Schematic diagram of the insulating layer of the middle protrusion structure in the embodiment of the present disclosure;

[0012] Figure 4 Schematic diagram of an insulating layer of a middle recessed structure in an embodiment of the present disclosure;

[0013] Figure 5 An arrangement of multiple Faraday cups and a shielding cover design in an embodiment of the present disclosure;

[0014] Figure 6 Another arrangement of multiple Faraday cups and shielding cover design in the disclosed embodiment;

[0015] Figure 7 is a circuit structure diagram of a single-ended flyback converter in an embodiment of the present disclosure;

[0016] Figure 8 1 is a circuit diagram of an isolated flyback converter with multiple output windings in an embodiment of the present disclosure. DETAILED DESCRIPTION

[0017] In order to enable those skilled in the art to better understand the technical solutions in one or more embodiments of this specification, the following will be combined with the drawings in one or more embodiments of this specification to clearly and completely describe the technical solutions in one or more embodiments of this specification. Obviously, the described embodiments are only part of the embodiments of this specification, not all of the embodiments. Based on one or more embodiments of this specification, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of this document.

[0018] Plasma processing has a wide range of applications in modern industry. For example, in the semiconductor industry, many integrated circuit manufacturing processes are plasma-related. In addition, plasma processing is also used in the production of solar panels, flat-panel displays, thin-film coatings, and medical devices.

[0019] During semiconductor processing, the substrate surface is bombarded by plasma species, and the surface structure or features of the workpiece are changed by etching or depositing material layers. Ion impact can directly drive etching and deposition, or it can be used to activate the surface, which can be done by more reactive plasmas. Due to the chemical reactions and physical impact collisions involved in the process, the ion current density and energy distribution reaching the substrate surface strongly affect the performance of plasma-based processes. For example, in plasma etching processes, ion flux and energy distribution determine important parameters such as etching rate, selectivity and anisotropy. Therefore, ion energy distribution is a key parameter to measure, understand and control plasma to ensure optimal process performance.

[0020] In previous studies, scientists have developed a variety of ion energy analyzers to measure the ion energy distribution in plasma processes, among which the most well-known is the deceleration field analyzer. However, in their studies, the measured ion energy is relatively small and is not suitable for high-energy ion detection in current semiconductor industrial equipment.

[0021] In order to solve the above problems, the present disclosure provides an ion energy distribution test device for an immersion plasma implantation device, and its structural schematic diagram is shown in FIG. Figure 1As shown, it mainly includes a Faraday cup 10, a bias circuit 20, a data acquisition unit 30 and a host computer 40; wherein the Faraday cup 10 and the wafer are placed in the vacuum chamber of the plasma injection device, and the Faraday cup 10 is arranged around the wafer, and the number of the Faraday cups 10 can be multiple, so as to be evenly distributed around the wafer to achieve more accurate plasma energy collection, and the plasma is converted into a current signal output after hitting the collecting electrode at the bottom of the Faraday cup 10; the bias circuit 20 is used to apply a bias to the grid of the Faraday cup 10 when the data acquisition unit 30 is enabled. The voltage is specifically designed with reference to the number of Faraday cups 10 and the number of grids in each Faraday cup 10. By applying a bias voltage to the grid, the functions of screening and filtering the plasma and repelling foreign electrons are realized; the data acquisition unit 30 is configured to drive the bias circuit 20, and collect the current signal of the collector of the Faraday cup 10 and the voltage signal of the grid, and upload the current signal and the voltage signal to the host computer 40; the host computer 40 calculates the energy distribution of the plasma according to the current signal and the voltage signal uploaded by the data acquisition unit 30.

[0022] Figure 2 FIG. 2 shows a schematic cross-sectional structure diagram of a single Faraday cup 10 in this embodiment. Figure 2 As shown in FIG. 1 , the structure of the Faraday cup 10 mainly includes a shielding cover 110, a shielding shell 120, four layers of grids 130, an insulating layer 140 between each layer of grids, and a collector 150; wherein the shielding cover 110 is located at the top of the Faraday cup 10, and a sub-millimeter collection hole array is opened in the center of the shielding cover 110 for plasma to pass through the shielding cover 110; the shielding shell 120 covers the side wall and the bottom (at Figure 2 The side wall position of the Faraday cup 10 is provided with a wire hole corresponding to the position of the grid for placing the wire connecting the grid and the bias circuit, and the shielding shell 120 is grounded. The grid 130 has four layers, which are arranged in parallel in the cup body of the Faraday cup 10. From the cup mouth to the cup bottom of the Faraday cup 10, there are the first grid 131, the second grid 132, the third grid 133 and the fourth grid 134. The four layers of grids have the same or similar aperture shape and opening area characteristics, that is, each layer of the grid has a plurality of grid holes and the positions and numbers of the grid holes of all the grids correspond, and the size of the grid aperture is less than twice the Debye length λ. D The second grid 132, the third grid 133 and the fourth grid 134 are all extended out of the Faraday cup 10 through wires to achieve connection with the corresponding bias circuit.

[0023] The insulating layer 140 is a structure arranged between adjacent grids 120. In addition, there is also an insulating layer arranged between the grid and the collector. The shapes of the insulating layer 140 and the collector are all annular. The plasma reaches the collector 150 at the bottom through the central cavity. The outer edge of the insulating layer 150 exceeds the edge of the grid 130, that is, the positive projection of the insulating layer 140 on the plane to which the wafer belongs completely covers the edge of the positive projection of the grid 130 on the plane to which the wafer belongs, ensuring that the conductive grid will not be arc-broken on the outer wall of the insulating layer. In some embodiments, the inner wall of the insulating layer 140 can be any one of a flush structure, a middle convex structure, or a middle concave structure. Figure 2 The insulating layer 140 shown is a flush structure. Figure 3 A schematic diagram of the insulating layer 140 with a middle protrusion structure is shown. Figure 4 Schematic diagram of the insulating layer 140 with a recessed structure in the middle. In actual implementation, if the vacuum pressure in the vacuum chamber is low enough, the ion mean free path is large, so that the spacing between the grids 130 has a large adjustment space, then the flush structure can be used to increase the spacing between the grids 130 to avoid creepage; if the vacuum pressure is relatively small, the ion free path is small, then the spacing between the grids 130 will be small, and the high voltage applied to the grid will easily cause creepage, and then a convex or concave structure is needed.

[0024] Specifically, the design of the structure of the insulating layer 140 makes the shortest path between adjacent grids 130 along the insulating surface, i.e., the creepage distance, greater than the voltage flashover distance of the insulating material. The creepage distance is determined by the maximum voltage difference applied between the conductive grids. Although the distance between the conductive grids is shorter in the air gap area, since the sensor will work at a low voltage, there is no voltage breakdown problem, as shown by the Paschen's law formula:

[0025]

[0026] In formula (1), A and B are constants and are related to the gas composition; P is the gas pressure, which is the pressure of the plasma environment in this embodiment; d is the distance between the electrodes, that is, the distance between two adjacent grids in this embodiment. If an insulating layer 140 with a flush structure is used, and the grids 130 on the upper and lower sides of the insulating layer 140 have a pressure difference of thousands of volts, increasing the thickness of the insulating layer (i.e., the distance d between adjacent grids) can effectively avoid the occurrence of creepage according to the characteristics of the gas used and the vacuum experimental environment. According to the spacing between the grids and the vacuum pressure environment of the plasma process, the thickness of the insulating layer 140 should be set within the millimeter or sub-millimeter range. In order to avoid collisions during plasma injection, the total transmission distance of ions through the Faraday cup 10 should be less than the mean free path of the ions, thereby maintaining the integrity of the measured ion energy distribution.

[0027] The collector 150 is located at the bottom of the Faraday cup 10, and is a cup-shaped structure with a concave center. The orthographic projection of the center of the collector 150 on the plane to which the wafer belongs does not overlap with the orthographic projection of the insulating layer 140 on the plane to which the wafer belongs, that is, the plasma reaches the collector 150 after passing through each grid to form a current signal output. It should be noted that when the insulating layer 140 is a middle convex structure, there is a certain overlap area between the orthographic projection of its convex part on the plane to which the wafer belongs and the orthographic projection of the center of the collector 150 on the plane to which the wafer belongs, and the overlap area should also be annular, and the width of the annular corresponds to the length of the convex part.

[0028] Specifically, corresponding to a single Faraday cup 10, its first grid 131 is connected to the shielding cover 110 and is at zero potential V G0 , to prevent the generation of secondary plasma; the second grid 132 is connected to the first bias circuit 210, the first bias circuit 210 is used to apply a first negative voltage V to the second grid 132 G1 The third grid 133 is negatively biased relative to the first grid 131, thereby generating a deceleration electric field required to repel incident plasma electrons; the third grid 133 is connected to the second bias circuit 220, and the second bias circuit 220 is used to apply a second positive voltage V to the third grid 133 G2 The second voltage can be up to 2000V. The third grid 133 has a positive potential scanning bias relative to the first grid 131 to screen positive ions of different energies. The fourth grid 134 is connected to the third bias circuit 230, and the third bias circuit 230 is used to apply a third negative voltage V to the fourth grid 134. G3 , the third negative voltage V G3 The voltage value is less than the first negative voltage V G1 The collector 150 is connected to a fourth bias circuit 240, and the fourth bias circuit 240 is used to apply a fourth negative voltage V to the collector 150. GC , the fourth negative voltage V GC The voltage value is less than the third negative voltage V G3 At this time, the fourth grid 134 is at a negative potential relative to the collector 150, thereby generating an electric field to suppress the secondary electron emission on the collector; the fourth negative voltage V GC It is a negative potential within 10 volts relative to the ground, which is used to attract positive ions to the collector.

[0029] When the Faraday cup 10 is working, the aperture diameter of the first grid 131 is less than twice the Debye length of the plasma, so that the plasma entering the Faraday cup 10 will not be re-ionized. The second grid 132 has a negative bias voltage to repel external electrons and attract positive ions to enter the Faraday cup 10 and reach the third grid 133; the positive voltage on the third grid 133 will scan from 0V to nearly 2000V. During the scanning process, the voltage value at a certain moment will serve as a threshold to reach the collector of the Faraday cup 10. Positive ions less than this voltage threshold will be blocked outside the third grid 133, while positive ions with higher energy can pass through the voltage threshold of the third grid 133 and be collected by the collector 150 to become a detectable current signal. The fourth grid 134 has a negative voltage relative to the collector 150. This is because when positive ions reach the collector, they will collide with secondary electrons on the collector 150. The escape of these secondary electrons will cause the measured current to be too large, so the negative bias voltage on the fourth grid 134 and the electric field formed by the collector 150 will "pull back" the secondary electrons to the collector 150, thereby improving the accuracy of the current signal.

[0030] In some embodiments, the shielding cover 110 , the shielding shell 120 and the collector 150 are made of aluminum, the grid 130 is made of nickel or stainless steel, and the insulating layer 140 is generally made of polytetrafluoroethylene, ceramic, mica or other process-compatible insulating materials.

[0031] In actual implementation, multiple Faraday cups 10 are often arranged around the wafer at the same time. Figure 5 and Figure 6 Two different arrangements of the Faraday cup and their corresponding shielding cover designs are shown. It should be noted that: Figure 5 and Figure 6 The shielding covers in the figure are all integrated structures formed by integrating the shielding covers corresponding to the Faraday cups, and the collection holes on the shielding covers correspond to the positions of the Faraday cups. Figure 5 A ring design is shown, each Faraday cup 10 is a part of the ring structure, multiple Faraday cups 10 are separated by metal partitions, and the wafer is set at the center of the ring structure, which is equivalent to integrating the Faraday cup around the wafer. During the wafer implantation process, the ion energy distribution is monitored in real time; Figure 6 A planar structural design is shown in FIG. 1 . In this case, the Faraday cup 10 is designed with reference to the shape of the wafer. There is also a metal partition for shielding between the Faraday cups 10. The position of the opening above the shielding cover 110 is also adjusted accordingly. In this case, the plasma energy distribution detection can be performed by calibrating the plasma energy distribution through the Faraday cup 10 at the position where the wafer needs to be placed before the implantation process begins (i.e. Figure 6After the calibration is completed, the middle Faraday cup 10 is removed and placed in the wafer for the implantation process.

[0032] The data acquisition unit 30 is connected to the third grids 133 and collectors 150 of all Faraday cups 10 at the same time, and collects the voltage signals of multiple third grids 133 and the current signals of multiple collectors 150 based on timing control. The voltage signal and current signal of each Faraday cup 10 can also be serially sampled using multiple input ports.

[0033] Specifically, the sampling principle of the data acquisition unit 30 is that when the voltage applied to the third grid 133 is U, only when the speed is greater than Only the ions can pass through the third grid 133, and then these ions are received by the collector 150, and the generated current I is:

[0034]

[0035] The host computer combines the ion energy formula:

[0036]

[0037] E=eU

[0038] The incident ion energy distribution function can be obtained:

[0039]

[0040] Where v is the ion velocity, n i (v) is the ion density function with respect to velocity, A is the effective area of ​​the third grid, T is the transmission rate from the third grid 133 to the collector 150, m is the ion mass, and e is the ion charge.

[0041] In some embodiments, a current limiting resistor R is connected in series between the second grid 132, the third grid 133, the fourth grid 134 and the collector 150 and their corresponding bias circuits. In actual implementation, a current limiting resistor can also be connected only between the third grid 133 and its corresponding second bias circuit to avoid arc breakdown between any two grids. Under ideal conditions, the high voltage on the third grid 133 should not cause breakdown between the grids, and the spacing between them can be used within the pressure range of interest. However, microscopic particles can enter from the plasma or sputter out from the grid surface and may cause sudden arcs or short plasma impacts. If breakdown does occur, the third grid 133 may suddenly discharge into other grids, and this sudden discharge may also last longer by drawing unlimited current from the battery. If discharge occurs, the third grid 133 will discharge immediately, making the scan invalid. To solve this problem of sudden discharge between grids, a current limiting resistor can be connected in series between the grid and the power supply to prevent the sudden discharge of the power supply voltage of the third grid 133, further preventing the loss of scan data.

[0042] In this embodiment, the first bias circuit 210, the third bias circuit 230 and the fourth bias circuit 240 are all single-ended flyback converters. Figure 7 As shown, it mainly includes a first controller U1, a switch tube M1, a first transformer T1, a first diode D1, a first resistor R1, a second resistor R2, a third resistor R3, a first capacitor C1, a second capacitor C2 and a first switch K1; wherein, an input voltage Vin is connected to an enable end of the first controller U1 and a same-name end of a primary side of the first transformer T1, the other end of the primary side is connected to a drain of the switch tube M1, a source of the switch tube M1 is grounded through a third resistor R3, a gate of the switch tube M1 is connected to the first controller U1, and a second capacitor C2 is connected in series with the first switch K1 and then in parallel with the first transformer T1. Two ends of the primary side of the first transformer T1, the same-name end of the secondary side of the first transformer T1 is grounded, the other end of the secondary side is connected to the positive electrode of the first diode D1, the cathode of the first diode D1 is connected in series with the first resistor R1 and the second resistor R2 to be grounded, and there is a feedback voltage between the first resistor R1 and the second resistor R2 and is connected to the first controller U1, the cathode of the first diode D1 is also connected to one end of the first capacitor C1, the other end of the first capacitor C1 is grounded, and the cathode of the first diode D1 outputs a negative bias voltage as an output end; the first switch K1 is closed under the control of the clock signal clk output by the data acquisition unit.

[0043] When the first controller U1 controls M1 to turn on, the electric energy at the input end is stored in the primary coil of the first transformer T1 in the form of magnetic energy. Due to the relationship between the same-name terminals, the first diode D1 on the secondary side is not turned on, and no current flows through the load (i.e., the grid connected to the circuit). When U1 controls M1 to turn off, the secondary winding of the first transformer T1 supplies power to the load with the output voltage Vout, and demagnetizes the first transformer T1. The function of the second capacitor C2 and the first switch K1 is to eliminate the peak current on the primary side of the first transformer T1. When M1 is disconnected, the current in the primary side of the first transformer T1 tends to continue to flow. The current accumulates charge on the second capacitor C2 along the body diode of the switch tube, and then the first switch K1 is closed, and the current returns to the primary side of the first transformer T1. In this process, no resistance consumes energy, and when the charge in the second capacitor C2 is consumed, since the switch tube M1 is disconnected, the charge on the M1 body capacitor will be drawn away by the current on the primary side of the first transformer T1. When the charge in the body capacitor is drawn away, the voltage between the drain and source of M1 becomes zero volts. At this time, turning on M1 again realizes zero voltage conduction to reduce the heat generated by M1.

[0044] In this embodiment, since the second bias circuit 220 needs to provide a relatively high positive voltage, it is usually implemented by an isolated flyback converter with multiple output windings. The corresponding circuit diagram is as shown in FIG. Figure 8As shown, the isolated flyback converter with multiple output windings mainly includes a second controller U2, a second transformer T2, a second diode D2, a third diode D3, a fourth diode D4, a third capacitor C3, a fourth capacitor C4, a fifth capacitor C5, a sixth capacitor C6, a fourth resistor R4, a fifth resistor R6, a sixth resistor R6 and a second switch K2; wherein, the input voltage Vin is connected to the enable end of the second controller U2 and the primary side of the second transformer T2, the other end of the primary side is connected to the external port SW of the internal integrated switch tube of the second controller U2, the sixth capacitor C6 is connected in series with the fourth resistor R4 and then connected in parallel with the primary side of the second transformer T2, the fifth resistor R5 is connected between the SW port and the RFB port of the second controller U2, and there are three separate output windings on the secondary side of the second transformer T2, namely, the second winding L2, the third winding L3 and the fourth winding L4, one end of the second winding L2, the third winding L3 and the fourth winding L4 are respectively connected to the second second winding L2, the third winding L3 and the fourth winding L4. The anodes of the diode D2, the third diode D3 and the fourth diode D4 are connected, the cathode of the second diode D2 is connected to one end of the third capacitor C3, the other end of the third capacitor C3 is connected to the other end of the second winding L2, the cathode of the third diode D3 is connected to one end of the fourth capacitor C4, the other end of the fourth capacitor C4 is connected to the other end of the third winding L3, the cathode of the fourth diode D4 is connected to one end of the fifth capacitor, the other end of the fifth capacitor C5 is connected to the other end of the fourth winding, the third capacitor C3, the fourth capacitor C4 and the fifth capacitor C5 are connected in series, and the cathode of the second diode D2 outputs a positive bias voltage as an output end; one end of the sixth resistor R6 is connected to the cathode of the second diode D2, the other end of the sixth resistor R6 is grounded, the second switch K2 is connected in parallel to both ends of the sixth resistor R6, the second switch K2 is closed under the control of the clock signal clk output by the data acquisition unit, the sixth resistor R6 is used to control the discharge rate, and the second switch K2 is used to initialize the discharge of the third grid.

[0045] The operation of a flyback converter with multiple output windings is similar to that of a single output winding. The advantage of using three separate output windings is that the 1:10:10:10 transformer allows the output voltage stress to be shared among three high voltage output diodes and three high voltage output capacitors. The voltage rating of the individual components only needs to be one-third of the total voltage, which facilitates a wider selection of output diodes and output capacitors.

[0046] In actual use, the data acquisition unit 30 drives the second bias circuit 220 to boost the input small DC voltage to 2000 volts. After boosting to 2000 volts, the second bias circuit 220 stops working, and the voltage on the output capacitor remains at 2000 volts. Due to the effect of the diodes (D2 to D4), the charge on the capacitor (C3 to C5) will not flow to the input end, so the capacitor can only be discharged through the resistor R6 at the output end, and the voltage on the capacitor gradually decreases. The resistance value of the sixth resistor R6 is set to control the discharge time, and the voltage change from 2000 volts to 0 volts on the third grid 133 is completed, and voltage sampling is performed in this process.

[0047] In some embodiments, the execution program of the host computer 40 is written using Labview2023. The program can differentiate the collected current signal with respect to the voltage to obtain the current density distribution on the voltage, and then calculate the ion energy distribution. Then, the distribution of the injected ion energy can be obtained through the parameters of the Faraday cup at different positions. The data acquisition unit 30 uses a data acquisition card that can match Labview2023, collects the voltage signal and current signal in the Faraday cup through the AI ​​channel, and controls the opening and closing of the switch tube in the voltage conditioning circuit by controlling the high and low levels of the DO channel output through the program.

[0048] Furthermore, the measuring device of this embodiment may also include a pressure sensor 50 and a power supply 60, wherein the pressure sensor 50 is placed in the vacuum chamber where the wafer is located or at the connection between the vacuum chamber and the vacuum pump, and the pressure sensor 50 is configured to detect the vacuum pressure in the vacuum chamber, and after the vacuum pressure reaches a threshold, an enable signal is sent to the data acquisition unit 30, so that the data acquisition unit 30 drives the bias circuit 20 under the control of the enable signal; the power supply 60 is configured to provide an initial voltage to the bias circuit, that is, Vin input into the bias circuit, and to power the data acquisition unit 30 at the same time.

[0049] The measuring device constructed in this embodiment can measure the ion energy distribution and current density within 2000eV under appropriate pressure conditions, thereby improving the accuracy and practicality of the measuring device in plasma measurement under high pressure, while ensuring the stability of the sampling data. It is also simpler and more convenient to implement, and can be customized for implantation equipment of various wafer sizes by combining with different styles of Faraday cup structures.

[0050] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present disclosure, rather than to limit them. Although the present disclosure has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or replace some or all of the technical features therein by equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present disclosure.

Claims

1. An ion energy distribution test device for immersion plasma implantation equipment, characterized in that: include: Faraday cup, bias circuit, data acquisition unit and host computer; among them, The Faraday cup is disposed around the wafer and is configured to collect plasma energy around the wafer, wherein the plasma energy is converted into a current signal at a collecting electrode of the Faraday cup; The bias circuit is configured to apply a bias voltage to the grid of the Faraday cup when enabled by the data acquisition unit; The data acquisition unit is configured to drive the bias circuit, collect the current signal of the collector of the Faraday cup and the voltage signal of the grid, and upload the current signal and the voltage signal to the host computer; The host computer is configured to analyze and calculate the energy distribution of plasma based on the current signal and the voltage signal.

2. The ion energy distribution testing device according to claim 1, characterized in that: The Faraday cup comprises at least: Shielding cover, shielding shell, four layers of grid, insulating layer between each layer of grid and collecting electrode; wherein, The shielding cover is located on the top of the Faraday cup, and a sub-millimeter collection hole array is opened in the center of the shielding cover; The shielding shell covers the side wall and the bottom of the Faraday cup, the shielding shell is provided with a wire hole at a position corresponding to the grid, and the shielding shell is grounded; All the grids are arranged in parallel in the cup body of the Faraday cup, and are arranged in order from the cup mouth of the Faraday cup to the cup bottom, namely, the first grid, the second grid, the third grid and the fourth grid, the grid holes of each layer of grids are located at corresponding positions, and the second grid, the third grid and the fourth grid are respectively connected to one of the bias circuits through a wire; The insulating layer is annular in level, and the orthographic projection of the insulating layer on the plane to which the wafer belongs completely covers the edge of the orthographic projection of the grid on the plane to which the wafer belongs; The collector is located at the bottom of the Faraday cup. The collector is a cup-shaped structure with a concave center portion. The orthographic projection of the center portion of the collector on the plane to which the wafer belongs does not overlap with the orthographic projection of the insulating layer on the plane to which the wafer belongs.

3. The ion energy distribution testing device according to claim 2, characterized in that: The first grid is connected to the shielding cover; The second grid is connected to a first bias circuit, and the first bias circuit is used to apply a first negative voltage to the second grid; The third grid is connected to a second bias circuit, and the second bias circuit is used to apply a second positive voltage to the third grid; The fourth grid is connected to a third bias circuit, and the third bias circuit is used to apply a third negative voltage to the fourth grid, and a voltage value of the third negative voltage is less than a voltage value of the first negative voltage; The collector is connected to a fourth bias circuit, and the fourth bias circuit is used to apply a fourth negative voltage to the collector, and a voltage value of the fourth negative voltage is smaller than a voltage value of the third negative voltage.

4. The ion energy distribution testing device according to claim 2, characterized in that: The shielding cover, the shielding shell and the collecting electrode are made of aluminum, the grid is made of nickel or stainless steel, and the insulating layer is made of any one of polytetrafluoroethylene, ceramics and mica.

5. The ion energy distribution testing device according to claim 2, characterized in that: The inner wall of the insulating layer is any one of a flush structure, a middle convex structure or a middle concave structure.

6. The ion energy distribution testing device according to claim 2, characterized in that: There are multiple Faraday cups, and the multiple Faraday cups are evenly arranged around the wafer; The data acquisition unit is connected to the third grids and collectors of all the Faraday cups at the same time, and collects voltage signals of multiple third grids and current signals of multiple collectors through timing control.

7. The ion energy distribution testing device according to claim 2, characterized in that: A current-limiting resistor is connected in series between the second grid, the third grid, the fourth grid, the collector and the corresponding bias circuit.

8. The ion energy distribution testing device according to claim 3, characterized in that: The first bias circuit, the third bias circuit and the fourth bias circuit are all single-ended flyback converters; The single-ended flyback converter at least includes a first controller U1, a switch tube M1, a first transformer T1, a first diode D1, a first resistor R1, a second resistor R2, a third resistor R3, a first capacitor C1, a second capacitor C2 and a first switch K1; wherein, The input voltage Vin is connected to the enable terminal of the first controller U1 and the same-name terminal of the primary side of the first transformer T1, the other end of the primary side is connected to the drain of the switch tube M1, the source of the switch tube M1 is grounded through the third resistor R3, the gate of the switch tube M1 is connected to the first controller U1, the second capacitor C2 is connected in series with the first switch K1 and then connected in parallel to the two ends of the primary side of the first transformer T1, the same-name terminal of the secondary side of the first transformer T1 is grounded, the other end of the secondary side is connected to the positive electrode of the first diode D1, the cathode of the first diode D1 is connected in series with the first resistor R1 and the second resistor R2 and is grounded, and there is a feedback voltage between the first resistor R1 and the second resistor R2 and is connected to the first controller U1, the cathode of the first diode D1 is also connected to one end of the first capacitor C1, the other end of the first capacitor C1 is grounded, and the cathode of the first diode D1 outputs a negative bias voltage as an output end; the first switch K1 is closed under the control of the clock signal clk output by the data acquisition unit.

9. The ion energy distribution testing device according to claim 3, characterized in that: The second bias circuit is an isolated flyback converter with multiple output windings; The isolated flyback converter with multiple output windings at least includes: a second controller U2, a second transformer T2, a second diode D2, a third diode D3, a fourth diode D4, a third capacitor C3, a fourth capacitor C4, a fifth capacitor C5, a sixth capacitor C6, a fourth resistor R4, a fifth resistor R6, a sixth resistor R6 and a second switch K2; wherein, The input voltage Vin is connected to the enable end of the second controller U2 and the primary side of the second transformer T2, the other end of the primary side is connected to the external port SW of the internal integrated switch tube of the second controller U2, the sixth capacitor C6 is connected in series with the fourth resistor R4 and then connected in parallel with the primary side of the second transformer T2, the fifth resistor R5 is connected between the SW port and the RFB port of the second controller U2, and there are three separate output windings on the secondary side of the second transformer T2, namely the second winding L2, the third winding L3 and the fourth winding L4, one end of the second winding L2, the third winding L3 and the fourth winding L4 are respectively connected to the second diode D2, the The anodes of the third diode D3 and the fourth diode D4 are connected, the cathode of the second diode D2 is connected to one end of the third capacitor C3, the other end of the third capacitor C3 is connected to the other end of the second winding L2, the cathode of the third diode D3 is connected to one end of the fourth capacitor C4, the other end of the fourth capacitor C4 is connected to the other end of the third winding L3, the cathode of the fourth diode D4 is connected to one end of the fifth capacitor, the other end of the fifth capacitor C5 is connected to the other end of the fourth winding, the third capacitor C3, the fourth capacitor C4 and the fifth capacitor C5 are connected in series, and the cathode of the second diode D2 is used as an output end to output a positive bias voltage; One end of the sixth resistor R6 is connected to the cathode of the second diode D2, the other end of the sixth resistor R6 is grounded, the second switch K2 is connected in parallel at both ends of the sixth resistor R6, and the second switch K2 is closed under the control of the clock signal clk output by the data acquisition unit.

10. The ion energy distribution testing device according to any one of claims 1 to 9, characterized in that: Also includes: A pressure sensor, the pressure sensor is placed in the vacuum chamber where the wafer is located or at the connection between the vacuum chamber and the vacuum pump, the pressure sensor is configured to detect the vacuum pressure in the vacuum chamber, and after the vacuum pressure reaches a threshold, send an enable signal to the data acquisition unit, so that the data acquisition unit drives the bias circuit under the control of the enable signal; A power supply is configured to provide an initial voltage to the bias circuit and to power the data acquisition unit.

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