Current compensation circuit, logarithmic detector and chip

Abstract

The embodiment of the invention discloses a current compensation circuit, a logarithmic detector and a chip. The current compensation circuit comprises a current mirror, the current mirror comprises a first transistor and a second transistor, the first transistor and the second transistor respectively comprise a first end, a second end and a control end, and the current mirror is configured to mirror a first current flowing through the first end of the first transistor to the first end of the second transistor, the first end of the second transistor outputs compensation current; the resistance module is connected with the first end of the first transistor, and the resistance value of the resistance module and the first voltage of the first end of the first transistor are used for determining the size of the first current; the fuse module is connected with the resistor module and / or the first end of the first transistor and used for outputting a first control signal based on the fusing state, and the first control signal is used for calibrating the resistance value of the resistor module and / or the first voltage.

Description

Technical Field

[0001] The embodiments of the present disclosure relate to the field of electronic devices, and relate to but are not limited to a current compensation circuit, a logarithmic detector, and a chip. Background Art

[0002] Various common detectors or signal processors often have detection or processing errors due to process angle mismatch and process deviation, so precision calibration is required, such as: detectors, ring oscillators, amplifiers, etc.

[0003] Taking the logarithmic detector as an example, it is often used to measure and detect the amplitude of the signal, and has the characteristic of converting the input signal into an output voltage or current proportional to the logarithm of the input signal. Logarithmic detectors are mainly used in radar, satellite communications, microwave point-to-point communications, test instruments, radio spectrum monitoring and other equipment, and are suitable for signal strength indication, broadband spectrum detection, fault detection, automatic gain control and other application scenarios.

[0004] Different logarithmic detectors have different logarithmic curves due to process angle mismatch and process deviation, which affects the performance of the logarithmic detector, resulting in deviations in the intercepts of the logarithmic curves, where the logarithmic curve is a curve of output voltage and input power.

[0005] The deviation of devices such as logarithmic detectors can be adjusted by current calibration to compensate for the performance differences of different devices. Therefore, how to achieve current calibration is one of the issues that need to be considered in this field. Summary of the invention

[0006] In view of this, embodiments of the present disclosure provide a current compensation circuit, a logarithmic detector, and a chip for outputting an adjustable current.

[0007] In one aspect, an embodiment of the present disclosure provides a current compensation circuit, including: A current mirror, comprising a first transistor and a second transistor, wherein the first transistor and the second transistor respectively comprise a first terminal, a second terminal and a control terminal, wherein the current mirror is configured to mirror a first current flowing through the first terminal of the first transistor to the first terminal of the second transistor, and the first terminal of the second transistor outputs a compensation current; a resistance module connected to the first end of the first transistor, wherein the resistance value of the resistance module and the first voltage at the first end of the first transistor are used to determine the magnitude of the first current; A fuse module is connected to the first end of the resistance module and / or the first transistor, and is used to output a first control signal based on a fuse state, wherein the first control signal is used to calibrate the resistance value of the resistance module and / or the first voltage.

[0008] In the current compensation circuit of the disclosed embodiment, the fuse module is a programmable memory, which stores data based on the blown state of the internal fuse, and the internal fuse is blown based on the size of the compensation current to be output; the fuse module outputs a first control signal according to the blown state, and the first control signal is used to calibrate the resistance value of the resistance module and / or the size of the first voltage. The resistance value of the resistance module and the first voltage of the first end of the first transistor are used to determine the size of the first current, so that the first voltage of the first end of the first transistor of the current mirror and / or the resistance value of the resistance module can be adjusted through the adjustment through the fuse module, thereby adjusting the size of the first current; and the compensation current is a copy of the first current, and the compensation current changes with the first current, therefore, the size of the compensation current can be adjusted by the first control signal output by the fuse module, so as to achieve accurate calibration of the size of the compensation current, which is conducive to improving the calibration accuracy and calibration efficiency.

[0009] When the fuse module is connected to the resistance module and the first end of the first transistor at the same time, the first control signal is used to calibrate the resistance value of the resistance module and the first voltage, so that the first voltage and the resistance value of the resistance module can be adjusted in at least two dimensions through the fuse module, and multi-level adjustment of the compensation current output by the current compensation circuit can be achieved, thereby further improving the accuracy of the compensation current.

[0010] In some embodiments, the resistance module includes one or more variable resistance units and one or more resistance array units connected in series. In this case, the resistance value can be adjusted by the variable resistance unit or the resistance array unit. That is to say, the resistance value has two levels of adjustment. Combined with the adjustment of the first voltage value, the current compensation circuit can achieve a total of three levels of adjustment, thereby achieving precise calibration of the compensation current size, which is beneficial to improving the calibration accuracy and calibration efficiency.

[0011] In addition, the current output circuit is applied to the logarithmic detection component to realize the calibration of the logarithmic detector. The calibration of the logarithmic curve intercept of the logarithmic detector can be realized by debugging the current output circuit, which can effectively reduce the abnormal deviation of the logarithmic curve intercept caused by the process foot mismatch and process deviation of different logarithmic detector products, thereby improving the detection accuracy of the logarithmic detection component and improving the product yield. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] Figure 1 is a circuit structure block diagram of a logarithmic detector in an embodiment of the present disclosure; Figure 2 is a block diagram of a circuit structure for calibrating the intercept of a logarithmic detector in an embodiment of the present disclosure; Figure 3 A schematic diagram of a current compensation circuit provided by an embodiment of the present disclosure; Figure 4 A schematic diagram of another current compensation circuit provided by an embodiment of the present disclosure; Figure 5 A schematic diagram of a current compensation circuit and a resistance module therein provided in an embodiment of the present disclosure; Figure 6 is a schematic diagram of a resistance characteristic curve of a MOS tube in an embodiment of the present disclosure; Fig. 7A and Figure 7B Schematic diagrams of two types of resistor array units in the current compensation circuit provided in the embodiments of the present disclosure; Figure 8 A schematic diagram of a current compensation circuit and a voltage follower thereof provided in an embodiment of the present disclosure; Fig. 9 A schematic diagram of the structure of a voltage switching module in a current compensation circuit provided in an embodiment of the present disclosure; Fig.10 A schematic diagram of the structure of a fuse module in a current compensation circuit provided in an embodiment of the present disclosure; Fig.11 A schematic diagram of another current compensation circuit provided by an embodiment of the present disclosure; Fig.12 A flow chart of a logarithmic detector calibration method provided by an embodiment of the present disclosure; Fig.13 A structural block diagram of a chip provided in an embodiment of the present disclosure. DETAILED DESCRIPTION

[0013] In order to facilitate understanding of the present disclosure, the present disclosure will be described more fully below with reference to the relevant drawings. The preferred embodiments of the present disclosure are shown in the drawings. However, the present disclosure can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the present disclosure more thorough and comprehensive.

[0014] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those generally understood by those skilled in the art to which the present disclosure belongs. The terms used herein in the specification of the present disclosure are only for the purpose of describing specific embodiments and are not intended to limit the present disclosure. The term "and / or" used herein includes any and all combinations of one or more related listed items. In the embodiments of the present disclosure, the terms "first", "second", "third", "fourth" are used only for descriptive purposes and cannot be understood as indicating or implying relative importance or implicitly indicating the number of indicated technical features. Thus, the features defined as "first", "second", "third", "fourth" may explicitly or implicitly include one or more of the features.

[0015] It should be understood that in the description of the embodiments of the present disclosure, it should be noted that, unless otherwise clearly specified and limited, the terms "connected" and "connected" should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a direct connection, or an indirect connection through an intermediate medium, or it can be the internal connection of two elements.

[0016] The terms involved in the embodiments of the present disclosure are explained as follows: Logarithmic detector: used to measure and detect the amplitude of a signal. Its output DC signal (such as a voltage signal) is proportional to the logarithm of the input signal voltage amplitude.

[0017] Logarithmic curve: a curve showing the output DC voltage signal of a logarithmic detector as the input signal changes. The horizontal axis of the logarithmic curve is the signal power of the input RF signal. For example, the unit of RF signal power may be decibel milliwatt (dBm). The vertical axis of the logarithmic curve is the DC voltage of the output signal, which may be in volts (V) or millivolts (mV).

[0018] The intercept of the logarithmic curve: The voltage value corresponding to the intersection of the logarithmic curve and the ordinate axis. The intercept of the logarithmic curve can also be understood as the output offset of the logarithmic detector.

[0019] Logarithmic amplifier: An amplifier whose input and output are logarithmically amplified.

[0020] Efuse burning: Efuse is a fuse-like device, which belongs to a one-time programmable memory. Usually a large current is used to burn out a device or short a device to achieve a one-time change of the circuit.

[0021] Process Corner: refers to the different process changes and parameter changes taken into account when designing and manufacturing chips. On a wafer, it is impossible for the average carrier drift velocity of each chip to be the same. With different voltages and temperatures, the characteristics of different chips will also be different. The classification of different process characteristics will result in characteristics such as PVT (Process, Voltage, Temperature). The process characteristics are divided into different process limits, called process corners. There will be a certain degree of discreteness in the logarithmic performance of detector chips under different process corners.

[0022] The logarithmic detector is based on the working principle of the logarithmic amplifier. It takes the logarithm of the input signal and amplifies it, then performs an antilogarithmic operation on the amplified signal to finally obtain a DC output signal. Because it performs logarithmic and antilogarithmic operations, there is a linear relationship between the input signal and the DC output signal of the logarithmic detector. The logarithmic detector is mainly used in radar, satellite communications, microwave point-to-point communications, test instruments, radio spectrum monitoring and other equipment. It is suitable for application scenarios such as signal strength indication, broadband spectrum detection, fault detection, and automatic gain control. The logarithmic detector has good application prospects and research significance.

[0023] like Figure 1 The figure is a circuit structure block diagram of a logarithmic detector, which is used to implement logarithmic detection. Figure 1 As shown, the logarithmic detector 100 is composed of multiple modules, including a radio frequency logarithmic amplifier 110, a current operation module 120, an output module 130 and a feedback module 140. After the radio frequency signal RF to be detected is input, it will be logarithmically amplified by the radio frequency logarithmic amplifier 110, and a current I corresponding to the amplitude will be output; the current operation module 120 implements the addition or subtraction operation of the input current and outputs the current; the output module 130 converts the current into a direct current voltage (DC) output. The logarithmic detector can also include a feedback module 140, the input end of the feedback module 140 is connected to the output end of the output module 130, the output end of the feedback module 140 is connected to the input end of the current operation module 120, and the feedback module 140 converts the DC output voltage into a current and outputs it to the current operation module 120. The feedback loop formed by the feedback module 140 is conducive to achieving a stable DC voltage output. In some cases, an antilogarithmic circuit is further included between the RF logarithmic amplifier 110 and the current operation module 120, and the antilogarithmic circuit can use the exponential characteristics of a diode or a transistor to perform an antilogarithmic operation on the current I. The antilogarithmic current I is linearly related to the RF signal RF.

[0024] In some embodiments, the input end of the feedback module 140 may not be connected to the output end of the output module 130, but a fixed voltage may be provided to the input end of the feedback module 140. Figure 1 The circuit shown cannot achieve calibration of the intercept of the logarithmic curve. If the intercept of the logarithmic curve is not calibrated, the logarithmic curve of the logarithmic detector will be dispersed to a certain extent in different batches of wafers or different wafer areas, thereby affecting the screening of good products.

[0025] It can be understood that the logarithmic detector amplifies the input RF signal through the logarithmic amplifier and outputs a current corresponding to the amplitude. The output current size corresponds to the signal to be detected (i.e. the amplitude of the input RF signal). Figure 1The logarithmic detector shown is a logarithmic detector with a negative slope logarithmic curve as an example: assuming that the slope of the logarithmic curve of the logarithmic detector is 20mV / dBm, the power of the signal to be detected is -20dBm, the current I flowing into the current operation module is 0.6mA, and the DC voltage output by the output module 130 is 0.8V; due to the discreteness of the process, the output voltage of chips from different batches is 0.7V~0.9V, which may be due to the deviation of the logarithmic amplifier caused by the process, resulting in a deviation in the current I output by the logarithmic amplifier, and thus a deviation in the current I flowing into the current operation module 120. For example, the current I flowing into the current operation module 120 of chips from different batches is between 0.5mA~0.7mA. In this way, for the same RF input signal, the detected value will have a difference of 0.2V / (20mV / dBm)=10dBm, resulting in a large intercept error of the logarithmic curves detected by detectors from different batches.

[0026] The disclosed embodiment provides a solution that can be used to calibrate the intercept of a logarithmic detector, such as Figure 2 As shown, the scheme utilizes the current compensation circuit 200 to output the compensation current I0, which is provided to the current operation module 120 of the logarithmic detector 100. Among them, the current compensation circuit 200 includes a fuse module for fixing the value of the compensation current I0. Specifically, in the calibration stage before use, the required compensation current I0 is first determined according to the value of the DC output voltage; then, according to the required compensation current I0, the fuse module in the current compensation circuit 200 is burned to ensure that the current compensation circuit 200 can output a compensation current I0 of appropriate size; when working, the first control signal output by the fuse module in the current compensation circuit 200 can control the current compensation circuit 200 to output a suitable compensation current I0, thereby effectively compensating for the intercept error of the logarithmic curve of the logarithmic detector caused by batch differences.

[0027] Specifically, the present disclosure provides a current compensation circuit. Figure 3 As shown, the current compensation circuit 200 provided in the embodiment of the present disclosure includes: The current mirror 220 includes a first transistor 221 and a second transistor 222. The first transistor 221 and the second transistor 222 include a first terminal, a second terminal and a control terminal respectively. The current mirror 220 is configured to mirror a first current I1 flowing through the first terminal of the first transistor 221 to the first terminal of the second transistor 222. The first terminal of the second transistor 222 outputs a compensation current I0. The voltage at the first terminal of the first transistor 221 is a first voltage V1. The resistance module 230 is connected to the first end of the first transistor 221. The resistance module 230 may be connected in series between the first end of the first transistor 221 and the ground. The resistance value R of the resistance module 230 and the first voltage V1 are used to determine the magnitude of the first current I1. The fuse module 210 may include a plurality of fuses, the blown state of the fuses is used to store data, and the blown state of the internal fuses may reflect the magnitude of the compensation current; the fuse module 210 is connected to the first end of the resistance module 230 and / or the first transistor 221, and the figure shows the situation where the fuse module 210 is respectively connected to the first end of the resistance module 230 and the first transistor 221. The fuse module 210 is used to output a first control signal T1 based on the blown state, and the first control signal T1 is used to calibrate the resistance value R of the resistance module 230 and / or the magnitude of the first voltage V1.

[0028] In the embodiment of the present disclosure, the currents of the two current branches of the current mirror 220 are mirror images of each other, so the magnitude of the compensation current I0 outputted on the other branch (the branch where the second transistor 222 is located) can be changed by adjusting the magnitude of the first current I1 on one branch (the branch where the first transistor 221 is located). Therefore, the relevant component for adjusting the first current I1 can be connected to the first end or the second end of the first transistor 221, so as to control the magnitude of the first current I1 on the current path where the first transistor 221 is located.

[0029] It should be noted that the current mirror can be a mirror structure including two transistors. The structure of the current mirror can include a reference transistor and a mirror transistor. The control terminals of the two transistors are connected, so they have the same on state. The current on the current path where the reference transistor is located will be completely mirrored to the current path where the mirror transistor is located, that is, the mirror current is equal to the reference current (which can be provided by a current source connected in series with the reference transistor). It can be understood that if the size (channel width-to-length ratio) of the reference transistor and the mirror transistor is different, then the mirrored current can also have a corresponding proportional relationship with the reference current. Therefore, the current mirror can be used to output an output current that is a fixed proportion to the reference current.

[0030] In one embodiment, the current mirror may be a PMOS current mirror, and the first transistor 221 and the second transistor 222 are both PMOS, so the second end of the first transistor 221 and the second end of the second transistor 222 are both connected to the power supply terminal VDD, and the resistor module 230 is connected between the first end of the first transistor 221 and the ground terminal GND. In another embodiment, the current mirror may also be an NMOS current mirror, and the first transistor 221 and the second transistor 222 are both NMOS, so the second end of the first transistor 221 and the second end of the second transistor 222 are both connected to the ground terminal GND, and the resistor module 230 is connected between the first end of the first transistor 221 and the power supply terminal VDD. In some other embodiments, the current mirror 220 can also be a self-biased current mirror, a Wilson current mirror, a "cascode" current mirror, etc.; in addition, the first transistor 221 can include two or more transistors whose sources and drains are connected in sequence, and the second transistor 222 can also include two or more transistors whose sources and drains are connected in sequence in the self-biased current mirror. For example, in the self-biased current mirror and the "cascode" current mirror, the first transistor 221 and the second transistor 222 both include more than two transistors; in the Wilson current mirror, the first transistor 221 and the second transistor 222 can also be triodes.

[0031] In the embodiment of the present disclosure, the first transistor 221 is used as a reference transistor in the current mirror 220, and the second transistor 222 is used as a mirror transistor in the current mirror 220. The embodiment of the present disclosure is described by taking the first transistor and the second transistor having the same size (the output compensation current I0 is equal to the first current I1) as an example. In practical applications, the proportional relationship between the sizes of the first transistor and the second transistor can also be set according to requirements, so as to obtain the compensation current I0 that is in a fixed ratio with the first current I1.

[0032] In the embodiment of the present disclosure, the first transistor 221 and the resistance module 230 are connected in series in the current path of the first current I1, and the fuse module 210 is used to adjust the resistance value of the resistance module 230 or to adjust the first voltage V1 of the first end of the first transistor 221 to adjust the magnitude of the first current I1, so that the magnitude of the output compensation current I0 can be adjusted through the fuse module 210.

[0033] In the disclosed embodiment, the magnitude of the first current I1 can be adjusted by the fuse module 210. Specifically, the fuse module 210 has a one-time editability, which can be written with the first control signal T1, and the first control signal T1 can be applied to the first end of the first transistor 221 to adjust the first voltage V1, or applied to the resistor module 230 to adjust the resistance value of the resistor module 230, thereby realizing the editing of the magnitude of the first current I1.

[0034] For process deviations of logarithmic detectors or other devices such as amplifiers, they can be calibrated before the product is used to determine the required compensation current I0. Therefore, after the required compensation current I0 is determined, the fuse module 210 can be used for a one-time editing to output the specified first control signal T1, thereby obtaining a first current I1 that is equal to the required compensation current I0.

[0035] The first control signal T1 output by the fuse module 210 may include one or more, respectively used to calibrate the resistance value of the resistance module 230 and the magnitude of the first voltage V1, so that the first current I1 can be controlled from at least two dimensions, thereby achieving rough calibration and fine calibration. Exemplarily, the fuse module 210 may include multiple fuse arrays, and different fuse arrays are used to output different first control signals T1.

[0036] In addition, the current compensation circuit may also include one or more resistor modules connected in series or in parallel on the first current I1 path, and each resistor module may have an adjustable resistance value. Exemplarily, the current compensation circuit may include two or more resistor modules connected in series or in parallel, and each resistor module has a different resistance range, so that current adjustment in different ranges can be achieved, thereby further improving the accuracy of the compensation current.

[0037] Because the deviations of different logarithmic detectors are different, the data written into the fuse modules in different logarithmic detectors are different, and the fuse modules need to know the data to be written in advance. In order to obtain the data to be written into the fuse module, in some embodiments, such as Figure 4 As shown, the current compensation circuit 200 further includes: One or more voltage switching modules 240 (such as Figure 4 The voltage switching module 240a and the voltage switching module 240b shown in FIG. 2 are used to output a plurality of second control signals T2 at the output end; the second control signal T2 is used to calibrate the resistance value of the resistance module 230 and / or the magnitude of the first voltage V1; One or more check modules 250 (such as Figure 4 The check module 250a and the check module 250b shown in the figure have their input ends connected to the output ends of the corresponding voltage switching module 240 and to the output ends of the fuse module 210, the output end of the check module 250a is connected to the first end of the first transistor 221, and the output end of the check module 250b is connected to the resistance module 230; the check module 250a is used to select one from the second control signal T2 and the first control signal T1 for output to control the size of the first voltage V1; the check module 250b is used to select one from the second control signal T2 and the first control signal T1 for output to control the resistance value of the resistance module 230.

[0038] As mentioned above, in order to calibrate the process angle deviation of devices such as logarithmic detectors, calibration and debugging are required before the product is used to determine the required compensation current I0. Therefore, in the embodiment of the present disclosure, during calibration, the check module 250 selects the second control signal T2 for output, and provides a switchable second control signal T2 through the voltage switching module 240 to find a second control signal of appropriate size as the target control signal, and burns the target control signal into the fuse module; when the product is used, the check module 250 selects the first control signal T1 for output, because the data in the fuse module is not lost due to power-off, so the fuse module can provide a stable first control signal T1, so that the current compensation circuit can provide a stable and reliable compensation current to compensate for the process angle deviation of devices such as logarithmic detectors.

[0039] The check module 250 can be implemented by a signal selector, a multiplexer (MUX) or other logic circuits that can select one of multiple input signals as an output signal. The check module has multiple inputs and a single output, and can also have a selection control signal terminal for receiving a selection signal, and the selection signal is used to determine the selected input signal as an output signal and output it. For example, when the check module 250 has two input signals T1 and T2, the selection signal can include a binary digital signal of 0 or 1. When the selection signal is 0, the input signal T1 can be used as the output signal, and when the selection signal is 1, the input signal T2 can be used as the output signal.

[0040] Here, the output signal can be selected by the check module 250 to be the first control signal T1 provided by the fuse module 210 or the second control signal T2 provided by the voltage switching module 240. In addition, since there can be multiple first control signals T1 and multiple second control signals T2, the check module 250 can also be used to select one of the multiple second control signals T2, or output one of the first control signals T1.

[0041] In addition, the first control signal T1 and the second control signal T2 may be digital signals or analog signals.

[0042] In some embodiments, the voltage switching module 240 can be located in the same chip as the fuse module; in other embodiments, the voltage switching module 240 can be an external test module. After obtaining the required second control signal T2, the voltage switching module 240 can be removed after editing the fuse module 210 and switching the check module 250 to select the output of the fuse module 210.

[0043] In some embodiments, Figure 5 As shown, the resistance module 230 includes: A variable resistor unit Rb, a resistor array unit Ra, or a variable resistor unit Rb and a resistor array unit Ra connected in series; the figure shows a case where a variable resistor unit Rb and a resistor array unit Ra are connected in series. In other embodiments, only the variable resistor unit Rb or the resistor array unit Ra may be included. In addition, the check module 250 includes three, namely: a check module 250a connected to the first end of the first transistor 122 (the voltage switching module connected thereto is 240a), a check module 250b connected to the control end of the variable resistor unit Rb (the voltage switching module connected thereto is 240b), and a check module 250c connected to the resistor array unit Ra (the voltage switching module connected thereto is 240c).

[0044] In the calibration phase, the control end of the variable resistor unit Rb receives the second control signal T2 output by the check module 250b; in use after calibration, the control end of the variable resistor unit Rb receives the first control signal T1 output by the check module 250b to control the first resistance value of the variable resistor unit Rb; The resistor array unit Ra may include multiple resistor elements ri (i represents the number of the resistor element, 0≤i≤n, and the total number of resistor elements in the resistor array unit Ra is n+1), which is used to change the number of resistor elements ri in the path where the first current I1 is connected through the first control signal T1 or the second control signal T2 output by the selection module 250c to control the second resistance value of the resistor array unit Rb.

[0045] exist Figure 5 In the embodiment, the variable resistance unit Rb is connected in series between the first voltage V1 and the resistance array unit Ra. In other embodiments, the resistance array unit Ra may be connected in series between the first voltage V1 and the variable resistance unit Rb.

[0046] It is understandable that, since the variable resistance unit Rb is connected in series with the resistance array unit Ra, the resistance values ​​of both will affect the magnitude of the first current I1 in the entire path. When the first voltage V1 is fixed, the greater the sum of the first resistance value and the second resistance value, the smaller the first current I1. Two different types of resistors can provide current control with different precisions. For example, the adjustment range of the first resistance value is smaller, and the fine adjustment of the first current I1 can be achieved. The adjustment range of the second resistance value is larger, and the coarse adjustment of the first current I1 can be achieved.

[0047] Through design, the resistance value of the resistor module can be adjusted through a variable resistor unit or a resistor array unit. That is to say, the resistance value has two levels of adjustment. Combined with the adjustment of the first voltage value, the current compensation circuit can achieve a total of three levels of adjustment, thereby achieving precise calibration of the compensation current size, which is beneficial to improving the calibration accuracy and calibration efficiency.

[0048] In some embodiments, the variable resistance unit Rb includes: a third transistor; The control terminal of the third transistor receives the first control signal or the second control signal, and the first terminal and the second terminal of the third transistor are connected in series with the resistor array unit to adjust the first resistance value of the third transistor.

[0049] It is understandable that the resistance characteristic of the transistor is used here to realize the variable resistance unit Rb. Taking a metal-oxide-semiconductor field-effect transistor (MOSFET, MOS tube for short) as an example, when the voltage applied to its gate is within a certain range, the MOS tube has a resistance characteristic that the resistance changes with the gate voltage.

[0050] Figure 6 The graph shows the change curve between the gate voltage and the on-resistance of the MOS tube, that is, the abscissa represents the gate voltage Vg, and the ordinate represents the on-resistance Ron. Figure 6 (1) is the overall switching characteristic of the MOS tube, Figure 6 (2) is Figure 6 (1) Enlarged view of the circled area, where: Figure 6 (1) The resistance unit of the vertical axis is in kΩ. Figure 6 (2) The unit magnitude of the current on the ordinate is Ω. Figure 6 (1) and Figure 6 (2) The unit of the horizontal axis is volt. It can be seen that within a certain voltage range, the MOS tube has the characteristic that the on-resistance changes evenly with the voltage. Therefore, this characteristic can be used to adjust the resistance of the MOS tube by adjusting the gate voltage within this range.

[0051] In other embodiments, the variable resistance unit Rb may also be other types of variable resistors other than transistors, which is not limited in the embodiments of the present disclosure.

[0052] In some embodiments, Fig. 7A As shown, the resistor array unit Ra includes: A plurality of first resistance elements r1i and a plurality of first switches k1i are connected in series; a first end and a second end of the first switch k1i are connected in parallel with the first resistance element r1i; and a control end of the first switch k1i receives a corresponding first control signal T1 or a second control signal T2.

[0053] When the first switch k1i is disconnected, the corresponding first parallel resistor element r1i is connected to the path through which the first current I1 flows; the first control signal T1 or the second control signal T2 is used to control the first switch k1i.

[0054] Specifically, there may be multiple first control signals T1 or second control signals T2, which are connected to each first switch k1i respectively. When the first control signal T1 or the second control signal T2 is an on signal (a voltage or current signal that enables the first switch k1i to be in an on state), the first switch k1i connected thereto is in an on state, and the corresponding first resistor element r1i is short-circuited, so that the path is not connected; when the first control signal T1 or the second control signal T2 is an off signal (a voltage or current signal that enables the first switch k1i to be in an off state), the first switch k1i connected thereto is in an off state, and the corresponding first resistor element r1i is connected to the path. It should be noted that if the first switches k1i corresponding to the multiple first resistor elements r1i connected in series in the resistor array unit Ra are all in an on state, then the multiple first resistor elements r1i are not connected to the circuit, and the total resistance value of the resistor array unit Ra is approximately equal to 0.

[0055] It is understandable that the resistance values ​​of the plurality of first resistance elements r1i may be equal, so that the total resistance value of the resistance array unit Ra can be adjusted by simply changing the number of the first resistance elements r1i in the access path. Of course, the resistance values ​​of the plurality of first resistance elements r1i may also be different and designed according to actual needs, thereby achieving flexible resistance adjustment.

[0056] In some embodiments, Figure 7B As shown, the resistor array unit Ra includes: A plurality of second resistance elements r2i and a plurality of second switches k2i are connected in parallel; a first end and a second end of the second switch k2i are connected in series with the second resistance element r2i; and a control end of the second switch k2i receives a corresponding first control signal T1 or a second control signal T2.

[0057] When the second switch k2i is turned on, the corresponding second resistor element r2i connected in series is connected to the path through which the first current I1 flows; the first control signal T1 or the second control signal T2 is used to control the second switch.

[0058] Similar to the case of series connection, there can be multiple first control signals T1 or second control signals T2, which are connected to each second switch k2i respectively. When the first control signal T1 or the second control signal T2 is an on signal (a voltage or current signal that enables the second switch k2i to be in an on state), the second switch k2i connected in series with it is in an on state, and the corresponding second resistor element r2i is connected to the circuit; when the first control signal T1 or the second control signal T2 is a off signal (a voltage or current signal that enables the second switch k2i to be in an off state), the second switch k2i connected with it is in an off state, and the branch where the corresponding second resistor element r2i is located is disconnected, so that the second resistor element r2i is not connected to the path.

[0059] It is understandable that the resistance values ​​of the plurality of second resistor elements r2i may be equal, so that the total resistance value of the resistor array unit Ra can be adjusted by simply changing the number of second resistor elements r2i connected to the path. Of course, the resistance values ​​of the plurality of second resistor elements r2i may also be different, and may be designed according to actual needs, so as to achieve flexible resistance adjustment. In addition, it should be noted that for the case where the plurality of second resistor elements r2i are connected in parallel, each second resistor element r2i must be connected to a branch of the circuit to be turned on, so at least one second resistor element r2i should be connected, otherwise the circuit will be disconnected.

[0060] It should be noted that, for the resistor array unit Ra, the first switch or the second switch corresponding to each resistor element can receive a control signal through a check module 250. The input signal of the check module 250 may only include a turn-on voltage for controlling the first switch or the second switch to be turned on and a turn-off voltage for controlling the first switch or the second switch to be turned off, that is, a high voltage (such as a power supply voltage) and a low voltage (such as a ground voltage). Therefore, the two input terminals of the check module 250 can be connected to the power supply terminal VDD and the ground terminal GND respectively.

[0061] In some embodiments, Figure 8 As shown, the current compensation circuit 200 further includes: The voltage follower 260 is connected between the check module 250 and the first end of the first transistor 221 , and is used to control the first voltage V1 of the first end of the first transistor 221 .

[0062] The voltage follower 260 can ensure that the output voltage closely follows the change of the input voltage. Its working principle is based on the negative feedback of the operational amplifier. When the input voltage changes, the change is sensed and amplified by the operational amplifier. Due to the negative feedback of the operational amplifier, the output voltage of the amplifier will be partially or completely fed back to its input terminal and compared with the original input voltage. The comparison result is used as an adjustment signal to adjust the output of the amplifier to ensure that the output voltage always follows the change of the input voltage.

[0063] In some embodiments, Figure 8 As shown, the voltage follower 260 includes: an operational amplifier OPA; the negative phase input terminal (-) of the operational amplifier OPA is connected to the output terminal of the check module 250a, the positive phase input terminal (+) of the operational amplifier OPA is connected to the drain of the first transistor 221, and the output terminal of the operational amplifier OPA is connected to the gate of the first transistor 221. The output terminal of the operational amplifier OPA is connected to its positive phase input terminal (+) to form negative feedback.

[0064] The voltage follower 260 can play a buffering role, transmitting the output signal of the previous stage circuit to the subsequent stage circuit, and also play an isolation role, protecting the previous stage circuit from the influence of the subsequent stage circuit. In addition, the voltage follower 260 can drive a larger load and improve the load-carrying capacity of the circuit.

[0065] In some embodiments, Fig. 9 As shown, the specific structure of the voltage switching module 240 involved in the embodiment may include: a plurality of first voltage-dividing resistors R0-Rn connected in series between the power supply terminal VDD and the ground terminal GND, the voltage switching module 240 includes a plurality of output terminals, the connection nodes between adjacent first voltage-dividing resistors R0-Rn are used as output terminals, and the plurality of output terminals are used to output a corresponding alternative voltage to the check module 250, wherein: Fig. 9 The alternative voltages include Vbias-0 to Vbiasn, where n is a positive integer; the check module 250 is connected to multiple output terminals of the voltage switching module 240 and selects an alternative voltage (eg, Vbias-x) as the second control signal T2, 0≤x≤n.

[0066] It can be understood that the first voltage-dividing resistor Rx connected in series between the power supply terminal VDD and the ground terminal GND can be fixed, the resistance value of each first voltage-dividing resistor Rx can be the same or different, and the voltage division of each first voltage-dividing resistor Rx is the ratio of the resistance value of the first voltage-dividing resistor Rx to the total resistance value of all the first voltage-dividing resistors connected in series multiplied by the power supply voltage. The output alternative voltage Vbias-x of each output node is the sum of the voltage divisions of all the first voltage-dividing resistors Rx connected in series between the node and the ground terminal GND. Therefore, the output voltages of each node from the power supply terminal VDD to the ground terminal GND decrease in sequence.

[0067] The multiple input terminals of the check module 250 can be connected to each output node respectively, and an alternative voltage Vbias-x can be output through switching and selection to be provided to the input terminal of the voltage follower, or to the control terminal of the variable resistance unit Rb.

[0068] Fig. 9 The voltage switching module 240 in the embodiment can be used to Figure 4 The voltage switching module 240a in Figure 5 The voltage switching module 240a and the voltage switching module 240b are used to provide a simulated second control signal T2.

[0069] In some embodiments, Fig.10 As shown, the specific structure of the fuse module 210 involved in the embodiment of the present application may include: a first fuse array 211 and a voltage switching unit 212 connected to the first fuse array 211; wherein the first fuse array 211 is used to output a plurality of third control signals T3 <n:0>(n is a positive integer), wherein the third control signal may be a digital signal; The voltage switching unit 212 includes: a plurality of second voltage-dividing resistors Ry connected in series between the power supply terminal VDD and the ground terminal GND, the connection nodes of adjacent second voltage-dividing resistors Ry are connected to the first end of the corresponding third switch K3; the second end of the third switch K3 is used as the output end of the first fuse array 211, connected to the corresponding check module, and outputs the first control signal T1; the control end of the third switch K3 is connected to the first fuse array 211, receives the corresponding third control signal, and the third control signal T3 <0> -T3 <n>Used to control the opening or closing of multiple third switches K3 respectively.

[0070] It can be understood that the voltage switching unit 212 includes a second voltage-dividing resistor Ry connected in series between the power supply terminal VDD and the ground terminal GND, so that the output voltage of the node between every two adjacent second voltage-dividing resistors Ry is different. A third switch K3 is connected to each output node, and one or more third switches K3 are selectively turned on to output the corresponding output voltage as the first control signal T1. The on-off state of these third switches K3 is controlled by the third control signal output by the fuse array 211, so as to achieve the function of editing the output voltage by using the fuse array.

[0071] It should be noted that, in the embodiment of the present disclosure, the fuse module 210 may include a plurality of first fuse arrays 211 and a voltage switching unit 212. Fig.11 As shown, the fuse module 210 includes a first fuse array 211a and a voltage switching unit 212a connected thereto, a first fuse array 211b and a voltage switching unit 212b connected thereto. At the node for adjusting the first voltage V1, the output end of the voltage switching unit 212a can be connected through a check module 250a; at the control end for adjusting the variable resistance unit Vb, the output end of a voltage switching unit 212b can be connected through a check module 250b.

[0072] Furthermore, in one embodiment, if Fig.11 As shown, the fuse module 210 may further include a second fuse array 213, and does not include a voltage switching unit. The second fuse array 213 may include a plurality of output terminals, each connected to Fig. 7A The first switch k11-k13 or Figure 7B The control end of the second switch k21-k23, in which the second switch connected in parallel is taken as an example.

[0073] It should be noted that, since the multiple control switches (first switch or second switch) of the resistor array unit Ra are switched between on and off states by high / low level, the control signal T1 or T2 is a digital signal, and the resistor array unit Ra corresponds to the second fuse array 213, which does not include a voltage switching unit. At this time, the voltage switching module corresponding to the resistor array unit Ra can be a circuit that provides multiple digital signals, which is used to provide multiple control signals T2, and the voltage value of the control signal T2 can be 0V or the power supply voltage VDD.

[0074] Based on the same inventive concept, the present disclosure also provides a method for calibrating a logarithmic detector. Figure 2 The logarithmic detector shown is calibrated, and the following reference Figure 2 and Fig.12 To illustrate the calibration method, the calibration method includes the following steps: Step S101, start calibration; because the processes of different batches of logarithmic detectors have deviations, different logarithmic detectors have different output signals when the same RF signal is input, and calibration is required; Step S102: Inputting a radio frequency signal to a logarithmic detector; specifically, Figure 2 The RF logarithmic amplifier 110 in the embodiment inputs a known RF signal. When the logarithmic detector does not have a process deviation, the logarithmic detector will output a fixed output signal after receiving the known RF signal. The fixed output signal is the target output signal. Step S103, all the check modules select the corresponding second control signal T2 as output, control the different second control signals T2 output by each check module in turn, and detect the output signal of the logarithmic detector in turn under different output values; if the process of the logarithmic detector has deviation, the output signal of the logarithmic detector is not the target output signal, and compensation is required so that the output signal of the logarithmic detector reaches the target output signal. Specifically, during calibration, the check module selects the corresponding second control signal T2 as output, traverses the value of the second control signal T2 in turn, and controls the gear of the compensation current I0 under each value of the second control signal T2; and detects whether the output signal of the logarithmic detector reaches the target output signal under different gears of the compensation current I0.

[0075] The current compensation circuit is Fig.11 The current compensation circuit shown is taken as an example for explanation, which includes three check modules and has three-level adjustment. Assuming that the check module 250a corresponds to A1 second control signal T2, the check module 250b corresponds to A2 second control signal T2, and the check module 250c corresponds to A3 second control signal T2, the entire current compensation circuit can achieve A1×A2×A3 compensation current I0 gears. In step S103, the output adjustment of A1×A2×A3 gears can be performed in turn.

[0076] Step S104, determining the output value of the second control signal T2 selected by each check module according to the output signal of the logarithmic detector; specifically, when the value of the second control signal T2 is in a certain case, the output signal of the logarithmic detector is the same as the target output signal, which means that at this time, the compensation current I0 can compensate for the process deviation; therefore, the second control signal T2 at this time is used as the target control signal to compensate for the process deviation; Step S105: burn the output value (target control signal) of the second control signal selected by each check module into the fuse module, for example, burn the target second control signal of each check module into the corresponding fuse array, and control each check module to receive the first control signal T1 provided by the fuse module. At this time, the connection end of each check module receiving the second control signal can be cut off or retained.

[0077] In the case of normal operation after calibration, the check module selects to receive the first control signal T1 output by the fuse module; through the first control signal T1, the current compensation circuit can output a suitable compensation current, thereby compensating the intercept of the logarithmic curve of the logarithmic detector, thereby eliminating the impact of process deviation.

[0078] The logarithmic detectors of the above embodiments can be used to detect the radio frequency channel, such as Fig.13 As shown, the embodiment of the present disclosure further provides a chip 400, including: at least one RF channel 410; a logarithmic detector 420, connected to the RF channel 410, for detecting a RF signal RF provided by the RF channel 410. Generally, the chip 400 also includes a RF amplifier, a mixer, a filter, etc., which are not limited here.

[0079] The logarithmic detector 300 and the chip 400 have the same inventive concept as the current compensation circuit 200 . The specific implementation method thereof can refer to the description in any embodiment and will not be repeated here.

[0080] It should be understood that "some embodiments", "one embodiment" or "an embodiment" mentioned throughout the specification means that specific features, structures or characteristics related to the embodiments are included in at least one embodiment of the present disclosure. Therefore, "in one embodiment" or "in an embodiment" appearing in various places throughout the specification does not necessarily refer to the same embodiment. In addition, these specific features, structures or characteristics can be combined in one or more embodiments in any suitable manner. It should be understood that in the various embodiments of the present disclosure, the size of the serial number of each process does not mean the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present disclosure. The serial numbers of the embodiments of the present disclosure are for description only and do not represent the advantages and disadvantages of the embodiments.

[0081] It should be noted that, in this article, the term "includes", "comprising" or any other variation thereof is intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also includes other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element defined by the sentence "comprising a ..." does not exclude the existence of other identical elements in the process, method, article or device including the element.

[0082] The above are only implementation modes of the present disclosure, but the protection scope of the present disclosure is not limited thereto. Any technician familiar with the technical field can easily think of changes or substitutions within the technical scope disclosed in the present disclosure, which should be included in the protection scope of the present disclosure.< / n>

Claims

1. A current compensation circuit, characterized in that: include: A current mirror, comprising a first transistor and a second transistor, wherein the first transistor and the second transistor respectively comprise a first terminal, a second terminal and a control terminal, wherein the current mirror is configured to mirror a first current flowing through the first terminal of the first transistor to the first terminal of the second transistor, and the first terminal of the second transistor outputs a compensation current; a resistance module connected to the first end of the first transistor, wherein the resistance value of the resistance module and the first voltage at the first end of the first transistor are used to determine the magnitude of the first current; A fuse module is connected to the first end of the resistance module and / or the first transistor, and is used to output a first control signal based on a fuse state, wherein the first control signal is used to calibrate the resistance value of the resistance module and / or the first voltage.

2. The current compensation circuit according to claim 1, characterized in that: Also includes: One or more voltage switching modules, the output end of which is used to output a plurality of second control signals; The second control signal is used to calibrate the resistance value of the resistance module and / or the magnitude of the first voltage; One or more check modules, the input end of which is connected to the output end of the corresponding voltage switching module and the output end of the fuse module, and the output end of the check module is connected to the resistance module and / or the first end of the first transistor; the check module is used to select one of the second control signal and the first control signal for output.

3. The current compensation circuit according to claim 2, characterized in that: The resistance module comprises: A variable resistor unit, a resistor array unit, or a variable resistor unit and a resistor array unit connected in series or in parallel; The control end of the variable resistance unit receives the first control signal or the second control signal outputted by the corresponding check module to control the first resistance value of the variable resistance unit; The resistor array unit includes a plurality of resistor elements, which are used to change the number of the resistor elements connected to the path where the first current is located by corresponding to the first control signal or the second control signal output by the check module, so as to control the second resistance value of the resistor array unit.

4. The current compensation circuit according to claim 3, characterized in that: The variable resistance unit includes: a third transistor; The control end of the third transistor receives the first control signal or the second control signal, and the first end and the second end of the third transistor are connected in series with the resistor array unit to adjust the first resistance value of the third transistor.

5. The current compensation circuit according to claim 3, characterized in that: The resistor array unit comprises: A plurality of first resistance elements connected in series, and a plurality of first switches, wherein the first end and the second end of the first switch are connected in parallel with the first resistance element; The control end of the first switch receives the corresponding first control signal or the second control signal.

6. The current compensation circuit according to claim 3, characterized in that: The resistor array unit comprises: A plurality of second resistance elements connected in parallel, and a plurality of second switches, wherein the first end and the second end of the second switch are connected in series with the second resistance element; The control end of the second switch receives the corresponding first control signal or the second control signal.

7. The current compensation circuit according to any one of claims 2 to 6, characterized in that: Also includes: A voltage follower is connected between the check module and the first end of the first transistor, and is used to control the first voltage of the first end of the first transistor.

8. The current compensation circuit according to claim 7, characterized in that: The voltage follower comprises: an operational amplifier; a negative phase input terminal of the operational amplifier is connected to the output terminal of the check module, a positive phase input terminal of the operational amplifier is connected to the drain of the first transistor, and an output terminal of the operational amplifier is connected to the gate of the first transistor; or, The voltage follower includes an operational amplifier and a fourth transistor, the negative phase input terminal of the operational amplifier is connected to the output terminal of the check module, the positive phase input terminal of the operational amplifier is connected to the first terminal of the fourth transistor, the output terminal of the operational amplifier is connected to the control terminal of the fourth transistor, and the second terminal of the fourth transistor is connected to the drain of the first transistor.

9. The current compensation circuit according to any one of claims 2 to 6, characterized in that: The voltage switching module comprises: a plurality of first voltage-dividing resistors connected in series between a power supply terminal and a ground terminal, nodes adjacent to the first voltage-dividing resistors serving as output terminals, and the output terminals being used to output an alternative voltage to the reselection module; The check module selects one of the alternative voltages as the second control signal.

10. The current compensation circuit according to any one of claims 1 to 6, characterized in that: The fuse module comprises: A first fuse array, configured to output a plurality of third control signals based on a blown fuse state; The voltage switching unit includes: a plurality of second voltage-dividing resistors connected in series between a power supply terminal and a ground terminal, and a plurality of third switches; the nodes of adjacent second voltage-dividing resistors are connected to the first ends of the corresponding third switches; the second ends of the third switches are connected together as the output ends of the fuse module, which are used to output the first control signal; the control end of the third switch is connected to the first fuse array to receive the corresponding third control signal.

11. A logarithmic detector, characterized in that: include: A logarithmic amplifier for receiving a radio frequency signal and outputting a second current ； The current compensation circuit according to any one of claims 1 to 10; An operation unit is connected to the logarithmic amplifier and the current compensation circuit, and the operation unit receives the second current and the compensation current and outputs a third current.

12. The logarithmic detector according to claim 11, characterized in that Also includes: an output unit, connected to the computing unit, receiving the third current and converting it into an output voltage; a feedback unit connected to the operation unit and to the output end of the output unit; the feedback unit is used to provide a feedback current to the operation unit based on the output voltage; The operation unit obtains the third current according to the first current and the second current, and outputs the third current to the output unit.

13. A chip, characterized in that: include: at least one radio frequency channel; The logarithmic detector according to claim 11 or 12, connected to the radio frequency channel, and used to detect the radio frequency signal provided by the radio frequency channel.

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