Semiconductor chip defect detection method, system and medium

By introducing coordinate attention and multi-scale depth convolution modules into the U-Net model, a lightweight semantic segmentation model is built, which solves the problems of low detection accuracy and high model complexity in the existing semiconductor chip defect detection methods, and achieves rapid and accurate defect detection and quality improvement.

CN119624918APending Publication Date: 2025-03-14HUIQUAN INTELLIGENT TECH (SUZHOU) CO LTD
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Patent Information

Application Number
CN202411737194.3
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-11-29
Publication Date
2025-03-14

AI Technical Summary

Technical Problem

The existing semiconductor chip defect detection methods have problems such as low detection accuracy or high model complexity, making it difficult to effectively detect complex and irregular defects.

Method used

Using the lightweight improved U-Net model, a semantic segmentation model is constructed through a partial convolutional residual module embedded in coordinate attention and a multi-scale depth convolution module to quickly and accurately detect semiconductor chip defects.

Benefits of technology

It realizes rapid and accurate detection of semiconductor chip defects, improves chip quality and yield, and reduces computing complexity.

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Abstract

The invention discloses a semiconductor chip defect detection method and system and a storable medium, and the method comprises the steps: obtaining a to-be-detected image, inputting the to-be-detected image into a trained and tested detection model for detection, and obtaining a detection result. Wherein the detection model is formed by training a semantic segmentation model based on a U-Net model, the semantic segmentation model comprises an encoder and a decoder, and the encoder repeatedly uses a partial convolution residual module of coordinate attention and maximum pooling downsampling to extract image features; the decoder reuses up-sampling of a bilinear interpolation method and a partial convolution residual module of coordinate attention to restore image features, and a multi-scale deep convolution module is arranged at the jump connection position of the encoder and the decoder. The detection model is a light-weight improved U-Net model, can consider different products, can rapidly and accurately detect the defects of the semiconductor chip, and improves the quality and yield of the chip.
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Description

Technical Field

[0001] The present invention relates to the field of visual inspection technology, and in particular to a semiconductor chip defect detection method, system and medium. Background Art

[0002] Semiconductor chip manufacturing is a highly complex process involving multiple steps such as lithography, etching, doping, thin film deposition, etc. In the manufacturing process of semiconductor chips, defects such as scratches, contamination and cracks are inevitable. These defects will have a significant impact on the performance of semiconductor chips, so defect detection is a key step to ensure the quality and yield of semiconductor chips.

[0003] Existing semiconductor chip appearance defect detection methods mainly include three categories: automatic optical inspection, traditional image processing methods and deep learning methods, but all three methods have certain defects and shortcomings.

[0004] For example, automatic optical inspection (AOI) uses a high-resolution camera to capture images of the chip surface and analyzes the optical features of the chip surface through image processing algorithms. This also means that AOI has high requirements for equipment calibration and light sources, may be affected by optical reflection and uneven light, and has limited accuracy in detecting complex defects. Traditional image processing methods are based on preset rules, such as edge detection, texture analysis, and histogram comparison. They analyze specific features of chip images to determine whether there are defects, but they are sensitive to the type of defects, have weak recognition capabilities for complex and irregular defects, and lack generalization. Deep learning methods automatically extract features from chip images through convolutional neural networks (CNNs), which can achieve more intelligent and automated defect detection, but many existing deep learning models have problems with low detection accuracy or high model complexity. Therefore, how to improve deep learning models, improve their accuracy and reduce computational complexity, and allow them to be more widely used in semiconductor chip defect detection has become a technical problem to be solved. Summary of the invention

[0005] In order to overcome the above-mentioned shortcomings, the purpose of the present invention is to provide a semiconductor chip defect detection method, system and medium. The image to be tested is directly detected by the detection model. The detection model adopts a lightweight improved version of the U-Net model, which can take into account different products, quickly and accurately detect semiconductor chip defects, and improve the quality and yield of the chip.

[0006] In order to achieve the above object, the technical solution adopted by the present invention is: a semiconductor chip defect detection method, comprising acquiring an image to be tested, inputting the image to be tested into a trained and tested detection model for detection, and obtaining a detection result, wherein the training and testing process of the detection model specifically includes: Acquire first images of a plurality of semiconductor chips, and crop the first images to form second images of the same size, wherein the second images form a data set; Annotating defects of the second image in the data set, and dividing the data set into a training set and a test set; Preprocessing the second image in the training set and the second image in the test set; Constructing a semantic segmentation model based on a U-Net model, the semantic segmentation model includes an encoder and a decoder, the encoder repeatedly uses a partial convolution residual module of coordinate attention and a downsampling of maximum pooling to extract image features, the decoder repeatedly uses an upsampling of a bilinear interpolation method and a partial convolution residual module of coordinate attention to restore image features, and a multi-scale deep convolution module is provided at a jump connection between the encoder and the decoder; Inputting the preprocessed training set into a semantic segmentation model for training and saving the trained semantic segmentation model; The preprocessed test set is input into the trained semantic segmentation model for testing, and the semantic segmentation model that passes the test is saved as the detection model. The beneficial effects of the present invention are: based on the encoder-decoder architecture of the U-Net model, a partial convolution residual module with embedded coordinate attention is used to replace the two 3×3 convolution modules in the basic U-Net model; then, a multi-scale deep convolution module, referred to as the MSDC module, is added at each jump connection to construct a lightweight improved U-Net model, thereby forming an improved semantic segmentation model based on the U-Net model. The semantic segmentation model can take into account different products, quickly and accurately detect semiconductor chip defects, and improve the quality and yield of chips.

[0007] Furthermore, the partial convolution residual module of the coordinate attention includes a 3×3 convolution and a partial convolution, the coordinate attention is arranged between the 3×3 convolution and the partial convolution, and the partial convolution residual module of the coordinate attention adopts a residual connection; The feature image input by the partial convolution residual module of the coordinate attention is processed by 3×3 convolution, coordinate attention and partial convolution in sequence, and then added to the result obtained by 1×1 convolution of the input image.

[0008] Using partial convolution can reduce channel redundancy and memory access at the same time, speeding up model training. Secondly, by introducing an efficient coordinate attention mechanism, it can more accurately locate the target area and effectively reduce the impact of background noise. Adding residual connections can avoid the problem of gradient vanishing or gradient exploding as the network deepens. Further, the multi-scale deep convolution module includes three branches with kernel sizes of 3, 5, and 7, feature fusion, and 1×1 convolution; When the multi-scale deep convolution module processes the input feature image, it includes the following steps: For the input feature image, three branches with kernel sizes of 3, 5, and 7 are used to obtain receptive fields of different scales; Using feature fusion to merge the three branches; A 1×1 point-by-point convolution is used to adjust the number of output channels while enhancing the information interaction between different branches to obtain a feature map with multi-scale information.

[0009] Compared with the basic U-Net skip connection, the MSDC module directly fuses two feature maps. It uses multi-branch deep strip convolution to extract multi-scale features to bring richer semantic information for fusion. While avoiding high computational complexity, it effectively reduces the semantic gap between the encoder and decoder and improves the generalization ability of the model. Furthermore, when the coordinate attention processes the input feature image, the following steps are specifically included: Use the pooling kernels (H, 1) and (1, W) to encode each channel along the horizontal and vertical coordinates respectively, where H represents the height of the input feature map as the row of the pooling kernel, and W represents the width of the input feature map as the column of the pooling kernel; The output codes of the two directions are concatenated and feature transformation is performed using 1×1 convolution and nonlinear activation function; The feature transformation results are divided into two independent features along the horizontal and vertical directions; The two independent features use another two 1×1 convolutions to unify the number of channels, and Sigmoid normalization is used to obtain the importance score in the range [0,1]. Multiplying the importance score with the input feature image yields the enhanced feature image.

[0010] Furthermore, inputting the preprocessed training set into the semantic segmentation model for training and saving the trained semantic segmentation model specifically includes: Input the preprocessed training set into the semantic segmentation model, and set the number of categories, training rounds, batch size and learning rate; Use the cross entropy loss function and Adam optimizer to continuously optimize and update the weight parameters of the semantic segmentation model; The weight parameter with the smallest loss value is saved to obtain the trained semantic segmentation model.

[0011] The training set is trained to make the semantic segmentation model converge.

[0012] Specifically, inputting the preprocessed test set into the trained semantic segmentation model for testing, and saving the semantic segmentation model that passes the test as a detection model specifically includes: Input the preprocessed test set into the trained semantic segmentation model to obtain the model segmentation result; The model segmentation result is restored to the same size as the second image using a nearest neighbor interpolation method; The confusion matrix of the segmentation results of the statistical model and the labels of the defect annotations is compared, and the segmentation effect of the semantic segmentation model is measured using the average intersection-over-union ratio, dice coefficient, precision and recall indicators; The semantic segmentation model whose segmentation effect meets the requirements is saved as a detection model. Furthermore, the defect annotation of the second image in the data set and the division of the data set into a training set and a test set specifically include: At least two persons manually mark the second image in the data set with the defect category to be detected and check and confirm with each other to form a label. The two persons perform defect marking to improve accuracy.

[0013] The second images in the data set are divided into the training set and the test set according to a set ratio, and the set ratio can be adjusted.

[0014] Further, preprocessing the second image in the training set and the test set specifically includes: The second image and label in the training set and the test set are processed to form a size of 2 n The third image of Then the third image is normalized to form a fourth image, and the label values ​​greater than the number of defect categories are set to 0, where the label value is the gray value of the label; The fourth image is flipped horizontally and vertically, the minimum brightness value is multiplied by 0.9, and the maximum brightness value is multiplied by 1.1 to perform random data enhancement to form a preprocessed image and cover the original second image to form a preprocessed training set and test set.

[0015] The present invention also discloses a semiconductor chip defect detection system, which is used for defect detection of semiconductor chips and adopts the above detection method.

[0016] The present invention further discloses a computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, the steps of the above-mentioned detection method are implemented. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 The process of the first embodiment of the present invention Figure 1 ; Figure 2 The process of the first embodiment of the present invention Figure 2 ; Figure 3 Schematic diagram of a semantic segmentation model in Embodiment 1 of the present invention; Figure 4 Schematic diagram of the CAPCR module in Example 1 of the present invention; Figure 5 Schematic diagram of partial convolution in Embodiment 1 of the present invention; Figure 6 Schematic diagram of coordinate attention in Embodiment 1 of the present invention; Figure 7 Schematic diagram of the MSDC module in the first embodiment of the present invention; Figure 8 This is a system block diagram of Embodiment 2 of the present invention. DETAILED DESCRIPTION

[0018] The preferred embodiments of the present invention are described in detail below in conjunction with the accompanying drawings so that the advantages and features of the present invention can be more easily understood by those skilled in the art, thereby making a clearer and more definite definition of the protection scope of the present invention.

[0019] See attached Figure 1 As shown, a semiconductor chip defect detection method of the present invention comprises: S100: Acquire an image to be tested.

[0020] The image to be tested is collected in real time by an image acquisition device, which includes a high-speed 800W camera, a 0.27X high-definition telecentric lens, and a low-angle white ring light + high-definition red coaxial light to improve the clarity of image acquisition.

[0021] S200: input the image to be tested into the trained and tested detection model for detection, and obtain the detection result.

[0022] In this embodiment, the image to be tested is directly detected by the detection model. The detection model adopts a lightweight improved version of the U-Net model, which can take into account different products, quickly and accurately detect semiconductor chip defects, and improve the quality and yield of the chip.

[0023] See attached Figure 2 As shown in the figure, the training and testing process of the detection model specifically includes: S1. Acquire first images of a plurality of semiconductor chips, and crop the first images to form second images of the same size, where the second images form a data set.

[0024] The first image is also acquired by the image acquisition device, and the first image is cropped to form a second image of the same size, so that the image format is unified to facilitate subsequent image processing.

[0025] Exemplarily, the number of rows and columns of the camera field of view is set to 7, that is, the camera field of view can capture 7 rows and 7 columns of a total of 49 products, the product row and column spacing is 3.3mm, the number of rows and columns of the mapping table is set to 74 and 19 respectively (the number of rows and columns of the mapping table is the number of rows and columns of chips in a strip of material), and the number of blocks is set to 1 (the number of blocks is the number of regions in which a strip of chips is arranged). The first image of the product taken by the camera has a resolution of 2848×2848 pixels. The first image contains 7 rows and 7 columns of 49 semiconductor chips. A single chip is used as a template, and spot analysis and minimum circumscribed rectangle methods are used. The first image is cut into a second image of a single chip with a resolution of 448×448 pixels, and finally M second images are generated as a data set for model training. In specific implementation, the value of M is determined according to the actual available semiconductor chip images. In this embodiment, M=4280.

[0026] S2. Annotate the defects of the second image in the data set, and divide the data set into a training set and a test set.

[0027] Step S2 specifically includes: S21. Two professionals manually mark the second image in the data set according to the defect category to be detected and check and confirm each other to form a label.

[0028] For example, the defect categories include scratches, contamination and cracks. After two professionals mark, they can compare and improve the accuracy of defect marking. Of course, three professionals can also mark. The label of each second image is generated by marking. The marking is to mark on the second image, and different defect categories are painted with different colors of brushes.

[0029] S21. The second image in the data set is divided into a training set and a test set according to a set ratio.

[0030] Exemplarily, the ratio of the training set to the test set is set to 8:2. This ratio can be divided as needed, but generally the training set will require more second images.

[0031] S3, preprocessing the second image in the training set and the test set, including: S31, process the second image and label in the training set and the test set to form a size of 2 n The third image.

[0032] Size is 2 n The third image ensures that the image size of the model input during training is 2 n For example, the second image and the label size are divided by 32, rounded up, and then multiplied by 32. If the size cannot be divided evenly, the nearest neighbor interpolation method is used to complete the image size.

[0033] S32, normalizing the third image to form a fourth image, and setting the label value greater than the number of defect categories to 0, where the label value is the gray value of the label.

[0034] This step prevents out-of-bounds errors caused by label values ​​exceeding the defined number of categories, namely scratches, contamination, and cracks.

[0035] S33, flip the fourth image horizontally and vertically, multiply the minimum brightness by 0.9, and multiply the maximum brightness by 1.1 to perform random data enhancement to form a preprocessed image and cover the original second image to form a preprocessed training set and test set.

[0036] The preprocessed test set and training set can enhance the generalization of the model.

[0037] S4. Build a semantic segmentation model based on the U-Net model.

[0038] The semantic segmentation model includes an encoder and a decoder. The encoder repeatedly uses the partial convolution residual module of coordinate attention and the downsampling of maximum pooling to extract image features. The decoder repeatedly uses the upsampling of bilinear interpolation and the partial convolution residual module of coordinate attention to restore image features. A multi-scale deep convolution module is set at the jump connection between the encoder and the decoder.

[0039] The basic network U-Net model is an encoder-decoder architecture. The encoder part repeatedly uses two 3×3 convolutions plus maximum pooling for downsampling to extract image features, and the decoder part repeatedly uses bilinear interpolation for upsampling plus two 3×3 convolutions to restore image features. In the middle, a jump connection is used to fuse semantic information at different stages. In this embodiment, a coordinate attention partial convolutional residual module (CAPCR module) is used to replace the two 3×3 convolution modules in the basic U-Net model; then, a multi-scale deep convolution module (MSDC module) is added at each jump connection to construct a lightweight improved U-Net model, forming an improved semantic segmentation model based on the U-Net model.

[0040] S5. Input the preprocessed training set into the semantic segmentation model for training and save the trained semantic segmentation model.

[0041] S6. Input the preprocessed test set into the trained semantic segmentation model for testing, and save the semantic segmentation model that passes the test as the detection model.

[0042] After steps S1-S6, the detection model training and testing are completed and can be deployed to detect the image to be tested.

[0043] See attached Figure 4 As shown in Figure 2, the partial convolution residual module of coordinate attention includes a 3×3 convolution and a partial convolution, see Appendix Figure 5 As shown, some convolutions are only performed on C P Conventional convolution is applied to the channel for feature extraction, and the remaining channels remain unchanged. In this embodiment, a quarter of the channels are used for convolution operations, thereby reducing channel redundancy and memory access at the same time, speeding up model training.

[0044] Coordinate attention is set between the 3×3 convolution and the partial convolution. Coordinate attention is an efficient attention mechanism that not only obtains information between channels, but also considers position information related to direction. Figure 6 As shown, when the coordinate attention processes the input feature image, it uses the pooling kernels (H, 1) and (1, W) to encode each channel along the horizontal coordinate and vertical coordinate respectively, where H represents the height of the input feature map as the row of the pooling kernel, and W represents the width of the input feature map as the column of the pooling kernel; then the output codes in the two directions are concatenated, and the features are transformed using 1×1 convolution and nonlinear activation functions; then the feature transformation results are divided into two independent features along the horizontal and vertical directions; the two independent features are then unified with another two 1×1 convolutions to unify the number of channels, and Sigmoid normalization is used to obtain the importance score in the range [0, 1]; finally, the importance score is multiplied by the input feature image to obtain the enhanced feature image. Coordinate attention can locate the target area more accurately and effectively reduce the impact of background noise. The partial convolution residual module of coordinate attention adopts residual connection to prevent the problem of gradient vanishing or gradient exploding as the network deepens.

[0045] The feature image input by the partial convolution residual module of coordinate attention is processed by 3×3 convolution, coordinate attention and partial convolution in sequence, and then added to the result obtained by 1×1 convolution of the input image.

[0046] See attached Figure 7As shown in Figure 1, the multi-scale deep convolution module includes three branches with kernel sizes of 3, 5, and 7, feature fusion, and 1×1 convolution. When the multi-scale deep convolution module processes the input feature image X, it uses three branches with kernel sizes of 3, 5, and 7 to obtain receptive fields of different scales. Then, the three branches are merged using feature fusion Cat, which can bring richer semantic information. Since a pair of 1×n and n×1 strip convolutions approximates a standard n×n 2D convolution, the computational overhead and number of parameters of strip convolutions are exponentially reduced compared to standard 2D convolutions. This is also the reason why the addition of the MSDC module effectively improves the model effect while still keeping it lightweight. Finally, 1×1 point-by-point convolution is used to adjust the number of output channels while enhancing the information interaction of different branches, and a feature map X with multi-scale information is obtained. m .

[0047] The detection model in this embodiment uses two innovative designs, namely the CAPCR module and the MSDC module. Compared with the two 3×3 convolutions of the basic U-Net, the CAPCR module first uses partial convolution to reduce channel redundancy and memory access at the same time, thereby speeding up model training; secondly, by introducing an efficient coordinate attention mechanism, it can more accurately locate the target area and effectively reduce the impact of background noise. Then, adding residual connections can avoid the problem of gradient vanishing or gradient explosion as the network deepens. In addition, compared with the basic U-Net jump connection, the MSDC module directly fuses two feature maps. It uses multi-branch deep strip convolution to extract multi-scale features to bring richer semantic information for fusion, which effectively reduces the semantic gap between the encoder and decoder while avoiding high computational complexity, thereby improving the generalization ability of the model. This embodiment can effectively improve the accuracy of semiconductor chip defect detection while constructing a lightweight deep learning semantic segmentation algorithm.

[0048] See attached Figure 3 As shown, the encoder of the semantic segmentation model includes 5 layers, the decoder includes 4 layers, and the processing process of the semantic segmentation model for the side image is: S11, receiving the image to be processed as input and entering the encoder part, the CAPCR module on the left side of the first layer is responsible for feature extraction and generating the first layer feature map.

[0049] S12. Down-sampling the first layer feature map to reduce the resolution and generate a down-sampled feature map.

[0050] S13. The downsampled feature map is used as the input of the second-layer encoder, and is extracted by the left CAPCR module of the second layer to generate a new feature map.

[0051] S14. Repeat steps S12-S13, that is, the downsampled feature map of each layer enters the CAPCR module (on the left) of the next layer of encoding for feature extraction, generates a new feature map, and downsamples until the fifth layer encoder is processed.

[0052] S15. Up-sample the feature map in the fifth encoder layer (the bottom layer) to restore the spatial resolution and enter the decoder part.

[0053] S16, transition from encoder to decoder, use the feature map of the fourth-layer encoder, input it into the MSDC module to extract multi-scale feature maps, and provide multi-scale information for the decoder.

[0054] S17. Concatenate the upsampled feature map of the fifth layer with the multi-scale feature map of the fourth layer, pass the low-level feature information of the encoder to the decoder, and process the concatenated feature map through the CAPCR module (on the right) of the fourth-layer decoder to generate the decoded feature map of the fourth layer.

[0055] S18. Repeat S17, that is, upsample each layer, concatenate the corresponding layer feature maps from the encoder layer by layer through skip connection, and restore the features through the CAPCR module of the decoder until returning to the first layer.

[0056] S19. In the first layer of the decoder, the high-resolution feature map is restored through the CAPCR module, and the prediction result of the model for the image to be tested is output.

[0057] Inputting the preprocessed training set into the semantic segmentation model for training and saving the trained semantic segmentation model specifically includes: inputting the preprocessed training set into the semantic segmentation model, and setting the number of categories, training rounds, batch size and learning rate; using the cross entropy loss function and Adam optimizer to continuously optimize and update the weight parameters of the semantic segmentation model; saving the weight parameters with the smallest loss value to obtain the trained semantic segmentation model.

[0058] For example, the number of categories is 4, the number of training rounds is 240, the batch size is 8, and the learning rate is 0.001. The cross entropy loss function is defined as:

[0059] In the formula, N is the number of categories, is the one-hot encoding of the true label, is the probability of the i-th class predicted by the model.

[0060] Input the preprocessed test set into the trained semantic segmentation model for testing, and save the semantic segmentation model that passes the test as a detection model. Specifically include: The preprocessed test set is input into the trained semantic segmentation model to obtain the model segmentation result.

[0061] The model segmentation result is restored to the same size as the second image using the nearest neighbor interpolation method.

[0062] The confusion matrix of the segmentation results of the statistical model and the labels of the defect annotations is compared, and the average intersection over union (MIoU), dice coefficient (Dice), precision (Precision), and recall (Recall) indicators are used to measure the segmentation effect of the semantic segmentation model. The larger the values ​​of the average intersection over union (MIoU), dice coefficient, precision, and recall, the higher the accuracy of the model and the better the effect.

[0063]

[0064]

[0065]

[0066]

[0067] In the formula, k refers to the number of categories, TP (True Positive) represents the positive samples predicted as positive by the model; TN (True Negative) represents the negative samples predicted as negative by the model; FP (False Positive) represents the negative samples predicted as positive by the model; FN (False Negative) represents the positive samples predicted as negative by the model.

[0068] In this embodiment, the detection method using the improved test model has better effect than other image segmentation algorithms. Table 1 is the comparison results between the present invention and other image segmentation algorithms (UNet, UNet++, MultiResUNet, Attention UNet, MALUNet, CMUNet).

[0069] Table 1 (Unit: %)

[0070] From Table 1, it can be clearly seen that in this method, the comprehensive value of each parameter of the lightweight evaluation model is higher than that of other image segmentation algorithms.

[0071] In order to verify the effectiveness of the partial convolution residual (CAPCR) module and the multi-scale deep convolution (MSDC) module embedded with coordinate attention in the present invention, ablation experiments were conducted. The ablation experiments were divided into four groups: Group A used the basic model U-Net, Group B used the partial convolution residual module without adding coordinate attention, referred to as PR, to replace the two convolution modules in U-Net, Group C used the CAPCR module to replace the two convolution modules in U-Net, and Group D added the MSDC module based on the Group C experiment. The results of the ablation experiments are shown in Table 2.

[0072] Table 2 (Unit: %)

[0073] From the ablation experiment results shown in Table 2, it can be concluded that as each improvement is added to the basic model U-Net, various indicators are improved to varying degrees, proving the scientificity and effectiveness of the present invention.

[0074] The present invention also discloses a semiconductor chip defect detection system, which is used for defect detection of semiconductor chips. The system adopts the detection method of the first embodiment.

[0075] See attached Figure 8 As shown, the detection system includes an image acquisition device and a controller, the image acquisition device is used to acquire the image to be tested and the first image, and the controller is deployed with a detection model that has been trained and tested. The detection system also includes a display device, which is used to display the detection results.

[0076] The present invention also discloses a computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, the steps of the detection method in the first embodiment are implemented.

[0077] Based on such understanding, the present invention implements all or part of the processes in the above-mentioned embodiment method, and can also be completed by instructing related hardware through a computer program, and the computer program can be stored in a computer-readable storage medium, and the computer program can implement the steps of each of the above-mentioned method embodiments when executed by a processor. Among them, the computer program includes computer program code, and the computer program code can be in source code form, object code form, executable file or some intermediate form. The computer-readable medium may include: any entity or device capable of carrying the computer program code, recording medium, U disk, mobile hard disk, disk, optical disk, computer memory, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), electrical carrier signal, telecommunication signal and software distribution medium, etc.

[0078] The above implementation modes are only for illustrating the technical concept and features of the present invention, and their purpose is to enable people familiar with this technology to understand the content of the present invention and implement it, and they cannot be used to limit the protection scope of the present invention. Any equivalent changes or modifications made according to the spirit of the present invention should be included in the protection scope of the present invention.

Claims

1. A semiconductor chip defect detection method, comprising acquiring an image to be tested, inputting the image to be tested into a trained and tested detection model for detection, and obtaining a detection result, characterized in that: The training and testing process of the detection model specifically includes: Acquire first images of a plurality of semiconductor chips, and crop the first images to form second images of the same size, wherein the second images form a data set; Annotating defects of the second image in the data set, and dividing the data set into a training set and a test set; Preprocessing the second image in the training set and the second image in the test set; Constructing a semantic segmentation model based on a U-Net model, the semantic segmentation model includes an encoder and a decoder, the encoder repeatedly uses a partial convolution residual module of coordinate attention and a downsampling of maximum pooling to extract image features, the decoder repeatedly uses an upsampling of a bilinear interpolation method and a partial convolution residual module of coordinate attention to restore image features, and a multi-scale deep convolution module is provided at a jump connection between the encoder and the decoder; Inputting the preprocessed training set into a semantic segmentation model for training and saving the trained semantic segmentation model; The preprocessed test set is input into the trained semantic segmentation model for testing, and the semantic segmentation model that passes the test is saved as the detection model.

2. The semiconductor chip defect detection method according to claim 1, characterized in that: The partial convolution residual module of the coordinate attention includes a 3×3 convolution and a partial convolution, a coordinate attention is set between the 3×3 convolution and the partial convolution, and the partial convolution residual module of the coordinate attention adopts a residual connection; The feature image input by the partial convolution residual module of the coordinate attention is processed by 3×3 convolution, coordinate attention and partial convolution in sequence, and then added to the result obtained by 1×1 convolution of the input image.

3. The semiconductor chip defect detection method according to claim 1, characterized in that: The multi-scale deep convolution module includes three branches with kernel sizes of 3, 5, and 7, feature fusion, and 1×1 convolution; When the multi-scale deep convolution module processes the input feature image, it includes the following steps: For the input feature image, three branches with kernel sizes of 3, 5, and 7 are used to obtain receptive fields of different scales; Using feature fusion to merge the three branches; A 1×1 point-by-point convolution is used to adjust the number of output channels while enhancing the information interaction between different branches to obtain a feature map with multi-scale information.

4. The semiconductor chip defect detection method according to claim 3, characterized in that: When the coordinate attention processes the input feature image, the following steps are specifically included: Use the pooling kernels (H, 1) and (1, W) to encode each channel along the horizontal and vertical coordinates respectively, where H represents the height of the input feature map as the row of the pooling kernel, and W represents the width of the input feature map as the column of the pooling kernel; The output codes of the two directions are concatenated and feature transformation is performed using 1×1 convolution and nonlinear activation function; The feature transformation results are divided into two independent features along the horizontal and vertical directions; The two independent features use another two 1×1 convolutions to unify the number of channels, and Sigmoid normalization is used to obtain the importance score in the range [0,1]. Multiplying the importance score with the input feature image yields the enhanced feature image.

5. The semiconductor chip defect detection method according to claim 1, characterized in that: Inputting the preprocessed training set into the semantic segmentation model for training and saving the trained semantic segmentation model specifically includes: Input the preprocessed training set into the semantic segmentation model, and set the number of categories, training rounds, batch size and learning rate; Use the cross entropy loss function and Adam optimizer to continuously optimize and update the weight parameters of the semantic segmentation model; The weight parameter with the smallest loss value is saved to obtain the trained semantic segmentation model.

6. The semiconductor chip defect detection method according to claim 1, characterized in that: Inputting the preprocessed test set into the trained semantic segmentation model for testing, and saving the semantic segmentation model that passes the test as a detection model specifically includes: Input the preprocessed test set into the trained semantic segmentation model to obtain the model segmentation result; The model segmentation result is restored to the same size as the second image using a nearest neighbor interpolation method; The confusion matrix of the segmentation results of the statistical model and the labels of the defect annotations is compared, and the segmentation effect of the semantic segmentation model is measured using the average intersection-over-union ratio, dice coefficient, precision and recall indicators; The semantic segmentation model that meets the segmentation requirements is saved as a detection model.

7. The semiconductor chip defect detection method according to any one of claims 1 to 6, characterized in that: The second image in the data set is defect-labeled, and the data set is divided into a training set and a test set, specifically including: At least two persons manually mark the second image in the data set with the defect category to be detected and check and confirm with each other to form a label; The second images in the data set are divided into the training set and the test set according to a set ratio.

8. The semiconductor chip defect detection method according to claim 7, characterized in that: Preprocessing the second image in the training set and the test set specifically includes: The second image and label in the training set and the test set are processed to form a size of 2 n The third image of Then the third image is normalized to form a fourth image, and the label values ​​greater than the number of defect categories are set to 0, where the label value is the gray value of the label; The fourth image is flipped horizontally and vertically, the minimum brightness value is multiplied by 0.9, and the maximum brightness value is multiplied by 1.1 to perform random data enhancement to form a preprocessed image and cover the original second image to form a preprocessed training set and test set.

9. A semiconductor chip defect detection system, characterized in that: The detection system is used for defect detection of semiconductor chips, and the system adopts the detection method described in any one of claims 1-8.

10. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps of the detection method according to any one of claims 1 to 8 are implemented.

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