Active phased array transceiver front-end package structure based on hybrid heterogeneous integration

Abstract

The present disclosure provides a kind of active phased array transceiver front-end package structure based on mixed heterogeneous integration, including thick film hybrid integrated circuit board, comprising: multilayer thick film circuit board, for transmitting electromagnetic wave signal, the surface of thick film circuit board is provided with blind cavity, blind cavity is used to bury compound chip, compound chip is used to amplify and phase shift control electromagnetic wave signal;Multilayer film circuit is prepared on thick film circuit board;Silicon-based chip is installed on the surface of thin film circuit;Microstrip antenna is arranged on silicon-based chip, and microstrip antenna includes dielectric layer and double-sided wiring on the two sides of dielectric layer, on the side of dielectric layer close to silicon-based chip, microstrip antenna is interconnected with thin film circuit by hot-press bonding, to form airtight seal;Thin film circuit is used to interconnect the surface circuit of thick film circuit board with compound chip and silicon-based chip, and form the interconnection interface with microstrip antenna on the surface of thin film circuit, to form three-dimensional interconnection structure.

Description

Technical Field

[0001] The present disclosure relates to the technical field of active phased array transceiver front-end packaging, and more specifically, to an active phased array transceiver front-end packaging structure based on hybrid heterogeneous integration. Background Art

[0002] As active phased array antennas continue to evolve toward higher frequencies, higher performance, and lower profiles, the demand for high-density, highly reliable packaging solutions for the active front-end is increasing. Multi-layer thick-film co-fired ceramic substrates offer advantages such as low dielectric constant and dielectric loss, high strength, excellent thermal conductivity, and ease of three-dimensional routing, making them widely used in the packaging of active phased array transceiver circuits. However, facing the future trend of multi-functionality, high integration, and low power consumption, traditional co-fired substrates are limited in line width and line accuracy due to their thick film thickness, as well as in their three-dimensional dimensional accuracy. The minimum line width that can be engineered is typically 100μm, with line accuracy within ±10μm and length and width dimensional accuracy within ±50μm. These substrates are unable to meet the demands of higher integration and advanced packaging formats.

[0003] Currently, the industry generally uses silicon adapter plates based on through silicon vias (TSVs) and glass adapter plates based on through glass vias (TGVs) to replace co-fired ceramic substrates. These typically have minimum line widths of less than 20μm, line accuracy of less than ±1μm, and three-dimensional dimensional accuracy of less than ±10μm. This facilitates the realization of microwave SIP modules with higher integration densities. However, these process methods have the following issues:

[0004] (1) It requires expensive micro-nano processing and testing equipment, which results in high construction and R&D costs, and is not conducive to the demand for high-variety and low-volume products;

[0005] (2) There are obvious disadvantages in three-dimensional wiring. It is difficult to achieve ≥3 layers of high-density wiring layers on silicon or glass adapter boards, which is not conducive to the realization of three-dimensional microwave circuit interconnection based on distributed characteristics;

[0006] (3) The process of silicon adapter board is relatively mature, but its dielectric properties are poor, and the transmission loss of microwave circuit is large; the insulation performance of glass adapter board is good, and its dielectric constant is low and dielectric loss is small, which is suitable for making microwave circuits, but its process method is less mature and is not conducive to complex microsystem packaging. Summary of the Invention

[0007] In order to solve at least one of the above-mentioned and other technical problems in the prior art, the present disclosure provides an active phased array transceiver front-end packaging structure and preparation method based on hybrid heterogeneous integration, which can reflect the advantages of three-dimensional stacking and two-dimensional expansion, improve the density of three-dimensional wiring and the strength of the packaging structure, show good heat dissipation capability and airtightness, and have low process costs, and is suitable for the needs of high-reliability fields for small-batch products of multiple varieties.

[0008] An embodiment of the present disclosure provides an active phased array transceiver front-end packaging structure based on hybrid heterogeneous integration, comprising: a thick-film hybrid integrated circuit board, comprising: a multi-layer thick-film circuit board suitable for transmitting electromagnetic wave signals, the surface of the thick-film circuit board being provided with a blind cavity, the blind cavity being suitable for burying a compound chip, the compound chip being suitable for amplifying and phase-shifting the electromagnetic wave signals; a multi-layer thin-film circuit prepared on the thick-film circuit board; a silicon-based chip mounted on the surface of the thin-film circuit, the silicon-based chip being suitable for providing control signals and power management for the compound chip; a microstrip antenna provided on the silicon-based chip, the microstrip antenna comprising a dielectric layer and double-sided wiring on both sides of the dielectric layer, the microstrip antenna being interconnected with the thin-film circuit on the side of the dielectric layer close to the silicon-based chip by a thermocompression bonding process, thereby forming an airtight seal; wherein the thin-film circuit is suitable for interconnecting the surface circuit of the thick-film circuit board with the compound chip and the silicon-based chip, and forming an interconnection interface with the microstrip antenna on the surface of the thin-film circuit to form a three-dimensional interconnection structure.

[0009] According to some embodiments of the present disclosure, the active phased array transceiver front-end packaging structure based on hybrid heterogeneous integration also includes: a frame, which is arranged between the above-mentioned thin film circuit and the above-mentioned microstrip antenna, and is three-dimensionally stacked by thermal compression bonding to form an airtight seal and support the above-mentioned microstrip antenna.

[0010] According to some embodiments of the present disclosure, the plating layers of the above-mentioned frame are, from inside to outside, a Ni layer with a thickness of 3μm to 5μm, an Au layer with a thickness of 2μm to 3μm, a Sn layer with a thickness of 1μm, and an Au layer with a thickness of 0.2μm to 0.5μm.

[0011] According to some embodiments of the present disclosure, the active phased array transceiver front-end packaging structure based on hybrid heterogeneous integration further includes: solder bumps, which are arranged at the bottom of the above-mentioned thick-film hybrid integrated circuit board to input the above-mentioned electromagnetic wave signals, power supply signals and control signals into the above-mentioned thick-film hybrid integrated circuit board.

[0012] According to some embodiments of the present disclosure, the thick film circuit board includes: a through hole extending from the blind cavity to the bottom of the thick film circuit board to provide a grounding channel and a heat dissipation channel for the compound chip.

[0013] According to some embodiments of the present disclosure, the first surface of the compound chip is coated with a conductive adhesive film to connect the compound chip to the blind cavity, and the second surface of the compound chip is coated with photoresist to connect the compound chip to the thin film circuit, and the second surface is opposite to the first surface.

[0014] Another aspect of the embodiments of the present disclosure provides a method for preparing an active phased array transceiver front-end packaging structure based on hybrid heterogeneous integration as described above, comprising: preparing a multi-layer thick-film circuit board; preparing a blind cavity on the surface of the thick-film circuit board; coating a conductive adhesive film on the first surface of a compound chip, placing the compound chip in the blind cavity and heating and curing it; coating a photoresist on the second surface of the compound chip and preparing a thin-film circuit to form a three-dimensional stack; cutting the multi-layer thick-film circuit board into multiple units; flip-chip bonding a silicon-based chip to the thin-film circuit; vertically interconnecting a microstrip antenna and the thin-film circuit through thermocompression bonding, forming an airtight seal using a frame, and supporting the microstrip antenna; and preparing solder bumps on the bottom of the thick-film hybrid integrated circuit board; wherein the second surface is opposite to the first surface.

[0015] According to some embodiments of the present disclosure, the above-mentioned production of a blind cavity on the surface of the above-mentioned thick-film circuit board includes: forming the above-mentioned blind cavity on the surface of the above-mentioned thick-film circuit board by a combined method of ultraviolet laser secondary etching with different powers and ultrasonic pickling process, and aligning the mark of the mask by laser direct writing processing and photolithography process under the same reference system.

[0016] According to some embodiments of the present disclosure, the above-mentioned coating of photoresist on the second surface of the compound chip and fabrication of thin film circuits to form a three-dimensional stack include: the first coating of the above-mentioned photoresist adopts a vacuum coating method to ensure the surface flatness of the above-mentioned photoresist, and the thickness of the first coating of the above-mentioned photoresist is 8μm to 12μm.

[0017] According to some embodiments of the present disclosure, the microstrip antenna and the thin film circuit are vertically interconnected by hot compression bonding, and an airtight seal is formed by using a frame. The support of the microstrip antenna includes: in a nitrogen environment, a heating rate of 4°C / s to 8°C / s, a bonding pressure of 12N to 20N, maintaining a bonding temperature of 240°C to 270°C for 1min to 3min, and maintaining a bonding temperature of 280°C to 320°C for 1min to 5min, so that the Au-Sn eutectic reacts while melting the solder balls to achieve circuit interconnection between the microstrip antenna and the thin film circuit; in a nitrogen environment, the active phased array transceiver front-end package based on hybrid heterogeneous integration is annealed at 220°C to 240°C for 1 hour to 3 hours, or annealed in a formic acid gas environment at 230°C to 250°C for 0.5 hour to 2 hours to form an airtight seal.

[0018] According to the present disclosure, an active phased array transceiver front-end packaging structure and preparation method based on hybrid heterogeneous integration are provided. By adopting a multi-layer thick-film circuit board, the advantages of its three-dimensional wiring are brought into play, and at the same time, better mechanical support and heat dissipation channels are provided for high-power and high-heat consumption compound chips. The thin-film circuit and the microstrip antenna are interconnected by thermocompression bonding to form a three-dimensional stack. The surface circuit interconnection of the thick-film circuit board and the interconnection of multiple compound chips and the surface circuit of the thick-film circuit board are realized by high-precision thin-film technology. The thin-film circuit and the microstrip antenna are interconnected by thermocompression bonding to form an airtight seal, which can reflect the advantages of three-dimensional stacking and two-dimensional expansion, improve the density of three-dimensional wiring and the strength of the packaging structure, show better heat dissipation capability and airtightness, and have low process costs. It is suitable for the needs of high-reliability fields for small batches of multiple varieties of products. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 is a cross-sectional view of an active phased array transceiver front-end packaging structure based on hybrid heterogeneous integration according to an illustrative embodiment of the present disclosure;

[0020] Figure 2 is a diagram showing a surface plating state of a pad in a region of a bottom frame of a microstrip antenna according to an exemplary embodiment of the present disclosure;

[0021] Figure 3 is a flow chart of a method for preparing an active phased array transceiver front-end packaging structure based on hybrid heterogeneous integration according to an illustrative embodiment of the present disclosure;

[0022] Figure 4 is a top view of a multilayer thick film circuit board according to an exemplary embodiment of the present disclosure; and

[0023] Figure 51 is a top view of blind cavity preparation and alignment marking for a multi-layer thick film circuit board according to an illustrative embodiment of the present disclosure.

[0024] In the drawings, the meanings of the reference numerals are as follows:

[0025] 1. Thick film circuit board;

[0026] 2. Thin film circuit;

[0027] 3. Silicon-based chips;

[0028] 4. Microstrip antenna;

[0029] 5. Compound chip;

[0030] 6. Dielectric layer;

[0031] 7. Solder balls;

[0032] 8. Thermal conductive adhesive film;

[0033] 9. Frame;

[0034] 10. Solder bumps;

[0035] 11. Through hole;

[0036] 12. Conductive adhesive film. DETAILED DESCRIPTION

[0037] In order to make the objectives, technical solutions and advantages of the present disclosure more clearly understood, the present disclosure is further described in detail below in conjunction with specific embodiments and with reference to the accompanying drawings.

[0038] The terms used herein are only for describing specific embodiments and are not intended to limit the present disclosure. The terms "comprise," "include," etc. used herein indicate the presence of the features, steps, operations, and / or components, but do not exclude the presence or addition of one or more other features, steps, operations, or components.

[0039] All terms used herein, including technical and scientific terms, have the meanings commonly understood by those skilled in the art, unless otherwise defined. It should be noted that the terms used herein should be interpreted as having a meaning consistent with the context of this specification and should not be interpreted in an idealized or overly rigid manner.

[0040] When expressions such as “at least one of A, B, and C, etc.” are used, they should generally be interpreted in accordance with the meaning commonly understood by those skilled in the art. For example, “a system having at least one of A, B, and C” should include but is not limited to systems having A alone, B alone, C alone, A and B, A and C, B and C, and / or A, B, and C, etc. When expressions such as “at least one of A, B, or C, etc.” are used, they should generally be interpreted in accordance with the meaning commonly understood by those skilled in the art. For example, “a system having at least one of A, B, or C” should include but is not limited to systems having A alone, B alone, C alone, A and B, A and C, B and C, and / or A, B, and C, etc.

[0041] According to the concept of one aspect of the present disclosure, the existing technology lacks protection for active devices, and in order to achieve high-frequency performance of microwave transmission circuits, the present disclosure designs an active phased array transceiver front-end packaging structure and preparation method based on hybrid heterogeneous integration. By adopting a multi-layer thick-film circuit board, its advantages of three-dimensional wiring are brought into play, while providing better mechanical support and heat dissipation channels for high-power and high-heat consumption compound chips. The thin-film circuit and the microstrip antenna are interconnected by thermocompression bonding to form a three-dimensional stack. The surface circuit interconnection of the thick-film circuit board and the interconnection of multiple compound chips with the surface circuit of the thick-film circuit board are realized by high-precision thin-film technology. The thin-film circuit and the microstrip antenna are interconnected by thermocompression bonding to form an airtight seal, which can reflect the advantages of three-dimensional stacking and two-dimensional expansion, improve the density of three-dimensional wiring and the strength of the packaging structure, show good heat dissipation capability and airtightness, and have low process costs. It is suitable for the needs of high-reliability fields for small batches of multiple varieties of products.

[0042] In order to make the objectives, technical solutions and advantages of the present disclosure more clearly understood, the present disclosure is further described in detail below in conjunction with specific embodiments and with reference to the accompanying drawings.

[0043] Figure 1 4 is a cross-sectional view of an active phased array transceiver front-end packaging structure based on hybrid heterogeneous integration according to an illustrative embodiment of the present disclosure.

[0044] According to an embodiment of the present disclosure, an active phased array transceiver front-end packaging structure based on hybrid heterogeneous integration includes a thick-film hybrid integrated circuit board, a silicon-based chip 3, and a microstrip antenna 4. The thick-film hybrid integrated circuit board includes a multi-layer thick-film circuit board 1 and a multi-layer thin-film circuit 2. Figure 1As shown, a multilayer thick-film circuit board 1 is suitable for transmitting electromagnetic wave signals. A blind cavity is provided on the surface of the thick-film circuit board 1, which is suitable for embedding a compound chip 5. The compound chip 5 is suitable for amplifying and phase-shifting the electromagnetic wave signals. A multilayer thin-film circuit 2 is fabricated on the thick-film circuit board 1. A silicon-based chip 3 is mounted on the surface of the thin-film circuit 2, which is suitable for providing control signals and power management for the compound chip 5. A microstrip antenna 4 is disposed on the silicon-based chip 3. The microstrip antenna 4 includes a dielectric layer 6 and double-sided wiring on both sides of the dielectric layer 6. On the side of the dielectric layer 6 closest to the silicon-based chip 3, the microstrip antenna 4 is interconnected to the thin-film circuit 2 via a thermocompression bonding process, thereby forming an airtight seal. The thin-film circuit 2 is suitable for interconnecting the surface circuit of the thick-film circuit board 1 with the compound chip 5 and the silicon-based chip 3. An interconnection interface with the microstrip antenna 4 is formed on the surface of the thin-film circuit 2, forming a three-dimensional interconnection structure.

[0045] According to the embodiment of the present disclosure, the dielectric material of the multilayer thick film circuit board 1 is co-fired ceramic, and the co-fired ceramic substrate is divided into high-temperature co-fired ceramic (HTCC) multilayer substrate and low-temperature co-fired ceramic (LTCC) multilayer substrate. The multilayer thick film circuit board 1 distributes various signals to the pads on the surface. The multilayer thick film circuit board 1 can achieve wiring with more than 30 layers. The surface circuit of the co-fired ceramic only leaves vias, and no circuit graphics are made. In terms of substrate thickness design, a layer of dielectric (about 0.1mm) is added on the basis of the required board thickness as a thinning margin for subsequent chemical mechanical polishing. For example, if the actual wiring uses 10 layers of circuits, a reserved layer is added to the surface, and the through holes also pass through the reserved layer of dielectric.

[0046] According to the embodiment of the present disclosure, the dielectric material of the multilayer thick film circuit board 1 may also adopt a ceramic substrate of aluminum oxide or aluminum nitride, or a silicon / glass adapter plate as a base.

[0047] According to the embodiment of the present disclosure, the multi-layer thick film circuit board 1 is suitable for manufacturing microwave transmission circuits, has a mature and stable process, and has good high-frequency performance and good thermal physical comprehensiveness.

[0048] According to an embodiment of the present disclosure, a plurality of high-power, high-heat-consumption compound chips 5 are embedded in a blind cavity of a multi-layer thick-film circuit board 1 in a positive manner. The compound chip 5 is suitable for amplifying and phase-shifting electromagnetic wave signals. The compound chip 5 is made of compound semiconductors such as GaAs and GaN, and has the advantages of small power amplifier and low noise amplifier.

[0049] According to an embodiment of the present disclosure, the multilayer thin film circuit 2 interconnects the surface circuit of the thick film circuit board 1 through high-precision, high-density thin film circuit wiring on the surface, and interconnects the electrode pads of the compound chip 5 with the surface circuit of the thick film circuit board 1, and transmits the input electromagnetic wave signal and the power supply control signal to the compound chip 5. The photosensitive medium material of the multilayer thin film circuit 2 is selected from phenylpropylcyclobutene (BCB) or polyimide (PI), preferably phenylpropylcyclobutene (BCB). At the same time, the port interconnected with the silicon-based chip 3 and the microstrip antenna 4 is led to the surface of the thin film circuit 2 through multilayer thin film wiring, and the input power supply control signal is transmitted to the silicon-based chip 3. The silicon-based chip 3 controls the amplification and phase shifts the electromagnetic wave signal, and establishes the interconnection between the silicon-based chip 3 and the compound chip 5 to realize the control of the amplification of the transmitted and received electromagnetic wave signals.

[0050] According to the embodiments of the present disclosure, lower parasitic effects and less transmission energy loss can be achieved.

[0051] According to an embodiment of the present disclosure, the silicon-based chip 3 is interconnected with the multi-layer thin film circuit 2 by flip-chip bonding, and the back side of the silicon-based chip 3 is in contact with the upper microstrip antenna 4 through a thermally conductive adhesive film 8.

[0052] According to the embodiment of the present disclosure, the surface mounted resistor and capacitor circuits and the silicon-based chip 3 can be arranged on the same layer, and the resistor and capacitor circuits are bonded and interconnected with the multi-layer thin film circuit 2 through conductive adhesive.

[0053] According to an embodiment of the present disclosure, the dielectric layer 6 of the microstrip antenna 4 includes glass and co-fired ceramics, and the surface circuit is prepared using a thin film process. The electromagnetic wave signal is finally radiated into space through the surface microstrip antenna 4.

[0054] According to an embodiment of the present disclosure, the bottom pad bump of the microstrip antenna 4 is implanted 19 Pb 81 Solder ball 7 (liquidus 270°C, solidus 280°C).

[0055] According to the embodiment of the present disclosure, by adopting a multi-layer thick film circuit board 1, the advantages of its three-dimensional wiring are brought into play, and at the same time, better mechanical support and heat dissipation channels are provided for the high-power and high-heat consumption compound chip 5. The thin film circuit 2 and the microstrip antenna 4 are interconnected by thermocompression bonding to form a three-dimensional stack, which reduces the occupied space of the packaging structure. The surface circuit interconnection of the thick film circuit board 1 and the interconnection of multiple compound chips 5 and the surface circuit of the thick film circuit board 1 are realized by high-precision thin film technology. The thin film circuit 2 and the microstrip antenna 4 are interconnected by thermocompression bonding to form an airtight seal, which realizes airtight protection of active devices. At the same time, it can reflect the advantages of three-dimensional stacking and two-dimensional expansion, improve the density of three-dimensional wiring and the strength of the packaging structure, show better heat dissipation capability and airtightness, and have low process costs, which is suitable for the needs of high-reliability fields for small batches of multiple varieties of products.

[0056] According to the embodiments of the present disclosure, a hybrid heterogeneous integrated active phased array transceiver front-end package structure integrates a microstrip antenna 4 with active and control circuit functions. As a standardized and universal product form, it can adapt to different needs and can be flexibly expanded in two dimensions. This explores the implementation of an integrated antenna microsystem architecture, lays the foundation for the continued advancement of lightweight micro-integrated phased array antenna aerospace multi-payload research and engineering applications, and expands the future widespread application of low-cost millimeter-wave phased array antennas in radar and communication electronics.

[0057] According to an embodiment of the present disclosure, the active phased array transceiver front-end packaging structure based on hybrid heterogeneous integration also includes a frame 9, which is arranged between the thin film circuit 2 and the microstrip antenna 4, and is three-dimensionally stacked by thermal compression bonding to form an airtight seal and support the microstrip antenna 4.

[0058] According to the embodiment of the present disclosure, the microstrip antenna 4 and the surrounding frame 9 are three-dimensionally stacked with the multi-layer thin film circuit 2 through thermocompression bonding, and an airtight package is formed at the same time, thereby improving the strength of the package stack.

[0059] According to an embodiment of the present disclosure, the coating layers of the frame 9 are, from inside to outside, a Ni layer with a thickness of 3 μm to 5 μm, an Au layer with a thickness of 2 μm to 3 μm, a Sn layer with a thickness of 1 μm, and an Au layer with a thickness of 0.2 μm to 0.5 μm.

[0060] According to an embodiment of the present disclosure, a typical material of the surrounding frame 9 may be Kovar, molybdenum copper or tungsten copper alloy.

[0061] Figure 2 4 is a diagram showing the surface plating state of the pad in the area of ​​the bottom frame 9 of the microstrip antenna 4 according to an exemplary embodiment of the present disclosure.

[0062] According to the embodiments of the present disclosure, Figure 2 As shown, Figure 2Figure (a) shows a top view of the area of ​​the frame 9. Figure 2 Figure (b) shows the back view of the microstrip antenna 4. The pads in the area of ​​the bottom frame 9 of the microstrip antenna 4 are plated with a Ni layer with a thickness of 3μm to 5μm and an Au layer with a thickness of 2μm to 3μm.

[0063] According to the embodiments of the present disclosure, more metal substances are provided for forming an airtight seal during annealing after the subsequent thermocompression bonding process.

[0064] According to an embodiment of the present disclosure, the active phased array transceiver front-end packaging structure based on hybrid heterogeneous integration also includes solder bumps 10, which are arranged at the bottom of the thick-film hybrid integrated circuit board to input electromagnetic wave signals, power supply signals and control signals into the thick-film hybrid integrated circuit board.

[0065] According to the embodiment of the present disclosure, the arrangement of the solder bumps 10 facilitates receiving external input signals into the thick-film hybrid integrated circuit board.

[0066] According to an embodiment of the present disclosure, the thick film circuit board 1 includes a through hole 11 extending from the blind cavity to the bottom of the thick film circuit board 1 to provide a grounding channel and a heat dissipation channel for the compound chip 5 .

[0067] According to the embodiment of the present disclosure, the through holes 11 are arranged in an array, which can better dissipate heat for the high-power, high-heat consumption compound chip 5.

[0068] According to an embodiment of the present disclosure, the thick film circuit board also includes blind holes and three-dimensional wiring, which are suitable for distributing electromagnetic wave signals, power supply signals and control signals input from the bottom of the thick film hybrid integrated circuit board on the surface of the thick film circuit board 1.

[0069] According to an embodiment of the present disclosure, the first surface of the compound chip 5 is coated with a conductive adhesive film 12 to connect the compound chip 5 to the blind cavity, and the second surface of the compound chip 5 is coated with photoresist to connect the compound chip 5 to the thin film circuit 2, and the second surface is opposite to the first surface.

[0070] According to the embodiment of the present disclosure, the first coating of photoresist adopts the vacuum coating method, and the thickness of the first coating of photoresist is 8μm~12μm (final thickness). The subsequent coating of photoresist adopts the conventional coating photolithography process and the thin film circuit 2 is produced. The thickness of the single layer of photoresist is 7μm~10μm (final thickness).

[0071] According to an embodiment of the present disclosure, the first coating of the photoresist adopts a vacuum coating method, which can ensure the surface flatness of the photoresist.

[0072] Figure 3It is a flow chart of a method for preparing an active phased array transceiver front-end packaging structure based on hybrid heterogeneous integration according to an illustrative embodiment of the present disclosure.

[0073] Another aspect of the embodiments of the present disclosure provides a method for preparing the active phased array transceiver front-end packaging structure based on hybrid heterogeneous integration as described above, such as Figure 3 As shown, the preparation method includes the following steps S1-S8:

[0074] Step S1: manufacturing a multi-layer thick film circuit board 1.

[0075] Figure 4 is a top view of a multilayer thick film circuit board 1 according to an exemplary embodiment of the present disclosure.

[0076] According to the embodiments of the present disclosure, Figure 4 As shown, conventional co-fired multilayer ceramic processes are used to punch, fill holes, print metallization patterns, stack, laminate, cut, co-fire, and level the stacked green ceramic tapes. PdAg or Cu paste is used for thick-film conductors. An infrared laser ceramic cutting process is used to cut the sintered green ceramic sheets into 2-, 4-, or 6-inch discs or squares. Discs are preferred for greater compatibility with subsequent wafer-level rewiring processes.

[0077] According to the embodiment of the present disclosure, the front and back surfaces of the multilayer thick film circuit board 1 are polished by chemical mechanical polishing (CMP), the surface roughness is below 80 nm, and the protrusion height of the through hole is less than 1 μm.

[0078] According to the embodiments of the present disclosure, the chemical mechanical polishing process (CMP) is a key process for achieving wafer surface flatness during the integrated circuit manufacturing process. The chemical mechanical polishing process is a combination of surface chemical action and mechanical grinding technology to achieve the removal of different materials at the micron / nano level on the wafer surface, thereby achieving nano-level flatness on the wafer surface and enabling the next lithography process to proceed. The chemical mechanical polishing process is a process in which the wafer being polished moves relative to the polishing pad under a certain pressure and in the presence of a polishing liquid, and the highly organic combination of the mechanical grinding action of the nano-abrasive and the chemical action of various chemical reagents is used to achieve the requirements of high flatness, low surface roughness and low defects on the surface of the polished wafer.

[0079] Step S2: making a blind cavity on the surface of the thick film circuit board 1 .

[0080] According to an embodiment of the present disclosure, the production of a blind cavity on the surface of a thick film circuit board 1 includes: forming a blind cavity on the surface of the thick film circuit board 1 by a method combining ultraviolet laser secondary etching with different powers and ultrasonic pickling process, and marking the alignment of the mask by laser direct writing and photolithography process under the same reference system.

[0081] According to the embodiment of the present disclosure, the wavelength of the ultraviolet laser is selected to be 355 nm, and a relatively high laser power (1.5 W to 3 W) and a frequency of 40 kHz to 80 kHz are first used to process the blind cavity.

[0082] According to the embodiment of the present disclosure, after the cavity thickness reaches the design requirements, it is placed in an acidic solution such as dilute hydrochloric acid or dilute sulfuric acid (concentration is 5% to 10%), and the blind cavity is ultrasonically cleaned for 3 minutes to 5 minutes at a frequency of 80kHz to 120kHz and a power of 200W to 400W.

[0083] According to an embodiment of the present disclosure, a lower laser power (0.5W-1W) and a frequency of 60kHz-120kHz are used to etch the blind cavity again.

[0084] According to the embodiments of the present disclosure, it is possible to achieve a blind cavity with a two-dimensional dimensional accuracy of no more than ±15 μm, a height accuracy of no more than ±5 μm, and a cavity bottom surface roughness of less than 1 μm.

[0085] Figure 5 1 is a top view of blind cavity preparation and alignment marking of a multi-layer thick film circuit board 1 according to an exemplary embodiment of the present disclosure.

[0086] According to the embodiments of the present disclosure, Figure 5 As shown, while the blind cavity is being processed, the alignment mark of the mask for the subsequent photolithography process is made by laser direct writing in the same reference system.

[0087] According to the embodiment of the present disclosure, the alignment mark can be directly etched into a groove on the thick film circuit board 1, or the surface can be activated by laser and then chemically plated with nickel and gold.

[0088] Step S3: coating the conductive adhesive film 12 on the first surface of the compound chip 5, placing the compound chip 5 into the blind cavity and heating and curing.

[0089] According to an embodiment of the present disclosure, after the blind cavity processing is completed, the compound chip 5 is loaded into the blind cavity and heated and cured using a conductive adhesive film 12 with a fixed thickness of 10μm to 20μm. The height difference between the surface of the compound chip 5 and the surface of the thick film circuit board 1 is less than 10μm.

[0090] Step S4: coating photoresist on the second surface of the compound chip 5 and fabricating the thin film circuit 2 to form a three-dimensional stack.

[0091] According to an embodiment of the present disclosure, the thin film circuit 2 is manufactured by utilizing the alignment marks made by the laser etching process in the above steps.

[0092] According to an embodiment of the present disclosure, photoresist is coated on the second surface of the compound chip 5 and a thin film circuit 2 is produced to form a three-dimensional stack, including: the first coating of the photoresist adopts a vacuum coating method to ensure the surface flatness of the photoresist, and the thickness of the first coating of the photoresist is 8μm to 12μm.

[0093] According to an embodiment of the present disclosure, the glue spreading table is placed in a closed glass cavity, and the air pressure in the cavity is pumped to below 500Pa using a vacuum pump. The glue is spread for 25s to 35s at a speed of 2500r / min to 4000r / min, and the vacuum is pumped to below 50Pa at the same time. After the glue is spread, the vacuum state is maintained for 10s to 30s and then restored to normal pressure.

[0094] According to the embodiment of the present disclosure, vacuum coating reduces the influence of the assembly gap between the compound chip 5 and the blind cavity on the flatness of the photoresist plane, thereby reducing the influence of the manufacturing error of the thin film circuit 2.

[0095] According to the embodiments of the present disclosure, the conductor material of the thin film wiring is sputtered Ti / Cu as the base, and then electroplated to a thickness of 2μm to 3μm. Finally, the surface circuit (Cu layer on the front and PdAg / Cu conductor on the back) is plated with a functional plating layer using a chemical nickel-gold plating process. The front pad is electroplated with a thickness of 2μm to 3μm of gold to adapt to the subsequent assembly process. The preferred circuit dimensions are: line width of 30μm to 80μm, and through-hole size of 30μm to 60μm.

[0096] Step S5: cutting the multi-layer thick film circuit board 1 into a plurality of units.

[0097] According to an embodiment of the present disclosure, the wafer-level multi-layer thick film circuit board 1 is cut into multiple units according to the reserved cutting lines, and the structure of each unit is the above-mentioned active phased array transceiver front-end packaging structure based on hybrid heterogeneous integration.

[0098] Step S6: flip-chip bonding the silicon-based chip 3 onto the thin film circuit 2 .

[0099] According to an embodiment of the present disclosure, after flip-chip bonding of the silicon-based chip 3 , the microstrip antenna 4 is manufactured using a thin film circuit manufacturing process.

[0100] Step S7: vertically interconnect the microstrip antenna 4 and the thin film circuit 2 by thermocompression bonding, and use a frame to form an airtight seal and support the microstrip antenna 4.

[0101] According to an embodiment of the present disclosure, the microstrip antenna 4 and the thin film circuit 2 are vertically interconnected by hot pressing bonding, and an airtight seal is formed by using a frame, and the microstrip antenna 4 is supported. The process includes: in a nitrogen environment, heating at a rate of 4°C / s to 8°C / s, a bonding pressure of 12N to 20N, maintaining a bonding temperature of 240°C to 270°C for 1min to 3min, and maintaining a bonding temperature of 280°C to 320°C for 1min to 5min, with the entire bonding time being 4min to 5min, while causing the Au-Sn eutectic reaction, by melting the solder ball 7 (for example, In 19 Pb 81 ) to achieve circuit interconnection between the microstrip antenna 4 and the multilayer thin film circuit 2. The active phased array transceiver front-end package based on hybrid heterogeneous integration is annealed at 220°C to 240°C in a nitrogen environment for 1 to 3 hours, or annealed in a formic acid atmosphere at 230°C to 250°C for 0.5 to 2 hours to form an airtight seal.

[0102] The disclosed embodiments promote the interdiffusion of Au and Sn to form more intermetallic compounds, creating an airtight cavity while interconnecting upper and lower signal layers. This effectively protects the internal circuitry from environmental influences, making it suitable for high-reliability applications. Furthermore, the thermal expansion coefficient of the frame 9 matches that of the multilayer thick-film circuit board 1, providing high-strength support for the entire package structure and resolving the issue of soft In-based solder and insufficient interconnection support strength.

[0103] Step S8: forming solder bumps 10 on the bottom of the outer side of the multi-layer thick film circuit board 1 .

[0104] According to the embodiments of the present disclosure, by heterogeneously integrating the multi-layer thick film circuit board 1 and the multi-layer thin film circuit 2, the process precision of the thick film circuit board 1 and the thin film circuit 2 are coordinated and unified through the ultraviolet laser processing technology, and the high-precision embedded rewiring packaging of multiple compound chips 5 in the blind cavity of the wafer-level co-fired ceramic substrate is achieved, which reduces the size of the circuit interconnection and improves the precision of the packaging structure.

[0105] According to the embodiments of the present disclosure, based on the "Know Good Die" technology, the formed packaging structure can also be tested individually, that is, "Know Good Packaging" can be provided, the process yield is controllable, the process R&D cost is low, and it is suitable for a multi-variety small batch production model.

[0106] It should also be noted that directional terms such as "upper," "lower," "front," "back," "left," and "right" mentioned in the embodiments are merely references to the directions in the accompanying drawings and are not intended to limit the scope of protection of the present disclosure. Throughout the drawings, identical elements are represented by identical or similar reference numerals. Conventional structures or configurations are omitted where they may cause confusion in understanding the present disclosure, and the shapes and dimensions of the components in the drawings do not reflect actual size or proportion, but are merely illustrative of the embodiments of the present disclosure.

[0107] Unless otherwise indicated, the numerical parameters in this specification and the appended claims are approximate and can vary depending on the desired properties obtained through the content of the present disclosure. Specifically, all numbers used in the specification and claims to express composition amounts, reaction conditions, etc., should be understood to be modified by the term "about" in all cases. Generally, the meaning of the expression is to include variations of ±10% in some embodiments, ±5% in some embodiments, ±1% in some embodiments, and ±0.5% in some embodiments from the specific quantity.

[0108] The use of ordinal numbers such as "first," "second," and "third" in the specification and claims to modify corresponding elements does not in itself mean that the elements have any ordinal number, nor does it represent the order of one element relative to another or the order in the manufacturing method. The use of such ordinal numbers is only used to clearly distinguish one element with a certain name from another element with the same name.

[0109] Furthermore, unless specifically described or required to occur sequentially, the order of the steps is not limited to the order listed above and may be varied or rearranged based on desired design requirements. Furthermore, the above embodiments may be mixed and matched with each other or with other embodiments based on design and reliability considerations. That is, the technical features of different embodiments may be freely combined to form more embodiments.

[0110] The embodiments of the present disclosure are described above. However, these embodiments are for illustrative purposes only and are not intended to limit the scope of the present disclosure. Although each embodiment has been described separately above, this does not mean that the measures in each embodiment cannot be used in combination to advantage. The scope of the present disclosure is defined by the appended claims and their equivalents. Without departing from the scope of the present disclosure, those skilled in the art may make various substitutions and modifications, which should all fall within the scope of the present disclosure.

Claims

1. An active phased array transceiver front-end packaging structure based on hybrid heterogeneous integration, comprising: Thick and thin film hybrid integrated circuit board, including: A multilayer thick-film circuit board is suitable for transmitting electromagnetic wave signals, wherein a blind cavity is provided on the surface of the thick-film circuit board, wherein the blind cavity is suitable for embedding a compound chip, wherein the compound chip is suitable for amplifying and phase-shifting the electromagnetic wave signal; A multilayer thin film circuit is prepared on the thick film circuit board; A silicon-based chip mounted on the surface of the thin film circuit, wherein the silicon-based chip is suitable for providing control signals and power management for the compound chip; a microstrip antenna disposed on the silicon-based chip, the microstrip antenna comprising a dielectric layer and double-sided wiring on both sides of the dielectric layer, wherein the microstrip antenna is interconnected with the thin film circuit on a side of the dielectric layer close to the silicon-based chip by a thermocompression bonding process, thereby forming an airtight seal; The thin film circuit is suitable for interconnecting the surface circuit of the thick film circuit board with the compound chip and the silicon-based chip, and forming an interconnection interface with the microstrip antenna on the surface of the thin film circuit to form a three-dimensional interconnection structure.

2. The active phased array transceiver front-end packaging structure based on hybrid heterogeneous integration according to claim 1, further comprising: The surrounding frame is arranged between the thin film circuit and the microstrip antenna, and is three-dimensionally stacked by thermocompression bonding to form an airtight seal and support the microstrip antenna.

3. The active phased array transceiver front-end packaging structure based on hybrid heterogeneous integration according to claim 2, wherein: The plating layers of the surrounding frame are, from inside to outside, a Ni layer with a thickness of 3 μm to 5 μm, an Au layer with a thickness of 2 μm to 3 μm, a Sn layer with a thickness of 1 μm, and an Au layer with a thickness of 0.2 μm to 0.5 μm.

4. The active phased array transceiver front-end packaging structure based on hybrid heterogeneous integration according to claim 1, further comprising: Solder bumps are arranged on the bottom of the thick-film hybrid integrated circuit board to input the electromagnetic wave signal, power supply signal and control signal into the thick-film hybrid integrated circuit board.

5. The active phased array transceiver front-end packaging structure based on hybrid heterogeneous integration according to claim 1, wherein: The thick film circuit board comprises: A through hole extends from the blind cavity to the bottom of the thick film circuit board to provide a grounding channel and a heat dissipation channel for the compound chip.

6. The active phased array transceiver front-end packaging structure based on hybrid heterogeneous integration according to claim 1, wherein: The first surface of the compound chip is coated with a conductive adhesive film to connect the compound chip to the blind cavity, and the second surface of the compound chip is coated with photoresist to connect the compound chip to the thin film circuit. The second surface is opposite to the first surface.

7. A method for preparing an active phased array transceiver front-end packaging structure based on hybrid heterogeneous integration according to any one of claims 1 to 6, comprising: Make multi-layer thick film circuit boards; Making a blind cavity on the surface of the thick film circuit board; Coating a conductive adhesive film on the first surface of the compound chip, placing the compound chip into the blind cavity and heating and curing; Coating a photoresist on the second surface of the compound chip and fabricating a thin film circuit to form a three-dimensional stack; cutting the multilayer thick film circuit board into a plurality of units; Flip-chip bonding a silicon-based chip onto the thin film circuit; vertically interconnecting the microstrip antenna and the thin film circuit by thermocompression bonding, forming an airtight seal with a surrounding frame and supporting the microstrip antenna; Making solder bumps on the bottom of thick film hybrid integrated circuit boards; The second surface is opposite to the first surface.

8. The method for preparing the active phased array transceiver front-end packaging structure based on hybrid heterogeneous integration according to claim 7, wherein: The step of producing a blind cavity on the surface of the thick film circuit board comprises: The blind cavity is formed on the surface of the thick film circuit board by combining ultraviolet laser secondary etching with different powers and ultrasonic pickling process, and the alignment mark of the mask is made by laser direct writing and photolithography process under the same reference system.

9. The method for preparing the active phased array transceiver front-end packaging structure based on hybrid heterogeneous integration according to claim 7, wherein: The step of coating a photoresist on the second surface of the compound chip and fabricating a thin film circuit to form a three-dimensional stack comprises: The photoresist is first coated in a vacuum coating method to ensure the surface flatness of the photoresist. The thickness of the photoresist first coated is 8 μm to 12 μm.

10. The method for preparing the active phased array transceiver front-end packaging structure based on hybrid heterogeneous integration according to claim 7, wherein: The microstrip antenna and the thin film circuit are vertically interconnected by thermocompression bonding, an airtight seal is formed by a surrounding frame, and the microstrip antenna is supported by: In a nitrogen environment, the heating rate is 4°C / s to 8°C / s, the bonding pressure is 12N to 20N, the bonding temperature is maintained at 240°C to 270°C for 1 minute to 3 minutes, and the bonding temperature is maintained at 280°C to 320°C for 1 minute to 5 minutes, so that the Au-Sn eutectic reacts and the solder balls are melted to achieve circuit interconnection between the microstrip antenna and the thin film circuit; In a nitrogen environment, the active phased array transceiver front-end package based on hybrid heterogeneous integration is annealed at 220°C to 240°C for 1 to 3 hours, or annealed in a formic acid gas environment at 230°C to 250°C for 0.5 to 2 hours to form an airtight seal.

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