Radio frequency front-end module

Abstract

The invention relates to the technical field of radio frequency, in particular to a radio frequency front-end module, which is characterized in that a combining module is arranged, and a power amplifier converts power amplification signals respectively formed by a pair of differential radio frequency signals by using a first balun and a second balun; the two paths of power amplification signals output by the first balun and the second balun are combined by using a combining module to output a power amplification radio frequency signal, so that the working stability of the power amplifier is improved; the arrangement areas of the combining module, the two baluns and the power amplification chip are arranged in sequence, and the first inductance unit and the second inductance unit in the combining module are located on the two sides of the central axis of the power amplification chip respectively, so that overlapping of wires is avoided, interference between the wires is avoided, and the reliability of the power amplification chip is improved. And the working stability of the power amplifier is improved.

Description

Technical Field

[0001] The present application relates to the field of radio frequency technology, and in particular to a radio frequency front-end module. Background Art

[0002] Existing RF front-end modules have been widely used in wireless communications, Internet of Things, smart home and other fields. Among them, the power amplifier is the core unit of the RF front-end module, and its performance has a great impact on the signal output indicators of the RF front-end module.

[0003] The power amplifier first uses a power amplifier circuit to power amplify a pair of differential RF signals, and then combines the signals output by the power amplifier circuit to output a power-amplified RF signal. In the related art, a balun is generally used to convert and combine the signals output by the power amplifier circuit, and the balun directly outputs a power-amplified RF signal, which is not conducive to improving the stability of the power amplifier. Summary of the invention

[0004] In view of the above problems, an embodiment of the present application provides a radio frequency front-end module to solve the above technical problems that are not conducive to improving the stability of the radio frequency front-end module.

[0005] The present application provides a radio frequency front-end module, including:

[0006] substrate;

[0007] A power amplifier, the power amplifier comprising a power amplifier chip and an output circuit respectively arranged on the substrate;

[0008] The power amplifier chip is integrated with a power amplifier circuit;

[0009] The output circuit includes a first balun, a second balun and a combining module, the first balun and the second balun are respectively connected to the power amplifier circuit, the power amplifier circuit performs power amplification processing on a pair of differential RF signals and outputs them to the first balun and the second balun, and the combining module is used to combine the two power amplified signals output by the first balun and the second balun to output a power amplified RF signal;

[0010] Among them, the combining module includes a first inductance unit connected to the first balun, a second inductance unit connected to the second balun, and a combining output unit, the first end of the combining output unit is respectively connected to the output end of the first inductance unit and the output end of the second inductance unit, and the second end of the combining output unit is connected to the signal output end of the output circuit; the setting area of ​​the combining module, the setting area of ​​the first balun and the second balun, and the setting area of ​​the power amplifier chip are arranged in sequence along a first direction, and the first inductance unit and the second inductance unit are respectively located on both sides of the first central axis of the setting area of ​​the power amplifier chip.

[0011] The RF front-end module provided in the embodiment of the present application includes a substrate; a power amplifier, wherein the power amplifier includes a power amplifier chip and an output circuit respectively arranged on the substrate; the power amplifier chip integrates a power amplifier circuit; the output circuit includes a first balun, a second balun and a combining module, wherein the first balun and the second balun are respectively connected to the power amplifier circuit; the combining module includes a first inductance unit connected to the first balun, a second inductance unit connected to the second balun and a combining output unit, wherein the first end of the combining output unit is respectively connected to the output end of the first inductance unit and the output end of the second inductance unit, and the second end of the combining output unit is connected to the signal output end of the output circuit; by setting the combining module, the power amplifier first uses the first balun and the second balun to respectively combine the power amplified signals formed by a pair of differential RF signals The first balun and the second balun are converted, and the two power amplified signals output by the first balun and the second balun are combined by the combining module to output the power amplified radio frequency signal, which is beneficial to improving the stability of the power amplifier during operation; by arranging the setting areas of the combining module, the two baluns and the power amplifier chip in sequence, the first wiring between the combining module and the two baluns and the second wiring between the two baluns and the power amplifier chip are avoided to overlap, and the interference between the first wiring and the second wiring is reduced, which is beneficial to improving the stability of the power amplifier during operation; by locating the first inductance unit and the second inductance unit in the combining module on both sides of the central axis of the power amplifier chip, the third wiring between the first balun and the first inductance unit and the fourth wiring between the second balun and the second inductance unit are avoided to overlap, and the interference between the third wiring and the fourth wiring is reduced, which is beneficial to improving the stability of the power amplifier during operation.

[0012] These and other aspects of the present application will become more clearly understood in the description of the following embodiments. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] Figure 1 A schematic structural diagram of a radio frequency front-end module provided in one embodiment of the present application is shown.

[0014] Figure 2 Shows Figure 1 The schematic diagram of the coordination between the substrate and the power amplifier chip in the RF front-end module is shown.

[0015] Figure 3 Shows Figure 1 A circuit diagram of a power amplifier circuit and an output circuit in a radio frequency front-end module is shown.

[0016] Figure 4 Shows Figure 1 Another circuit diagram of the power amplifier circuit and output circuit in the RF front-end module shown.

[0017] Figure 5 Shows Figure 1 Another structural schematic diagram of the RF front-end module is shown.

[0018] Figure 6 Shows Figure 1 The circuit diagram of the output circuit in the RF front-end module is shown.

[0019] Figure 7 Shows Figure 1 Another structural schematic diagram of the RF front-end module is shown.

[0020] Figure 8 Shows Figure 1 Another structural schematic diagram of the RF front-end module is shown.

[0021] Fig. 9 Shows Figure 1 Another circuit diagram of the power amplifier circuit, the first balun and the second balun in the RF front-end module shown.

[0022] Fig.10 Shows Figure 1 The circuit diagram of the power amplifier circuit and switch chip in the RF front-end module is shown. DETAILED DESCRIPTION

[0023] The embodiments of the present application are described in detail below, and examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present application, and cannot be understood as limiting the present application.

[0024] In order to enable those skilled in the art to better understand the solutions of the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without making creative work are within the scope of protection of the present application.

[0025] In the embodiments of the present application, it should be noted that, in this article, relational terms such as first and second, etc. are merely used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations.

[0026] Moreover, the terms "comprises," "comprising," or any other variation thereof are intended to encompass non-exclusive inclusion, such that a process, method, article, or apparatus that includes a list of elements includes not only those elements, but also other elements not explicitly listed, or elements inherent to such process, method, article, or apparatus. In the absence of further limitations, an element defined by the phrase "comprising a ..." does not exclude the presence of additional identical elements in the process, method, article, or apparatus that includes the element.

[0027] In the description of the embodiments of the present application, words such as "example" or "for example" are used to indicate examples, illustrations or descriptions. Any embodiment or design described as "example" or "for example" in the embodiments of the present application is not to be interpreted as being more preferred or having more advantages than another embodiment or design. The use of words such as "example" or "for example" is intended to present relative concepts in a clear manner.

[0028] In addition, the "plurality" in the embodiments of the present application refers to two or more than two. In view of this, in the embodiments of the present application, "plurality" can also be understood as "at least two". "At least one" can be understood as one or more, for example, one, two or more. For example, including at least one means including one, two or more, and there is no limit on which ones are included. For example, including at least one of A, B and C, then A, B, C, A and B, A and C, B and C, or A, B and C can be included.

[0029] It should be noted that, in the embodiments of the present application, "and / or" describes the association relationship of the associated objects, indicating that three relationships may exist. For example, A and / or B may represent: A exists alone, A and B exist at the same time, and B exists alone. In addition, the character " / ", unless otherwise specified, generally indicates that the associated objects before and after are in an "or" relationship.

[0030] It should be noted that in the embodiments of the present application, "connection" can be understood as electrical connection, and the connection between two electrical components can be a direct or indirect connection between the two electrical components. For example, the connection between A and B can be either a direct connection between A and B or an indirect connection between A and B through one or more other electrical components.

[0031] It should be noted that the transistors mentioned in the present application specification may be bipolar junction transistors (BJT), referred to as bipolar transistors, BJT transistors or triodes. The transistors mentioned in the present application specification may also be metal oxide semiconductor field effect transistors (MOSFET), referred to as MOS transistors or MOS tubes or FET tubes.

[0032] Specifically, the BJT transistor can be a PNP type BJT transistor or an NPN type BJT transistor, the PNP type BJT transistor can correspond to a P type MOS transistor, the first end of the BJT transistor can be an emitter or a collector, the second end of the BJT transistor can be a collector or an emitter, and the control end of the BJT transistor can be a base.

[0033] Specifically, the MOS transistor may be a P-type MOS transistor or an N-type MOS transistor, the first end of the MOS transistor may be a source or a drain, the second end of the MOS transistor may be a drain or a source, and the control end of the MOS transistor may be a gate.

[0034] An embodiment of the present application provides a radio frequency front-end module 100, see Figures 1 to 3 As shown, the RF front-end module 100 includes: a substrate 10 and a power amplifier 20, the power amplifier 20 includes a power amplifier chip 21 and an output circuit 22, the power amplifier chip 21 and the output circuit 22 are respectively arranged on the substrate 10, and the power amplifier chip 21 is located in the setting area A1 on the substrate 10.

[0035] The power amplifier chip 21 integrates a power amplifier circuit 21a, and the output circuit 22 includes a first balun 221, a second balun 222, a signal output terminal 223, and a combiner module 224. The first balun 221 and the second balun 222 are respectively connected to the power amplifier circuit 21a, and the power amplifier circuit 21a can perform power amplification processing on a pair of RF signals (for example, differential signals), and then output the power amplified signal formed by one of the RF signals (for example, differential signals) to the first balun 221, and output the power amplified signal formed by the other RF signal (for example, differential signal) to the second balun 222. It should be noted that the RF signal output to the first balun 221 / the second balun 222 can be a differential signal with a phase difference of 180 degrees, a RF signal with a phase difference of 90 degrees, or a single-ended RF signal.

[0036] The combining module 224 is used to combine the first power amplified signal output after conversion by the first balun 221 and the second power amplified signal output after conversion by the second balun 222 to output a power amplified radio frequency signal.

[0037] The combining module 224 includes a first inductance unit 2241, a second inductance unit 2242 and a combining output unit 2243. The first inductance unit 2241 is connected to the first balun 221, the second inductance unit 2242 is connected to the second balun 222, the first end of the combining output unit 2243 is respectively connected to the output end of the first inductance unit 2241 and the output end of the second inductance unit 2242, and the second end of the combining output unit 2243 is connected to the signal output end 223 of the output circuit 22. The first power amplified signal output by the first balun 221 is processed by the first inductor unit 2241 and then output to the first end of the combiner output unit 2243. The second power amplified signal output by the second balun 222 is processed by the second inductor unit 2242 and then output to the first end of the combiner output unit 2243. The output end of the first inductor unit 2241 and the output end of the second inductor unit 2242 form a combining node 2240. The first power amplified signal passing through the first inductor unit 2241 and the second power amplified signal passing through the second inductor unit 2242 are combined at the combining node 2240 to form a power amplified RF signal. The power amplified RF signal is output from the second end of the combiner output unit 2243 after passing through the combiner output unit 2243.

[0038] Exemplarily, the first inductor unit 2241 may include at least one inductor, for example, may include one inductor or at least two inductors connected in sequence; the second inductor unit 2242 may include at least one inductor, for example, may include one inductor or at least two inductors connected in sequence; the combined output unit 2243 may include at least one inductor, for example, may include one inductor or at least two inductors connected in sequence.

[0039] The arrangement area A1 of the power amplifier chip 21 has a first central axis S1. Figure 3 In the top view shown, the first central axis S1 is also the central axis of the power amplifier chip 21. The setting area A3 of the combiner module 224, the setting area A2 of the first balun 221 and the second balun 222, and the setting area A1 of the power amplifier chip 21 are arranged in sequence along the first direction L1, and the first inductor unit 2241 and the second inductor unit 2242 are respectively located on both sides of the first central axis S1 of the setting area A1 of the power amplifier chip 21.

[0040] In this embodiment, by arranging a combining module in the output circuit, the power amplifier first uses the first balun and the second balun to convert the power amplified signals formed by a pair of differential RF signals respectively, and then uses the combining module to combine the two power amplified signals output by the first balun and the second balun to output the power amplified RF signal, which is beneficial to improving the stability of the power amplifier during operation; by arranging the arrangement areas of the combining module, the two baluns and the power amplifier chip in sequence, it is avoided that the first routing line between the combining module and the two baluns and the second routing line between the two baluns and the power amplifier chip overlap, and at the same time, the interference between the first routing line and the second routing line is reduced, which is beneficial to improving the stability of the power amplifier during operation; by locating the first inductance unit and the second inductance unit in the combining module on both sides of the central axis of the power amplifier chip, it is avoided that the third routing line between the first balun and the first inductance unit and the fourth routing line between the second balun and the second inductance unit overlap, and at the same time, the interference between the third routing line and the fourth routing line is reduced, which is beneficial to improving the stability of the power amplifier during operation.

[0041] As an implementation, please continue to see Figure 3 As shown, the first balun 221 and the second balun 222 are respectively located on both sides of the first central axis S1. For example, the first balun 221 and the second balun 222 can be respectively implemented by metal traces wound on the substrate 10, the first balun 221 and the second balun 222 can also be respectively implemented by patch baluns, and the first balun 221 and the second balun 222 can also be respectively implemented by balun chips, which is not limited in this embodiment.

[0042] In this embodiment, since the first balun and the second balun are respectively arranged on both sides of the central axis of the power amplifier chip, the fifth line between the power amplifier circuit and the first balun and the sixth line between the power amplifier circuit and the second balun can be avoided from overlapping, while reducing the interference between the fifth line and the sixth line, which is beneficial to improving the stability of the power amplifier during operation, and thus improving the stability of the RF front-end module.

[0043] In some embodiments, please refer to Figure 3 As shown, the first balun 221 and the second balun 222 are arranged axially symmetrically with respect to the first central axis S1 of the power amplifier chip 21. Specifically, when the first balun 221 and the second balun 222 are respectively provided as patch baluns or balun chips or metal traces, the arrangement area of ​​the first balun 221 on the substrate 10 and the arrangement area of ​​the second balun 222 on the substrate 10 are arranged axially symmetrically with respect to the first central axis S1.

[0044] In this embodiment, the first balun and the second balun are axially symmetrically arranged relative to the first central axis, which can improve the symmetry of the fifth line between the power amplifier circuit and the first balun and the sixth line between the power amplifier circuit and the second balun, further reduce the interference between the fifth line and the sixth line, and improve the stability of the RF front-end module.

[0045] In some embodiments, when the first balun 221 and the second balun 222 respectively use metal traces, the metal trace pattern of the first balun 221 and the metal trace pattern of the second balun 222 are arranged axially symmetrically with respect to the first central axis S1.

[0046] In some embodiments, the straight-line distance from the midpoint of the core region of the first balun 221 to the first node of the first central axis S1 is equal to the straight-line distance from the midpoint of the core region of the second balun 222 to the first node of the first central axis S1. The first node may be any point on the first central axis S1.

[0047] In this embodiment, the metal routing patterns of the first balun and the second balun are axially symmetrical with respect to the first central axis, and the positions of the same type of input ends or output ends of the first balun and the second balun are symmetrical with respect to the first central axis, which can improve the symmetry of the fifth routing between the power amplifier circuit and the first balun and the sixth routing between the power amplifier circuit and the second balun, further reduce the interference between the fifth routing and the sixth routing, and improve the stability of the RF front-end module.

[0048] In some embodiments, the first inductor unit 2241 and the second inductor unit 2242 are axially symmetrically arranged with respect to the first central axis S1 of the power amplifier chip 21 .

[0049] In this embodiment, the first inductance unit and the second inductance unit in the combining module are axially symmetrically arranged on both sides of the central axis of the power amplifier chip, which can improve the symmetry of the third line between the first balun and the first inductance unit and the fourth line between the second balun and the second inductance unit, further reduce the interference between the third line and the fourth line, and help improve the stability of the power amplifier during operation.

[0050] In some embodiments, see Figure 4 and Figure 5 As shown, the first inductor unit 2241 includes a first inductor L11 and a second inductor L12, the first inductor L11 is connected to the output end of the first balun 221, the first inductor L11 and the second inductor L12 are connected, and the extension direction of the first inductor L11 is not parallel to the extension direction of the second inductor L12. The second inductor unit 2242 includes a third inductor L21 and a fourth inductor L22, the third inductor L21 is connected to the output end of the second balun 222, the third inductor L21 and the fourth inductor L22 are connected, and the extension direction of the third inductor L21 is not parallel to the extension direction of the fourth inductor L22.

[0051] In this embodiment, the first inductor unit and the second inductor unit are respectively formed by two non-parallel inductors, which is beneficial to reducing the setting area of ​​the inductors to avoid overlapping of routing lines, and can also reduce the coupling between the two inductors.

[0052] In some embodiments, an extension direction of the first inductor L11 intersects with an extension direction of the second inductor L12 , and an extension direction of the third inductor L21 intersects with an extension direction of the fourth inductor L22 .

[0053] In some embodiments, the intersection angle range of the extension direction of the first inductor L11 and the extension direction of the second inductor L12 is at least one of [45°, 60°], [60°, 90°], [90°, 120°], and [120°, 150°]. The intersection angle range of the extension direction of the third inductor L21 and the extension direction of the fourth inductor L22 is at least one of [45°, 60°], [60°, 90°], [90°, 120°], and [120°, 150°].

[0054] In some embodiments, the first inductor L11 and the second inductor L12 are perpendicular to each other, and the third inductor L21 and the fourth inductor L22 are perpendicular to each other.

[0055] In this embodiment, the first inductor unit and the second inductor unit are respectively formed by two mutually perpendicular inductors, which is beneficial to reducing the arrangement area of ​​the inductors to avoid overlapping of routings, and can further reduce the coupling between the two inductors.

[0056] In some embodiments, the extension direction of the first inductor L11 is parallel to the first central axis S1, and the extension direction of the second inductor L12 is perpendicular to the first central axis S1; the extension direction of the third inductor L21 is parallel to the first central axis S1, and the extension direction of the fourth inductor L22 is perpendicular to the first central axis S1.

[0057] In some embodiments, the first inductor L11, the second inductor L12, the third inductor L21, and the fourth inductor L22 are respectively wound on the substrate 10. Specifically, the substrate may include multiple metal layers, and the inductor may be wound in at least one metal layer. By wiring the inductor on the metal layer of the substrate, the inductance of each inductor can be flexibly controlled and have a higher Q value, thereby further reducing the insertion loss.

[0058] In some embodiments, the first inductor L11, the second inductor L12, the third inductor L21 and the fourth inductor L22 are respectively chip inductors disposed on the surface of the substrate 10. Specifically, by providing chip inductors, the manufacturing process of each inductor is simplified, and circuit debugging is easy.

[0059] As an implementation, see Figure 4 and Figure 5 As shown, the output circuit 22 further includes an isolation resistor unit 225, a first end of the isolation resistor unit 225 is connected to the output end of the first balun 221, a second end of the isolation resistor unit 225 is connected to the output end of the second balun 222, and the isolation resistor unit 225 is located on the first central axis S1. Exemplarily, the isolation resistor unit 225 may include an isolation resistor R4.

[0060] By setting the isolation resistor unit 225, the output end of the first balun 221 and the output end of the second balun 222 are isolated, which can improve the balance between the first balun 221 and the second balun 222, thereby improving the stability of the power amplifier during operation.

[0061] Among them, setting the isolation resistor unit 225 on the first central axis S1 can improve the symmetry of the routing of the first balun 221 and the isolation resistor unit 225 and the routing of the second balun 222 and the isolation resistor unit 225, and further improve the stability of the power amplifier during operation.

[0062] As an implementation, see Figure 4 and Figure 5 As shown, the output circuit 22 also includes a combining matching capacitor 226, the first end of the combining matching capacitor 226 is respectively connected to the output end of the first inductance unit 2241, the output end of the second inductance unit 2242 and the first end of the combining output unit 2243, the second end of the combining matching capacitor 226 is grounded, and the combining matching capacitor 226 is located on the first central axis S1.

[0063] The combining matching capacitor 226 may participate in impedance matching. Specifically, the combining matching capacitor 226 may be used to increase the output impedance of the first inductor unit 2241 and the output impedance of the second inductor unit 2242 .

[0064] The circuit-matching capacitor 226 is arranged on the first central axis S1, which can improve the symmetry of the routing of the first inductor unit 2241 and the circuit-matching capacitor 226 and the routing of the second inductor unit 2242 and the circuit-matching capacitor 226, and further improve the stability of the power amplifier during operation.

[0065] In some embodiments, see Figure 5 As shown, the first end of the combining matching capacitor 226 is connected to the second inductor L12 and the fourth inductor L22 respectively, and the combining matching capacitor 226 is disposed in the gap region between the second inductor L12 and the fourth inductor L22.

[0066] Among them, since the second inductor L12 and the fourth inductor L22 are axially symmetrically arranged relative to the first central axis S1, and the second inductor L12 and the fourth inductor L22 are respectively perpendicular to the first central axis S1, and the combining matching capacitor 226 is arranged in the gap area between the two, the distance between the wiring of the first inductor unit 2241 and the combining matching capacitor 226 and the distance between the wiring of the second inductor unit 2242 and the combining matching capacitor 226 can be shortened, and the integration can also be improved.

[0067] In some embodiments, see Figure 5 and Figure 7 As shown, the first inductor unit 2241, the circuit matching capacitor 226, the second inductor unit 2242, the side of the second balun 222 away from the power amplifier chip 21, and the side of the first balun 221 away from the power amplifier chip 21 are sequentially arranged to form a first rectangular area A4, and the isolation resistor unit 225 is located in the first rectangular area A4.

[0068] The isolation resistor unit 225 is disposed in the first rectangular area A4, so that the integration degree can be improved.

[0069] As an implementation manner, the combiner output unit 2243 may include at least two combined inductors connected in sequence, the extension direction of the combined inductors is perpendicular to the first central axis S1, and the combiner output unit 2243 processes the power amplified RF signal and then outputs it. Figure 4 As shown, the combining output unit 2243 may include a first combining inductor L31 and a second combining inductor L32, the first end of the first combining inductor L31 is respectively connected to the output end of the first inductor unit 2241 and the output end of the second inductor unit 2242, the second end of the first combining inductor L31 is connected to the first end of the second combining inductor L32, and the second end of the second combining inductor L32 is connected to the signal output terminal 223.

[0070] In this embodiment, at least two combined inductors connected in sequence are respectively arranged perpendicularly to the first central axis, which can increase the inductance of the signal rationality unit and is suitable for application scenarios requiring a larger inductance. In addition, arranging at least two combined inductors in sequence along the connection direction can reduce the routing area occupied by the combined output unit, which is beneficial to increase the routing area and further avoid routing overlap to improve stability.

[0071] In some embodiments, the combined inductor is a chip inductor disposed on the surface of the substrate 10. Specifically, at least two chip inductors are connected in series, which simplifies the manufacturing process of each inductor and facilitates circuit debugging. In addition, since the inductance value of the combined inductor is relatively large, if a planar inductor is formed using the metal layer of the substrate, a large area is required, while using SMD components can effectively save area.

[0072] As an implementation method, Figure 5 and Figure 6 As shown, the output circuit 22 may further include a signal coupling unit 227 coupled to the combining module 224, and the signal coupling unit 227 is used to couple the power amplified RF signal on the combining module 224 to the detection circuit 21b.

[0073] The detection circuit 21 b is used to detect the frequency of the power amplified RF signal output by the power amplifier 21 , and couple the power amplified RF signal on the combining module 224 to the signal coupling unit 227 through coupling between the signal coupling unit 227 and the combining module 224 .

[0074] In some embodiments, Figure 5 and Figure 6 As shown, the signal coupling unit 227 may include a first coupling line 2271 and a second coupling line 2272 coupled to each other.

[0075] The first end of the first coupling line 2271 is connected to the output end of the first inductor unit 2241 and the output end of the second inductor unit 2242, respectively, and the second end of the first coupling line 2271 is connected to the first end of the combiner output unit 2243. The first coupling line 2271 is connected between the combiner node 2240 and the combiner output unit 2243, and the power amplified RF signal combined at the combiner node 2240 is input to the combiner output unit 2243 after passing through the first coupling line 2271.

[0076] Among them, the first end of the second coupling line 2272 is connected to the detection circuit, and the second end of the second coupling line 2272 is grounded. The second coupling line 2272 couples the power amplified RF signal on the first coupling line 2271, and the power amplified RF signal coupled to the second coupling line 2272 is output from its first end.

[0077] In some embodiments, Figure 5 and Figure 6 As shown, the second end of the second coupling line 2272 is grounded through the first output resistor R6, and the first end of the second coupling line 2272 is connected to the detection circuit 21b through the second output resistor R5.

[0078] In some implementations, the detection circuit 21 b may be integrated into the power amplifier chip 21 .

[0079] In some embodiments, Figure 6 As shown, the signal coupling unit 227 is disposed on a side of the combining matching capacitor 226 away from the first balun 221 and the second balun 222 .

[0080] In this embodiment, the signal coupling unit and the two baluns are far away from each other to avoid mutual interference of signals.

[0081] As an implementation method, Figure 6 As shown, the output circuit 22 may also include a first combined harmonic suppression unit 2281 and a second combined harmonic suppression unit 2282, one end of the first combined harmonic suppression unit 2281 is connected to the output end of the first balun 221, the other end of the first combined harmonic suppression unit 2281 is grounded, one end of the second combined harmonic suppression unit 2282 is connected to the output end of the second balun 222, and the other end of the second combined harmonic suppression unit 2282 is grounded.

[0082] For example, in Figure 5 and Figure 6 As shown, the first combined harmonic suppression unit 2281 includes a first combined inductor L13 and a first combined capacitor C12 connected in series, the first combined inductor L13 is connected to the output end of the first balun 221, and the first combined capacitor C12 is grounded. By configuring the inductance value of the first combined inductor L13 and the capacitance value of the first combined capacitor C12, the first combined harmonic suppression unit 2281 makes the impedance of the harmonics (for example, second-order harmonics or third-order harmonics) of a specific frequency band close to zero, so that the harmonics of the specific frequency band can be short-circuited, and the harmonics of the specific frequency band can be suppressed, so as to filter the first power amplified signal output by the first balun 221.

[0083] The second combined harmonic suppression unit 2282 includes a second combined inductor L23 and a second combined capacitor C22 connected in series, the second combined inductor L23 is connected to the output end of the second balun 222, and the second combined capacitor C22 is grounded. By configuring the inductance value of the second combined inductor L23 and the capacitance value of the second combined capacitor C22, the second combined harmonic suppression unit 2282 makes the impedance of the harmonics (for example, the second-order harmonics or the third-order harmonics) of a specific frequency band close to zero, so that the harmonics of the specific frequency band can be short-circuited, and the harmonics of the specific frequency band can be suppressed, so as to filter the first power amplified signal output by the second balun 222.

[0084] As an implementation method, the power amplifier 20 is used to perform power amplification processing on radio frequency signals of multiple frequency bands. Figure 5 , Figure 7 and Fig.10 As shown, the RF front-end module 100 also includes a switch chip 30 arranged on the substrate 10, the switch chip 30 includes a plurality of switch units 31, each switch unit 31 is used to select and input a RF signal of at least one frequency band into the power amplifier chip 21, and the power amplifier circuit 21a integrated in the power amplifier chip 21 performs power amplification processing on the RF signal of the frequency band.

[0085] In this embodiment, each switch unit 31 corresponds to a radio frequency signal of at least one frequency band. When a radio frequency signal of a specific frequency band is output, the switch unit 31 corresponding to the specific frequency band is turned on, and other switch units 31 are turned off. In this way, the output of radio frequency signals of different frequency bands can be compatible.

[0086] In some embodiments, please refer to Figure 5 and Figure 7 As shown, the first balun 221 and the second balun 222 are located at a first side of the power amplifier chip 21 along the first direction L1 , and the switch chip 30 is located at a second side of the power amplifier chip 21 along the first direction L1 .

[0087] In this embodiment, the first balun and the second balun for processing the output signal of the power amplifier chip are located on the first side of the first direction, and the wiring of the output end of the power amplifier chip is also located on the first side of the first direction; the switch chip for selecting the input signal of the power amplifier chip is located on the second side of the first direction, and the wiring of the input end of the power amplifier chip is also located on the second side of the first direction. The input end wiring and the output end wiring of the power amplifier chip are far away from each other, will not overlap, and will not interfere with each other, which is conducive to further improving the stability of the RF front-end module.

[0088] In some embodiments, please refer to Figure 5 and Figure 7As shown, the RF front-end module 100 of this embodiment further includes a control chip 40, which is disposed on the substrate and is electrically connected to the power amplifier chip 21. Exemplarily, the control chip 40 can be used to output a control signal, which can be a first control signal for controlling each switch unit in the switch chip 30 to be turned on or off; the control signal can be a second control signal for turning on the output switch of the bias signal in the power amplifier chip 21. Exemplarily, the control chip 40 can be a CMOS (Complementary Metal-Oxide-Semiconductor) chip.

[0089] The control chip 40 is located at a second side of the power amplifier chip 21 along the first direction L1 .

[0090] In this embodiment, the wiring between the power amplifier chip and the control chip and the wiring between the power amplifier chip and the first balun and the second balun are far away from each other, and will not overlap or interfere with each other, which is beneficial to further improve the stability of the RF front-end module.

[0091] In some embodiments, please refer to Figure 5 As shown, the first direction L1 is parallel to the first central axis S1 of the power amplifier chip 21 ; the control chip 40 and the switch chip 30 are arranged side by side along the second direction L2 , and the second direction L2 is perpendicular to the first direction L1 .

[0092] In this embodiment, the first direction and the second direction correspond to the length direction / width direction and the width direction / length direction of the power amplifier chip respectively, so that the wiring between the power amplifier chip and the first balun, the second balun, the control chip and the switch chip is easier to arrange regularly.

[0093] As an implementation, see Figure 4As shown, the power amplifier circuit 21a includes a first power amplifier branch 211 and a second power amplifier branch 212, the first power amplifier branch 211 includes a first output terminal 211a and a second output terminal 211b, and the second power amplifier branch 212 includes a third output terminal 212a and a fourth output terminal 212b; the first balun 221 includes a first primary side 2210 and a first secondary side 2211 coupled to each other, and the two ends of the first primary side 2210 are respectively connected to the first output terminal 211a and the second output terminal 211b of the first power amplifier branch 211. End 211b, one end of the first secondary side 2211 is connected to the signal output terminal 223 of the output circuit 22, and the other end of the first secondary side 2211 is grounded; the second balun 222 includes a second primary side 2220 and a second secondary side 2222 coupled with each other, the two ends of the second primary side 2220 are respectively connected to the third output terminal 212a and the fourth output terminal 212b of the corresponding second power amplifier branch 212, one end of the second secondary side 2222 is connected to the signal output terminal 223 of the output circuit 22, and the other end of the second secondary side 2222 is grounded.

[0094] In this embodiment, the first power amplification branch 211 and the second power amplification branch 212 respectively perform power amplification processing on a pair of differential RF signals. The first power amplification branch 211 outputs a first pair of differential power amplified signals formed by one of the differential RF signals to the first balun 221 through the first output terminal 211a and the second output terminal 211b respectively; the second power amplification branch 212 outputs a second pair of differential power amplified signals formed by the other differential RF signal to the second balun 222 through the third output terminal 212a and the fourth output terminal 212b respectively. The first balun 221 and the second balun 222 respectively adopt a differential-to-single-ended architecture. The first balun 221 converts the first pair of differential power amplified signals output by the first power amplification branch 211 into a first power amplified signal, and the second balun 222 converts the second pair of differential power amplified signals output by the second power amplification branch 212 into a second power amplified signal. The first power amplified signal and the second power amplified signal are combined and outputted at the combining module 224.

[0095] In some embodiments, see Figure 6 and Figure 7 As shown, the output circuit 22 also includes a first capacitor C1 and a second capacitor C2 arranged on the substrate 10, wherein the first capacitor C1 is connected to the first balun 221, and the second capacitor C2 is connected to the second balun 222, the first capacitor C1 is arranged in the core area of ​​the first balun 221, the first end of the first capacitor C1 is connected to the midpoint 221a of the first primary 2210, and the second end of the first capacitor C1 is grounded; the second capacitor C2 is arranged in the core area of ​​the second balun 222, the first end of the second capacitor C2 is connected to the midpoint 222a of the second primary 2220, and the second end of the second capacitor C2 is grounded.

[0096] Among them, the first primary side 2210 may include a first coil segment L1a and a second coil segment L1b connected in series, and the midpoint 221a of the first primary side 2210 is the connection point of the first coil segment L1a and the second coil segment L1b; the second primary side 2220 may include a third coil segment L2a and a fourth coil segment L2b connected in series, and the midpoint 222a of the second primary side 2220 is the connection point of the third coil segment L2a and the fourth coil segment L2b.

[0097] In this embodiment, the first capacitor is arranged between the midpoint of the first primary and the ground terminal, the first pair of differential power amplified signals output by the first power amplifier branch are differential mode signals, the midpoint of the first primary is equivalent to a short circuit for differential mode signals, and is equivalent to an open circuit for common mode signals, and a first capacitor connected in parallel to the ground is arranged at the midpoint of the first primary, providing a path for grounding the common mode signal, which can improve the suppression level of the common mode signal. Similarly, the second capacitor is arranged between the midpoint of the second primary and the ground terminal, the second pair of differential power amplified signals output by the second power amplifier branch are differential mode signals, the midpoint of the second primary is equivalent to a short circuit for differential mode signals, and is equivalent to an open circuit for common mode signals, and a second capacitor connected in parallel to the ground is arranged at the midpoint of the second primary, providing a path for grounding the common mode signal, which can improve the suppression level of the common mode signal. Therefore, the arrangement of the first capacitor and the second capacitor is conducive to improving the balance of the power amplifier.

[0098] In some embodiments, see Figure 8 As shown, the first secondary side 2211 is arranged outside the magnetic core area, and the first primary side 2210 is arranged outside the first secondary side 2211; the first primary side 2210 includes a first coil body 22101 and two first connecting parts 22102, the first coil body 22101 is a single-loop structure with a first opening, the first opening is located on the side of the first primary side 2210 close to the power amplifier chip 21, and the two first connecting parts 22102 are respectively connected to the two ends of the first coil body 22101. The first secondary side 2211 includes a second coil body 22111 and two second connecting parts 22112, the second coil body 22111 is a single-loop structure with a second opening, the second opening is close to the side of the first primary side 2210 far from the power amplifier chip 21, and the two second connecting parts 22112 are respectively connected to the two ends of the second coil body 22111.

[0099] Correspondingly, the second secondary side 2222 is arranged outside the magnetic core area, and the second primary side 2220 is arranged outside the second secondary side 2222; the second primary side 2220 includes a third coil body 22201 and two third connecting parts 22202, the third coil body 22201 is a single-loop structure with a third opening, the third opening is located on the side of the second primary side 2220 close to the power amplifier chip 21, and the two third connecting parts 22202 are respectively connected to the two ends of the third coil body 22201; the second secondary side 2222 includes a fourth coil body 22221 and two fourth connecting parts 22222, the fourth coil body 22221 is a single-loop structure with a fourth opening, the fourth opening is close to the side of the second primary side 2220 away from the power amplifier chip 21, and the two fourth connecting parts 22222 are respectively connected to the two ends of the fourth coil body 22221.

[0100] In this embodiment, the two first connection parts of the first primary side are respectively connected to the first output end and the second output end of the first power amplifier branch, and the two first connection parts of the first primary side are arranged close to the power amplifier chip, which is conducive to shortening the wiring distance between the first balun and the power amplifier chip; the two third connection parts of the second primary side are respectively connected to the third output end and the fourth output end of the second power amplifier branch, and the two third connection parts of the second primary side are arranged close to the power amplifier chip, which is conducive to shortening the wiring distance between the second balun and the power amplifier chip. At the same time, the two second connection parts of the first secondary side are respectively used to connect the signal output end and the ground of the output circuit, and the two second connection parts of the first secondary side are far away from the power amplifier chip, which is conducive to shortening the wiring distance between the first balun and the signal output end; the two fourth connection parts of the second secondary side are respectively used to connect the signal output end and the ground of the output circuit, and the two fourth connection parts of the second secondary side are far away from the power amplifier chip, which is conducive to shortening the wiring distance between the second balun and the signal output end.

[0101] In some embodiments, the first capacitor C1 and the second capacitor C2 are respectively chip capacitors disposed on the surface of the substrate 10. In this embodiment, by providing chip capacitors, the manufacturing process of the capacitors is simplified, and circuit debugging is easy.

[0102] In some embodiments, see Figure 4 As shown, the power amplifier circuit 21 also includes a first harmonic suppression unit 2294, a second harmonic suppression unit 2295, a third harmonic suppression unit 2296 and a fourth harmonic suppression unit 2297. The first harmonic suppression unit 2294 is connected in series between the first output terminal 211a and the ground terminal, the second harmonic suppression unit 2295 is connected in series between the second output terminal 211b and the ground terminal, the third harmonic suppression unit 2296 is connected in series between the third output terminal 212a and the ground terminal, and the fourth harmonic suppression unit 2297 is connected in series between the fourth output terminal 212b and the ground terminal.

[0103] Exemplarily, the first harmonic suppression unit 2294 includes a first matching capacitor C41 and a first matching inductor L41 connected in series, the first matching capacitor C41 is grounded, and the first matching inductor L41 is connected to the first output terminal 211a; the second harmonic suppression unit 2295 includes a second matching capacitor C42 and a second matching inductor L42 connected in series, the second matching capacitor C42 is grounded, and the second matching inductor L42 is connected to the second output terminal 211b; the third harmonic suppression unit 2296 includes a third matching capacitor C43 and a third matching inductor L43 connected in series, the third matching capacitor C43 is grounded, and the third matching inductor L43 is connected to the third output terminal 212a; the fourth harmonic suppression unit 2297 includes a fourth matching capacitor C44 and a fourth matching inductor L44 connected in series, the fourth matching capacitor C44 is grounded, and the fourth matching inductor L44 is connected to the fourth output terminal 212b.

[0104] As an implementation, please continue to see Figure 7 As shown, the setting area A1 of the power amplifier chip 21 is divided into a first chip area A11 and a second chip area A12 by a first central axis S1, the first balun 221 is axially symmetrically arranged relative to the second central axis S11 of the first chip area A11, the second balun 222 is axially symmetrically arranged relative to the third central axis S12 of the second chip area A12, and the first central axis S1, the second central axis S11 and the third central axis S12 are parallel to each other.

[0105] In this embodiment, when the first balun 221 and the second balun 222 respectively adopt patch baluns or balun chips or metal routing, the setting area of ​​the first balun 221 on the substrate 10 is axially symmetrical with respect to the second central axis S11 of the first chip area A11, and the setting area of ​​the second balun 222 on the substrate 10 is axially symmetrical with respect to the third central axis S12 of the second chip area A12, which can further improve the symmetry of the fifth routing between the power amplifier circuit and the first balun and the sixth routing between the power amplifier circuit and the second balun, further reduce the interference between the fifth routing and the sixth routing, and improve the stability of the RF front-end module.

[0106] In some embodiments, when the first balun 221 and the second balun 222 respectively use metal routing, the metal routing pattern of the first balun 221 is axially symmetrical with respect to the second central axis S11 of the first chip area A11, and the metal routing pattern of the second balun 222 is axially symmetrical with respect to the third central axis S12 of the second chip area A12.

[0107] In this embodiment, the metal routing pattern of the first balun and the metal routing pattern of the second balun are respectively axially symmetrical patterns, which can further improve the symmetry of the fifth routing between the power amplifier circuit and the first balun and the sixth routing between the power amplifier circuit and the second balun, further reduce the interference between the fifth routing and the sixth routing, and improve the stability of the RF front-end module.

[0108] In some embodiments, see Fig. 9 As shown, the first power amplifier branch 211 also includes a first power amplifier module 2111, a third balun 2112 and a second power amplifier module 2113 connected in sequence; the second power amplifier module 2113 is a differential power amplifier module, and the two output ends of the second power amplifier module 2113 are respectively the first output end 211a and the second output end 211b of the first power amplifier branch 211. The second power amplifier branch 212 also includes a third power amplifier module 2121, a fourth balun 2122 and a fourth power amplifier module 2123 connected in sequence; the fourth power amplifier module 2123 is a differential power amplifier module, and the two output ends of the fourth power amplifier module 2123 are respectively the third output end 212a and the fourth output end 212b of the second power amplifier branch 212.

[0109] In this implementation, the last stage amplification of the first power amplification branch and the second power amplification branch respectively adopts a differential amplification structure to ensure a higher output power.

[0110] In some embodiments, see Fig. 9 As shown, the third balun 2112 includes a third primary side 211c and a third secondary side 211d coupled to each other, one end of the third primary side 211c is connected to the output end of the first power amplifier module 2111, the other end of the third primary side 211c is grounded, and the two ends of the third secondary side 211d are respectively connected to the two input ends of the second power amplifier module 2113.

[0111] Among them, the third balun 2112 adopts a single-ended to differential architecture, which can convert a radio frequency signal output from the output end of the first power amplifier module 2111 into a pair of differential signals, which are power amplified by the second power amplifier module 2113 to form a first pair of differential power amplified signals.

[0112] Correspondingly, the fourth balun 2122 includes a fourth primary side 212c and a fourth secondary side 212d coupled to each other, one end of the fourth primary side 212c is connected to the output end of the third power amplifier module 2121, the other end of the fourth primary side 212c is grounded, and the two ends of the fourth secondary side 212d are respectively connected to the two input ends of the fourth power amplifier module 2123.

[0113] Among them, the fourth balun 2122 adopts a single-ended to differential architecture, which can convert a radio frequency signal output from the output end of the third power amplifier module 2121 into a pair of differential signals, which are power amplified by the fourth power amplifier module 2123 to form a second pair of differential power amplified signals.

[0114] In some embodiments, the power amplifier circuit 21a also includes a third capacitor C3 and a fourth capacitor C4, the third capacitor C3 is connected to the third balun 2112, the first end of the third capacitor C3 is connected to the midpoint of the third secondary side 211d, and the second end of the third capacitor C3 is grounded; the fourth capacitor C4 is connected to the fourth balun 2122, the first end of the fourth capacitor C4 is connected to the midpoint of the fourth secondary side 212d, and the second end of the fourth capacitor C4 is grounded.

[0115] Among them, the third secondary side 211d may include a fifth coil segment and a sixth coil segment connected in series, and the midpoint of the third secondary side 211d is the connection point of the fifth coil segment and the sixth coil segment; the fourth secondary side 212d may include a seventh coil segment and an eighth coil segment connected in series, and the midpoint of the fourth secondary side 212d is the connection point of the seventh coil segment and the eighth coil segment.

[0116] In this embodiment, the third capacitor is arranged between the midpoint of the third secondary side and the ground terminal, the midpoint of the third secondary side is equivalent to a short circuit for differential mode signals and an open circuit for common mode signals, and the third capacitor connected in parallel to the ground is arranged at the midpoint of the third secondary side, providing a path for grounding the common mode signal, which can improve the suppression level of the common mode signal. Similarly, the fourth capacitor is arranged between the midpoint of the fourth secondary side and the ground terminal, the midpoint of the fourth secondary side is equivalent to a short circuit for differential mode signals and an open circuit for common mode signals, and the fourth capacitor connected in parallel to the ground is arranged at the midpoint of the fourth secondary side, providing a path for grounding the common mode signal, which can improve the suppression level of the common mode signal. Therefore, the arrangement of the third capacitor and the fourth capacitor is conducive to improving the balance of the power amplifier.

[0117] In some embodiments, the third capacitor C3 and the fourth capacitor C4 are respectively chip capacitors disposed on the surface of the substrate 10. In this embodiment, by providing chip capacitors, the capacitor manufacturing process is simplified and circuit debugging is easy.

[0118] In some embodiments, the first power amplification module 2111 includes a first power amplification unit 2101 and a second power amplification unit 2102, the input end of the first power amplification unit 2101 is connected to the input end of the power amplifier 20, the first power amplification unit 2101 and the second power amplification unit 2102 are single-ended power amplification units respectively, and the output end of the second power amplification unit 2102 is the output end of the first power amplification module 2111.

[0119] The third power amplification module 2121 includes a third power amplification unit 2103 and a fourth power amplification unit 2104. The input end of the third power amplification unit 2103 is connected to the input end of the power amplifier 20. The third power amplification unit 2103 and the fourth power amplification unit 2104 are single-ended power amplification units respectively. The output end of the fourth power amplification unit 2104 is the output end of the third power amplification module 2121.

[0120] In this implementation, the first power amplification module and the third power amplification module each have a two-stage power amplification structure, which is beneficial to improving the output power.

[0121] For example, see Fig. 9 As shown, the first power amplification unit 2101 may include a first transistor Q1, the second power amplification unit 2102 may include a second transistor Q2, the third power amplification unit 2103 may include a third transistor Q3, and the fourth power amplification unit 2104 may include a fourth transistor Q4. The second power amplification module 2113 may include a fifth transistor Q5 and a sixth transistor Q6, wherein the control end of the fifth transistor Q5 is connected to the first end of the third secondary side 211d, and the control end of the sixth transistor Q6 is connected to the second end of the third secondary side 211d. The fourth power amplification module 2123 may include a seventh transistor Q7 and an eighth transistor Q8, wherein the control end of the seventh transistor Q7 is connected to the first end of the fourth secondary side 212d, and the control end of the eighth transistor Q8 is connected to the second end of the fourth secondary side 212d.

[0122] In some embodiments, see Fig. 9 As shown, the RF front-end module 100 also includes a first power supply terminal 11 and a second power supply terminal 12 arranged on the substrate 10, the first power amplification unit 2101 and the second power amplification unit 2102 are respectively connected to the first power supply terminal 11, the second power amplification module 2113 is connected to the second power supply terminal 12 through the first balun 221, the third power amplification unit 2103 and the fourth power amplification unit 2104 are respectively connected to the first power supply terminal 11, and the fourth power amplification module 2123 is connected to the second power supply terminal 12 through the second balun 222.

[0123] In this embodiment, the first two power amplification structures in the first power amplification branch and the second power amplification branch are connected to the same power supply end, and the last power amplification structure in the first power amplification branch and the second power amplification branch is connected to the other power supply end through the corresponding balun, thereby avoiding overlapping and mutual interference of wiring, and improving the stability of the RF front-end module.

[0124] In some embodiments, see Fig. 9As shown, the output terminal 210a of the first power amplification unit 2101 and the output terminal 210b of the second power amplification unit 2102 are respectively connected to the first power supply terminal 11, the output terminal 210c of the third power amplification unit 2103 and the output terminal 210d of the fourth power amplification unit 2104 are respectively connected to the first power supply terminal 11, the second power supply terminal 12 is connected to the midpoint 221a of the first primary side 2210, and the second power supply terminal 12 is also connected to the midpoint 222a of the second primary side 2220.

[0125] In this embodiment, the first power amplification unit, the second power amplification unit, the third power amplification unit, and the fourth power amplification unit are respectively connected to the first power supply end through their respective output ends, so that the output ends are multiplexed as power supply ends, thereby realizing multiplexing of signal ports and simplifying the circuit structure. At the same time, the first balun and the second balun are respectively connected to the second power supply end through the midpoints of their respective primary sides, and the connection end with the first capacitor or the second capacitor is multiplexed as the power supply end, thereby realizing multiplexing of signal ports and simplifying the circuit structure.

[0126] In some embodiments, see Fig. 9 As shown, the power amplifier circuit 21a further includes a choke unit 213, wherein a first end of one choke unit 213 is connected to an output end (power end) 210a of the first power amplifier unit 2101, and a second end of the choke unit 213 and an output end (power end) 210b of the second power amplifier unit 2102 are respectively connected to the first power supply end 11. A first end of another choke unit 213 is connected to an output end (power end) 210c of the third power amplifier unit 2103, and a second end of the choke unit 213 and an output end (power end) 210d of the fourth power amplifier unit 2104 are respectively connected to the first power supply end 11.

[0127] The choke unit 213 is used to prevent the RF signals at the first power amplification unit 2101 and the third power amplification unit 2103 from leaking to the first power supply terminal 11 to ensure the normal operation of the power amplifier 20. In addition, the choke unit 213 can also prevent the AC component of the first power supply voltage VCC1 output by the first power supply terminal 11 as an interference signal from entering the first power amplification unit 2101 and the third power amplification unit 2103.

[0128] In some embodiments, see Fig. 9 As shown, the power amplifier circuit 21a further includes a stabilizing unit 214, the stabilizing unit 214 and the choke unit 213 are connected in parallel, the first end of the stabilizing unit 214 is connected to the first end of the choke unit 213, and the second end of the stabilizing unit 214 is connected to the second end of the choke unit 213. Exemplarily, the choke unit 213 may include an inductor.

[0129] Among them, one stabilizing unit 214 is used to suppress part of the out-of-band low-frequency signal in the RF signal coupled to the first power amplifier unit 2101 by the second power amplifier unit 2102 and the subsequent unit, and another stabilizing unit 214 is used to suppress part of the out-of-band low-frequency signal in the RF signal coupled to the third power amplifier unit 2103 by the fourth power amplifier unit 2104 and the subsequent unit, so as to reduce the out-of-band low-frequency gain of the above RF signal and improve the stability of the power amplifier 20 during operation. Exemplarily, the stabilizing unit 214 may include at least one resistor.

[0130] In some embodiments, see Fig. 9 As shown, the power amplifier circuit 21a may further include a signal input terminal 20a, a first DC blocking capacitor 215 and a second DC blocking capacitor 216. One of the first DC blocking capacitors 215 is connected between the signal input terminal 20a and the control terminal of the first transistor Q1, and is used to prevent the DC bias signal applied to the control terminal of the first transistor Q1 from flowing to the signal input terminal 20a, so as to ensure that the first transistor Q1 can work smoothly; the other first DC blocking capacitor 215 is connected between the signal input terminal 20a and the control terminal of the third transistor Q3, and is used to prevent the DC bias signal applied to the control terminal of the third transistor Q3 from flowing to the signal input terminal 20a, so as to ensure that the third transistor Q3 can work smoothly. One of the second DC blocking capacitors 216 is connected between the first end of the first transistor Q1 and the control end of the second transistor Q2, and is used to prevent the DC bias signal applied to the control end of the second transistor Q2 from flowing to the first transistor Q1, so as to ensure that the second transistor Q2 can work smoothly; the other second DC blocking capacitor 216 is connected between the first end of the third transistor Q3 and the control end of the fourth transistor Q4, and is used to prevent the DC bias signal applied to the control end of the fourth transistor Q4 from flowing to the third transistor Q3, so as to ensure that the fourth transistor Q4 can work smoothly.

[0131] In some embodiments, see Fig. 9 As shown, the power amplifying circuit 21 a may further include a first isolation unit 2171 and a second isolation unit 2172 .

[0132] In the first power amplification branch 211, a first end of the first isolation unit 2171 is connected to a second end of the choke unit 213, and a second end of the first isolation unit 2171 is connected to the first power supply terminal 11. A first end of the second isolation unit 2172 is connected to an output end of the second power amplification unit 2102, and a second end of the second isolation unit 2172 is connected to the first power supply terminal 11. The first isolation unit 2171 and the second isolation unit 2172 are used to isolate the radio frequency signal between the first power amplification unit 2101 and the second power amplification unit 2102 to improve the working stability of the power amplifier 20.

[0133] In the second power amplification branch 212, a first end of the first isolation unit 2171 is connected to a second end of the choke unit 213, and a second end of the first isolation unit 2171 is connected to the first power supply terminal 11. A first end of the second isolation unit 2172 is connected to an output end of the fourth power amplification unit 2104, and a second end of the second isolation unit 2172 is connected to the first power supply terminal 11. The first isolation unit 2171 and the second isolation unit 2172 are used to isolate the radio frequency signal between the third power amplification unit 2103 and the fourth power amplification unit 2104 to improve the working stability of the power amplifier 20.

[0134] In some embodiments, see Fig. 9 As shown, the power amplifier circuit 21 a may further include a first decoupling unit 2181 and a second decoupling unit 2182 .

[0135] In the first power amplifier branch 211, one end of the first decoupling unit 2181 is connected to the first end of the first isolation unit 2171, and the other end is grounded. One end of the second decoupling unit 2182 is connected to the first end of the second isolation unit 2172, and the other end is grounded. By setting the first decoupling unit 2181 and the second decoupling unit 2182, most of the output signals coupled to the first power amplifier unit 2101 can be filtered out, and the unfiltered signals will reach the branch where the choke unit 213 and the stabilizing unit 214 are located, and then the above signals are suppressed by the choke unit 213 and the stabilizing unit 214 to avoid the oscillation of the power amplifier 20, thereby improving the working stability of the power amplifier 20.

[0136] In the second power amplifier branch 212, one end of the first decoupling unit 2181 is connected to the first end of the first isolation unit 2171, and the other end is grounded. One end of the second decoupling unit 2182 is connected to the first end of the second isolation unit 2172, and the other end is grounded. By setting the first decoupling unit 2181 and the second decoupling unit 2182, most of the output signals coupled to the third power amplifier unit 2103 can be filtered out, and the unfiltered signals will reach the branch where the choke unit 213 and the stabilizing unit 214 are located, and then the above signals are suppressed by the choke unit 213 and the stabilizing unit 214 to avoid the occurrence of oscillation of the power amplifier 20, thereby improving the working stability of the power amplifier 20.

[0137] In some embodiments, see Fig. 9 As shown, the power amplifier circuit 21 a may further include a third DC blocking capacitor 2191 and a fourth DC blocking capacitor 2192 .

[0138] In the first power amplifier branch 211, one end of the third secondary side 211d is connected to the control end of the fifth transistor Q5 through the third DC blocking capacitor 2191, and the third DC blocking capacitor 2191 can prevent the DC bias signal applied to the control end of the fifth transistor Q5 from flowing to the third secondary side 211d, so as to ensure that the fifth transistor Q5 can work smoothly. The other end of the third secondary side 211d is connected to the control end of the sixth transistor Q6 through the fourth DC blocking capacitor 2192, and the fourth DC blocking capacitor 2192 can prevent the DC bias signal applied to the control end of the sixth transistor Q6 from flowing to the third secondary side 211d, so as to ensure that the sixth transistor Q6 can work smoothly. In addition, the third DC blocking capacitor 2191 and the fourth DC blocking capacitor 2192 can also participate in impedance matching together with the third balun 2112 to improve the transmission efficiency of the RF signal.

[0139] In the second power amplifier branch 212, one end of the fourth secondary side 212d is connected to the control end of the seventh transistor Q7 through the third DC blocking capacitor 2191, and the third DC blocking capacitor 2191 can prevent the DC bias signal applied to the control end of the seventh transistor Q7 from flowing to the fourth secondary side 212d, so as to ensure that the seventh transistor Q7 can work smoothly. The other end of the fourth secondary side 212d is connected to the control end of the eighth transistor Q8 through the fourth DC blocking capacitor 2192, and the fourth DC blocking capacitor 2192 can prevent the DC bias signal applied to the control end of the eighth transistor Q8 from flowing to the fourth secondary side 212d, so as to ensure that the eighth transistor Q8 can work smoothly. In addition, the third DC blocking capacitor 2191 and the fourth DC blocking capacitor 2192 can also participate in impedance matching together with the fourth balun 2122 to improve the transmission efficiency of the RF signal.

[0140] In some embodiments, see Fig. 9 As shown, the power amplifier circuit 21a may further include a fifth DC blocking capacitor 2193 .

[0141] In the first power amplifier branch 211, one end of the fifth DC blocking capacitor 2193 is connected to the second end of the third primary 211c, and the other end is grounded. Since the first power supply voltage VCC1 outputted from the first power supply terminal 11 will flow to the first end of the second transistor Q2 through the third primary 211c to supply power to the second transistor Q2, in order to prevent the first power supply voltage VCC1 from being short-circuited to the ground at the second end of the third primary 211c, the fifth DC blocking capacitor 2193 is provided between the second end of the third primary 211c and the ground end, so as to play a role in blocking DC, thereby ensuring the smooth operation of the second transistor Q2.

[0142] In the second power amplifier branch 212, one end of the fifth DC blocking capacitor 2193 is connected to the second end of the fourth primary 212c, and the other end is grounded. Since the first power supply voltage VCC1 output by the first power supply terminal 11 will flow to the first end of the fourth transistor Q4 through the fourth primary 212c to supply power to the fourth transistor Q4, in order to prevent the first power supply voltage VCC1 from being short-circuited to the ground at the second end of the fourth primary 212c, the fifth DC blocking capacitor 2193 is provided between the second end of the fourth primary 212c and the ground end, so as to play a role in blocking DC, thereby ensuring the smooth operation of the fourth transistor Q4.

[0143] The above is only an implementation method of the present application. It should be pointed out that a person skilled in the art can make improvements without departing from the inventive concept of the present application, but these improvements are within the scope of protection of the present application.

Claims

1. A radio frequency front-end module, characterized in that: include: substrate; A power amplifier, the power amplifier comprising a power amplifier chip and an output circuit respectively arranged on the substrate; The power amplifier chip is integrated with a power amplifier circuit; The output circuit includes a first balun, a second balun and a combining module, the first balun and the second balun are respectively connected to the power amplifier circuit, the power amplifier circuit performs power amplification processing on a pair of differential RF signals and outputs them to the first balun and the second balun, and the combining module is used to combine the two power amplified signals output by the first balun and the second balun to output a power amplified RF signal; Among them, the combining module includes a first inductance unit connected to the first balun, a second inductance unit connected to the second balun, and a combining output unit, the first end of the combining output unit is respectively connected to the output end of the first inductance unit and the output end of the second inductance unit, and the second end of the combining output unit is connected to the signal output end of the output circuit; the setting area of ​​the combining module, the setting area of ​​the first balun and the second balun, and the setting area of ​​the power amplifier chip are arranged in sequence along a first direction, and the first inductance unit and the second inductance unit are respectively located on both sides of the first central axis of the setting area of ​​the power amplifier chip.

2. The RF front-end module according to claim 1, characterized in that: The first balun and the second balun are respectively located on two sides of a first central axis of a setting area of ​​the power amplifier chip.

3. The RF front-end module according to claim 2, characterized in that: The first balun and the second balun are axially symmetrically arranged relative to a first central axis of the power amplifier chip.

4. The RF front-end module according to claim 3, characterized in that: The first inductor unit and the second inductor unit are axially symmetrically arranged relative to a first central axis of the power amplifier chip.

5. The RF front-end module according to claim 1, characterized in that: The first inductor unit includes a first inductor connected to the output end of the first balun and a second inductor connected to the first inductor, and an extension direction of the first inductor is not parallel to an extension direction of the second inductor; the second inductor unit includes a third inductor connected to the output end of the second balun and a fourth inductor connected to the third inductor, and an extension direction of the third inductor is not parallel to an extension direction of the fourth inductor.

6. The RF front-end module according to claim 5, characterized in that: The first inductor is perpendicular to the second inductor, and the third inductor is perpendicular to the fourth inductor.

7. The RF front-end module according to claim 6, characterized in that: The extending direction of the first inductor is parallel to the first central axis, and the extending direction of the second inductor is perpendicular to the first central axis; the extending direction of the third inductor is parallel to the first central axis, and the extending direction of the fourth inductor is perpendicular to the first central axis.

8. The RF front-end module according to claim 5, characterized in that: The first inductor, the second inductor, the third inductor and the fourth inductor are respectively wound on the substrate, or the first inductor, the second inductor, the third inductor and the fourth inductor are respectively chip inductors arranged on the surface of the substrate.

9. The RF front-end module according to claim 2, characterized in that: The output circuit further includes an isolation resistor unit, two ends of which are respectively connected to the output end of the first balun and the output end of the second balun, and the isolation resistor unit is located on the first central axis.

10. The RF front-end module according to claim 2, characterized in that: The output circuit also includes a combining matching capacitor, a first end of the combining matching capacitor is respectively connected to the output end of the first inductance unit, the output end of the second inductance unit and the first end of the combining output unit, and a second end of the combining matching capacitor is grounded, and the combining matching capacitor is located on the first central axis.

11. The RF front-end module according to claim 10, characterized in that: The first inductor unit includes a first inductor connected to the output end of the first balun and a second inductor connected to the first inductor, the extension direction of the first inductor is parallel to the first central axis, and the extension direction of the second inductor is perpendicular to the first central axis; the second inductor unit includes a third inductor connected to the output end of the second balun and a fourth inductor connected to the third inductor, the extension direction of the third inductor is parallel to the first central axis, and the extension direction of the fourth inductor is perpendicular to the first central axis; the first end of the combined matching capacitor is respectively connected to the second inductor and the fourth inductor, and the combined matching capacitor is arranged in the gap area between the second inductor and the fourth inductor.

12. The RF front-end module according to claim 11, characterized in that: The first inductor unit, the combining matching capacitor, the second inductor unit, a side of the second balun away from the power amplifier chip, and a side of the first balun away from the power amplifier chip are sequentially arranged to form a first rectangular area; The output circuit further includes an isolation resistor unit, two ends of which are respectively connected to the output end of the first balun and the output end of the second balun, the isolation resistor unit is located on the first central axis, and the isolation resistor unit is located in the first rectangular area.

13. The RF front-end module according to claim 4, characterized in that: The combining output unit includes at least two combining inductors connected in sequence, and an extending direction of the combining inductors is perpendicular to the first central axis.

14. The RF front-end module according to claim 13, characterized in that: The combined inductor is a chip inductor arranged on the surface of the substrate.

15. The RF front-end module according to claim 1, characterized in that: The output circuit further comprises a signal coupling unit coupled to the combining module, and the signal coupling unit is used to couple the power amplified radio frequency signal on the combining module to output to the detection circuit.

16. The radio frequency front-end module according to claim 15, characterized in that: The signal coupling unit includes a first coupling line and a second coupling line coupled to each other, the first coupling line is connected between the output end of the first inductance unit, the output end of the second inductance unit and the combined output unit, the first end of the second coupling line is connected to the detection circuit, and the second end of the second coupling line is grounded.

17. The RF front-end module according to claim 15, characterized in that: The output circuit also includes a combining matching capacitor, a first end of the combining matching capacitor is respectively connected to the output end of the first inductance unit, the output end of the second inductance unit and the first end of the combining output unit, and a second end of the combining matching capacitor is grounded, and the combining matching capacitor is located on the first central axis; the signal coupling unit is arranged on a side of the combining matching capacitor away from the first balun and the second balun.

18. The RF front-end module according to claim 1, characterized in that: The power amplifier is used to perform power amplification processing on radio frequency signals of multiple frequency bands; The RF front-end module further includes a switch chip disposed on the substrate, the switch chip includes a plurality of switch units, each of the switch units is used to selectively input the RF signal of at least one frequency band to the power amplifier chip; The first balun and the second balun are located on a first side of the power amplifier chip along the first direction, and the switch chip is located on a second side of the power amplifier chip along the first direction.

19. The radio frequency front-end module according to claim 18, characterized in that: The RF front-end module also includes: A control chip disposed on the substrate, the control chip being electrically connected to the power amplifier chip; The control chip is located at a second side of the power amplifier chip along the first direction.

20. The radio frequency front-end module according to claim 19, characterized in that: The first direction is parallel to the first central axis of the power amplifier chip; the control chip and the switch chip are arranged side by side along a second direction, and the second direction is perpendicular to the first direction.

21. The radio frequency front-end module according to any one of claims 1 to 20, characterized in that: The power amplifier circuit includes a first power amplifier branch and a second power amplifier branch, the first power amplifier branch includes a first output end and a second output end, and the second power amplifier branch includes a third output end and a fourth output end; the first balun includes a first primary side and a first secondary side coupled with each other, the two ends of the first primary side are respectively connected to the first output end and the second output end of the first power amplifier branch, one end of the first secondary side is connected to the signal output end of the output circuit, and the other end of the first secondary side is grounded; the second balun includes a second primary side and a second secondary side coupled with each other, the two ends of the second primary side are respectively connected to the third output end and the fourth output end corresponding to the second power amplifier branch, one end of the second secondary side is connected to the signal output end of the output circuit, and the other end of the second secondary side is grounded.

22. The radio frequency front-end module according to claim 21, characterized in that: The output circuit further includes a first capacitor and a second capacitor disposed on the substrate; The first capacitor is connected to the first balun; the first capacitor is arranged in the core area of ​​the first balun, the first end of the first capacitor is connected to the midpoint of the first primary side, and the second end of the first capacitor is grounded; the second capacitor is connected to the second balun; the second capacitor is arranged in the core area of ​​the second balun, the first end of the second capacitor is connected to the midpoint of the second primary side, and the second end of the second capacitor is grounded.

23. The radio frequency front-end module according to claim 22, characterized in that: The first secondary side is arranged outside the magnetic core area, and the first primary side is arranged outside the first secondary side; the first primary side includes a first coil body and two first connecting parts, the first coil body is a single-loop structure with a first opening, the first opening is located on a side of the first primary side close to the power amplifier chip, and the two first connecting parts are respectively connected to two ends of the first coil body; the first secondary side includes a second coil body and two second connecting parts, the second coil body is a single-loop structure with a second opening, the second opening is close to a side of the first primary side away from the power amplifier chip, and the two second connecting parts are respectively connected to two ends of the second coil body; The second secondary side is arranged outside the magnetic core area, and the second primary side is arranged outside the second secondary side; the second primary side includes a third coil body and two third connecting parts, the third coil body is a single-loop structure with a third opening, the third opening is located on a side of the second primary side close to the power amplifier chip, and the two third connecting parts are respectively connected to the two ends of the third coil body; the second secondary side includes a fourth coil body and two fourth connecting parts, the fourth coil body is a single-loop structure with a fourth opening, the fourth opening is close to a side of the second primary side away from the power amplifier chip, and the two fourth connecting parts are respectively connected to the two ends of the fourth coil body.

24. The radio frequency front-end module according to claim 22, characterized in that: The first capacitor and the second capacitor are respectively chip capacitors arranged on the surface of the substrate.

25. The radio frequency front-end module according to claim 24, characterized in that: The power amplifier circuit also includes a first harmonic suppression unit, a second harmonic suppression unit, a third harmonic suppression unit and a fourth harmonic suppression unit, the first harmonic suppression unit is connected in series between the first output terminal and the ground terminal, the second harmonic suppression unit is connected in series between the second output terminal and the ground terminal, the third harmonic suppression unit is connected in series between the third output terminal and the ground terminal, and the fourth harmonic suppression unit is connected in series between the fourth output terminal and the ground terminal.

26. The radio frequency front-end module according to claim 25, characterized in that: The first harmonic suppression unit includes a first matching capacitor and a first matching inductor connected in series, the second harmonic suppression unit includes a second matching capacitor and a second matching inductor connected in series, the third harmonic suppression unit includes a third matching capacitor and a third matching inductor connected in series, and the fourth harmonic suppression unit includes a fourth matching capacitor and a fourth matching inductor connected in series.

27. The radio frequency front-end module according to any one of claims 1 to 20, characterized in that: The setting area of ​​the power amplifier chip is divided into a first chip area and a second chip area by the first central axis, the first balun is axially symmetrically arranged with respect to the second central axis of the first chip area, the first balun is axially symmetrically arranged with respect to the third central axis of the second chip area, and the first central axis, the second central axis and the third central axis are parallel to each other.

28. The radio frequency front-end module according to claim 27, characterized in that: The first power amplification branch also includes a first power amplification module, a third balun and a second power amplification module connected in sequence; the second power amplification module is a differential power amplification module, and two output ends of the second power amplification module are respectively the first output end and the second output end of the first power amplification branch; The second power amplifier branch also includes a third power amplifier module, a fourth balun and a fourth power amplifier module connected in sequence; the fourth power amplifier module is a differential power amplifier module, and the two output ends of the fourth power amplifier module are respectively the third output end and the fourth output end of the second power amplifier branch.

29. The radio frequency front-end module according to claim 28, characterized in that: The third balun comprises a third primary side and a third secondary side coupled to each other, one end of the third primary side is connected to the output end of the first power amplifier module, the other end of the third primary side is grounded, and two ends of the third secondary side are respectively connected to two input ends of the second power amplifier module; The fourth balun includes a fourth primary side and a fourth secondary side coupled to each other, one end of the fourth primary side is connected to the output end of the third power amplifier module, the other end of the fourth primary side is grounded, and the two ends of the fourth secondary side are respectively connected to the two input ends of the fourth power amplifier module.

30. The radio frequency front-end module according to claim 29, characterized in that: The power amplifier circuit further includes a third capacitor and a fourth capacitor, the third capacitor is connected to the third balun, a first end of the third capacitor is connected to the midpoint of the third secondary side, and a second end of the third capacitor is grounded; The fourth capacitor is connected to the fourth balun, a first end of the fourth capacitor is connected to a midpoint of the fourth secondary side, and a second end of the fourth capacitor is grounded.

31. The radio frequency front-end module according to claim 30, characterized in that: The third capacitor and the fourth capacitor are respectively chip capacitors arranged on the surface of the power amplifier chip.

32. The radio frequency front-end module according to claim 28, characterized in that: The first power amplification module comprises a first power amplification unit and a second power amplification unit, the input end of the first power amplification unit is connected to the input end of the power amplifier, the second power amplification unit is a single-ended power amplification unit, and the output end of the second power amplification unit is the output end of the first power amplification module; The third power amplifier module includes a third power amplifier unit and a fourth power amplifier unit, the input end of the third power amplifier unit is connected to the input end of the power amplifier, the fourth power amplifier unit is a single-ended power amplifier unit, and the output end of the fourth power amplifier unit is the output end of the second power amplifier module.

33. The RF front-end module according to claim 32, characterized in that: The RF front-end module also includes a first power supply end and a second power supply end provided on the substrate, the first power amplification unit and the second power amplification unit are respectively connected to the first power supply end, the second power amplification module is connected to the second power supply end through the first balun, the third power amplification unit and the fourth power amplification unit are respectively connected to the first power supply end, and the fourth power amplification module is connected to the second power supply end through the second balun.

34. The RF front-end module according to claim 33, characterized in that: The power supply end of the first power amplification unit and the power supply end of the second power amplification unit are respectively connected to the first power supply end, and the second power supply end is connected to the midpoint of the first primary side; The power supply end of the third power amplification unit and the power supply end of the fourth power amplification unit are respectively connected to the first power supply end, and the second power supply end is connected to the midpoint of the second primary side.

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