Design method of inner-layer circuit board
By optimizing the design parameters of the inner circuit board, including the minimum spacing from hole to copper, hole ring, wire, pad and small gap design, the problems of long-term reliability and thermal stress of the inner circuit board in the prior art are solved, and higher system reliability is achieved.
Patent Information
- Application Number
- CN202411846689.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-16
- Publication Date
- 2025-03-14
- Estimated Expiration
- 2044-12-16
AI Technical Summary
The design of existing inner circuit boards is difficult to improve their long-term reliability, especially in reducing the impact of thermal stress on components.
By optimizing the minimum spacing design of holes to copper, hole ring design, wire design, pad design, and small gap design, the reliability of the connection of inner line components is improved, and by optimizing the parameters of heat dissipation pads, the impact of thermal stress on the components is reduced.
It improves the long-term reliability of the inner circuit board, reduces the impact of thermal stress on the components, and thus improves the long-term reliability of the system.
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Figure CN119629861A_ABST
Abstract
Description
Technical Field
[0001] The invention relates to the technical field of printed circuit board manufacturing, and in particular to a design method for an inner layer circuit board. Background Art
[0002] Inner circuits can provide good signal integrity protection and reduce the impact of external interference on the signal. With the development of printed circuit board technology, more and more devices use printed circuit boards to integrate and optimize internal circuits. Reasonable design of inner circuits can not only reduce the defect rate in the production process, but also help dissipate heat, reduce the impact of thermal stress on components, and improve the long-term reliability of the system.
[0003] The object of the present invention is to provide a design method for an inner layer circuit board to improve the reliability of the inner layer circuit. Summary of the invention
[0004] The technical problem to be solved by the present invention is to provide a design method for an inner layer circuit board, which can improve the long-term reliability of the circuit board.
[0005] The technical solution of the present invention is as follows:
[0006] A method for designing an inner layer circuit board, comprising:
[0007] Hole to copper spacing design: When the inner layer circuit is 4 layers, the minimum spacing from PTH hole to copper is 5.5mil, the minimum spacing from NPTH hole to copper is 6mil, the minimum spacing from inner round hole to substrate circle is 5mil, and the minimum spacing from inner short slot hole to substrate circle is 6.5mil; When the inner layer circuit is 6 layers, the minimum spacing from PTH hole to copper is 6mil, the minimum spacing from NPTH hole to copper is 6.5mil, the minimum spacing from inner round hole to substrate circle is 6mil, and the minimum spacing from inner short slot hole to substrate circle is 6. 5mil; when the inner layer circuit is 8 layers, the minimum spacing from PTH hole to copper is 6.5mil, the minimum spacing from NPTH hole to copper is 7mil, the minimum spacing from inner round hole to substrate circle is 6.5mil, and the minimum spacing from inner short slot hole to substrate circle is 7mil; when the inner layer circuit is ≥10 layers, the minimum spacing from PTH hole to copper is 7mil, the minimum spacing from NPTH hole to copper is 7.5mil, the minimum spacing from inner round hole to substrate circle is 7mil, and the minimum spacing from inner short slot hole to substrate circle is 8mil;
[0008] Angle ring design: For copper circuits with a thickness of 1oz or less, the solder ring before compensation is ≥4mil, and the local cutting after compensation is a minimum of 3.5mil, and teardrop design is added to the annular rings of all inner layer circuits;
[0009] Conductor design: The line width of the functional connection conductor is ≥ the finished line width of the minimum base copper design;
[0010] Non-functional pad design: single-sided solder ring ≥8mil, slot ≥10mil;
[0011] Small gap design: Non-functional small gaps less than or equal to 5 mil are filled with copper; gaps with isolated copper spacing less than 10 mil are filled with copper;
[0012] Heat dissipation pad design: heat dissipation welding ring ≥6mil, heat dissipation copper bridge ≥6mil, copper bridge substrate circle finished product ≥5mil; when the heat dissipation pad intersects with the isolation pad, the integrity of the isolation pad shall be prioritized.
[0013] Furthermore, the minimum finished line width of the bottom copper is ≥3mil, and the film line width is ≥(3mil+compensation value).
[0014] Furthermore, when the heat dissipation pad intersects the isolation pad, the width of the solder ring of the 4-layer board is 6 mil, and the width of the solder ring of the 6-layer board is 8 mil.
[0015] Compared with the prior art, the design method of the inner layer circuit board provided by the present invention has the following beneficial effects:
[0016] The design method of the inner layer circuit board provided by the present invention improves the reliability of the connection of the inner layer circuit components by optimizing parameters such as the minimum spacing design from the hole to the copper, the hole ring design, the wire design, the pad design, and the fine gap design, and reduces the influence of thermal stress on the components by optimizing the parameters of the heat dissipation pad, thereby improving the long-term reliability of the system. BRIEF DESCRIPTION OF THE DRAWINGS
[0017] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.
[0018] Figure 1 is a schematic diagram of the heat dissipation pad in the present invention;
[0019] Figure 2 It is a schematic diagram of the isolation pad and the heat dissipation pad intersecting in the present invention. DETAILED DESCRIPTION
[0020] In order to enable those skilled in the art to better understand the technical solutions in the embodiments of the present invention and to make the above-mentioned objects, features and advantages of the present invention more obvious and understandable, the specific implementation modes of the present invention are further described below.
[0021] It should be noted that the description of these embodiments is used to help understand the present invention, but does not constitute a limitation of the present invention. In addition, the technical features involved in each embodiment of the present invention described below can be combined with each other as long as there is no conflict between them.
[0022] A method for designing an inner layer circuit board, comprising:
[0023] Hole to copper spacing design: When the inner layer circuit is 4 layers, the minimum spacing from PTH hole to copper is 5.5mil, the minimum spacing from NPTH hole to copper is 6mil, the minimum spacing from inner round hole to substrate circle is 5mil, and the minimum spacing from inner short slot hole to substrate circle is 6.5mil; When the inner layer circuit is 6 layers, the minimum spacing from PTH hole to copper is 6mil, the minimum spacing from NPTH hole to copper is 6.5mil, the minimum spacing from inner round hole to substrate circle is 6mil, and the minimum spacing from inner short slot hole to substrate circle is 6. 5mil; when the inner layer circuit is 8 layers, the minimum spacing from PTH hole to copper is 6.5mil, the minimum spacing from NPTH hole to copper is 7mil, the minimum spacing from inner round hole to substrate circle is 6.5mil, and the minimum spacing from inner short slot hole to substrate circle is 7mil; when the inner layer circuit is ≥10 layers, the minimum spacing from PTH hole to copper is 7mil, the minimum spacing from NPTH hole to copper is 7.5mil, the minimum spacing from inner round hole to substrate circle is 7mil, and the minimum spacing from inner short slot hole to substrate circle is 8mil;
[0024] Angle ring design: For copper circuits with a thickness of 1oz or less, the solder ring before compensation is ≥4mil, and the local cutting after compensation is a minimum of 3.5mil. In addition, teardrop design is added to the annular rings of all inner circuits to ensure the reliability of circuit connection. For solder rings with a copper thickness greater than 1oz, the compensation is increased by 1mil for every additional 1oz, and the corresponding compensation value needs to be adjusted according to the first piece to be etched;
[0025] Conductor design: The line width of the functional connection conductor is ≥ the finished line width of the minimum bottom copper design, such as the minimum finished line width of Hoz bottom copper is ≥3mil, the film line width is ≥ (3mil + compensation value), and as the bottom copper thickness increases, the minimum finished line width is ≥3mil;
[0026] Non-functional pad design: single-sided solder ring ≥8mil, slot ≥10mil;
[0027] Small gap design: Non-functional small gaps less than or equal to 5 mil are filled with copper; gaps with isolated copper spacing less than 10 mil are filled with copper;
[0028] Heat dissipation pad design: Figure 1 As shown, the heat dissipation welding ring A≥6mil, the heat dissipation copper bridge B≥6mil, and the copper bridge substrate circle finished product C≥5mil; Figure 2 As shown, Figure 2 a and Figure 2 b represents the different intersection degrees of the heat dissipation pad and the isolation pad. When the heat dissipation pad intersects with the isolation pad, the integrity of the isolation pad is met, and the solder ring width of the 4-layer board is 6 mil, and the solder ring width of the 6-layer board is 8 mil.
[0029] The design method of the inner layer circuit board provided by the present invention improves the reliability of the connection of the inner layer circuit components by optimizing parameters such as the minimum spacing design from the hole to the copper, the hole ring design, the wire design, the pad design, and the fine gap design, and reduces the influence of thermal stress on the components by optimizing the parameters of the heat dissipation pad, thereby improving the long-term reliability of the system.
[0030] The embodiments of the present invention are described in detail above, but the present invention is not limited to the described embodiments. For those skilled in the art, various changes, modifications, substitutions and variations made to these embodiments without departing from the principles and spirit of the present invention are still within the protection scope of the present invention.
Claims
1. A design method for an inner layer circuit board, characterized in that: include: Hole to copper spacing design: When the inner layer circuit is 4 layers, the minimum spacing from PTH hole to copper is 5.5mil, the minimum spacing from NPTH hole to copper is 6mil, the minimum spacing from inner round hole to substrate circle is 5mil, and the minimum spacing from inner short slot hole to substrate circle is 6.5mil; When the inner layer circuit is 6 layers, the minimum spacing from PTH hole to copper is 6mil, the minimum spacing from NPTH hole to copper is 6.5mil, the minimum spacing from inner round hole to substrate circle is 6mil, and the minimum spacing from inner short slot hole to substrate circle is 6. 5mil; when the inner layer circuit is 8 layers, the minimum spacing from PTH hole to copper is 6.5mil, the minimum spacing from NPTH hole to copper is 7mil, the minimum spacing from inner round hole to substrate circle is 6.5mil, and the minimum spacing from inner short slot hole to substrate circle is 7mil; when the inner layer circuit is ≥10 layers, the minimum spacing from PTH hole to copper is 7mil, the minimum spacing from NPTH hole to copper is 7.5mil, the minimum spacing from inner round hole to substrate circle is 7mil, and the minimum spacing from inner short slot hole to substrate circle is 8mil; Angle ring design: For copper circuits with a thickness of 1oz or less, the solder ring before compensation is ≥4mil, and the local cutting after compensation is a minimum of 3.5mil, and teardrop design is added to the annular rings of all inner layer circuits; Conductor design: The line width of the functional connection conductor is ≥ the finished line width of the minimum base copper design; Non-functional pad design: single-sided solder ring ≥8mil, slot ≥10mil; Small gap design: Non-functional small gaps less than or equal to 5 mil are filled with copper; gaps with isolated copper spacing less than 10 mil are filled with copper; Heat dissipation pad design: heat dissipation welding ring ≥6mil, heat dissipation copper bridge ≥6mil, copper bridge substrate circle finished product ≥5mil; when the heat dissipation pad intersects with the isolation pad, the integrity of the isolation pad shall be prioritized.
2. The method for designing an inner layer circuit board according to claim 1, characterized in that: The minimum finished copper line width is ≥3mil, and the film line width is ≥(3mil+compensation value).
3. The design method of the inner layer circuit board according to claim 1, characterized in that: When the heat sink pad intersects the isolation pad, the solder ring width is 6 mil for the 4-layer board and 8 mil for the 6-layer board.
Citation Information
Patent Citations
Method for manufacturing circuit board with uniformly plated holes
CN113068327A
Circuit board hole ring design method
CN118946012A
Simultaneous and selective wide gap partitioning of via structures using plating resist
US20190075662A1
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