A Method for Single-Side Polishing of 8-Inch Silicon Carbide Wafers

By reasonably setting the positions of silicon carbide wafers and ceramic disks on the existing single-sided polishing machine, and using small-sized wafer assistance to optimize the polishing cloth and tank body design, the problem of poor polishing effect of 8-inch silicon carbide wafers is solved, achieving efficient and low-cost polishing effect, and improving equipment utilization and production efficiency.

CN119635420BActive Publication Date: 2025-07-29JIANGSU CHAOXINXING SEMICON CO LTD
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Patent Information

Application Number
CN202411847283.3
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2024-12-16
Publication Date
2025-07-29
Estimated Expiration
2044-12-16

AI Technical Summary

Technical Problem

Existing single-sided polishing machines are difficult to effectively polish 8-inch silicon carbide wafers, and the cost of replacing large equipment is high, resulting in poor polishing effects and increased production costs.

Method used

Use ceramic disks with a radius of less than 8 inches to reasonably set the positional relationship between silicon carbide wafers and ceramic disks, and use small-sized wafers as auxiliary tools to optimize the polishing cloth and tank design to ensure the mechanical balance of the polishing process and the uniformity of the liquid distribution.

Benefits of technology

It reduces production costs, improves polishing efficiency and quality, ensures wafer surface flatness, and increases equipment utilization and production efficiency.

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Abstract

The present invention relates to a method for single-sided polishing of 8-inch silicon carbide wafers. A ceramic disc with a radius less than 8 inches is used to perform single-sided polishing on 8-inch silicon carbide wafers. By reasonably setting the distances between the wafer, the ceramic disc, and the polishing disc, the mechanical balance and efficient polishing during the polishing process are ensured. The optimized designs of the polishing cloth and the tank body further enhance the fluidity and uniformity of the polishing liquid. Using small-sized wafers as auxiliary tools improves the stability and processing flexibility of the polishing process, enabling the surface flatness of the polished wafers to meet the requirements of actual production. At the same time, the production cost is significantly reduced, and the equipment utilization rate and production efficiency are improved. The present invention provides a highly efficient, low-cost, and flexible method for polishing silicon carbide wafers, with significant economic benefits and practical value.
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Description

Technical Field

[0001] The present invention relates to the technical field of polishing, and particularly to a method for single-sided polishing of 8-inch silicon carbide wafers. Background Art

[0002] Please refer to Figures 1 to 3 As shown, in the prior art, the rough polishing and fine polishing of some silicon carbide wafers are usually carried out by a single-sided polishing machine. The single-sided polishing machine provides a plurality of loading blocks that can vacuum-adsorb ceramic disks. Each loading block vertically presses the ceramic disk bonded with multiple silicon carbide wafers above the horizontally arranged polishing disk. The polishing surface of the silicon carbide required is pressed downward and contacts the polishing layer provided on the surface of the polishing disk. Finally, the polishing disk and the ceramic disk rotate respectively to complete the polishing work of the silicon carbide wafer.

[0003] Among them, the loading blocks provided by the existing single-sided polishing machines can often only adsorb ceramic disks within a set size, and cannot support the selection diameter of the ceramic disks to vary within a large range. As a result, the types of sizes of silicon carbide wafers that can be bonded and polished by the ceramic disks are fixed. For example, the diameter of the ceramic disk that can be adsorbed by the loading block of the single-sided polishing machine is 360 mm. Usually, only 2 to 3 pieces of 6-inch silicon carbide wafers can be symmetrically bonded along the center of the ceramic disk for single-sided polishing work, and it is difficult to carry out the polishing work of larger-size silicon carbide wafers.

[0004] When the diameter of the ceramic disk is less than 400 mm, the diameter of the 8-inch silicon carbide wafer is already greater than the radius of the ceramic disk. No matter how the 8-inch silicon carbide wafer is placed, a certain part of the wafer will surely be located in the central area of the ceramic disk. The linear velocity of the central area of the ceramic disk is relatively low during the rotation of the ceramic disk, and the corresponding material removal effect is poor, resulting in a poor overall TTV value of the silicon carbide wafer. However, if a ceramic disk that can be circumferentially bonded and arranged with multiple 8-inch silicon carbide wafers is required for polishing work, a single-sided polishing machine with a larger size needs to be customized again, and the required cost is relatively high. At present, most domestic 8-inch silicon carbide wafer products are for small-batch trial production. Therefore, there is a need for a method for single-sided polishing of 8-inch silicon carbide wafers that can use a single-sided polishing machine with a smaller size to polish 8-inch silicon carbide wafers, and the surface flatness after polishing can meet the actual production requirements. Summary of the Invention

[0005] At present, most domestic 8-inch silicon carbide wafer products are for small-batch trial production. Therefore, there is a need for a method for single-sided polishing of 8-inch silicon carbide wafers that can use a single-sided polishing machine with a smaller size to polish 8-inch silicon carbide wafers, and the surface flatness after polishing can meet the actual production requirements.

[0006] A method for single-sided polishing of silicon carbide wafers includes the following steps:

[0007] S1. Place the edge of the first silicon carbide wafer near the edge of the ceramic disc, and the edge of the ceramic disc is near the edge of the polishing disc.

[0008] S2. Take two second silicon carbide wafers and place them in the empty area of the ceramic disc. The distances from the centers of the two second silicon carbide wafers to the center of the first silicon carbide wafer are the same.

[0009] S3. Draw a circular ring with O1 as the center. The outer and inner rings of the circular ring intersect with the straight line AB respectively, and the two intersection points are respectively on the left and right sides of O2. The distance between the outer ring intersection point and O2 is l1, and the distance between the inner ring intersection point and O2 is l2. And l1, l2 and O2O3 should satisfy: O2O3 ≤ l2 ≤ l1.

[0010] S4. Open additional grooves on the polishing cloth within the two circular ring ranges in step S3, and open new grooves along the diagonal of the smallest square unit formed by surrounding the original grooves.

[0011] S5. After the above settings are completed, rough polish the Si side and C side of the first silicon carbide wafer respectively.

[0012] As a preferred technical solution of a method for single-sided polishing of silicon carbide wafers, the distance between the edge of the first silicon carbide wafer and the edge of the ceramic disc is 2 mm to 10 mm, and the distance between the edge of the ceramic disc and the edge of the polishing disc is 10 mm to 50 mm.

[0013] As a preferred technical solution of a method for single-sided polishing of silicon carbide wafers, the nearest point on the first silicon carbide wafer to the edge of the ceramic disc is marked as point A. Draw a straight line from point A passing through the center O3 of the first silicon carbide wafer, and the intersection point of this straight line and the other edge of the first silicon carbide wafer is B. At the same time, this straight line also passes through the center O2 of the ceramic disc.

[0014] As a preferred technical solution of a method for single-sided polishing of silicon carbide wafers, mark the center of one of the second silicon carbide wafers as O 4, [[ID=...]]Connect O2O4, and the included angle formed by O2O4 and O2B is α. α should satisfy: 30° ≤ α ≤ 60°.

[0015] As a preferred technical solution of a method for single-sided polishing of silicon carbide wafers, the initial use thickness δ achieved by the two second silicon carbide wafers through the thinning process should satisfy: 482 μm ≤ δ ≤ 485 μm.

[0016] As a preferred technical solution of a method for single-sided polishing of silicon carbide wafers, the included angle between the new groove and the original groove is 30° to 60°.

[0017] As a preferred technical solution of a method for single-sided polishing of silicon carbide wafers, the two ends of the new groove are symmetrically arranged along the diagonal of the smallest square unit. It should be noted that there seems to be an incomplete tag "ID=..." in the original content. I have translated as much as possible based on the provided text. If you can correct or complete the content, it will be more conducive to accurate translation.

[0018] As a preferred technical solution of a single-sided polishing method for silicon carbide wafers, when flipping the first silicon carbide wafer between two rough polishing steps, the side of the first silicon carbide wafer that is close to the edge of the ceramic disk during the first rough polishing should be located near the vicinity of O2 after flipping.

[0019] As a preferred technical solution of a single-sided polishing method for silicon carbide wafers, the size of the first silicon carbide wafer is 8 inches, and the size of the second silicon carbide wafer is 4 inches.

[0020] Advantages of the present invention:

[0021] The present invention uses a ceramic disk with a radius less than 8 inches to perform single-sided polishing on an 8-inch silicon carbide wafer, making full use of existing equipment and avoiding the high cost of purchasing large-scale polishing equipment. By reasonably setting the positional relationship between the silicon carbide wafer and the ceramic disk, the mechanical balance and polishing efficiency during the polishing process are ensured, enabling the surface flatness of the polished wafer to meet the actual production requirements. This not only improves the polishing effect but also significantly reduces the production cost.

[0022] At the same time, the present invention also cleverly uses the remaining small-sized wafers as auxiliary polishing tools. By setting small-sized wafers in the empty area of the ceramic disk, the load on the ceramic disk can be effectively balanced, ensuring the stability during the polishing process and avoiding vibrations and deviations caused by unbalanced loads. This method not only improves the polishing quality but also increases the flexibility of the processing process, enabling wafers of different sizes to be processed on the same equipment, greatly improving the equipment utilization rate and production efficiency.

[0023] In addition, through the optimized design of the polishing cloth and the tank body, the fluidity and distribution uniformity of the polishing liquid during the polishing process are further enhanced, ensuring that each wafer surface can be evenly and effectively polished. This design not only improves the polishing effect but also extends the service life of the polishing cloth, further reducing the production cost.

[0024] In summary, the present invention provides a single-sided polishing method for 8-inch silicon carbide wafers that is efficient, low-cost, and highly flexible. It not only has significant innovation in technology but also has important economic benefits and practical value in actual applications. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] Figure 1 It is a schematic structural diagram of a polishing disk and a ceramic disk;

[0026] Figure 2 It is a schematic assembly diagram for polishing a 6-inch silicon carbide wafer;

[0027] Figure 3 It is a schematic assembly diagram for polishing an 8-inch silicon carbide wafer;

[0028] Figure 4 Schematic diagram of the polishing assembly for 8-inch and 4-inch silicon carbide wafers;

[0029] Figure 5 Schematic diagram for adjusting the polishing cloth;

[0030] Figure 6 Schematic diagram of the structure with additional grooves opened in the polishing cloth within two circular rings;

[0031] Figure 7 Schematic diagram of the structure with grooves opened in the original polishing cloth;

[0032] Figure 8 Schematic diagram of the structure with grooves opened in the current polishing cloth;

[0033] Figure 9 Partial schematic diagram of the original groove;

[0034] Figure 10 Partial schematic diagram of the current groove;

[0035] Figure 11 Schematic diagram of the polishing assembly for 8-inch silicon carbide wafers;

[0036] Figure 12 Schematic diagram of the area affected by the circular rings when the wafer is at different self-rotation positions

[0037] Figure 13 Thickness analysis diagram of the third group of data in Example 1, (a) top plane schematic diagram, (b) thickness distribution schematic diagram;

[0038] Figure 14 Thickness analysis diagram of the fourth group of data in Example 1, (a) top plane schematic diagram, (b) thickness distribution schematic diagram;

[0039] Figure 15 Thickness analysis diagram of the third group of data in Comparative Example 1, (a) top plane schematic diagram, (b) thickness distribution schematic diagram; Detailed implementation manners

[0040] To make the above objects, features, and advantages of the present invention more obvious and understandable, the following describes the detailed implementation manners of the present invention in conjunction with the embodiments of the specification.

[0041] In the following description, many specific details are set forth to facilitate a thorough understanding of the present invention. However, the present invention may be implemented in other ways different from those described herein. Those skilled in the art can make similar generalizations without departing from the connotation of the present invention. Therefore, the present invention is not limited by the specific embodiments disclosed below.

[0042] Secondly, the "one embodiment" or "embodiment" referred to herein means a specific feature, structure, or characteristic that may be included in at least one implementation manner of the present invention. The phrase "in one embodiment" that appears in different places in this specification does not necessarily refer to the same embodiment, nor is it an individual or alternative embodiment that is mutually exclusive with other embodiments.

[0043] Embodiment 1

[0044] The present invention provides a method for single-sided polishing of 8-inch silicon carbide wafers, which improves the original polishing method of 8-inch silicon carbide wafers and mainly solves the problem of poor polishing effect of silicon carbide wafers at the center position of the ceramic disc. The specific steps are as follows:

[0045] In the first step, please refer to Figure 4 As shown, set the edge of the 8-inch silicon carbide wafer close to the edge of the ceramic disc, so that the distance between the edge of the 8-inch silicon carbide wafer and the edge of the ceramic disc is 2 mm to 10 mm; the edge of the ceramic disc is close to the edge of the polishing disc, and the distance between the edge of the ceramic disc and the edge of the polishing disc is 10 mm to 50 mm;

[0046] It should be noted that when the distance from the edge is too large, the speed limit of the silicon carbide wafer is relatively small, which will have a certain impact on the polishing effect. When the distance from the edge is too small, due to the influence of the equipment accuracy, it is not necessarily possible to ensure that the load position remains unchanged all the time. If it exceeds the range of the lower large disc, it will pose a risk to the equipment and the wafer. Therefore, a safety distance needs to be reserved in the design.

[0047] In addition, the nearest point on the 8-inch silicon carbide wafer to the edge of the ceramic disc is marked as point A. Draw a straight line passing through the center O3 of the first silicon carbide wafer from point A, and the intersection of this straight line and the other edge of the first silicon carbide wafer is B. At the same time, this straight line also passes through the center O2 of the ceramic disc. By marking point A and drawing a straight line, the position of the wafer on the ceramic disc is accurately determined. This straight line passes through the center O3 of the wafer and the center O2 of the ceramic disc, ensuring the symmetric positioning of the wafer on the ceramic disc, which is helpful for the precise operation of subsequent polishing steps; the setting of this straight line enables the wafer to maintain uniform stress during the polishing process, avoiding the phenomenon of uneven stress caused by position deviation. Especially when flipping the wafer, it ensures that different parts of the wafer can be evenly stressed at different positions, improving the uniformity and quality of polishing.

[0048] In the second step, take two 4-inch silicon carbide wafers and set them in the empty area of the ceramic disc. The distances from the centers of the two 4-inch silicon carbide wafers to the center of the 8-inch silicon carbide wafer are the same, so as to balance the load of the wafers on the ceramic disc during polishing. Mark the center of one of the 4-inch silicon carbide wafers as O 2,Connect O2O4. The included angle α formed by O2O4 and O2B should satisfy: 30° ≤ α ≤ 60°, and it is arranged near the edge of the ceramic disc at the edge of the 4-inch silicon carbide wafer. When the included angle is too large or too small, the wafer load center on the ceramic disc will be shifted to the left or right, thus affecting the polishing effect.

[0049] It should be noted that the initial use thickness δ achieved by the two 4-inch silicon carbide wafers through the thinning process should satisfy: 482μm ≤ δ ≤ 485μm, so as to balance the load and improve the polishing effect.

[0050] The third step is to adjust the polishing cloth. Please refer to Figure 5 As shown, make two rings with O1 as the center. That is, O1 is the center of the polishing disc. The outer ring and the inner ring of the ring intersect with the straight line AB respectively, and the two intersection points are located on the left and right sides of O2 respectively. The distance between the outer ring intersection point and O2 is l1, and the distance between the inner ring intersection point and O2 is l2. And l1, l2 and O2O3 should satisfy: O2O3 ≤ l2 ≤ l1.

[0051] It should be noted that point O3 and point O3 are symmetrical, and the ring range formed between the two points is the minimum design area of the ring of the present invention. Refer to Figure 5 and 12 the shaded area diagram. In order to ensure that the shaded area is roughly uniform, the outer ring should be appropriately moved outwards, thereby improving the polishing effect.

[0052] Specifically, by appropriately moving the outer ring outwards, the coverage area of the polishing cloth in the high-speed area can be increased, ensuring that the polishing cloth can always maintain effective contact with the wafer surface during the polishing process. The linear velocity near point O2 of the silicon carbide wafer is relatively small, and the polishing effect is relatively poor compared to other places. Through the above design, the polishing efficiency at the place with a relatively small linear velocity can be improved. This adjustment can also balance the pressure distribution in different areas during the polishing process, avoiding uneven polishing caused by excessive or too small local pressure, thereby improving the surface flatness of the polished wafer. Through the reasonable design and adjustment of the polishing cloth and the ring, the present invention not only improves the polishing efficiency and effect, but also extends the service life of the polishing cloth and reduces the production cost.

[0053] The fourth step is to, as shown in Figures 6 to 10, additionally open slots in the polishing cloth within the range of the two rings in the third step, and open new slots along the diagonal of the smallest square unit formed by surrounding the original slots.

[0054] It should be noted that the included angle between the new slot and the original slot is 30° to 60°, and the two ends of the new slot are symmetrically arranged along the diagonal of the smallest square unit, increasing the polishing liquid flow rate within the ring range, thereby enhancing the rough polishing effect on the silicon carbide wafer within the ring range.

[0055] Specifically, the openings at both ends of the new groove are symmetrically arranged along the diagonal of the smallest square unit, which can ensure a more reasonable and efficient flow path of the polishing liquid in the groove body. This symmetrical arrangement helps to balance the liquid pressure on the polishing cloth and avoid the problem of poor local polishing effect caused by uneven liquid distribution during the polishing process.

[0056] By opening a new groove within the circular ring range, the flow rate of the polishing liquid has been significantly increased, thereby enhancing the rough polishing effect on the silicon carbide wafer. This design enables the polishing liquid to reach every corner of the polishing area faster and more evenly, ensuring sufficient and uniform liquid supply throughout the polishing process. Especially in the edge area of the wafer, the increased liquid flow rate can effectively improve the polishing efficiency and reduce edge defects caused by insufficient polishing liquid.

[0057] In addition, the setting of the new groove can also reduce the wear of the polishing cloth during the polishing process, extend the service life of the polishing cloth, and further reduce the production cost. Through reasonable groove body design and liquid flow rate control, the present invention not only improves the polishing efficiency and effect, but also ensures the flatness and uniformity of the wafer surface.

[0058] Step 5, please refer to Figure 4 and 11 As shown, after the above settings are completed, the Si side and C side of the 8-inch silicon carbide wafer are rough polished respectively. When flipping the 8-inch silicon carbide wafer between the two rough polishings, the side of the 8-inch silicon carbide wafer that was close to the edge of the ceramic disc during the first rough polishing should be located near the O2 point after flipping, ensuring that the polishing loads on both sides of the silicon carbide wafer are the same after flipping, thereby improving the polishing effect;

[0059] It should be noted that this design takes into account the mechanical changes of the wafer at different positions during the polishing process. By flipping the wafer so that the edge area during the first rough polishing is close to the O2 point during the second rough polishing, it can ensure that all areas of the wafer are evenly stressed during the polishing process, thereby enhancing the overall polishing effect.

[0060] Specifically, during the first rough polishing, one side edge of the 8-inch silicon carbide wafer is at the edge position of the ceramic disc, so that the high-speed area at the edge of the ceramic disc can be used for effective polishing. By flipping the wafer, the side that was close to the edge of the ceramic disc during the first rough polishing is located near the O2 point after flipping, which can enable this area to be polished under different mechanical environments during the second polishing, thereby making up for possible deficiencies during the first polishing and further improving the polishing effect.

[0061] The flatness of the silicon carbide wafer after rough polishing was detected. The TTV (Total Thickness Variation) value of the whole sample (Table 1) and the thickness analysis images ( Figure 13 and Figure 14 ) were obtained using high-precision measurement equipment. The TTV value of the whole sample decreased significantly compared with before, and most of the data could meet the requirements (<10 μm), indicating that the polishing effect was improved.

[0062] The specific detection steps are as follows:

[0063] Flatness measurement: Use high-precision optical or mechanical measurement instruments to detect the flatness of the polished silicon carbide wafer, and record the thickness values of each point on the wafer surface.

[0064] Data analysis: Input the measurement data into a computer, and perform data analysis through special software to calculate the TTV value of the wafer. The smaller the TTV value, the smaller the thickness change on the wafer surface and the higher the flatness.

[0065] Image generation: Generate thickness analysis images based on the measurement data to show the thickness distribution of different positions on the wafer surface. The flatness of the wafer surface can be intuitively observed through the images.

[0066] The detection results show that the TTV value of the whole sample decreased significantly compared with before, and most of the data could meet the requirements (<10 μm). The specific data are shown in Table 1:

[0067] Table 1 TTV values of Example 1

[0068]

[0069]

[0070] Figure 13 and 14 The thickness analysis images further show the thickness distribution of the wafer surface. It can be clearly seen from the images that there is no obvious area with a high thickness in the middle position of the wafer, indicating that the thickness change on the wafer surface during the polishing process tends to be uniform and the polishing effect is good. Figure 13 shows the thickness distribution of the wafer surface before polishing, and it can be seen that there is an obvious area with a high thickness in the middle position. While Figure 14 shows the thickness distribution of the wafer surface after polishing, and the area with a high thickness in the middle position has disappeared, and the surface flatness has been significantly improved.

[0071] Through this rough polishing, the flatness of the surface of the silicon carbide wafer has been significantly improved, and the TTV value has been greatly reduced, indicating that the polishing process has effectively improved the quality of the wafer surface. This result verifies the significant advantages of the method of the present invention in improving the wafer polishing effect, providing a reliable technical guarantee for the production of high-quality silicon carbide wafers.

[0072] Comparative Example 1

[0073] The original single-sided rough polishing steps for 8-inch silicon carbide wafers are as follows:

[0074] Select 8-inch silicon carbide wafers as the polishing test samples. Before the experiment, ensure that the samples have all undergone front-end process treatments, such as grinding, chamfering, and thinning, etc.; among them, the diameter of the ceramic disk is 360 mm, and the diameter of the polishing disk is 914 mm;

[0075] Paste a polishing cloth above the horizontal surface of the polishing disk. The surface of the polishing cloth is evenly provided with grooves (the size of the square piece is (10 mm to 40 mm) * (10 mm to 40 mm), the groove width is 1 mm to 4 mm, and the groove depth is 0.5 mm to 2 mm); prepare the rough polishing liquid (KMnO4, Al2O3) and water according to a certain ratio (1:0.2 to 1) and set it aside for use;

[0076] Face the C side of the first sample outward, and align the center of the sample with the center of the ceramic disk to complete bonding and pasting. Adsorb the ceramic disk with the bonded sample below the loading block of the single-sided polishing machine. After setting the load, the loading block slowly descends until the sample is close to the polishing cloth. After setting the rotation speeds of the loading block and the polishing disk, start the polishing work. Among them, the loading block and the polishing disk rotate in the same direction. After the polishing is completed, remove the sample and prepare for Si side polishing;

[0077] Face the Si side of the first sample outward, and the remaining operations are the same as those for C side polishing to complete the Si side polishing of the sample.

[0078] Detect the flatness of this sample to obtain the overall TTV value (Table 2) and thickness analysis image of the sample ( Figure 15 ), and the overall TTV value of the sample is relatively large, and many data fail to meet the requirements (<10 μm).

[0079] The specific detection steps are as follows:

[0080] Flatness measurement: Use a high-precision optical or mechanical measurement instrument to detect the flatness of the polished silicon carbide wafer, and record the thickness values of each point on the wafer surface.

[0081] Data analysis: Input the measurement data into a computer and perform data analysis through special software to calculate the TTV value of the wafer. The smaller the TTV value, the smaller the thickness change on the wafer surface and the higher the flatness.

[0082] Image generation: Generate a thickness analysis image based on the measurement data to show the thickness distribution at different positions on the wafer surface. The flatness of the wafer surface can be visually observed through the image.

[0083] The test results show that the overall TTV value of the sample is relatively large, and many data fail to meet the requirements (<10 μm). The specific data are shown in Table 2:

[0084] Table 2 TTV values of Comparative Example 1

[0085] Polishing serial number TTV (um) 1 13.343 2 16.912 3 6.353 4 10.611 5 9.934 6 16.366 7 11.575

[0086] From the data in Table 2, it can be seen that the overall TTV value of the polished wafer is relatively large, and the TTV values at most measurement points exceed 10 μm, failing to meet the requirements of high-precision polishing.

[0087] From Figure 15 it can be seen that the thickness analysis image further shows the thickness distribution on the wafer surface. It can be clearly seen from the image that there is an area with significantly higher thickness in the middle of the wafer. This phenomenon is mainly due to the fact that during the polishing process, when the wafer rotates with the ceramic disc, the linear velocity at the center of the wafer is relatively small, resulting in poor polishing effect at this position. Therefore, there are significant changes in the flatness of the wafer at this position.

[0088] During the polishing process of the wafer, the polishing effect of the edge area is better due to the higher linear velocity, while the polishing effect of the middle area is poor due to the lower linear velocity, resulting in a higher thickness in the middle area. The subsequent processes cannot effectively eliminate the thickness protrusion at this place, thus affecting the overall polishing quality and the flatness of the wafer surface.

[0089] From the experimental comparison between Example 1 and Comparative Example 1, it can be concluded that Example 1 is significantly superior to Comparative Example 1 in many aspects. First, the TTV value of Example 1 is significantly reduced, and all data can meet the requirements (<10 μm). The specific data show that the thickness change on the surface of the polished wafer is small and the flatness is high. While the TTV value of Comparative Example 1 is relatively large, many data fail to meet the requirements (>10 μm), and the thickness analysis image shows that there is an area with significantly higher thickness in the middle of the wafer, and the polishing effect is not ideal.

[0090] In terms of thickness uniformity, Example 1 performs excellently, with high flatness and small thickness change on the surface of the polished wafer. In contrast, the thickness uniformity of Comparative Example 1 is poor, with large thickness changes on the wafer surface, higher thickness in the middle area, and low flatness. In terms of polishing effect, Example 1 improves the polishing efficiency and effect through optimized design, and the flatness of the surface of the polished wafer is significantly improved, with remarkable results. While Comparative Example 1 has poor polishing effect due to lack of optimized design, there are obvious defects on the wafer surface, and the middle position is under-polished.

[0091] In terms of polishing efficiency, in Example 1, through the optimized polishing cloth design and trough setting, the flow rate and distribution uniformity of the polishing liquid are increased, resulting in high polishing efficiency and remarkable effects. In Comparative Example 1, due to the unoptimized polishing cloth design and trough setting, the polishing liquid flow rate is insufficient, and the polishing efficiency in the middle area is low, with poor effects. In terms of cost-effectiveness, in Example 1, through the optimized design, the polishing effect and efficiency are improved, the rejection rate caused by uneven wafer thickness is reduced, and the production quality and cost-effectiveness are improved. On the contrary, in Comparative Example 1, due to the poor polishing effect and high rejection rate, the production quality is affected, and the production cost is increased.

[0092] In summary, Example 1 is significantly superior to Comparative Example 1 in terms of TTV value, thickness uniformity, polishing effect, polishing efficiency, and cost-effectiveness. Through the optimized design of Example 1, the polishing effect and production efficiency of silicon carbide wafers can be significantly improved, the rejection rate in production can be reduced, and the overall production quality and economic benefits can be improved. The optimized polishing cloth design and trough setting significantly improve the fluidity and distribution uniformity of the polishing liquid, resulting in a substantial improvement in the surface flatness and thickness uniformity of the polished wafers.

[0093] The above are only the preferred embodiments of the present invention and are not intended to limit the present invention. Although the present invention has been described in detail with reference to the foregoing embodiments, for those skilled in the art, they can still modify the technical solutions recorded in the foregoing embodiments, or perform equivalent replacements for some of the technical features. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included within the protection scope of the present invention.

Claims

1. A method for single-sided polishing of a silicon carbide wafer, characterized in that, It includes the following steps: S1. Set the edge of the first silicon carbide wafer near the edge of the ceramic disc, and the edge of the ceramic disc is near the edge of the polishing disc; the nearest point on the first silicon carbide wafer to the edge of the ceramic disc is marked as point A, draw a straight line passing through the center O3 of the first silicon carbide wafer from point A, and the intersection of this straight line and the other edge of the first silicon carbide wafer is B, and at the same time this straight line passes through the center O2 of the ceramic disc; S2. Take two second silicon carbide wafers and set them on the empty area of the ceramic disc, and the distances from the centers of the two second silicon carbide wafers to the center of the first silicon carbide wafer are the same; O1 is the center of the polishing pad. A circular ring is drawn with O1 as the center. The outer and inner rings of the circular ring intersect with the straight line AB respectively, and the two intersection points are located on the left and right sides of O2 respectively. The distance between the outer ring intersection point and O2 is l1, and the distance between the inner ring intersection point and O2 is l2. And l1, l2 and O2O3 should satisfy: ; S4. Open additional slots in the polishing cloth within the inner and outer ring ranges in step S3, and open new slots along the diagonal of the smallest square unit formed by surrounding the original slots; S5. After the above settings are completed, rough polish the Si surface and C surface of the first silicon carbide wafer respectively.

2. The single-sided polishing method of a silicon carbide wafer according to claim 1, wherein Make the distance between the edge of the first silicon carbide wafer and the edge of the ceramic disc be 2 mm to 10 mm, and the distance between the edge of the ceramic disc and the edge of the polishing disc be 10 mm to 50 mm.

3. The single-sided polishing method of a silicon carbide wafer according to claim 1, characterized in that Mark the center of one of the second silicon carbide wafers as O 4, Connect O2O4. The included angle formed by O2O4 and O2B is α, and α should satisfy: .

4. The single-sided polishing method of a silicon carbide wafer according to claim 1, wherein The initial use thickness δ achieved by thinning the two second silicon carbide wafers should satisfy: .

5. The single-sided polishing method of a silicon carbide wafer according to claim 1, wherein The included angle between the new slot and the original slot is 30° to 60°.

6. The single-sided polishing method of a silicon carbide wafer according to claim 1 or 5, characterized in that, The two ends of the new slot are symmetrically arranged along the diagonal of the smallest square unit.

7. The single-sided polishing method of a silicon carbide wafer according to claim 1, wherein When flipping the first silicon carbide wafer between two rough polishes, it should be ensured that the side of the first silicon carbide wafer near the edge of the ceramic disc during the first rough polish is located near O2 after flipping.

8. The method for single-sided polishing of a silicon carbide wafer according to claim 1, wherein The size of the first silicon carbide wafer is 8 inches, and the size of the second silicon carbide wafer is 4 inches.

Citation Information

Patent Citations

  • Technology for improving geometric parameters of 8-inch silicon wafer

    CN107855922A

  • Chain-bead-shaped silicon carbide nano material and preparation method and application thereof

    CN112661159A