Variable-gain large-current test circuit for chip automatic test and electronic equipment

Abstract

The embodiment of the invention provides a variable-gain large-current test circuit for chip automatic test and electronic equipment. The variable-gain large-current test circuit comprises a sensor module, a reference voltage calibration module, a first differential module and an output voltage determination module, wherein the sensor module is configured to generate a sampling voltage according to a sampling current; the reference voltage calibration module is configured to generate a target reference voltage according to the initial reference voltage, the initial reference voltage is related to the rated current of the chip, and the target reference voltage is related to the current range of the sensor module; the first differential module is configured to determine a conduction state according to the rated current of the chip and determine a conduction gain according to the target reference voltage and the sampling voltage; and the output voltage determination module is configured to determine a target output voltage according to the sensitivity of the sensor module, the sampling current of the sensor module and the conduction gain of the first differential module. And direct measurement of heavy current such as chip overload current and short-circuit current can be realized.

Description

Technical Field

[0001] Embodiments of the present disclosure relate to the technical field of integrated circuits and related technical fields, and in particular, to a variable gain high current test circuit and electronic equipment suitable for automatic chip testing. Background Art

[0002] Chip is the abbreviation of integrated circuit, also known as microcircuit, microchip, which is made by integrating various electronic components including semiconductor devices on a tiny dielectric substrate through a series of processes. Chips have the characteristics of good performance, long life and high reliability. Thanks to this, chips have become an indispensable part of modern electronic devices. At present, chips can be roughly divided into analog chips, digital chips and analog-digital hybrid chips. Although today's chip design and manufacturing processes and processes are very mature, it is still not guaranteed that the designed and manufactured chips can be directly put into mass production. Chips need to undergo a series of tests before they are officially put on the market.

[0003] Automatic test equipment (ATE) plays a very important role in the field of chip testing. After the chip is packaged, it is necessary to measure a variety of electrical parameters on the ATE machine. Current is a key test in ATE testing. In some test scenarios, we want to measure large currents such as short-circuit current, overload current or surge current.

[0004] However, the maximum current range of existing automatic testers, such as STS8200, is the 10A range of the FPVI channel. Measuring currents greater than 10A often requires conversion in the test program. There are errors in the measurement process itself, and a series of conversions such as amplification in the test program will further increase the error in current measurement. Therefore, the 10A current range of the existing tester is difficult to meet the current measurement requirements of the above application scenarios. Summary of the invention

[0005] The embodiments described herein provide a variable gain high current test circuit and electronic device for automatic chip testing, which solve the problems existing in the prior art.

[0006] According to a first aspect of the present disclosure, there is provided a variable gain high current test circuit for automatic chip testing, comprising: a sensor module, a reference voltage calibration module, a first differential module and an output voltage determination module;

[0007] Wherein, the sensor module is configured to generate a sampling voltage according to the sampling current;

[0008] The reference voltage calibration module is configured to generate a target reference voltage according to an initial reference voltage, wherein the initial reference voltage is related to a rated current of the chip, and the target reference voltage is related to a current range of the sensor module;

[0009] The first differential module is configured to determine a conduction state according to a rated current of the chip, and determine a conduction gain according to the target reference voltage and the sampling voltage;

[0010] The output voltage determination module is configured to determine a target output voltage according to the sensitivity of the sensor module, the sampling current of the sensor module and the conduction gain of the first differential module.

[0011] In some embodiments of the present disclosure, a second differential module is also included;

[0012] The second differential module is configured to generate a first initial output voltage and a second initial output voltage according to the target reference voltage and the sampling voltage, wherein the absolute values ​​of the first initial voltage and the second initial voltage are the same;

[0013] The first differential module is further configured to determine a conduction gain according to the first initial output voltage and the second initial output voltage.

[0014] In some embodiments of the present disclosure, the sensor module includes a current sensor, which is connected in series with the chip. The current sensor collects a sampling current flowing through the chip and generates a sampling voltage based on the sampling current coupling.

[0015] In some embodiments of the present disclosure, the reference voltage calibration module includes a first resistor, a second resistor, a third resistor, a fourth resistor, a first operational amplifier, a diode and a potentiometer, the first end of the first resistor and the first end of the diode are electrically connected to the initial reference voltage node, respectively, the second end of the first resistor is electrically connected to the first end of the third resistor and the positive input terminal of the first operational amplifier, respectively, the second end of the third resistor and the second end of the diode are electrically connected to the ground node, the first end of the resistance meter is electrically connected to the first end of the second resistor, the second end of the resistance meter is electrically connected to the reverse input terminal of the first operational amplifier, the third end of the resistance meter is electrically connected to the first end of the fourth resistor, the second end of the fourth resistor is electrically connected to the ground node, and the second end of the second resistor is electrically connected to the output terminal of the first operational amplifier.

[0016] In some embodiments of the present disclosure, the first differential module includes a first switch unit, a second switch unit and a differential unit;

[0017] Wherein, the first switch unit is configured to be turned off when the rated current of the chip is less than or equal to the first range, turned off when the rated current of the chip is greater than the first range and less than or equal to the second range, and turned on when the rated current of the chip is greater than the second range and less than or equal to the third range;

[0018] The second switch unit is configured to be turned off when the rated current of the chip is less than or equal to the first range, turned on when the rated current of the chip is greater than the first range and less than or equal to the second range, and turned off when the rated current of the chip is greater than the second range and less than or equal to the third range;

[0019] The differential unit is configured to generate a target output voltage according to a conduction state of the first switch unit and the second switch unit.

[0020] In some embodiments of the present disclosure, the first switch unit includes a first switch and a second switch, the second switch unit includes a third switch and a fourth switch, the differential unit includes a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor, a ninth resistor, a tenth resistor, an eleventh resistor, a twelfth resistor, a thirteenth resistor, a fourteenth resistor, a fifteenth resistor, a sixteenth resistor, a second operational amplifier, a first capacitor, a second capacitor, a third capacitor, a fourth capacitor, a fifth capacitor, a sixth capacitor, and a seventh capacitor, a first end of the fifth resistor receives a sampling voltage, a second end of the fifth resistor is electrically connected to a first end of the sixth resistor, a second end of the sixth resistor, a first end of the first switch, a first end of the third switch, a first end of the ninth resistor, and a first end of the third capacitor are respectively electrically connected to an inverting input end of the second operational amplifier, a second end of the first switch is respectively electrically connected to a first end of the seventh resistor and a first end of the first capacitor, a second end of the third switch is respectively electrically connected to a first end of the eighth resistor and a first end of the second capacitor, a second end of the seventh resistor, a second end of the first capacitor, a second end of the eighth resistor, a second end of the second capacitor, a second end of the ninth resistor The first end of the tenth resistor receives the target reference voltage, the second end of the tenth resistor is electrically connected to the first end of the eleventh resistor, the second end of the eleventh resistor, the first end of the fourth capacitor, the first end of the twelfth resistor, the first end of the fourth switch, and the first end of the second switch are electrically connected to the positive input terminal of the second operational amplifier, the second end of the fourth switch is electrically connected to the first end of the fifth capacitor and the first end of the thirteenth resistor, the second end of the second switch is electrically connected to the first end of the sixth capacitor and the first end of the fourteenth resistor, the second end of the fourth capacitor, the second end of the twelfth resistor, the second end of the fifth capacitor, the second end of the thirteenth resistor, the second end of the sixth capacitor, the second end of the fourteenth resistor, and the second end of the sixteenth resistor are electrically connected to the reverse output terminal of the second operational amplifier, and the second end of the sixteenth resistor and the second end of the seventh capacitor are electrically connected to the second output node.

[0021] In some embodiments of the present disclosure, the gain of the second differential module is zero, and the cutoff frequency of the second differential module is less than the switching frequency of the sensor module.

[0022] In some embodiments of the present disclosure, the second differential module includes a sixteenth resistor, a seventeenth resistor, an eighteenth resistor, a nineteenth resistor, a twentieth resistor, a twenty-first resistor, an eighth capacitor, a ninth capacitor, a tenth capacitor and a third operational amplifier, the first end of the sixteenth resistor receives the target reference voltage, the second end of the sixteenth resistor, the first end of the seventeenth resistor and the first end of the eighth capacitor are respectively electrically connected to the reverse input terminal of the third operational amplifier, the second end of the seventeenth resistor, the second end of the eighth capacitor and the first end of the eighteenth resistor are respectively electrically connected to the forward output terminal of the third operational amplifier, the second end of the eighteenth resistor and the first end of the tenth capacitor are electrically connected to the third output node, the first end of the nineteenth resistor receives the sampling voltage, the second end of the nineteenth resistor, the first end of the ninth capacitor and the first end of the twentieth resistor are respectively electrically connected to the forward input terminal of the third operational amplifier, the second end of the ninth capacitor, the second end of the twentieth resistor and the first end of the twenty-first resistor are respectively electrically connected to the reverse output terminal of the third operational amplifier, and the second end of the twenty-first resistor and the second end of the tenth capacitor are electrically connected to the fourth output node.

[0023] In some embodiments of the present disclosure, the target output voltage satisfies:

[0024] VoutsensorSG(1)

[0025] Wherein, Isensor is the sampling current of the sensor module, S is the sensitivity of the sensor module, and G is the conduction gain of the first differential module.

[0026] According to a second aspect of the present disclosure, an electronic device is provided, comprising the variable gain high current test circuit as described in any one of the first aspects.

[0027] The variable gain high current test circuit and electronic device for automatic chip testing provided by the embodiment of the present disclosure include a sensor module, a reference voltage calibration module, a first differential module and an output voltage determination module. The sensor module generates a sampling voltage according to a sampling current; the reference voltage calibration module generates a target reference voltage according to an initial reference voltage; the first differential module determines the conduction state according to the rated current of the chip, and determines the conduction gain according to the target reference voltage and the sampling voltage. By configuring the parameters of the reference voltage calibration module, the value of the target reference voltage generated by the reference voltage calibration module can be changed, thereby changing the current range of the sensor module, so that the sensor module can be used for direct measurement of large currents such as overload current and short circuit current, and then the target output voltage corresponding to the sampling current is determined by the acquisition current of the sensor module and the conduction gain determined by the first differential module, so as to realize the test of the current of the chip with different gains. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] In order to more clearly illustrate the technical solutions of the embodiments of the present disclosure, the drawings of the embodiments will be briefly described below. It should be noted that the drawings described below only relate to some embodiments of the present disclosure, but are not intended to limit the present disclosure, wherein:

[0029] Figure 1 It is a structural schematic diagram of a variable gain high current test circuit provided by an embodiment of the present disclosure;

[0030] Figure 2 is a structural schematic diagram of a sensor module provided by an embodiment of the present disclosure;

[0031] Figure 3 is a circuit structure diagram of a reference voltage calibration module provided by an embodiment of the present disclosure;

[0032] Figure 4 is a schematic diagram of a circuit structure of a first differential module provided in an embodiment of the present disclosure;

[0033] Figure 5 is a structural schematic diagram of another variable gain high current test circuit provided by an embodiment of the present disclosure;

[0034] Figure 6 It is a schematic diagram of the circuit structure of a second differential module provided in an embodiment of the present disclosure. DETAILED DESCRIPTION

[0035] In order to make the purpose, technical solution and advantages of the embodiments of the present disclosure clearer, the technical solution of the embodiments of the present disclosure will be clearly and completely described below in conjunction with the accompanying drawings. Obviously, the described embodiments are part of the embodiments of the present disclosure, rather than all of the embodiments. Based on the described embodiments of the present disclosure, all other embodiments obtained by those skilled in the art without creative work also fall within the scope of protection of the present disclosure.

[0036] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by a person skilled in the art to which the subject matter of the present disclosure belongs. It will be further understood that terms such as those defined in commonly used dictionaries should be interpreted as having a meaning consistent with their meaning in the context of the specification and the relevant art, and will not be interpreted in an idealized or overly formal form unless otherwise explicitly defined herein. As used herein, a statement that two or more parts are "connected" or "coupled" together shall mean that the parts are joined together directly or through one or more intermediate components.

[0037] In all embodiments of the present disclosure, terms such as “first” and “second” are used only to distinguish one component (or a part of a component) from another component (or another part of a component).

[0038] Unless the context clearly indicates otherwise, the singular form of the words used herein and in the appended claims includes the plural and vice versa. Thus, when referring to the singular, the plural form of the corresponding term is generally included. Similarly, the words "comprise" and "include" are to be interpreted as inclusive rather than exclusive. Likewise, the terms "include" and "or" should be interpreted as inclusive unless such interpretation is expressly prohibited herein. Where the term "example" is used herein, particularly when it is located after a group of terms, the "example" is merely exemplary and illustrative and should not be considered exclusive or comprehensive.

[0039] Based on the problems existing in the prior art, the present disclosure provides a variable gain high current test circuit for automatic chip testing. Figure 1 is a schematic diagram of a variable gain high current test circuit for automatic chip testing provided by an embodiment of the present disclosure, such as Figure 1 As shown, a variable gain high current test circuit for automatic chip testing includes: a sensor module 10, a reference voltage calibration module 20, a first differential module 30 and an output voltage determination module 40; wherein the sensor module 10 is configured to generate a sampling voltage according to a sampling current; the reference voltage calibration module 20 is configured to generate a target reference voltage according to an initial reference voltage, wherein the initial reference voltage is related to a rated current of the chip, and the target reference voltage is related to a current range of the sensor module; the first differential module 30 is configured to determine a conduction state according to the rated current of the chip, and determine a conduction gain according to the target reference voltage and the sampling voltage; the output voltage determination module 40 is configured to determine a target output voltage according to the sensitivity of the sensor module, the sampling current of the sensor module and the conduction gain of the first differential module.

[0040] It should be noted that the rated current of a chip refers to the maximum current that the chip can withstand when operating at rated voltage and rated power.

[0041] In a specific implementation, the sensor module is connected in series with the chip, and the sensor module collects the working current flowing through the chip, that is, the sampling current. The sensor module generates a sampling voltage corresponding to the sampling current by coupling according to the collected sampling current.

[0042] Since the working current of the chip collected by the sensor module is uncertain, the value of the reference voltage generated by the sensor module cannot be determined either. At this time, the current range of the sensor module is uncertain. By setting a reference voltage calibration module, the reference voltage calibration module calibrates the initial reference voltage to the target reference voltage, and determines the current range of the sensor module by calibrating the generated target reference voltage. By configuring the reference voltage calibration module, the target reference voltage generated by the reference voltage calibration module can be changed, thereby changing the current range of the sensor module, so that the sensor module can be used for direct measurement of large currents such as overload current and short-circuit current.

[0043] In a specific implementation, the reference voltage calibration module generates a target reference voltage according to the initial reference voltage of the sensor module, that is, by calibrating the initial reference voltage, a calibrated target reference voltage is obtained, and the target reference voltage is a determined value. Therefore, under the target reference voltage, the current range of the sensor module can be determined. By configuring the reference voltage calibration module, the target reference voltage generated by the reference voltage calibration module can be changed, thereby changing the current range of the sensor module. In a specific embodiment, when the target reference voltage generated by the reference voltage calibration module is less than 1.29V, the current range of the sensor module is -7.8A to 80A, and the sensitivity is 41.6mV / A. That is, by changing the reference voltage calibration module to calibrate the initial reference voltage to obtain the value of the target reference voltage, the current range of the sensor module is changed.

[0044] In the above embodiment, the initial reference voltage may be determined based on the rated current of the chip.

[0045] It should be noted that, when the model of the sensor module is determined, the corresponding relationship between the reference voltage and the current range of the sensor module can be determined.

[0046] In a specific implementation, the first differential module first determines the conduction state according to the rated current of the chip, and then determines the conduction gain according to the target reference voltage and the sampling voltage. By configuring the first differential module, different conduction gain values ​​in different conduction states can be obtained.

[0047] In addition, the conduction state of the first differential module can be determined by the rated current of the chip, and then the gain of the first differential module can be changed. Therefore, the variable gain large current test circuit provided in the embodiment of the present disclosure can be used for direct measurement of large currents such as overload current and short-circuit current. The sampling current collected by the sensor module is directly amplified with the corresponding gain based on the gain of the first differential module, thereby avoiding additional errors caused by conversion in the test program and expanding the application scope of the automatic testing machine.

[0048] Then, the output voltage determination module obtains the target output voltage according to the sensitivity of the sensor module, the sampling current of the sensor module and the conduction gain of the first differential module.

[0049] Specifically, the target output voltage satisfies:

[0050] V out =I sensor SG(1)

[0051] In formula (1), Isensor is the sampling current of the sensor module, S is the sensitivity of the sensor module, and G is the conduction gain of the first differential module.

[0052] It should be noted that when the current sensor model selected by the sensor module is fixed, the sensitivity of the sensor module is a fixed value.

[0053] The variable gain high current test circuit for chip automatic testing provided by the embodiment of the present disclosure includes a sensor module, a reference voltage calibration module, a first differential module and an output voltage determination module. The sensor module generates a sampling voltage according to a sampling current; the reference voltage calibration module generates a target reference voltage according to an initial reference voltage; the first differential module determines the conduction state according to the rated current of the chip, and determines the conduction gain according to the target reference voltage and the sampling voltage. By configuring the parameters of the reference voltage calibration module, the value of the target reference voltage generated by the reference voltage calibration module can be changed, thereby changing the current range of the sensor module, so that the sensor module can be used for direct measurement of large currents such as overload current and short-circuit current, and then the target output voltage corresponding to the sampling current is determined by the acquisition current of the sensor module and the conduction gain determined by the first differential module, so as to realize the test of the current of the chip with different gains.

[0054] In a specific embodiment, Figure 2 As shown, the sensor module 10 includes a current sensor, which is connected in series with the chip. The current sensor collects a sampling current flowing through the chip and generates a sampling voltage according to the sampling current coupling.

[0055] like Figure 2 As shown, the current sensor is connected in series to the chip circuit, the current flows into the primary Iin end of the current sensor and flows out from the primary Iout end of the current sensor. The current sensor is a Hall current sensor, and the primary and secondary sides of the current sensor are isolated. The current flows through the primary side of the current sensor and does not contact the secondary side. The current flowing through will generate a magnetic field. The Hall voltage is calculated based on the magnetic induction intensity of the magnetic field. After internal amplification and filtering, a sampling voltage Vo is finally output.

[0056] The embodiment of the present disclosure provides a current sensor, which collects the working current of the chip (ie, the sampling current) based on the current sensor, and generates a sampling voltage through coupling according to the sampling current of the chip.

[0057] In a specific embodiment, Figure 3 As shown, the reference voltage calibration module 20 includes a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a first operational amplifier U1, a diode D1 and a potentiometer P1. The first end of the first resistor R1 and the first end of the diode D1 are electrically connected to the initial reference voltage node respectively, the second end of the first resistor R1 is electrically connected to the first end of the third resistor R3 and the positive input terminal of the first operational amplifier U1 respectively, the second end of the third resistor R3 and the second end of the diode D1 are electrically connected to the ground node, the first end of the resistance meter P1 is electrically connected to the first end of the second resistor R2, the second end of the resistance meter P1 is electrically connected to the reverse input terminal of the first operational amplifier U1, the third end of the resistance meter P1 is electrically connected to the first end of the fourth resistor R3, the second end of the fourth resistor R4 is electrically connected to the ground node, and the second end of the second resistor R2 is electrically connected to the output terminal of the first operational amplifier U1.

[0058] like Figure 3 As shown, the reference voltage calibration module 20 is composed of a first operational amplifier U1, a potentiometer P1, a diode D1 and a plurality of resistors (including a first resistor R1, a second resistor R2, a third resistor R3 and a fourth resistor R4). The target reference voltage can be generated based on the initial reference voltage by changing the resistance value of the potentiometer P1.

[0059] Specific, combined Figure 3 , when the diode D1 is turned on, it has a forward conduction voltage of about 0.7V. Therefore, it can be calculated that the target reference voltage Vrefo output by the reference voltage calibration module satisfies:

[0060]

[0061] Among them, Vrefo represents the target reference voltage generated by the reference voltage calibration module, Vf represents the forward conduction voltage of the diode D1, R1 is the resistance value of the first resistor, R2 is the resistance value of the second resistor, R3 is the resistance value of the third resistor, P1 is the resistance value of the potentiometer, and x represents the position of the potentiometer.

[0062] It can be concluded from formula (2) that when the position of the potentiometer and the resistance values ​​of the first resistor R1, the second resistor R2 and the third resistor R3 are determined, the generated target reference voltage is a determined value. According to the voltage value of the generated target reference voltage, the current range corresponding to the voltage value of the generated target reference voltage can be obtained according to the working manual of the current sensor.

[0063] As a specific example, when the first resistor R1 and the third resistor R3 are selected to have a resistance value of 330 kΩ, 1%, and 125 mW, the second resistor R2 and the fourth resistor R4 are selected to have a resistance value of 10 kΩ, 0.1%, and 125 mW, the potentiometer P1 is selected to have a resistance value of 1 kΩ, 10%, and the potentiometer position is 50%, the above values ​​are substituted into formula (2), and the target reference voltage Vrefo can be calculated to be 0.7 V.

[0064] Exemplarily, if the current sensor selected in this application is a CKSR-15 model current sensor, the current range corresponding to the current sensor when the target reference voltage is 0.7V can be obtained according to the work manual of the CKSR-15 model current sensor. Specifically, in the CKSR-15 model current sensor, the corresponding relationship between the target reference voltage and the current range is: when the target reference voltage is less than 1.29V, its current range is -7.8A to 80A, the sensitivity is 41.6mV / A, and the current sensor output voltage amplitude range is 0.375V to 4.03V, that is, when the target reference voltage generated by the reference voltage calibration module is less than 1.29V, the current range of the sensor module is -7.8A to 80A.

[0065] It should be noted that, in the above embodiment, the first operational amplifier is a non-inverting operational amplifier.

[0066] In the disclosed embodiment, different target reference voltages can be generated by setting different potentiometer gears, thereby changing the upper and lower limits of the measurement current and the sensitivity of the sensor module, which has high flexibility and wide applicability.

[0067] In a specific embodiment, Figure 4 As shown, the first differential module 30 includes a first switch unit, a second switch unit and a differential unit; wherein the first switch unit is configured to be turned off when the rated current of the chip is less than or equal to the first range, to be turned off when the rated current of the chip is greater than the first range and less than or equal to the second range, and to be turned on when the rated current of the chip is greater than the second range and less than or equal to the third range; the second switch unit is configured to be turned off when the rated current of the chip is less than or equal to the first range, to be turned on when the rated current of the chip is greater than the first range and less than or equal to the second range, and to be turned off when the rated current of the chip is greater than the second range and less than or equal to the third range; the differential unit is configured to generate a target output voltage according to the conduction state of the first switch unit and the second switch unit.

[0068] In a specific implementation, the first switch unit includes a first switch S1 and a second switch S2, the second switch unit includes a third switch S3 and a fourth switch S4, the differential unit includes a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, a ninth resistor R9, a tenth resistor R10, an eleventh resistor R11, a twelfth resistor R12, a thirteenth resistor R13, a fourteenth resistor R14, a fifteenth resistor R15, a sixteenth resistor R16, a second operational amplifier U2, a first capacitor C1, a second capacitor C2, a third capacitor C3, a fourth capacitor C4, a fifth capacitor C5, a sixth capacitor C6 and a seventh capacitor C7, the fifth resistor R5 One end receives the sampling voltage Vo, the second end of the fifth resistor R5 is electrically connected to the first end of the sixth resistor R6, the second end of the sixth resistor R6, the first end of the first switch S1, the first end of the third switch S3, the first end of the ninth resistor R9 and the first end of the third capacitor C3 are respectively electrically connected to the inverting input terminal of the second operational amplifier U2, the second end of the first switch S1 is respectively electrically connected to the first end of the seventh resistor R7 and the first end of the first capacitor C1, the second end of the third switch S2 is respectively electrically connected to the first end of the eighth resistor R8 and the first end of the second capacitor C2, the second end of the seventh resistor R7, the second end of the first capacitor C2, the second end of the eighth resistor R8, the second end of the second capacitor C3 The second end of C2, the second end of the ninth resistor R9, the second end of the third capacitor C3 and the first end of the fifteenth resistor R15 are respectively electrically connected to the positive output terminal of the second operational amplifier U2, the second end of the fifteenth resistor R15 and the first end of the seventh capacitor C7 are electrically connected to the first output node, the first end of the tenth resistor R10 receives the target reference voltage Vrefo, the second end of the tenth resistor R10 is electrically connected to the first end of the eleventh resistor R11, the second end of the eleventh resistor R11, the first end of the fourth capacitor C4, the first end of the twelfth resistor R12, the first end of the fourth switch S4, and the first end of the second switch S2 are respectively connected to the positive input terminal of the second operational amplifier U2. The first end of the fourth switch S4 is electrically connected to the first end of the fifth capacitor C5 and the first end of the thirteenth resistor R13, respectively. The second end of the second switch S2 is electrically connected to the first end of the sixth capacitor C6 and the first end of the fourteenth resistor R14, respectively. The second end of the fourth capacitor C4, the second end of the twelfth resistor R12, the second end of the fifth capacitor C5, the second end of the thirteenth resistor R13, the second end of the sixth capacitor C6, the second end of the fourteenth resistor R14 and the second end of the sixteenth resistor R16 are electrically connected to the inverting output terminal of the second operational amplifier U2, respectively. The second end of the sixteenth resistor R16 and the second end of the seventh capacitor C7 are electrically connected to the second output node.

[0069] Specific, combined Figure 4The first differential module is composed of a second operational amplifier U2, a plurality of capacitors, resistors, and a first switch, a second switch, a third switch, and a fourth switch. By selecting the conduction mode of the switch, different feedback networks can be selected to achieve current measurement with different gains. The gain G is calculated as shown in the following formula (3):

[0070]

[0071] When the first switch and the second switch are turned on, the gain of the differential unit satisfies: When the third switch and the fourth switch are turned on, the gain of the differential unit satisfies: When the first switch, the second switch, the third switch and the fourth switch are all turned off, the gain of the differential unit satisfies:

[0072] Since the rated current of the chip connected to the sensor module can be determined according to the property characteristics of the chip, when the sensor module is connected in series with the chip, the conduction mode of the first switch unit and the second switch unit is determined according to the rated current of the chip connected in series to realize the selection of the differential unit gain.

[0073] In an exemplary embodiment, when the first switch and the second switch are closed and the third switch and the fourth switch are turned off, the gain of the differential unit is determined to satisfy the following conditions based on the voltage signal output from the output terminal of the differential unit and the voltage signal input to the input terminal:

[0074]

[0075] When the third switch and the fourth switch are closed and the first switch and the second switch are turned off, the gain of the differential unit is determined to satisfy the following equation based on the voltage signal output from the output terminal of the differential unit and the voltage signal input to the input terminal:

[0076]

[0077] When the third switch, the fourth switch, the first switch and the second switch are all turned off, the gain of the differential unit is determined to satisfy the following condition based on the voltage signal output from the output terminal of the differential unit and the voltage signal input to the input terminal:

[0078]

[0079] That is, the gain of the differential unit is changed by configuring the resistance values ​​of the fifth resistor, the sixth resistor, the seventh resistor, the eighth resistor, and the ninth resistor.

[0080] In a specific exemplary embodiment, the seventh resistor R7 selects a resistor with a resistance value of 6.2kΩ, the eighth resistor R8 selects a resistor with a resistance value of 31.6kΩ, the ninth resistor R9 selects a resistor with a resistance value of 95.3kΩ, and the fifth resistor R5 and the sixth resistor R6 respectively select a resistor with a resistance value of 2kΩ. At this time, closing the first switch S1 and the second switch S2 can set the gain of the differential unit to a minimum of 1.46V / V, and the corresponding current range is 80A; closing the third switch S3 and the fourth switch S4 can set the gain of the differential unit to an intermediate value of 5.93V / V, and the corresponding current range is 20A; disconnecting the first switch S1, the second switch S2, the third switch S3 and the fourth switch S4 can set the gain of the differential unit to a maximum of 24V / V, and the corresponding current range is 5A.

[0081] Based on the above embodiments, Figure 5 FIG. 1 is a schematic diagram of another variable gain high current test circuit for automatic chip testing provided by an embodiment of the present disclosure. Figure 5 As shown, the variable gain high current test circuit for automatic chip testing also includes: a second differential module 50; the second differential module 50 is configured to generate a first initial output voltage and a second initial output voltage according to a target reference voltage and a sampling voltage, wherein the absolute values ​​of the first initial voltage and the second initial voltage are the same; the first differential module is also configured to determine a conduction gain according to the first initial output voltage and the second initial output voltage.

[0082] The second differential module includes a sixteenth resistor R16, a seventeenth resistor R17, an eighteenth resistor R18, a nineteenth resistor R19, a twentieth resistor R20, a twenty-first resistor R21, an eighth capacitor C8, a ninth capacitor C9, a tenth capacitor C10 and a third operational amplifier U3, a first end of the sixteenth resistor R16 receives a target reference voltage Vrefo, a second end of the sixteenth resistor R16, a first end of the seventeenth resistor R17 and a first end of the eighth capacitor C8 are respectively electrically connected to the reverse input terminal of the third operational amplifier U3, a second end of the seventeenth resistor R17, a second end of the eighth capacitor C8 and a first end of the eighteenth resistor R18 are respectively electrically connected to the third operational amplifier U3 The forward output terminal of the operational amplifier U3 is electrically connected, the second end of the eighteenth resistor R18 and the first end of the tenth capacitor C10 are electrically connected to the third output node, the first end of the nineteenth resistor R19 receives the sampling voltage Vo, the second end of the nineteenth resistor R19, the first end of the ninth capacitor C9 and the first end of the twentieth resistor R20 are respectively electrically connected to the forward input terminal of the third operational amplifier, the second end of the ninth capacitor C9, the second end of the twentieth resistor R20 and the first end of the twenty-first resistor R21 are respectively electrically connected to the reverse output terminal of the third operational amplifier U3, and the second end of the twenty-first resistor R21 and the second end of the tenth capacitor C10 are electrically connected to the fourth output node.

[0083] In the embodiment of the present disclosure, the circuit is further configured to include a second differential module, which is composed of a third operational amplifier U3, a plurality of capacitors and resistors. The input of the second differential module is the output voltage Vo of the sensor module and the target reference voltage Vrefo generated by the reference voltage calibration module. The first initial output voltage output by the second differential module satisfies:

[0084]

[0085] The second initial output voltage satisfies:

[0086]

[0087] The gain Gv of the second differential module satisfies:

[0088]

[0089] The cut-off frequency f-3db of the second differential module satisfies:

[0090]

[0091] In an exemplary embodiment, in the above formulas (7), (8), (9), and (10), the resistance values ​​of the sixteenth resistor, the seventeenth resistor, and the nineteenth resistor are selected to be 2kΩ, 0.1%, and 125mW resistors, the resistance values ​​of the eighteenth resistor and the twenty-first resistor are selected to be 33.2Ω, 1%, and 125mW resistors, the capacitance values ​​of the eighth capacitor and the ninth capacitor are 470pF, 50V, and X7R type capacitors, and the capacitance value of the tenth capacitor is selected to be 10nF, 50V, and X7R type capacitors. At this time, it can be calculated that the gain Gv of the second differential module is 0, and the cutoff frequency f-3db of the second differential module is 237.9kHz. The second differential module can convert the single-ended sampling voltage output by the current sensor into a differential voltage output, and by setting the cutoff frequency of the second differential module to 237.9kHz, the interference of the 900kHz switching frequency of the current sensor can be effectively eliminated, that is, the second differential module can completely eliminate the offset voltage of the sampling voltage Vo of the sensor module. And the second differential module does not change the current range and sensitivity.

[0092] When the variable gain high current test circuit further includes a second differential module, at this time, the first terminal voltage input to the fifth resistor is the first initial output voltage, and the first terminal voltage input to the tenth resistor is the second initial output voltage.

[0093] In addition, by selecting the first capacitor C1, the second capacitor C2 and the fourth capacitor C4 in the first differential module to be 180pF, 33pF and 15pF respectively, when the first switch and the second switch are turned on, the cut-off frequency f-3db corresponding to the first differential module can be calculated to be 142.61kHz, when the third switch and the fourth switch are turned on, the cut-off frequency f-3db corresponding to the first differential module can be calculated to be 152.62kHz, and when the first switch, the second switch, the third switch and the third switch are turned off, the cut-off frequency f-3db corresponding to the first differential module can be calculated to be 113.33kHz. The cut-off frequency of the first differential module in the three conduction modes is less than the cut-off frequency of the second differential module. The variable gain high current test circuit can achieve a maximum current measurement of 80A, and can be configured with three different gains to obtain a maximum sensitivity of 41.6mV / A, which can well realize some high current test scenarios in the chip.

[0094] In the disclosed embodiment, the single-ended output of the sensor module is configured as a differential signal output through the second differential module, the bandwidth is reduced, and the amplitude is adjusted, thereby increasing the anti-interference ability and accuracy of the measurement.

[0095] Based on the above embodiments, the embodiments of the present disclosure further provide an electronic device, including the variable gain high current test circuit described in any one of the above embodiments, and having the beneficial effects described in any one of the above embodiments. The embodiments of the present disclosure do not give examples one by one.

[0096] The electronic device provided in the embodiments of the present disclosure can be applied to flexible electronic devices to realize technologies such as augmented reality (AR), virtual reality (VR), extended reality (XR), and mixed reality (MR). For example, the display device can be the projection part of the electronic device, such as a projector, a head-up display (HUD), etc.; for another example, the display device can also be the display part of the electronic device, such as a smart phone, a smart watch, a laptop, a tablet computer, a driving recorder, a navigator, a head-mounted device, and any other device with a display screen.

[0097] It should be noted that the terms used herein are only for describing specific embodiments and are not intended to limit the exemplary embodiments according to the present application. As used herein, unless the context clearly indicates otherwise, the singular form is also intended to include the plural form. In addition, it should be understood that when the terms "comprise" and / or "include" are used in this specification, it indicates the presence of features, steps, operations, devices, components and / or combinations thereof.

[0098] It should be understood that "one embodiment" or "an embodiment" mentioned throughout the specification means that specific features, structures or characteristics related to the embodiment are included in at least one embodiment of the present application. Therefore, "in one embodiment" or "in an embodiment" appearing throughout the specification does not necessarily refer to the same embodiment. In addition, these specific features, structures or characteristics can be combined in one or more embodiments in any suitable manner. It should be understood that in various embodiments of the present application, the size of the serial number of each step / process mentioned above does not mean the order of execution, and the execution order of each step / process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiment of the present application. In addition, the serial numbers of the embodiments of the present application mentioned above are only for description and do not represent the advantages and disadvantages of the embodiments.

[0099] It should be noted that the terms "first", "second", etc. in the specification and claims of the present application and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchangeable where appropriate, so that the embodiments of the present application described herein can be implemented in an order other than those illustrated or described herein, for example. In addition, the terms "including" and "having" and any of their variations are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units that are clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0100] The above description is only a preferred embodiment of the present disclosure and is not intended to limit the present disclosure. For those skilled in the art, the present disclosure may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present disclosure shall be included in the protection scope of the present disclosure.

Claims

1. A variable gain high current test circuit for automatic chip testing, characterized in that: include: A sensor module, a reference voltage calibration module, a first differential module and an output voltage determination module; Wherein, the sensor module is configured to generate a sampling voltage according to the sampling current; The reference voltage calibration module is configured to generate a target reference voltage according to an initial reference voltage, wherein the initial reference voltage is related to a rated current of the chip, and the target reference voltage is related to a current range of the sensor module; The first differential module is configured to determine a conduction state according to a rated current of the chip, and determine a conduction gain according to the target reference voltage and the sampling voltage; The output voltage determination module is configured to determine a target output voltage according to the sensitivity of the sensor module, the sampling current of the sensor module and the conduction gain of the first differential module.

2. The circuit according to claim 1, characterized in that Also comprising a second differential module; The second differential module is configured to generate a first initial output voltage and a second initial output voltage according to the target reference voltage and the sampling voltage, wherein the absolute values ​​of the first initial voltage and the second initial voltage are the same; The first differential module is further configured to determine a conduction gain according to the first initial output voltage and the second initial output voltage.

3. The circuit according to claim 1, characterized in that The sensor module includes a current sensor, which is connected in series with the chip. The current sensor collects a sampling current flowing through the chip and generates a sampling voltage according to the sampling current coupling.

4. The circuit according to claim 1, characterized in that The reference voltage calibration module includes a first resistor, a second resistor, a third resistor, a fourth resistor, a first operational amplifier, a diode and a potentiometer, wherein the first end of the first resistor and the first end of the diode are electrically connected to an initial reference voltage node, respectively, the second end of the first resistor is electrically connected to the first end of the third resistor and the positive input terminal of the first operational amplifier, respectively, the second end of the third resistor and the second end of the diode are electrically connected to a ground node, the first end of the resistance meter is electrically connected to the first end of the second resistor, the second end of the resistance meter is electrically connected to the reverse input terminal of the first operational amplifier, the third end of the resistance meter is electrically connected to the first end of the fourth resistor, the second end of the fourth resistor is electrically connected to the ground node, and the second end of the second resistor is electrically connected to the output terminal of the first operational amplifier.

5. The circuit according to claim 1, characterized in that The first differential module includes a first switch unit, a second switch unit and a differential unit; Wherein, the first switch unit is configured to be turned off when the rated current of the chip is less than or equal to the first range, turned off when the rated current of the chip is greater than the first range and less than or equal to the second range, and turned on when the rated current of the chip is greater than the second range and less than or equal to the third range; The second switch unit is configured to be turned off when the rated current of the chip is less than or equal to the first range, turned on when the rated current of the chip is greater than the first range and less than or equal to the second range, and turned off when the rated current of the chip is greater than the second range and less than or equal to the third range; The differential unit is configured to generate a target output voltage according to a conduction state of the first switch unit and the second switch unit.

6. The circuit according to claim 5, characterized in that The first switch unit includes a first switch and a second switch, the second switch unit includes a third switch and a fourth switch, the differential unit includes a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor, a ninth resistor, a tenth resistor, an eleventh resistor, a twelfth resistor, a thirteenth resistor, a fourteenth resistor, a fifteenth resistor, a sixteenth resistor, a second operational amplifier, a first capacitor, a second capacitor, a third capacitor, a fourth capacitor, a fifth capacitor, a sixth capacitor and a seventh capacitor, a first end of the fifth resistor receives a sampling voltage, a second end of the fifth resistor is electrically connected to a first end of the sixth resistor, a second end of the sixth resistor, a first end of the first switch, a first end of the third switch, a first end of the ninth resistor and a first end of the third capacitor are respectively electrically connected to an inverting input end of the second operational amplifier, a second end of the first switch is respectively electrically connected to a first end of the seventh resistor and a first end of the first capacitor, a second end of the third switch is respectively electrically connected to a first end of the eighth resistor and a first end of the second capacitor, a second end of the seventh resistor, a second end of the first capacitor, a second end of the eighth resistor, a second end of the second capacitor, a second end of the ninth resistor, a first end of the The second ends of the three capacitors and the first end of the fifteenth resistor are electrically connected to the positive output terminal of the second operational amplifier, respectively. The second end of the fifteenth resistor and the first end of the seventh capacitor are electrically connected to the first output node. The first end of the tenth resistor receives the target reference voltage. The second end of the tenth resistor is electrically connected to the first end of the eleventh resistor. The second end of the eleventh resistor, the first end of the fourth capacitor, the first end of the twelfth resistor, the first end of the fourth switch, and the first end of the second switch are electrically connected to the positive input terminal of the second operational amplifier, respectively. The second end of the fourth switch is electrically connected to the first end of the fifth capacitor and the first end of the thirteenth resistor, respectively. The second end of the second switch is electrically connected to the first end of the sixth capacitor and the first end of the fourteenth resistor, respectively. The second end of the fourth capacitor, the second end of the twelfth resistor, the second end of the fifth capacitor, the second end of the thirteenth resistor, the second end of the sixth capacitor, the second end of the fourteenth resistor, and the second end of the sixteenth resistor are electrically connected to the reverse output terminal of the second operational amplifier, respectively. The second end of the sixteenth resistor and the second end of the seventh capacitor are electrically connected to the second output node.

7. The circuit according to claim 2, characterized in that The gain of the second differential module is zero, and the cutoff frequency of the second differential module is less than the switching frequency of the sensor module.

8. The circuit according to claim 2, characterized in that The second differential module includes a sixteenth resistor, a seventeenth resistor, an eighteenth resistor, a nineteenth resistor, a twentieth resistor, a twenty-first resistor, an eighth capacitor, a ninth capacitor, a tenth capacitor and a third operational amplifier, wherein a first end of the sixteenth resistor receives a target reference voltage, a second end of the sixteenth resistor, a first end of the seventeenth resistor and a first end of the eighth capacitor are respectively electrically connected to the inverting input end of the third operational amplifier, a second end of the seventeenth resistor, a second end of the eighth capacitor and a first end of the eighteenth resistor are respectively electrically connected to the forward output end of the third operational amplifier, a second end of the eighteenth resistor and a first end of the tenth capacitor are electrically connected to a third output node, a first end of the nineteenth resistor receives a sampling voltage, a second end of the nineteenth resistor, a first end of the ninth capacitor and a first end of the twenty-first resistor are respectively electrically connected to the forward input end of the third operational amplifier, a second end of the ninth capacitor, a second end of the twentieth resistor and a first end of the twenty-first resistor are respectively electrically connected to the inverting output end of the third operational amplifier, and a second end of the twenty-first resistor and a second end of the tenth capacitor are electrically connected to a fourth output node.

9. The method according to claim 1, characterized in that: The target output voltage satisfies: V out =I sensor SG Wherein, Isensor is the sampling current of the sensor module, S is the sensitivity of the sensor module, and G is the conduction gain of the first differential module.

10. An electronic device, characterized in that: The invention comprises the variable gain high current test circuit as described in any one of claims 1 to 9.

Images