Optical device, optical module and optical communication equipment

Abstract

The invention provides an optical device, an optical module and optical communication equipment. The optical device can comprise a semiconductor refrigeration structure and a plurality of optical chips. The semiconductor refrigeration structure comprises a first substrate, a plurality of second substrates and a plurality of thermoelectric particles, the second substrates and the first substrate are oppositely arranged, and the thermoelectric particles are located between the second substrates and the first substrate. At least one optical chip is arranged on the side, away from the first substrate, of each second substrate, the thermoelectric particles in the semiconductor refrigeration structure are connected in series, and the numbers of the thermoelectric particles at the corresponding positions of the different second substrates are different. In the embodiment of the invention, all the thermoelectric particles in the semiconductor refrigeration structure are connected in series, each thermoelectric particle can be driven through one path of driving signal, the layout space and cost of the optical device are saved, independent temperature control of each optical chip can be realized, the semiconductor refrigeration structure is prevented from consuming unnecessary power consumption, and thus the reliability of the semiconductor refrigeration structure is improved. And the temperature control power consumption of the optical device can be greatly reduced.

Description

Technical Field

[0001] The present application relates to the field of optical communication technology, and in particular to an optical device, an optical module and an optical communication device. Background Art

[0002] Passive optical network (PON) is a point-to-multipoint fiber access network. Passive optical network includes: optical line terminal (OLT), passive splitter (splitter) and optical network unit (ONU). The optical signal emitted by the optical line terminal is split by the passive splitter and then directed to each optical network unit. Since passive optical network does not contain active devices, it can avoid electromagnetic interference from external equipment and environmental influences such as lightning. Therefore, passive optical network has the advantages of low failure rate, low maintenance cost and high system reliability.

[0003] In the related technology, there may be scenarios where three generations of PON products, namely G PON, 10G PON and 50G PON, coexist in the passive optical network. In order to simultaneously connect and communicate with the optical network units of G PON, 10G PON and 50G PON, the optical module of the optical line terminal needs to integrate optical chips of three rates, namely G PON, 10G PON and 50G PON, and use a semiconductor cooler (TEC) to control the temperature of G PON, 10G PON and 50G PON optical chips. Due to the large differences in the maximum operating temperature and maximum operating temperature range of G PON, 10G PON and 50G PON optical chips, the 50G PON optical chip has the lowest maximum operating temperature and the narrowest maximum operating temperature range, the G PON optical chip has the highest maximum operating temperature and the widest maximum operating temperature range, and the 10G PON optical chip has an operating temperature specification in the middle. Therefore, the temperature control requirements of these three optical chips are different. Using the same semiconductor cooler to uniformly control the temperature of these three optical chips can only control the temperature according to the requirements of the 50G PON optical chip, while the 10G PON optical chip actually does not need temperature control. The temperature control temperature can be increased, resulting in the semiconductor cooler consuming more unnecessary power consumption. Summary of the invention

[0004] The embodiments of the present application provide an optical device, an optical module and an optical communication device, which are used to reduce the temperature control power consumption of the optical device.

[0005] In the first aspect, an embodiment of the present application provides an optical device, and the optical device provided in the embodiment of the present application may include: a semiconductor refrigeration structure and a plurality of optical chips. For example, the optical device in the embodiment of the present application may include three optical chips, which may be optical chips of three rates of GPON, 10G PON, and 50G PON, respectively. Of course, the optical device in the embodiment of the present application may also include two, four or more optical chips, and the number of optical chips in the optical device may be set according to actual needs, which is not limited here. Exemplarily, the optical chip in the embodiment of the present application may be a laser emission chip.

[0006] In the embodiment of the present application, the semiconductor refrigeration structure may include: a first substrate, a plurality of second substrates and a plurality of thermoelectric particles, each second substrate is arranged opposite to the first substrate, and each thermoelectric particle is located between each second substrate and the first substrate. The first substrate and the second substrate may include materials with good thermal conductivity such as ceramic materials. For example, the first substrate and the second substrate may include Al 2 O 3 or Al 2 N 3 Ceramic materials such as the like. The thermoelectric particles in the semiconductor refrigeration structure are connected in series, and the number of thermoelectric particles at the corresponding positions of different second substrates is different. At least one optical chip is provided on the side of each second substrate away from the first substrate. In specific implementation, the position of the optical chip can be set according to actual needs. Optical chips with different temperature specifications can be set on different second substrates, and optical chips with similar temperature specifications can be set on the same second substrate.

[0007] All the thermoelectric particles in the semiconductor refrigeration structure are connected in series. During the operation of the optical device, a driving signal can be applied to each thermoelectric particle in the semiconductor refrigeration structure to control each thermoelectric particle to release heat at one end of the first substrate and absorb heat at one end of the second substrate, thereby realizing the refrigeration function. In the embodiment of the present application, each thermoelectric particle releases heat at one end of the first substrate and absorbs heat at one end of the second substrate as an example. Of course, in some cases, by changing the direction of the driving signal, each thermoelectric particle can also be controlled to absorb heat at one end of the first substrate and release heat at one end of the second substrate. The semiconductor refrigeration structure can exchange heat with the optical chip through the second substrate to regulate the temperature of the optical chip on the second substrate so that the optical chip operates within a suitable temperature range.

[0008] In the optical device provided by the embodiment of the present application, the first substrate in the semiconductor refrigeration structure corresponds to multiple second substrates, and different second substrates are thermally isolated from each other, so that the semiconductor refrigeration structure has a common substrate on one side of the first substrate and multiple temperature control areas on one side of the second substrate, and each temperature control area corresponds to a second substrate. In addition, all thermoelectric particles in the semiconductor refrigeration structure are connected in series, the current magnitudes of the thermoelectric particles in different temperature control areas are the same, and the number of thermoelectric particles in different temperature control areas is different. In this way, the thermoelectric particles in each temperature control area can be driven by one driving signal, saving the layout space and cost of the optical device, and the temperature control temperature of the temperature control area can be adjusted by setting the number of thermoelectric particles in the temperature control area, so as to achieve separate temperature control of the optical chip in each temperature control area, and prevent the semiconductor refrigeration structure from consuming unnecessary power consumption, thereby greatly reducing the temperature control power consumption of the optical device.

[0009] In some embodiments of the present application, the first substrate may be a hot surface substrate, the second substrate may be a cold surface substrate, and the semiconductor refrigeration structure has a structure in which the hot surface is a common substrate and the cold surface is multi-partitioned. In the semiconductor refrigeration structure, the lower the maximum operating temperature of the optical chip at the corresponding position of the second substrate, the greater the number of thermoelectric particles at the corresponding position of the second substrate. In other words, the lower the maximum operating temperature of the optical chip, the greater the degree of cooling required for the optical chip, and more thermoelectric particles need to be arranged in the temperature control area where the optical chip is located to control the temperature of the optical chip within an appropriate range.

[0010] In specific implementation, the number of thermoelectric particles in each temperature control area can be set according to the maximum operating temperature (or other parameters such as the maximum operating temperature range) of the optical chip in each temperature control area. For example, taking the optical device including optical chips with three rates of G PON, 10G PON, and 50G PON as an example, generally, the higher the rate of the optical chip, the lower the operating temperature point and the smaller the operating temperature range required for the optical chip, that is, the 50GPON optical chip has the lowest maximum operating temperature and the narrowest maximum operating temperature range, the G PON optical chip has the highest maximum operating temperature and the widest maximum operating temperature range, and the 10G PON optical chip has an operating temperature specification in the middle. More thermoelectric particles can be set in the temperature control area where the 50G PON optical chip is located, and fewer thermoelectric particles can be set in the temperature control area where the G PON optical chip is located.

[0011] In a possible implementation, the semiconductor refrigeration structure may further include: filling particles located between at least one second substrate and the first substrate, and the filling particles are insulated from the thermoelectric particles. By arranging the filling particles between the first substrate and the second substrate, the overall structural strength of the semiconductor refrigeration structure can be enhanced. Moreover, the filling particles are insulated from the thermoelectric particles, and the filling particles do not affect the function of the semiconductor refrigeration structure. In practical applications, the filling particles can be arranged in a temperature control area where the thermoelectric particles are relatively sparse. Optionally, the filling particles and the thermoelectric particles may include the same material, so that during the manufacturing process, the thermoelectric particles and the filling particles may be manufactured using the same process, saving process costs. In addition, the filling particles and the thermoelectric particles may also have the same size, and during the manufacturing process, the thermoelectric particles and the filling particles may be manufactured using the same mold or template, further saving process costs.

[0012] In the embodiment of the present application, the semiconductor refrigeration structure may further include: a first electrode and a second electrode located on the side of the first substrate close to the second substrate. The first thermoelectric particle of the plurality of thermoelectric particles connected in series is electrically connected to the first electrode, and the last thermoelectric particle is electrically connected to the second electrode. In the embodiment of the present application, all the thermoelectric particles in the semiconductor refrigeration structure are connected in series, and only the first electrode and the second electrode need to be provided to drive the thermoelectric particles in each temperature control area, thereby saving the internal space of the semiconductor refrigeration structure.

[0013] In addition, the semiconductor refrigeration structure may further include: a driving chip electrically connected to the first electrode and the second electrode, the driving chip being used to provide a driving signal to each thermoelectric particle. In the embodiment of the present application, all thermoelectric particles in the semiconductor refrigeration structure are connected in series, and only one driving chip is required to drive the thermoelectric particles in each temperature control area, thereby saving the layout space and cost of the semiconductor refrigeration structure.

[0014] In a possible implementation, the semiconductor refrigeration structure may further include: a plurality of solder layers, two adjacent thermoelectric particles are connected by the solder layer, and the solder layer is located on the surface of the first substrate or the second substrate. The first thermoelectric particle of the plurality of thermoelectric particles connected in series may be electrically connected to the first electrode through the solder layer, and the last thermoelectric particle may be electrically connected to the second electrode through the solder layer. Of course, the first thermoelectric particle of the plurality of thermoelectric particles connected in series may also be directly electrically connected to the first electrode, and the last thermoelectric particle may also be directly electrically connected to the second electrode, which is not limited here.

[0015] In a specific implementation, each thermoelectric particle in the semiconductor refrigeration structure is arranged in pairs, that is, the semiconductor refrigeration structure includes a plurality of thermoelectric particle pairs, one thermoelectric particle in each thermoelectric particle pair includes a P-type semiconductor material, and the other thermoelectric particle includes an N-type semiconductor material. The two thermoelectric particles in the thermoelectric particle pair can form a thermocouple. When the semiconductor refrigeration structure is working, a driving signal is applied to each thermoelectric particle through a driving chip. Since the carriers are at different energy levels in different materials, when the carriers move from a high energy level to a low energy level, excess energy is released, and when the carriers move from a low energy level to a high energy level, energy is absorbed from the outside. Therefore, when the current passes through the connection position of two thermoelectric particles of different materials, heat absorption or heat release occurs. Since the connection position of the two thermoelectric particles is close to the first substrate or the second substrate, heat can be absorbed (or released) at one end of the first substrate and heat can be released (or absorbed) at one end of the second substrate, so that the semiconductor refrigeration structure can achieve cooling or heating functions.

[0016] In a possible implementation, the optical device in the embodiment of the present application may further include: a plurality of optical chip carriers, the optical chip carriers are located between the second substrate and the optical chip at the corresponding position, and the optical chip carriers can play a role in supporting and buffering heat. Optionally, the optical chip carriers may include materials with good thermal conductivity such as ceramic materials. For example, the optical chip carriers may include Al 2 O 3 or Al 2 N 3 And other ceramic materials.

[0017] The optical device in the embodiment of the present application may further include: a tube shell, and an optical component located in the tube shell, wherein the semiconductor cooling structure and each optical chip are located inside the tube shell. A light outlet is provided on the side of the tube shell, and the optical component is located between each optical chip and the light outlet, and the optical component is used to couple the light emitted by each optical chip to the light outlet. The height difference between any two second substrates in the semiconductor cooling structure and the bottom surface of the tube shell is less than 30 microns.

[0018] The semiconductor refrigeration structure and each optical chip can be sealed in the same optical device through the tube shell, which can effectively save layout space. The optical component can couple the optical signals emitted by each optical chip into one optical signal and emit it through the optical outlet on the side of the tube shell. Optionally, the optical component may include optical components such as lenses and wave combining elements. Setting the height difference between any two second substrates in the semiconductor refrigeration structure and the bottom surface of the tube shell to less than 30 microns can ensure that each optical chip has a high coplanarity to ensure that the optical signals emitted by each optical chip can be coupled into one optical signal. In the manufacturing process of the semiconductor refrigeration structure, a plurality of thermoelectric particles can be placed on the first substrate first, and then a whole substrate is set on the plurality of thermoelectric particles, and then the substrate is cut into a plurality of second substrates. This method can ensure that the height difference of each second substrate is small. In addition, a plurality of second substrates can be made first, and then each second substrate is attached to the thermoelectric particles, as long as the coplanarity of each optical chip can be ensured to be high. The optical device in the embodiment of the present application can drive each thermoelectric particle through a driving signal while ensuring a good optical coupling effect of multiple optical chips, which can greatly reduce the temperature control power consumption of the optical device and save the layout space and cost of the optical device.

[0019] In the second aspect, the embodiments of the present application also provide an optical module. The optical module in the embodiments of the present application may include: any optical device in the first aspect described above and a plurality of control circuits, each control circuit being connected one-to-one with each optical chip in the optical device, and the control circuit being used to drive the corresponding optical chip to emit light. For example, when the optical device includes optical chips with three rates of GPON, 10GPON and 50G PON, control circuits with three rates of GPON, 10G PON and 50G PON may be set in the optical module accordingly. Since the temperature control power consumption of the optical device provided in the embodiments of the present application is low, the power consumption of the optical module including the optical device is also low, and the performance of the optical module is better.

[0020] In one possible implementation, the optical module in the embodiment of the present application can be applied to 50G PON. In order to keep the port density in the optical communication equipment unchanged and enable the optical module of 10G PON or G PON to be normally inserted and operated in the optical communication equipment of 50G PON, the packaging method of the optical module in the embodiment of the present application can be consistent with the packaging method of G PON and 10G PON optical modules. Exemplarily, the optical module in the embodiment of the present application can be packaged in a small form-factor pluggable module (SFP) or a quad small form-factor pluggable module (QSFP) so that the optical module has the characteristics of miniaturized packaging.

[0021] In the third aspect, the embodiment of the present application also provides an optical communication device, and the optical communication device provided in the embodiment of the present application may include: a single board and an optical module, and the optical module is pluggable and connected to the single board. In order to make the optical module of 50G PON compatible with 10GPON and G PON products, the optical module in the embodiment of the present application integrates optical chips of three rates of G PON, 10G PON and 50G PON, that is, the optical module in the embodiment of the present application is a three-generation coexistence optical module of G PON, 10G PON and 50G PON. The optical communication device in the embodiment of the present application may be an optical line terminal. Since the optical line terminal in the embodiment of the present application is provided with three-generation coexistence optical modules of GPON, 10G PON and 50G PON, the optical line terminal can be connected and communicated with the optical network units of G PON, 10G PON and 50GPON at the same time, and the normal communication function of the coexistence scenario of three generations of PON products of G PON, 10G PON and 50G PON can be realized. Of course, the optical communication device in the embodiment of the present application may also be an optical network unit or other equipment, which is not limited here. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Figure 1 It is a schematic diagram of the structure of a passive optical network;

[0023] Figure 2 A schematic diagram of the structure of an optical device provided in an embodiment of the present application;

[0024] Figure 3 This is a schematic diagram of the three-dimensional structure of the semiconductor refrigeration structure in the embodiment of the present application;

[0025] Figure 4 This is a schematic diagram of an equivalent circuit of a semiconductor refrigeration structure in an embodiment of the present application;

[0026] Figure 5 Another schematic diagram of the structure of the optical device provided in the embodiment of the present application;

[0027] Figure 6 for Figure 5 A schematic cross-sectional view at the middle dashed line L;

[0028] Figure 7 A schematic diagram of the structure of the optical module provided in an embodiment of the present application.

[0029] Reference numerals:

[0030] 101-optical line terminal; 102-passive splitter; 103-optical network unit; 200-optical device; 21-semiconductor refrigeration structure; 211-first substrate; 212-second substrate; 213-thermoelectric particles; 213D-thermoelectric particle pairs; 214-filling particles; 215-first electrode; 216-second electrode; 217-driver chip; 218-solder layer; 22-optical chip; 23-optical chip carrier; 24-tube shell; 241-light outlet; 25-optical component; 300-control circuit; Q1, Q2, Q3-temperature control area. DETAILED DESCRIPTION

[0031] In order to make the objectives, technical solutions and advantages of the present application clearer, the present application will be further described in detail below in conjunction with the accompanying drawings.

[0032] It should be noted that the same reference numerals in the drawings of this application represent the same or similar structures, and thus their repeated description will be omitted. The words expressing positions and directions described in this application are all explained using the drawings as examples, but they can be changed as needed, and the changes are included in the protection scope of this application. The drawings of this application are only used to illustrate the relative position relationship and do not represent the true proportion.

[0033] Figure 1 It is a schematic diagram of the structure of a passive optical network. Figure 1 As shown, the passive optical network may include: an optical line terminal (OLT) 101, a passive splitter 102 and an optical network unit (ONU) 103. The optical signal emitted by the optical line terminal 101 is emitted to multiple optical network units 103 after passing through one or more passive splitters 102. With the rapid development of optical communication technology, the standard of the optical fiber access network 50G PON has begun to be formulated. 50G PON products will gradually be commercialized in recent years, but 10G PON products are still being deployed. In addition, the planning and construction progress of home broadband access in various regions varies greatly. There will still be a large number of earlier generation G PON products in the existing network. Therefore, there will be a scenario where three generations of PON products, G PON, 10G PON and 50G PON, coexist. In this way, the optical line terminal 101 needs to connect and communicate with the optical network unit 103 of GPON, 10G PON, and 50G PON at the same time. Therefore, the optical module of the optical line terminal 101 needs to have the signal sending and receiving functions of GPON, 10G PON, and 50G PON, that is, the optical module of the optical line terminal 101 needs to integrate optical chips of three rates, and the optical module is a coexisting optical module of GPON, 10G PON, and 50G PON.

[0034] In order to meet the requirements of miniaturized layout of optical modules, it is necessary to seal the optical chips of three rates, G PON, 10G PON, and 50G PON, into one optical device, and the optical signals of these three optical chips are ultimately coupled to one optical fiber for transmission, rather than each optical signal occupying one optical fiber. Therefore, these three optical chips need to have a high coplanarity to ensure that the three optical signals can be coupled to the same optical fiber. In the related art, in order to make the optical chips of different rates in the optical device have a high coplanarity, a semiconductor refrigerator (TEC) is used to control the temperature of the G PON, 10G PON, and 50G PON optical chips.

[0035] However, the maximum operating temperature and maximum operating temperature range of G PON, 10G PON, and 50G PON optical chips are quite different. As shown in Table 1, the maximum operating temperature and maximum operating temperature range of 50G PON optical chips are the lowest, the maximum operating temperature and maximum operating temperature range of G PON optical chips are the highest, and the operating temperature specifications of 10G PON optical chips are in the middle. Therefore, the temperature control requirements of these three optical chips are different. If the same semiconductor cooler is used to uniformly control the temperature of these three optical chips, the temperature can only be controlled according to the requirements of the 50G PON optical chip with the highest requirements, and the temperature can be controlled within the operating temperature point and range of the 50G PON optical chip. In fact, the G PON optical chip does not need to be temperature controlled, and the 10GPON optical chip can increase the temperature control temperature. In other words, this temperature control method is redundant for 10G PON and G PON optical chips, resulting in the semiconductor cooler consuming more unnecessary power consumption.

[0036] Table 1 Operating temperature specifications of optical chips with different speeds

[0037] Optical Chip Maximum operating temperature (℃) Maximum operating temperature range (℃) 50G PON Optical Chip Low Small 10G PON Optical Chip middle middle G PON optical chip high big

[0038] Based on this, the embodiments of the present application provide an optical device, an optical module and an optical communication device to reduce the temperature control power consumption of the optical device. The technical solution provided in the embodiments of the present application can be applied to the scenario where two or three generations of PON products coexist in a passive optical network, and the optical communication device in the embodiments of the present application can be an optical line terminal in a passive optical network. Of course, in some cases, the technical solution provided in the embodiments of the present application can also be applied to other scenarios of temperature control of multiple optical chips with different temperature specifications. For example, the technical solution provided in the embodiments of the present application can also be applied to optical communication equipment such as lasers, modulators, and optical amplifiers.

[0039] Figure 2 A schematic diagram of the structure of an optical device provided in an embodiment of the present application, such as Figure 2As shown, the optical device provided in the embodiment of the present application may include: a semiconductor refrigeration structure 21 and a plurality of optical chips 22. For example, the optical device in the embodiment of the present application may include three optical chips 22, which may be optical chips of three rates of GPON, 10G PON, and 50G PON, respectively. Of course, the optical device in the embodiment of the present application may also include two, four or more optical chips, and the number of optical chips in the optical device may be set according to actual needs, which is not limited here. Exemplarily, the optical chip 22 in the embodiment of the present application may be a laser emission chip.

[0040] Figure 3 The three-dimensional structure diagram of the semiconductor refrigeration structure in the embodiment of the present application is shown in FIG. Figure 2 and Figure 3 The semiconductor refrigeration structure 21 may include: a first substrate 211, a plurality of second substrates 212 and a plurality of thermoelectric particles 213, each second substrate 212 is arranged opposite to the first substrate 211, and each thermoelectric particle 213 is located between each second substrate 212 and the first substrate 211. The first substrate 211 and the second substrate 212 may include materials with good thermal conductivity such as ceramic materials. For example, the first substrate 211 and the second substrate 212 may include Al 2 O 3 or Al 2 N 3 Ceramic materials such as quartz crystals and quartz crystals. The thermoelectric particles 213 in the semiconductor refrigeration structure 21 are connected in series, and the number of thermoelectric particles 213 at the corresponding positions of different second substrates 212 is different. At least one optical chip 22 is provided on the side of each second substrate 212 away from the first substrate 211. The figure shows an example of an optical chip 22 being provided on each second substrate 212. In specific implementation, the position of the optical chip 22 can be set according to actual needs. Optical chips 22 with different temperature specifications can be set on different second substrates 212, and optical chips 22 with similar temperature specifications can be set on the same second substrate 212.

[0041] All the thermoelectric particles 213 in the semiconductor refrigeration structure 21 are connected in series. During the operation of the optical device, a driving signal can be applied to each thermoelectric particle 213 in the semiconductor refrigeration structure 21 to control each thermoelectric particle 213 to release heat at one end of the first substrate 211 and absorb heat at one end of the second substrate 212, thereby realizing the refrigeration function. In the embodiment of the present application, the example of each thermoelectric particle 213 releasing heat at one end of the first substrate 211 and absorbing heat at one end of the second substrate 212 is used for explanation. Of course, in some cases, by changing the direction of the driving signal, each thermoelectric particle 213 can also be controlled to absorb heat at one end of the first substrate 211 and release heat at one end of the second substrate 212. The semiconductor refrigeration structure 21 can exchange heat with the optical chip 22 through the second substrate 212 to regulate the temperature of the optical chip 22 on the second substrate 212 so that the optical chip 22 operates within a suitable temperature range.

[0042] In the optical device provided in the embodiment of the present application, the first substrate 211 in the semiconductor refrigeration structure 21 corresponds to a plurality of second substrates 212, and different second substrates 212 are thermally isolated from each other, so that the semiconductor refrigeration structure 21 has a common substrate on one side of the first substrate 211 and a plurality of temperature control areas on one side of the second substrate 212, and each temperature control area corresponds to a second substrate 212, for example Figure 2 and Figure 3 In the figure, a semiconductor refrigeration structure 21 having three temperature control areas Q1, Q2 and Q3 is used as an example for illustration. In addition, all thermoelectric particles 213 in the semiconductor refrigeration structure 21 are connected in series, the currents of the thermoelectric particles 213 in different temperature control areas are the same, and the number of thermoelectric particles 213 in different temperature control areas is different. In this way, the thermoelectric particles 213 in each temperature control area can be driven by one driving signal, saving the layout space and cost of the optical device. In addition, the temperature control temperature of the temperature control area can be adjusted by setting the number of thermoelectric particles 213 in the temperature control area, so as to realize the separate temperature control of the optical chip 22 in each temperature control area, and prevent the semiconductor refrigeration structure 21 from consuming unnecessary power consumption, thereby greatly reducing the temperature control power consumption of the optical device.

[0043] In some embodiments of the present application, the first substrate 211 may be a hot surface substrate, the second substrate 212 may be a cold surface substrate, and the semiconductor refrigeration structure 21 has a structure in which the hot surface is a common substrate and the cold surface is multi-partitioned. In the semiconductor refrigeration structure 21, the lower the maximum operating temperature of the optical chip 22 at the corresponding position of the second substrate 212, the greater the number of thermoelectric particles 213 at the corresponding position of the second substrate 212. In other words, the lower the maximum operating temperature of the optical chip 22, the greater the degree of cooling required for the optical chip 22, and the more thermoelectric particles 213 need to be set in the temperature control area where the optical chip 22 is located to control the temperature of the optical chip 22 within an appropriate range.

[0044] In specific implementation, the number of thermoelectric particles 213 in each temperature control area can be set according to the maximum operating temperature (or other parameters such as the maximum operating temperature range) of the optical chip 22 in each temperature control area. For example, taking the optical device including the optical chip 22 with three speeds of GPON, 10G PON, and 50G PON as an example, generally, the higher the speed of the optical chip 22, the lower the operating temperature point and the smaller the operating temperature range required by the optical chip 22, that is, the 50G PON optical chip 22 has the lowest maximum operating temperature and the narrowest maximum operating temperature range, the G PON optical chip 22 has the highest maximum operating temperature and the widest maximum operating temperature range, and the 10GPON optical chip 22 has an operating temperature specification in the middle. More thermoelectric particles 213 can be set in the temperature control area where the 50G PON optical chip 22 is located, and fewer thermoelectric particles 213 can be set in the temperature control area where the G PON optical chip 22 is located. Figure 2 and Figure 3 In the temperature control area Q1, the number of thermoelectric particles 213 is relatively large, and a 50G PON optical chip 22 can be set on the second substrate 212 in the temperature control area Q1. The number of thermoelectric particles 213 in the temperature control area Q3 is relatively small, and a 10G PON optical chip 22 can be set on the second substrate 212 in the temperature control area Q3. The number of thermoelectric particles 213 in the temperature control area Q2 is moderate, and a 10G PON optical chip 22 can be set on the second substrate 212 in the temperature control area Q2.

[0045] Continue to refer to Figure 2 and Figure 3 The semiconductor refrigeration structure 21 may further include: filling particles 214 located between at least one second substrate 212 and the first substrate 211, and the filling particles 214 are insulated from the thermoelectric particles 213. By arranging the filling particles 214 between the first substrate 211 and the second substrate 212, the overall structural strength of the semiconductor refrigeration structure 21 can be enhanced. Moreover, the filling particles 214 are insulated from the thermoelectric particles 213, and the filling particles 214 will not affect the function of the semiconductor refrigeration structure 21. In practical applications, the filling particles 214 can be arranged in a temperature control area where the thermoelectric particles 213 are relatively sparse, for example, Figure 2 and Figure 3 In the temperature control area Q3 where the number of thermoelectric particles 213 is small, filling particles 214 are provided. Optionally, the filling particles 214 and the thermoelectric particles 213 may include the same material, so that during the manufacturing process, the thermoelectric particles 213 and the filling particles 214 may be manufactured using the same process, saving process costs. In addition, the filling particles 214 and the thermoelectric particles 213 may also have the same size, and during the manufacturing process, the thermoelectric particles 213 and the filling particles 214 may be manufactured using the same mold or template, further saving process costs.

[0046] Figure 4 This is a schematic diagram of an equivalent circuit of a semiconductor refrigeration structure in an embodiment of the present application, combined with Figure 3 and Figure 4 The semiconductor refrigeration structure 21 may further include: a first electrode 215 and a second electrode 216 located on the side of the first substrate 211 close to the second substrate 212. The first thermoelectric particle 213 of the plurality of thermoelectric particles 213 connected in series is electrically connected to the first electrode 215, and the last thermoelectric particle 213 is electrically connected to the second electrode 216. In the embodiment of the present application, all the thermoelectric particles 213 in the semiconductor refrigeration structure 21 are connected in series, and only the first electrode 215 and the second electrode 216 need to be provided to drive the thermoelectric particles 213 in each temperature control area, thereby saving the internal space of the semiconductor refrigeration structure 21.

[0047] In addition, the semiconductor refrigeration structure 21 may further include: a driving chip 217 electrically connected to the first electrode 215 and the second electrode 216, and the driving chip 217 is used to provide a driving signal to each thermoelectric particle 213. In the embodiment of the present application, all the thermoelectric particles 213 in the semiconductor refrigeration structure 21 are connected in series, and only one driving chip 217 is required to drive the thermoelectric particles 213 in each temperature control area, thereby saving the layout space and cost of the semiconductor refrigeration structure 21.

[0048] In a possible implementation, the semiconductor refrigeration structure 21 may further include: a plurality of solder layers 218, two adjacent thermoelectric particles 213 are connected by the solder layer 218, and the solder layer 218 is located on the surface of the first substrate 211 or the second substrate 212. The first thermoelectric particle 213 of the plurality of thermoelectric particles 213 connected in series may be electrically connected to the first electrode 215 through the solder layer 218, and the last thermoelectric particle 213 may be electrically connected to the second electrode 216 through the solder layer 218. Of course, the first thermoelectric particle 213 of the plurality of thermoelectric particles 213 connected in series may also be directly electrically connected to the first electrode 215, and the last thermoelectric particle 213 may also be directly electrically connected to the second electrode 216, which is not limited here.

[0049] In a specific implementation, each thermoelectric particle 213 in the semiconductor refrigeration structure 21 is arranged in pairs, that is, the semiconductor refrigeration structure 21 includes a plurality of thermoelectric particle pairs 213D, one thermoelectric particle 213 in each thermoelectric particle pair 213D includes a P-type semiconductor material, and the other thermoelectric particle 213 includes an N-type semiconductor material, and the two thermoelectric particles 213 in the thermoelectric particle pair 213D can form a thermocouple. When the semiconductor refrigeration structure 21 is working, a driving signal is applied to each thermoelectric particle 213 through the driving chip 217. Since the carriers are at different energy levels in different materials, when the carriers move from a high energy level to a low energy level, the excess energy is released, and when the carriers move from a low energy level to a high energy level, the energy is absorbed from the outside. Therefore, when the current passes through the connection position of two thermoelectric particles 213 of different materials, heat absorption or heat release occurs. Since the connection position of the two thermoelectric particles 213 is close to the first substrate 211 or the second substrate 212, heat can be absorbed (or released) at one end of the first substrate 211 and heat can be released (or absorbed) at one end of the second substrate 212, so that the semiconductor refrigeration structure 21 can achieve cooling or heating functions.

[0050] like Figure 2 As shown, in a possible implementation, the optical device in the embodiment of the present application may further include: a plurality of optical chip carriers 23, the optical chip carriers 23 are located between the second substrate 212 and the optical chip 22 at the corresponding position, and the optical chip carriers 23 can play a role in supporting and buffering heat. Optionally, the optical chip carriers 23 may include materials with good thermal conductivity such as ceramic materials. For example, the optical chip carriers 23 may include Al 2 O 3 or Al 2 N 3 And other ceramic materials.

[0051] Figure 5 Another schematic diagram of the structure of the optical device provided in the embodiment of the present application is shown in FIG. Figure 6 for Figure 5 The cross-sectional diagram at the dotted line L is shown in FIG. Figure 5 and Figure 6 As shown, the optical device in the embodiment of the present application may further include: a tube shell 24, and an optical component 25 located in the tube shell 24, and the semiconductor refrigeration structure 21 and each optical chip 22 are located inside the tube shell 24. A light outlet 241 is provided on the side of the tube shell 24, and the optical component 25 is located between each optical chip 22 and the light outlet 241. The optical component 25 is used to couple the light emitted by each optical chip 22 to the light outlet 241. The height H difference between any two second substrates 212 in the semiconductor refrigeration structure 21 and the bottom surface of the tube shell 24 is less than 30 microns.

[0052] The semiconductor refrigeration structure 21 and each optical chip 22 can be sealed in the same optical device through the tube shell 24, which can effectively save layout space. The optical component 25 can couple the optical signals emitted by each optical chip 22 into one optical signal, and emit it through the optical outlet 241 on the side of the tube shell 24. Optionally, the optical component 25 may include optical elements such as lenses and wave combining elements. The height H difference between any two second substrates 212 in the semiconductor refrigeration structure 21 and the bottom surface of the tube shell 24 is set to be less than 30 microns, which can ensure that each optical chip 22 has a high coplanarity, so as to ensure that the optical signals emitted by each optical chip 22 can be coupled into one optical signal. In the manufacturing process of the semiconductor refrigeration structure 21, a plurality of thermoelectric particles 213 can be placed on the first substrate 211, and then a whole substrate is set on the plurality of thermoelectric particles 213, and then the substrate is cut into a plurality of second substrates 212. This method can ensure that the height difference of each second substrate 212 is small. In addition, multiple second substrates 212 may be manufactured first, and then each second substrate 212 may be attached to the thermoelectric particles 213, as long as the coplanarity of each optical chip 22 is high. The optical device in the embodiment of the present application can drive each thermoelectric particle 213 through a driving signal on the basis of ensuring a good optical coupling effect of multiple optical chips 22, which can greatly reduce the temperature control power consumption of the optical device and save the layout space and cost of the optical device.

[0053] Based on the same technical concept, the embodiment of the present application also provides an optical module, Figure 7 A schematic diagram of the structure of the optical module provided in the embodiment of the present application is shown in FIG. Figure 7 As shown, the optical module in the embodiment of the present application may include: any of the above optical devices 200 and multiple control circuits 300, each control circuit 300 is connected to each optical chip 22 in the optical device 200 in a one-to-one correspondence, and the control circuit 300 is used to drive the corresponding optical chip 22 to emit light. For example, when the optical device 200 includes optical chips 22 with three rates of GPON, 10G PON and 50G PON, the optical module can be provided with control circuits 300 with three rates of GPON, 10G PON and 50G PON accordingly. Since the temperature control power consumption of the above optical device provided in the embodiment of the present application is low, the power consumption of the optical module including the above optical device is also low, and the performance of the optical module is good.

[0054] In one possible implementation, the optical module in the embodiment of the present application can be applied to 50G PON. In order to keep the port density in the optical communication equipment unchanged and enable the optical module of 10G PON or G PON to be normally inserted and operated in the optical communication equipment of 50G PON, the packaging method of the optical module in the embodiment of the present application can be consistent with the packaging method of G PON and 10G PON optical modules. Exemplarily, the optical module in the embodiment of the present application can be packaged in a small form-factor pluggable module (SFP) or a quad small form-factor pluggable module (QSFP) so that the optical module has the characteristics of miniaturized packaging.

[0055] Based on the same technical concept, the embodiment of the present application also provides an optical communication device, and the optical communication device provided in the embodiment of the present application may include: a single board and an optical module, and the optical module is pluggable and connected to the single board. In order to make the optical module of 50G PON compatible with 10G PON and G PON products, the optical module in the embodiment of the present application integrates optical chips of three rates of G PON, 10G PON and 50G PON, that is, the optical module in the embodiment of the present application is a three-generation coexistence optical module of G PON, 10G PON and 50G PON. The optical communication device in the embodiment of the present application can be an optical line terminal. Since the optical line terminal in the embodiment of the present application is provided with three-generation coexistence optical modules of G PON, 10G PON and 50G PON, the optical line terminal can be connected and communicated with the optical network unit of G PON, 10GPON and 50G PON at the same time, and the normal communication function of the coexistence scenario of three generations of PON products of G PON, 10G PON and 50G PON can be realized. Of course, the optical communication device in the embodiment of the present application can also be an optical network unit or other equipment, which is not limited here.

[0056] Although the preferred embodiments of the present application have been described, those skilled in the art may make other changes and modifications to these embodiments once they have learned the basic creative concept. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications falling within the scope of the present application.

[0057] Obviously, those skilled in the art can make various changes and modifications to the embodiments of the present application without departing from the spirit and scope of the embodiments of the present application. Thus, if these modifications and variations of the embodiments of the present application fall within the scope of the claims of the present application and their equivalents, the present application is also intended to include these modifications and variations.

Claims

1. An optical device, characterized in that: include: Semiconductor refrigeration structure and multiple optical chips; The semiconductor refrigeration structure comprises: a first substrate, a plurality of second substrates and a plurality of thermoelectric particles; The plurality of second substrates are arranged opposite to the first substrate, and the plurality of thermoelectric particles are located between the plurality of second substrates and the first substrate; Each of the plurality of second substrates is provided with at least one optical chip on a side facing away from the first substrate; The thermoelectric particles in the semiconductor refrigeration structure are connected in series, and the number of the thermoelectric particles at different corresponding positions of the second substrate is different.

2. The optical device according to claim 1, characterized in that The semiconductor refrigeration structure further includes: filling particles located between at least one of the second substrates and the first substrate, and the filling particles are insulated from the thermoelectric particles.

3. The optical device according to claim 2, characterized in that: The filler particles include the same material as the thermoelectric particles.

4. The optical device according to any one of claims 1 to 3, characterized in that: The semiconductor refrigeration structure further includes: a first electrode and a second electrode located on a side of the first substrate close to the second substrate; A first thermoelectric particle among the plurality of thermoelectric particles connected in series is electrically connected to the first electrode, and a last thermoelectric particle is electrically connected to the second electrode.

5. The optical device according to claim 4, characterized in that: The semiconductor refrigeration structure further includes: a driving chip electrically connected to the first electrode and the second electrode; The driving chip is used to provide driving signals to the plurality of thermoelectric particles.

6. The optical device according to any one of claims 1 to 5, characterized in that: The first substrate is a hot surface substrate, and the second substrate is a cold surface substrate; In the semiconductor refrigeration structure, the lower the maximum operating temperature of the optical chip at the position corresponding to the second substrate, the greater the number of the thermoelectric particles at the position corresponding to the second substrate.

7. The optical device according to any one of claims 1 to 6, characterized in that: Also includes: multiple optical chip carriers; The optical chip carrier is located between the second substrate and the optical chip at a corresponding position.

8. The optical device according to any one of claims 1 to 7, characterized in that: Also includes: A tube shell, and an optical component located in the tube shell; The semiconductor refrigeration structure and the plurality of optical chips are located inside the tube shell; A light outlet is provided on the side of the tube shell; The optical component is located between the multiple optical chips and the light outlet, and the optical component is used to couple the light emitted by the multiple optical chips to the light outlet; The height difference between any two of the second substrates and the bottom surface of the tube shell in the semiconductor refrigeration structure is less than 30 microns.

9. An optical module, characterized in that: include: The optical device and a plurality of control circuits according to any one of claims 1 to 8; The multiple control circuits are connected to the multiple optical chips in the optical device in a one-to-one correspondence, and the control circuits are used to drive the corresponding optical chips to emit light.

10. An optical communication device, characterized in that: include: The optical module and the single board as claimed in claim 9; The optical module is pluggably connected to the single board.

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