FinFET device simulation method and manufacturing method based on metal gate granularity

Abstract

The invention relates to the technical field of semiconductors, and provides a FinFET device simulation method and a manufacturing method based on metal gate granularity. The method comprises the following steps: establishing a simulation object model of the FinFET device; based on the granularity of a metal gate of the FinFET device, preprocessing boundary conditions of interface nodes of a channel and an insulator automatically generated by the simulation object model; and inputting a result randomly generated by the preprocessed simulation object model into a device simulation solver for solving. By adopting the method provided by the invention, the boundary condition on the interface of the FinFET device channel and the insulating layer can be more accurately set, so that a more accurate simulation calculation result can be obtained.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to a FinFET device simulation method based on metal gate granularity and a FinFET device manufacturing method. Background Art

[0002] FinFET (Fin Field-Effect Transistor) is a new complementary metal oxide semiconductor transistor. The channel region of FinFET is a fin-shaped semiconductor wrapped by the gate. The length of the fin along the source and drain directions is the channel length. The fin-shaped structure wrapped by the gate enhances the control ability of the gate and has better electrical control over the channel, thereby reducing leakage current and suppressing the short channel effect.

[0003] Metal Gate Granularity (MGG) is one of the process deviation factors that has the greatest impact on the threshold voltage of FinFET devices. As the channel of FinFET devices continues to shrink with technological advances, the impact of MGG on the performance of FinFET devices is increasing day by day. Metal gate granules refer to the metal gate composed of particles with different crystal orientations that are randomly formed when the metal deposition process is initiated simultaneously at multiple random locations on the channel insulating layer during the semiconductor process manufacturing process. Particles with different crystal orientations lead to different metal work functions, and the randomness of particle generation leads to different threshold voltages for each FinFET device. The threshold voltage fluctuation caused by MGG will deteriorate the performance of FinFET devices or even cause them to fail, so it is necessary to model the MGG phenomenon in FinFET during the device design stage in order to quantify and control the impact of MGG.

[0004] Current semiconductor process simulation and device simulation tools (TCAD) mainly model the effect of MGG on the overall equivalent work function of the gate metal (i.e., the work function of each point on the metal gate changes the same). This approach does not take into account that nodes at different locations in the three-dimensional channel model will be affected by different particles, and the boundary conditions of the nodes will be different, which will lead to inaccurate simulation results. Summary of the invention

[0005] In order to solve the above technical defects, the present invention provides a FinFET device simulation method based on metal gate granularity.

[0006] The FinFET device simulation method based on metal gate granularity provided by the present invention comprises:

[0007] Establish a simulation object model for FinFET devices;

[0008] Based on the metal gate granularity of the FinFET device, preprocessing the boundary conditions of the interface node between the channel and the insulator automatically generated by the simulation object model;

[0009] The randomly generated results of the preprocessed simulation object model are input into the device simulation solver for solving.

[0010] In an embodiment of the present invention, based on the metal gate granularity of the FinFET device, the boundary conditions of the interface node between the channel and the insulator automatically generated by the simulation object model are preprocessed, including:

[0011] By simulating the generation of metal gate particles in the FinFET device manufacturing process, multiple nodes on the interface between the channel and the insulator are automatically generated;

[0012] According to the crystal orientation of the metal gate particles corresponding to each node, the metal work function corresponding to each node is obtained;

[0013] The voltage boundary condition of each node is determined according to the metal work function corresponding to each node.

[0014] In an embodiment of the present invention, the metal work function corresponding to each node is obtained according to the crystal orientation of the metal gate particles corresponding to each node, including:

[0015] Calculate the average number of metal grain sizes of N nodes on the interface between the channel and the insulator;

[0016] The average of the metal particle size of N nodes is used as the expected value and variance of the Poisson distribution, and randomly distributed among N nodes to obtain N 0 A particle center node;

[0017] Find the nearest particle center node for N nodes, and divide the N nodes into N nodes according to the nearest particle center node 0 Group, each group of nodes corresponds to a particle center node;

[0018] A metal crystal orientation is randomly assigned to each particle center node;

[0019] For each node, the metal crystal orientation of the particle center node closest to the node is taken as the metal crystal orientation of the node;

[0020] The metal work function corresponding to each node is determined according to the metal crystal orientation of each node.

[0021] In the embodiment of the present invention, the calculation formula for the average number of metal grain sizes of N nodes on the interface between the channel and the insulator is:

[0022] N G =(L×(2H+W)) / (πS 2 / 4);

[0023] Among them, N G is the average size of metal particles, L is the length of the channel, H is the height of the channel, W is the width of the channel, and S is the average diameter of the metal particles.

[0024] In the embodiment of the present invention, the material of the metal gate is titanium nitride; the work function of titanium nitride in the (100) crystal orientation is 2.8 eV, the work function in the (110) crystal orientation is 3.2 eV, and the work function in the (111) crystal orientation is 4.6 eV.

[0025] In an embodiment of the present invention, the voltage boundary condition of each node is determined according to the metal work function corresponding to each node, including: determining the difference between the metal work function corresponding to the node and the channel work function, and taking the sum of the difference and the input voltage value of the metal gate as the voltage boundary condition of the node.

[0026] In the embodiment of the present invention, the interface between the channel and the insulator is a two-dimensional interface or a one-dimensional interface formed by the front channel, the back channel and the top channel.

[0027] In an embodiment of the present invention, a simulation object model of a FinFET device is established, including:

[0028] The semiconductor process simulation tool is used to simulate the process of the FinFET device and establish a simulation object model of the FinFET device.

[0029] The present invention also provides a method for manufacturing a FinFET device, wherein the method comprises the above-mentioned FinFET device simulation method based on metal gate particle size.

[0030] The present invention also provides a computer device, including a memory and a processor, wherein the memory stores a computer program, and the processor is used to execute the computer program to implement the above-mentioned FinFET device simulation method based on metal gate granularity.

[0031] The present invention obtains different metal work functions at each node on the interface between the channel and the insulator in the FinFET according to the corresponding metal gate particle crystal orientation by simulating the generation mode of metal particles in the process, thereby changing the boundary conditions of the interface nodes in the simulation model. The method of the present invention can more accurately set the boundary conditions on the interface between the FinFET device channel and the insulating layer, thereby obtaining more accurate simulation calculation results.

[0032] Other features and advantages of the technical solution of the present invention will be described in detail in the specific implementation section below. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] The drawings described herein are used to provide a further understanding of the present invention and constitute a part of the present invention. The exemplary embodiments of the present invention and their descriptions are used to explain the present invention and do not constitute an improper limitation of the present invention. In the drawings:

[0034] Figure 1 is a flow chart of a FinFET device simulation method based on metal gate granularity provided by an embodiment of the present invention;

[0035] Figure 2 It is a three-dimensional schematic diagram of the channel-insulator interface of a FinFET device;

[0036] Figure 3 is a plan view of the channel-insulator interface of a FinFET device;

[0037] Figure 4 It is a schematic diagram of the distribution of the channel-insulator interface nodes of the FinFET device;

[0038] Figure 5 It is a schematic diagram of the distribution of the center nodes of the particles at the channel-insulator interface of the FinFET device;

[0039] Figure 6 It is a schematic diagram of the grouping of the channel-insulator interface nodes of the FinFET device;

[0040] Figure 7 It is a schematic diagram of the crystal orientation distribution of the channel-insulator interface node of the FinFET device. DETAILED DESCRIPTION

[0041] In order to make the technical solutions and advantages of the embodiments of the present invention more clearly understood, the exemplary embodiments of the present invention are further described in detail below in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, rather than an exhaustive list of all the embodiments. It should be noted that the embodiments of the present invention and the features in the embodiments can be combined with each other without conflict.

[0042] In the description of the present invention, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside" and the like indicate positions or positional relationships based on the positions or positional relationships shown in the drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the present invention. In the description of the present invention, "multiple" means at least two, such as two, three, etc., unless otherwise clearly and specifically defined.

[0043] As introduced in the background technology, the current semiconductor process simulation and device simulation tools (TCAD) are mainly based on the influence of MGG on the overall equivalent work function of the gate metal (i.e., the work function change of each point on the metal gate is the same) for modeling. Since the device threshold voltage is proportional to the gate metal work function, MGG is simplified to the average influence on the gate metal work function in TCAD, which greatly simplifies the simulation process. This average work function model is effective for FinFET models with large enough channels. However, with the development of FinFET technology, its channel size is close to the diameter of metal particles. The existing modeling method assumes that the input voltage boundary conditions of all nodes on the channel-insulating layer interface are the same, without considering that the nodes at different positions in the three-dimensional channel model will be affected by different particles (the disturbance of the metal gate particle size on the metal gate work function), and the boundary conditions of the nodes will be different, so the boundary conditions of the nodes generated by the model are wrong, and the wrong boundary conditions will lead to inaccurate simulation results.

[0044] In view of the above problems, the embodiment of the present invention provides a FinFET device simulation method based on metal gate particle size, which simulates the generation mode of metal particles in the process, obtains different metal work functions at each node on the interface between the channel and the insulator in the FinFET according to the corresponding metal gate particle crystal orientation, thereby changing the boundary conditions of the interface nodes in the simulation model. By adopting the method of the present invention, the boundary conditions on the interface between the channel and the insulating layer of the FinFET device can be set more accurately, thereby obtaining more accurate simulation calculation results.

[0045] Figure 1 FIG. 1 is a flow chart of a FinFET device simulation method based on metal gate granularity provided by an embodiment of the present invention. Figure 1 As shown, the FinFET device simulation method based on metal gate granularity of this embodiment includes the following steps:

[0046] S101, establishing a simulation object model of a FinFET device;

[0047] S102, preprocessing the boundary conditions of the interface nodes between the channel and the insulator automatically generated by the simulation object model based on the metal gate granularity of the FinFET device;

[0048] S103, inputting the randomly generated result of the preprocessed simulation object model into the device simulation solver for solving.

[0049] In the above step S101, a semiconductor process simulation (TCAD) tool is used to simulate the process of the FinFET device or user-defined process parameters to establish a simulation object model of the FinFET device. Semiconductor process simulation tools include EDA tools, simulation software, such as SmartSpice, VisualSim, OptSim, etc.

[0050] In the above step S102, after the TCAD tool automatically generates the nodes, the boundary conditions of the interface nodes are preprocessed. Specifically, by simulating the generation method of metal gate particles in the FinFET device manufacturing process, the TCAD tool automatically generates multiple nodes on the interface between the channel and the insulator, and at each node of the automatically generated interface between the channel and the insulator, the metal work function corresponding to each node is obtained according to the crystal orientation of the metal gate particles corresponding to each node, and the voltage boundary condition of each node is determined according to the metal work function corresponding to each node.

[0051] Figure 2 A rectangular fin-shaped channel in a FinFET is shown. Figure 2 As shown in , in three-dimensional space, the interface of the channel-insulator can be divided into three parts according to the orientation: front channel, back channel, and top channel. For ease of understanding, the front channel-top channel intersection line is used as the axis, and the front channel is flipped 90° to the top channel plane. The back channel-top channel intersection line is used as the axis, and the back channel is flipped 90° to the top channel plane. The plane diagram of the entire channel-insulator interface is obtained, as shown in Figure 3 In the TCAD tool, the plane of the channel-insulator interface is constructed by automatically generated nodes.

[0052] It should be noted that the method of the present invention is not limited to the rectangular channel of FinFET, and the channel-insulator interface can be any two-dimensional plane composed of nodes including roughness and deformation. The channel-insulator interface of FinFET can be a two-dimensional interface composed of the front channel, the back channel and the top channel, or a one-dimensional interface.

[0053] Assume that the nodes automatically generated by the TCAD tool are evenly distributed, such as Figure 4 There are N nodes at the interface between the channel and the insulator, and the average number of metal grains at the N nodes is N. G for:

[0054] N G =(L×(2H+W)) / (πS 2 / 4);

[0055] Wherein, L is the length of the channel, H is the height of the channel, W is the width of the channel, and S is the average diameter of the metal particles, which is set to be evenly distributed between 5 and 25 nanometers based on process experience.

[0056] The average number of metal grain sizes of N nodes is G As the expected value and variance of the Poisson distribution, randomly distributed among N nodes, we get N 0 The particle center node, such as Figure 5 As shown, the particle center node is marked with a red dot.

[0057] like Figure 6 As shown, for all nodes (N nodes), find the nearest particle center node, and divide the N nodes into N nodes according to the nearest particle center node. 0 Each group of nodes corresponds to a particle center node.

[0058] like Figure 7 As shown, a metal crystal direction is randomly assigned to each particle center node, for example: the particle center nodes of the first group of nodes are (100) crystal direction, the particle center nodes of the second group of nodes are (110) crystal direction, the particle center nodes of the third group of nodes are (111) crystal direction, the particle center nodes of the fourth group of nodes are (100) crystal direction, and the particle center nodes of the fifth group of nodes are (110) crystal direction. For each node, the metal crystal direction of the particle center node closest to the node is the metal crystal direction of the node, that is, the crystal direction of the first group of nodes is the crystal direction of the particle center node of the group of nodes.

[0059] Since different crystal orientations of the gate metal correspond to different work functions, the metal work functions corresponding to different nodes may be different. The metal work function corresponding to each node is determined according to the metal crystal orientation of each node. Taking titanium nitride (TiN), the most commonly used material for FinFET metal gate, as an example, the work function of TiN in the (100) crystal orientation is 2.8eV, the work function in the (110) crystal orientation is 3.2eV, and the work function in the (111) crystal orientation is 4.6eV.

[0060] The voltage boundary condition at each node is:

[0061] V 0 =V G +Φ MS (N);

[0062] Among them, V G is the input voltage of the metal gate, Φ MS (N) is the difference between the metal work function and the channel work function, Φ MS (N) is a function of nodes.

[0063] Each node is checked to obtain the nearest metal particle node, thereby obtaining the assigned crystal orientation of the metal node, and then the difference between the metal work function and the channel work function corresponding to the node is obtained by looking up the table. MS(N). According to the above voltage boundary conditions, the input voltage value of the metal gate is V G Φ with the node MS (N) add to get the voltage boundary condition V of the node 0 .

[0064] At this point, each node has obtained a voltage boundary condition that meets the distribution of metal gate particles. The implementation of this method in three-dimensional space is completed.

[0065] The above preprocessing method is also applicable to two-dimensional modeling, which can be achieved by changing the two-dimensional interface in the above three-dimensional space into a one-dimensional interface in the two-dimensional space.

[0066] In the above step S103, the simulation object model preprocessed by the above method can randomly generate simulation results, and the simulation results are input into the device simulation solver (Monte-Carlo solver), or the simulation results can be input into the analytical solver after variance analysis calculation.

[0067] In the prior art, the input voltage boundary conditions of all nodes on the channel-insulating layer interface are the same, because the metal gate granularity is quantified as a disturbance to the average metal gate work function. The boundary conditions of all nodes on the channel-insulating layer interface of the FinFET device of the present invention are all based on the generation mode of metal granularity in the process, and are judged according to their positional relationship with the central node of the metal particle, and grouped on this basis to imitate the generation mode of metal granularity in the process. The boundary conditions of the nodes are in line with the actual regional differences, so on the channel-insulating layer interface of the FinFET device, the voltage boundary conditions of the nodes will be different. Such differences are more in line with the actual process fluctuations caused by the randomness of the gate metal granularity. This method uses the metal gate granularity of the FinFET device as a single factor for device modeling, and analyzes the influence of the metal gate granularity on the channel boundary conditions of the FinFET device.

[0068] The FinFET device simulation method based on metal gate granularity of the present invention has the following characteristics:

[0069] (1) All nodes on the channel-insulating layer interface of the FinFET device are judged based on their positional relationship with the center node of the particle, and grouped based on this to simulate the generation mode of metal particle size in the process. This makes the voltage boundary conditions of the nodes on the channel-insulating layer interface of the FinFET device different, which is more in line with the actual process fluctuation caused by the randomness of the gate metal particle size;

[0070] (2) FinFET device gate metal grain size was extracted as a single factor for device modeling, rather than being coupled with other process fluctuation factors;

[0071] (3) This method has high computational efficiency in three-dimensional space models.

[0072] An embodiment of the present invention also provides a method for manufacturing a FinFET device. During the FinFET device design stage, the above-mentioned FinFET device simulation method based on metal gate granularity is used to model the MGG phenomenon in the FinFET, and accurately set the boundary conditions on the channel-insulating layer interface of the FinFET device, thereby obtaining more accurate simulation calculation results to quantify and control the impact of MGG.

[0073] An embodiment of the present invention further provides a computer device, including: a memory and a processor, wherein the memory stores a computer program, and the processor is used to execute the computer program to implement the above-mentioned FinFET device simulation method based on metal gate granularity.

[0074] An embodiment of the present invention further provides a machine-readable storage medium having computer program instructions stored thereon. When the computer program instructions are executed by a processor, the above-mentioned FinFET device simulation method based on metal gate granularity is implemented.

[0075] It will be appreciated by those skilled in the art that embodiments of the present invention may be provided as methods, systems, or computer program products. Therefore, the present invention may take the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware. Moreover, the present invention may take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program codes. The schemes in the embodiments of the present invention may be implemented in various computer languages, for example, object-oriented programming language Java and literal scripting language JavaScript, etc.

[0076] The present invention is described with reference to flowcharts and / or block diagrams of methods, devices (systems), and computer program products according to embodiments of the present invention. It should be understood that each process and / or block in the flowchart and / or block diagram, as well as the combination of processes and / or blocks in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to produce a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0077] These computer program instructions may also be stored in a computer-readable memory capable of directing a computer or other programmable data processing device to operate in a specific manner, so that the instructions stored in the computer-readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1 A process or multiple processes and / or boxes Figure 1 A function specified in one or more boxes.

[0078] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operating steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing instructions for implementing the process. Figure 1 A process or multiple processes and / or boxes Figure 1 The steps for the functions specified in one or more boxes.

[0079] Although preferred embodiments of the present invention have been described, additional changes and modifications may be made to these embodiments by those skilled in the art once the basic inventive concepts are known. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications that fall within the scope of the present invention. Obviously, those skilled in the art may make various changes and modifications to the present invention without departing from the spirit and scope of the present invention. Thus, if these modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is also intended to include these modifications and variations.

Claims

1. A FinFET device simulation method based on metal gate granularity, characterized in that: include: Establish a simulation object model for FinFET devices; Based on the metal gate granularity of the FinFET device, preprocessing the boundary conditions of the interface node between the channel and the insulator automatically generated by the simulation object model; The randomly generated results of the preprocessed simulation object model are input into the device simulation solver for solving.

2. The FinFET device simulation method based on metal gate granularity according to claim 1, characterized in that: Based on the metal gate granularity of the FinFET device, the boundary conditions of the interface node between the channel and the insulator automatically generated by the simulation object model are preprocessed, including: By simulating the generation of metal gate particles in the FinFET device manufacturing process, multiple nodes on the interface between the channel and the insulator are automatically generated; According to the crystal orientation of the metal gate particles corresponding to each node, the metal work function corresponding to each node is obtained; The voltage boundary condition of each node is determined according to the metal work function corresponding to each node.

3. The FinFET device simulation method based on metal gate granularity according to claim 2, characterized in that: According to the crystal orientation of the metal gate particles corresponding to each node, the metal work function corresponding to each node is obtained, including: Calculate the average number of metal grain sizes of N nodes on the interface between the channel and the insulator; The average of the metal particle size of N nodes is used as the expected value and variance of the Poisson distribution, and randomly distributed among the N nodes to obtain N0 particle center nodes; Find the nearest particle center node for N nodes, and divide the N nodes into N0 groups according to the nearest particle center node, and each group of nodes corresponds to a particle center node; A metal crystal orientation is randomly assigned to each particle center node; For each node, the metal crystal orientation of the particle center node closest to the node is taken as the metal crystal orientation of the node; The metal work function corresponding to each node is determined according to the metal crystal orientation of each node.

4. The FinFET device simulation method based on metal gate granularity according to claim 3, characterized in that: The calculation formula for the average number of metal grain sizes of N nodes on the interface between the channel and the insulator is: N G =(L×(2H+W)) / (πS 2 / 4); Among them, N G is the average size of metal particles, L is the length of the channel, H is the height of the channel, W is the width of the channel, and S is the average diameter of the metal particles.

5. The FinFET device simulation method based on metal gate granularity according to claim 4, characterized in that: The material of the metal gate is titanium nitride; The work function of titanium nitride in the (100) crystal direction is 2.8 eV, the work function in the (110) crystal direction is 3.2 eV, and the work function in the (111) crystal direction is 4.6 eV.

6. The FinFET device simulation method based on metal gate granularity according to claim 2, characterized in that: The voltage boundary conditions of each node are determined according to the metal work function corresponding to each node, including: The difference between the metal work function and the channel work function corresponding to the node is determined, and the sum of the difference and the input voltage value of the metal gate is used as the voltage boundary condition of the node.

7. The FinFET device simulation method based on metal gate granularity according to claim 2, characterized in that: The interface between the channel and the insulator is a two-dimensional interface or a one-dimensional interface formed by the front channel, the back channel and the top channel.

8. The FinFET device simulation method based on metal gate granularity according to claim 1, characterized in that: Establish a simulation object model for FinFET devices, including: The semiconductor process simulation tool is used to simulate the process of the FinFET device and establish a simulation object model of the FinFET device.

9. A method for manufacturing a FinFET device, characterized in that: The method for manufacturing the FinFET device comprises the FinFET device simulation method based on metal gate particle size according to any one of claims 1 to 8.

10. A computer device, characterized in that: include: a memory storing a computer program; A processor, used for executing the computer program to implement the FinFET device simulation method based on metal gate granularity as described in any one of claims 1-8.

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