Intelligent Evaluation System for Service Life Adapted to the Design of Power Semiconductor Devices

Abstract

The present invention belongs to the field of semiconductor lifetime evaluation, relates to data analysis technology, and is used to solve the problem that the prior art cannot perform feature analysis based on the lifetime test results of different types of semiconductor devices and optimize links such as sample extraction and key test parameters in combination with the feature analysis results. Specifically, it is an intelligent lifetime evaluation system adapted to the design of power semiconductor devices, including a sampling analysis module, an equilibrium evaluation module, a trend evaluation module, and an evaluation analysis module; the sampling analysis module is communicatively connected to both the equilibrium evaluation module and the trend evaluation module, and the evaluation analysis module is communicatively connected to both the equilibrium evaluation module and the trend evaluation module; the present invention can extract evaluation samples of power semiconductor devices, mark their evaluation modes according to the evaluation test results of different device types within the evaluation period, so that the acceleration model can be rationally allocated in the next evaluation period.

Description

Technical Field

[0001] The present invention belongs to the field of semiconductor life evaluation, involves data analysis technology, and specifically is an intelligent life evaluation system adapted to the design of power semiconductor devices. Background Art

[0002] ‌A power semiconductor‌ is a semiconductor device used to control and regulate electric power, with advantages such as high efficiency, fast switching, and high temperature resistance, and is widely used in fields such as power electronics, electric vehicles, and renewable energy; with the continuous increase in power demand, the importance of power semiconductor technology in the power system has become increasingly prominent; in the future, power semiconductor technology will continue to develop in the direction of high efficiency, intelligence, and sustainability to meet the increasingly complex power demand.

[0003] The invention patent with the publication number CN116164935A discloses a life evaluation method and evaluation system for a high-power semiconductor laser beam combining module. This evaluation system can accurately evaluate whether the beam combining module meets the life index in a short time, improve the evaluation efficiency, and reduce the evaluation cost; however, this evaluation system can only test various performance parameters of semiconductor devices in sequence, and cannot perform characteristic analysis based on the life test results of different types of semiconductor devices, and optimize links such as sample extraction and key test parameters in combination with the characteristic analysis results, resulting in problems of low evaluation efficiency and low accuracy of evaluation results.

[0004] In view of the above technical problems, the present application proposes a solution. Summary of the Invention

[0005] The purpose of the present invention is to provide an intelligent life evaluation system adapted to the design of power semiconductor devices, which is used to solve the problem that the prior art cannot perform characteristic analysis based on the life test results of different types of semiconductor devices, and optimize links such as sample extraction and key test parameters in combination with the characteristic analysis results;

[0006] The technical problem that the present invention needs to solve is: how to provide an intelligent life evaluation system adapted to the design of power semiconductor devices that can perform characteristic analysis based on the life test results of different types of semiconductor devices, and optimize links such as sample extraction and key test parameters in combination with the characteristic analysis results.

[0007] The purpose of the present invention can be achieved through the following technical solutions:

[0008] An intelligent life evaluation system adapted to the design of power semiconductor devices includes a sampling analysis module, an equilibrium evaluation module, a tendency evaluation module, and an evaluation analysis module; the sampling analysis module is communicatively connected to both the equilibrium evaluation module and the tendency evaluation module, and the evaluation analysis module is communicatively connected to both the equilibrium evaluation module and the tendency evaluation module;

[0009] The sampling and analysis module is used to extract evaluation samples of power semiconductor devices: generate continuous evaluation cycles, mark the power semiconductor devices to be evaluated in the same batch as evaluation objects, randomly extract L1 samples from the evaluation objects as test objects, and mark the evaluation modes of all device types as balanced modes at the start time of the first evaluation cycle; mark the evaluation modes of device types in the next evaluation cycle as balanced modes or tendency modes at the end time of each evaluation cycle.

[0010] The balanced evaluation module is used to perform life evaluation and analysis on the test objects in the balanced mode.

[0011] The tendency evaluation module is used to perform life evaluation and analysis on the test objects in the tendency mode.

[0012] The evaluation and analysis module is used to evaluate and analyze the life test data of the test objects: mark the test objects that fail the life test simulated by the corresponding acceleration model as faulty objects, mark the number of faulty objects as the fault value, mark the ratio of the fault value to L1 as the fault coefficient, and determine whether the life evaluation result of the evaluation object is qualified through the fault coefficient.

[0013] Furthermore, the specific process of marking the evaluation modes of device types includes: performing life evaluation and analysis on the test objects using an acceleration model during the evaluation cycle. The acceleration models include the Arrhenius model, the inverse power law model, the Eyring model, and the Coffin-Manson model. At the end time of the evaluation cycle, conduct a centralized analysis of the faulty objects of each device type and mark the evaluation mode of the device type in the next evaluation cycle as a balanced mode or a tendency mode.

[0014] Furthermore, the specific process of conducting a centralized analysis of the faulty objects of device types includes: marking the acceleration model adopted by the faulty objects of the same device type as the diagnostic model of the faulty objects, marking the number of times the acceleration model is marked as the diagnostic model as the diagnostic value, calculating the variance of the diagnostic values corresponding to all acceleration models of the same device type to obtain the tendency coefficient, and comparing the tendency coefficient with a preset tendency threshold: if the tendency coefficient is less than the tendency threshold, mark the evaluation mode of the device type in the next evaluation cycle as a balanced mode; if the tendency coefficient is greater than or equal to the tendency threshold, mark the evaluation mode of the device type in the next evaluation cycle as a tendency mode, mark the sum of the diagnostic values of all acceleration models as the fault base number, and mark the ratio of the diagnostic value of the acceleration model to the fault base number as the distribution coefficient of the acceleration model.

[0015] Further, the specific process of the balance evaluation module performing life evaluation and analysis on the test object in the balance mode includes: randomly and evenly allocating the test object into the acceleration model, and performing life test analysis on the test object according to the allocated acceleration model.

[0016] Further, the specific process of the propensity evaluation module performing life evaluation and analysis on the test object in the propensity mode includes: marking the product of L1 and the allocation coefficient as the allocation value of the acceleration model, randomly allocating the test object into the acceleration model according to the allocation value, and performing life test analysis on the test object according to the allocated acceleration model.

[0017] Further, the specific process of determining whether the life evaluation result of the evaluation object is qualified includes: comparing the failure coefficient with a preset failure threshold: if the failure coefficient is less than the failure threshold, it is determined that the life evaluation result of the evaluation object is qualified; if the failure coefficient is greater than or equal to the failure threshold, it is determined that the life evaluation result of the evaluation object is unqualified, generating a life anomaly signal and sending the life anomaly signal to the mobile terminal of the management personnel.

[0018] Further, it further includes a sampling optimization module, and the sampling optimization module is communicatively connected to both the evaluation analysis module and the sampling analysis module;

[0019] The sampling optimization module is used to optimize and analyze the sample extraction link of the power semiconductor device: in the first evaluation cycle, before performing life test analysis on the test object through the acceleration model, perform basic tests on all test objects and obtain the basic parameters of the test objects. The basic parameters include on-resistance, dimensional error, rated current, and rated voltage. Sort all test objects of the same device type according to the values of a single basic parameter to obtain a resistance sequence, a dimension sequence, a current sequence, and a voltage sequence respectively. Among them, the resistance sequence and the error sequence are arranged in descending order of the basic parameter values, and the current sequence and the voltage sequence are arranged in ascending order of the basic parameter values. Sum and average the sequence numbers of the failed objects screened in the evaluation analysis process for the same device type in the resistance sequence, dimension sequence, current sequence, and voltage sequence to obtain a resistance priority value, a dimension priority value, a current priority value, and a voltage priority value respectively. Mark the basic parameter corresponding to the minimum value among the resistance priority value, dimension priority value, current priority value, and voltage priority value as the priority parameter of the device type; send the priority parameters of all device types to the sampling analysis module.

[0020] Further, in subsequent evaluation cycles, the sampling analysis module performs basic tests on all evaluation objects according to the device type of the evaluation object and obtains the priority parameters of the evaluation objects, sorts the evaluation objects according to the sorting rule of the priority parameters to obtain a priority sequence, and marks the first L1 evaluation objects in the priority sequence as test objects.

[0021] The present invention has the following beneficial effects:

[0022] 1. The sampling analysis module can extract evaluation samples of power semiconductor devices, mark their evaluation modes according to the evaluation test results of different device types within the evaluation period, so that the acceleration model can be rationally allocated in the next evaluation period, improving the accuracy of the life evaluation results;

[0023] 2. The balanced evaluation module can perform balanced acceleration model allocation on the test objects, making the number of test objects obtained by different acceleration model allocations equal, ensuring the coverage of the acceleration model test performance. The tendency evaluation module can perform tendency acceleration model allocation on the test objects, and allocate the number of test objects according to the allocation coefficient of different acceleration models corresponding to the device types, so that the acceleration model with a high failure rate can be allocated more sample numbers;

[0024] 3. The evaluation analysis module can evaluate and analyze the life test data of the test objects, combine the acceleration test results of all test objects in the same batch for comprehensive analysis to obtain the failure coefficient, and evaluate the overall life performance of this batch of semiconductor devices based on the failure coefficient, and give feedback and warning in time when abnormal;

[0025] 4. The sampling optimization module can optimize and analyze the sample extraction link of power semiconductor devices, screen the priority parameters by combining the basic parameter values of the test objects and the marking situation of the failed objects, so as to provide a reference basis for subsequent sample extraction, pre-evaluate the failure rate of power semiconductors through the basic parameters, improve the accuracy of sample extraction, and further ensure the effectiveness of the test results. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] In order to more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the following will briefly introduce the drawings required for use in the description of the embodiments or the prior art. Obviously, the following drawings are only some embodiments of the present invention. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0027] Figure 1 is the system block diagram of the whole of the present invention;

[0028] Figure 2 is the system block diagram of Embodiment 1 of the present invention;

[0029] Figure 3 is the system block diagram of Embodiment 2 of the present invention;

[0030] Figure 4This is the flowchart of the method according to Embodiment 3 of the present invention. Detailed implementation manners

[0031] The technical solutions of the present invention will be clearly and completely described below in conjunction with the embodiments. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts shall fall within the protection scope of the present invention.

[0032] As Figure 1 shown, a service life intelligent evaluation system adapted to the design of power semiconductor devices includes an evaluation and analysis subsystem and a test and optimization subsystem. The evaluation and analysis subsystem includes a sampling analysis module, an equilibrium evaluation module, a tendency evaluation module, and an evaluation and analysis module; the test and optimization subsystem includes a sampling optimization module and a performance optimization module.

[0033] Embodiment 1: As Figure 2 shown, the sampling analysis module is communicatively connected to both the equilibrium evaluation module and the tendency evaluation module, and the evaluation and analysis module is communicatively connected to both the equilibrium evaluation module and the tendency evaluation module.

[0034] The sampling analysis module is used to extract evaluation samples of power semiconductor devices: generate continuous evaluation cycles, mark the power semiconductor devices to be evaluated in the same batch as evaluation objects, randomly extract L1 samples from the evaluation objects as test objects, where L1 is a numerical constant, and the specific value of L1 is set by the management personnel themselves; mark the evaluation modes of all device types as equilibrium modes at the start time of the first evaluation cycle; mark the evaluation modes of device types in the next evaluation cycle as equilibrium modes or tendency modes at the end time of each evaluation cycle: use an acceleration model to perform life evaluation and analysis on the test objects during the evaluation cycle, and the acceleration models include the Arrhenius model, the inverse power law model, the Eyring model, and the Coffin-Manson model.

[0035] The Arrhenius model is one of the most commonly used accelerated life test models, mainly used to describe the influence of temperature on product life; the Arrhenius model is based on the relationship between the chemical reaction rate and temperature, and accelerates the life test by increasing the temperature;

[0036] The inverse power law model describes the relationship between electrical stresses such as voltage, current, and power and product life;

[0037] The Eyring Model describes the relationship between product life and temperature stress, and the Eyring model is also used for accelerated life tests, especially when involving changes in temperature and pressure;

[0038] Coffin-Manson model: applicable to fatigue failure simulation under temperature alternating stress; this model reflects the fatigue failure process under temperature alternating stress and is often used to simulate the crack propagation process of solder joints.

[0039] At the end of the evaluation period, conduct a centralized analysis of the failure objects of each device type: mark the acceleration model adopted by the failure objects of the same device type as the diagnostic model of the failure objects, mark the number of times the acceleration model is marked as the diagnostic model as the diagnostic value, calculate the variance of the diagnostic values corresponding to all acceleration models of the same device type to obtain the tendency coefficient, and compare the tendency coefficient with the preset tendency threshold: if the tendency coefficient is less than the tendency threshold, mark the evaluation mode of the device type in the next evaluation period as the balanced mode; if the tendency coefficient is greater than or equal to the tendency threshold, mark the evaluation mode of the device type in the next evaluation period as the tendency mode, mark the sum of the diagnostic values of all acceleration models as the failure base number, and mark the ratio of the diagnostic value of the acceleration model to the failure base number as the allocation coefficient of the acceleration model; mark the evaluation mode according to the evaluation test results of different device types during the evaluation period, so that the acceleration models can be rationally allocated in the next evaluation period, improving the accuracy of the life evaluation results.

[0040] The balanced evaluation module is used to conduct life evaluation and analysis of the test objects in the balanced mode: randomly and evenly allocate the test objects to the acceleration models, and conduct life test analysis on the test objects according to the allocated acceleration models.

[0041] The tendency evaluation module is used to conduct life evaluation and analysis of the test objects in the tendency mode: mark the product of L1 and the allocation coefficient as the allocation value of the acceleration model, randomly allocate the test objects to the acceleration models according to the allocation value, and conduct life test analysis on the test objects according to the allocated acceleration models; make the number of test objects allocated to different acceleration models equal to ensure the coverage of the test performance of the acceleration models. Through the tendency evaluation module, the test objects can be allocated to the acceleration models in a tendentious manner, and the number of test objects can be allocated according to the allocation coefficients of different acceleration models corresponding to the device types, so that the acceleration models with high failure rates can be allocated more sample numbers.

[0042] The evaluation and analysis module is used to evaluate and analyze the life test data of the test objects: mark the test objects that fail the life test simulated by the corresponding acceleration model as faulty objects, mark the number of faulty objects as the fault value, mark the ratio of the fault value to L1 as the fault coefficient, and compare the fault coefficient with a preset fault threshold: if the fault coefficient is less than the fault threshold, it is determined that the life evaluation result of the evaluation object is qualified; if the fault coefficient is greater than or equal to the fault threshold, it is determined that the life evaluation result of the evaluation object is unqualified, generate a life anomaly signal and send the life anomaly signal to the mobile terminal of the management personnel; conduct comprehensive analysis based on the acceleration test results of all test objects in the same batch to obtain the fault coefficient, and evaluate the overall life performance of the power semiconductor devices in this batch through the fault coefficient, and give timely feedback and warning in case of anomalies.

[0043] Embodiment 2: As Figure 3 shown, the sampling optimization module is communicatively connected to both the evaluation and analysis module and the sampling analysis module; the performance optimization module is communicatively connected to the evaluation and analysis module.

[0044] The sampling optimization module is used to optimize and analyze the sample extraction link of the power semiconductor devices: in the first evaluation cycle, before performing life test analysis on the test objects through the acceleration model, perform basic tests on all test objects and obtain the basic parameters of the test objects. The basic parameters include on-resistance, dimensional error, rated current, and rated voltage. The on-resistance is the resistance value of the power semiconductor in the on state. A low on-resistance can reduce energy loss and improve device efficiency; the dimensional error is the sum of the errors of each measured dimension on the surface of the power semiconductor; the rated current is the maximum current that the power semiconductor can withstand. High current handling capacity is crucial for high-power applications; the rated voltage is the maximum voltage that the power semiconductor can withstand, which determines the stability and reliability of the device in a high-voltage environment.

[0045] Sort all test objects of the same device type according to the values of a single basic parameter to obtain a resistance sequence, a dimension sequence, a current sequence, and a voltage sequence respectively. Among them, the resistance sequence and the error sequence are arranged in descending order of the basic parameter values, and the current sequence and the voltage sequence are arranged in ascending order of the basic parameter values. Calculate the sum and average of the serial numbers of the faulty objects screened in the resistance sequence, dimension sequence, current sequence, and voltage sequence during the evaluation and analysis process for the same device type to obtain the resistance priority value, dimension priority value, current priority value, and voltage priority value, and mark the basic parameter corresponding to the minimum value among the resistance priority value, dimension priority value, current priority value, and voltage priority value as the priority parameter of the device type.

[0046] Send the priority parameters of all device types to the sampling analysis module; within the subsequent evaluation period, the sampling analysis module conducts basic tests on all evaluation objects according to the device type of the evaluation object and obtains the priority parameters of the evaluation objects. Sort the evaluation objects according to the sorting rule of the priority parameters (that is, when the priority parameter is on-resistance or dimensional error, the sorting rule is from large to small; when the priority parameter is rated current or rated voltage, the sorting rule is from small to large) to obtain a priority sequence, and mark the top L1 evaluation objects in the priority sequence as test objects; combine the basic parameter values of the test objects with the marking situation of the failed objects to screen the priority parameters, so as to provide a reference basis for subsequent sample extraction, pre-evaluate the failure rate of power semiconductors through basic parameters, improve the accuracy of sample extraction, and further ensure the effectiveness of test results.

[0047] The performance optimization module is used to perform performance optimization analysis on power semiconductor devices: when the evaluation mode of the device type is marked as the tendency mode at the end of the evaluation period, mark the test performance corresponding to the acceleration model with the largest diagnostic value as the optimized performance of the device type, and send the optimized performance of the device type to the mobile terminal of the management personnel.

[0048] Embodiment 3: As Figure 4 shown, a service life intelligent evaluation method adapted to the design of power semiconductor devices includes the following steps:

[0049] Step 1: Extract evaluation samples of power semiconductor devices: Generate continuous evaluation periods, mark the power semiconductor devices to be evaluated in the same batch as evaluation objects, randomly extract L1 samples from the evaluation objects as test objects, and execute Step 2 or Step 3;

[0050] Step 2: Conduct life evaluation analysis on the test objects in the balanced mode: Randomly and evenly allocate the test objects to the acceleration models, and conduct life test analysis on the test objects according to the allocated acceleration models;

[0051] Step 3: Conduct life evaluation analysis on the test objects in the tendency mode: Mark the product of L1 and the distribution coefficient as the distribution value of the acceleration model, randomly allocate the test objects to the acceleration models according to the distribution value, and conduct life test analysis on the test objects according to the allocated acceleration models;

[0052] Step 4: Evaluate and analyze the life test data of the test objects: Mark the test objects that fail the life test simulated by the corresponding acceleration model as failed objects, mark the number of failed objects as the failure value, mark the ratio of the failure value to L1 as the failure coefficient, and evaluate the overall life performance of the batch of power semiconductor devices through the failure coefficient.

[0053] An intelligent evaluation system for the service life adapted to the design of power semiconductor devices. During operation, it generates continuous evaluation cycles, marks the power semiconductor devices to be evaluated in the same batch as evaluation objects, randomly selects L1 samples from the evaluation objects as test objects, and conducts life evaluation analysis on the test objects in an equalization mode: randomly and evenly assigns the test objects to the acceleration models, and conducts life test analysis on the test objects according to the assigned acceleration models; or conducts life evaluation analysis on the test objects in a propensity mode: marks the product of L1 and the assignment coefficient as the assignment value of the acceleration model, randomly assigns the test objects to the acceleration models according to the assignment value, and conducts life test analysis on the test objects according to the assigned acceleration models; marks the test objects that fail the life test simulation of the corresponding acceleration model as faulty objects, marks the number of faulty objects as the fault value, marks the ratio of the fault value to L1 as the fault coefficient, and evaluates the overall life performance of this batch of power semiconductor devices through the fault coefficient.

[0054] The above content is only an example and explanation of the structure of the present invention. Those skilled in the art of this technology can make various modifications or supplements to the described specific embodiments or use similar methods to replace them. As long as they do not deviate from the structure of the invention or exceed the scope defined by this claim book, they should all fall within the protection scope of the present invention.

[0055] In the description of this specification, the description with reference to terms such as "one embodiment", "example", "specific example", etc. means that the specific features, structures, materials or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic expressions of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described can be combined in a suitable manner in any one or more embodiments or examples.

[0056] The preferred embodiments of the present invention disclosed above are only used to help explain the present invention. The preferred embodiments do not elaborate on all the details, nor do they limit the invention to only the specific implementation manners. Obviously, according to the content of this specification, many modifications and changes can be made. This specification selects and specifically describes these embodiments in order to better explain the principles and practical applications of the present invention, so that those skilled in the art of this technology can understand and utilize the present invention well. The present invention is only limited by the claim book and its full scope and equivalents.

Claims

1. An intelligent service life evaluation system adapted to the design of power semiconductor devices, characterized in that: It includes a sampling analysis module, a balanced assessment module, a tendency assessment module and an assessment analysis module; the sampling analysis module is communicatively connected with the balanced assessment module and the tendency assessment module, and the assessment analysis module is communicatively connected with the balanced assessment module and the tendency assessment module; The sampling analysis module is used to extract evaluation samples of power semiconductor devices: generate continuous evaluation cycles, mark the power semiconductor devices to be evaluated in the same batch as evaluation objects, randomly select L1 samples from the evaluation objects as test objects, and mark the evaluation modes of all device types as balanced modes at the beginning of the first evaluation cycle; and mark the evaluation mode of the device type in the next evaluation cycle as balanced mode or tendency mode at the end of each evaluation cycle; The balanced evaluation module is used to perform life evaluation analysis on the test object using a balanced mode; The tendency assessment module is used to perform life assessment analysis on the test object using a tendency model; The evaluation and analysis module is used to evaluate and analyze the life test data of the test object: mark the test object that fails the life test test simulated by the corresponding acceleration model as a fault object, mark the number of fault objects as a fault value, mark the ratio of the fault value to L1 as a fault coefficient, and determine whether the life evaluation result of the evaluation object is qualified by the fault coefficient; The specific process of the balanced assessment module using the balanced mode to conduct life assessment analysis on the test object includes: uniformly and randomly assigning the test object to the acceleration model, and performing life test analysis on the test object according to the assigned acceleration model; The specific process of the tendency assessment module using the tendency model to perform life assessment analysis on the test object includes: marking the product of L1 and the distribution coefficient as the distribution value of the acceleration model, randomly assigning the test object to the acceleration model according to the distribution value, and performing life test analysis on the test object according to the assigned acceleration model.

2. The intelligent service life evaluation system adapted for power semiconductor device design according to claim 1, characterized in that: The specific process of marking the evaluation mode of the device type includes: using the acceleration model to perform life evaluation analysis on the test object within the evaluation cycle, the acceleration models include the Arrhenius model, the inverse power law model, the Eyring model and the Coffin-Manson model, and at the end of the evaluation cycle, the fault objects of each device type are centrally analyzed and the evaluation mode of the device type in the next evaluation cycle is marked as a balanced mode or a tendency mode.

3. The intelligent service life evaluation system adapted for power semiconductor device design according to claim 2, characterized in that: The specific process of centralized analysis of fault objects of device types includes: marking the acceleration model used by fault objects of the same device type as the diagnostic model of the fault object, marking the number of times the acceleration model is marked as the diagnostic model as the diagnostic value, performing variance calculation on the diagnostic values ​​of all acceleration models corresponding to the same device type to obtain a tendency coefficient, and comparing the tendency coefficient with a preset tendency threshold: if the tendency coefficient is less than the tendency threshold, the evaluation mode of the device type in the next evaluation cycle is marked as the balanced mode; if the tendency coefficient is greater than or equal to the tendency threshold, the evaluation mode of the device type in the next evaluation cycle is marked as the tendency mode, the sum of the diagnostic values ​​of all acceleration models is marked as the fault base number, and the ratio of the diagnostic value of the acceleration model to the fault base number is marked as the allocation coefficient of the acceleration model.

4. The intelligent service life evaluation system adapted for power semiconductor device design according to claim 3 is characterized in that: The specific process of determining whether the life assessment result of the assessment object is qualified includes: comparing the failure coefficient with the preset failure threshold: if the failure coefficient is less than the failure threshold, the life assessment result of the assessment object is determined to be qualified; if the failure coefficient is greater than or equal to the failure threshold, the life assessment result of the assessment object is determined to be unqualified, generating a life abnormality signal and sending the life abnormality signal to the mobile phone terminal of the manager.

5. The intelligent service life evaluation system adapted for power semiconductor device design according to claim 4, characterized in that: It also includes a sampling optimization module, which is communicatively connected with the evaluation and analysis module and the sampling analysis module; The sampling optimization module is used to optimize and analyze the sample extraction link of power semiconductor devices: in the first evaluation cycle, before the life test analysis of the test object is performed on the test object through the acceleration model, basic tests are performed on all test objects and basic parameters of the test objects are obtained, the basic parameters include on-resistance, size error, rated current and rated voltage, all test objects of the same device type are sorted according to the value of a single basic parameter to obtain resistance sequence, size sequence, current sequence and voltage sequence respectively, wherein the resistance sequence and error sequence are arranged in the order of the basic parameter value from large to small, and the current sequence and voltage sequence are arranged in the order of the basic parameter value from small to large, the serial numbers of the fault objects screened out in the evaluation and analysis process of the same device type in the resistance sequence, size sequence, current sequence and voltage sequence are summed and averaged, and the resistance priority value, size priority value, current priority value and voltage priority value are obtained, and the basic parameter corresponding to the minimum value among the resistance priority value, size priority value, current priority value and voltage priority value is marked as the priority parameter of the device type; the priority parameters of all device types are sent to the sampling analysis module.

6. The intelligent service life evaluation system adapted for power semiconductor device design according to claim 5, characterized in that: In the subsequent evaluation cycle, the sampling analysis module performs basic tests on all evaluation objects according to their device types and obtains priority parameters of the evaluation objects, sorts the evaluation objects according to the sorting rules of the priority parameters to obtain a priority sequence, and marks the first L1 evaluation objects in the priority sequence as test objects.

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